Automatic CPU type detection code from Eric Valette <valette@crf.canon.fr>.

Enabled on the pc386.
This commit is contained in:
Joel Sherrill committed 1998-08-05 15:15:46 +00:00
1 parent 50947110ec
commit ab0df696d0
17 files changed
+698 -30

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+1
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@@ -92,6 +92,7 @@
#define edi REG (edi)
#define esp REG (esp)
#define ebp REG (ebp)
#define cr0 REG (cr0)
#define ax REG (ax)
#define bx REG (bx)
+4 -2
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@@ -50,12 +50,14 @@ CLEAN_ADDITIONS +=
CLOBBER_ADDITIONS +=
all: ${ARCH} $(SRCS) preinstall $(PGMS)
$(INSTALL) $(INSTBINFLAGS) ${PGMS} ${PROJECT_RELEASE}/bin
# Hack
# we are #including files that haven't been installed yet.
# Make sure they are available.
preinstall: FORCEIT
preinstall: ${ARCH} headers $(SRCS) $(PGMS)
$(INSTALL) $(INSTBINFLAGS) ${PGMS} ${PROJECT_RELEASE}/bin
headers: FORCE
cd $(CPU_DIR); $(MAKE) install-headers
# Install the program(s), appending _g or _p as appropriate.
+5 -2
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@@ -146,8 +146,11 @@ extern "C" {
extern rtems_configuration_table BSP_Configuration;
extern i386_IDT_slot Interrupt_descriptor_table[ 256 ];
extern i386_GDT_slot Global_descriptor_table[ 8192 ];
#define IDT_SIZE 256
#define GDT_SIZE 8192
extern interrupt_gate_descriptor Interrupt_descriptor_table[IDT_SIZE];
extern segment_descriptors Global_descriptor_table [GDT_SIZE];
BSP_EXTERN unsigned short Idt[3]; /* Interrupt Descriptor Table Address */
BSP_EXTERN unsigned short Gdt[3]; /* Global Descriptor Table Address */
@@ -32,7 +32,7 @@ i386_isr_entry set_vector( /* returns old vector */
)
{
i386_isr_entry previous_isr;
i386_IDT_slot idt;
interrupt_gate_descriptor idt;
if ( type )
rtems_interrupt_catch( handler, vector, (rtems_isr_entry *) &previous_isr );
+5 -2
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@@ -116,8 +116,11 @@ extern "C" {
extern rtems_configuration_table BSP_Configuration;
extern i386_IDT_slot Interrupt_descriptor_table[ 256 ];
extern i386_GDT_slot Global_descriptor_table[ 8192 ];
#define IDT_SIZE 256
#define GDT_SIZE 8192
extern interrupt_gate_descriptor Interrupt_descriptor_table[IDT_SIZE];
extern segment_descriptors Global_descriptor_table [GDT_SIZE];
BSP_EXTERN unsigned short Idt[3]; /* Interrupt Descriptor Table Address */
BSP_EXTERN unsigned short Gdt[3]; /* Global Descriptor Table Address */
@@ -32,7 +32,7 @@ i386_isr_entry set_vector( /* returns old vector */
)
{
i386_isr_entry previous_isr;
i386_IDT_slot idt;
interrupt_gate_descriptor idt;
if ( type )
rtems_interrupt_catch( handler, vector, (rtems_isr_entry *) &previous_isr );
@@ -45,11 +45,7 @@ i386_isr_entry set_vector( /* returns old vector */
((idt.offset_16_31 << 16) | idt.offset_0_15);
/* build the IDT entry */
idt.offset_0_15 = ((rtems_unsigned32) handler) & 0xffff;
idt.segment_selector = get_cs();
idt.reserved = 0x00;
idt.p_dpl = 0x8e; /* present, ISR */
idt.offset_16_31 = ((rtems_unsigned32) handler) >> 16;
create_interrupt_gate_descriptor( &idt, handler );
/* install the IDT entry */
Interrupt_descriptor_table[ vector ] = idt;
@@ -232,7 +232,11 @@ console_initialize(rtems_device_major_number major,
printk("Initialized console on port COM2 9600-8-N-1\n\n");
}
}
#define DISPLAY_CPU_INFO
#ifdef DISPLAY_CPU_INFO
printCpuInfo();
#endif
return RTEMS_SUCCESSFUL;
} /* console_initialize */
+5 -8
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@@ -64,6 +64,8 @@ BEGIN_CODE
EXTERN (_return_to_monitor)
EXTERN (_IBMPC_initVideo)
EXTERN (debugPollingGetChar)
EXTERN (checkCPUtypeSetCr0)
/*
* In case this crashes on your machine and this is not due
@@ -87,8 +89,8 @@ speakl: jmp speakl # and SPIN!!!
nop
cli # DISABLE INTERRUPTS!!!
#ifdef DEBUG_EARLY_START
cld
#ifdef DEBUG_EARLY_START
/*
* Must get video attribute to have a working printk.
* Note that the following code assume we already have
@@ -149,14 +151,9 @@ SYM (zero_bss):
stosl # clear a long in the bss
/*---------------------------------------------------------------------+
| Initialize the i387.
|
| Using the NO WAIT form of the instruction insures that if it is not
| present the board will not lock up or get an exception.
| Check CPU type. Enable Cache and init coprocessor if needed.
+---------------------------------------------------------------------*/
fninit # MUST USE NO-WAIT FORM
call checkCPUtypeSetCr0
/*---------------------------------------------------------------------+
| Transfer control to User's Board Support Package
+---------------------------------------------------------------------*/
@@ -37,7 +37,8 @@
#include <bsp.h>
#include <libcsupport.h>
#include <rtems/libio.h>
#include <libcpu/cpuModel.h>
/*-------------------------------------------------------------------------+
| Global Variables
+--------------------------------------------------------------------------*/
@@ -58,6 +59,7 @@ extern rtems_configuration_table Configuration;
rtems_cpu_table Cpu_table; /* CPU configuration table. */
char *rtems_progname; /* Program name - from main(). */
extern void debugPollingGetChar();
/*-------------------------------------------------------------------------+
| External Prototypes
@@ -130,7 +132,7 @@ void bsp_start( void )
console_reserve_resources(&BSP_Configuration);
/*
* Init trems_interrupt_management
* Init rtems_interrupt_management
*/
rtems_irq_mngt_init();
+3 -3
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@@ -11,14 +11,14 @@ PROJECT_ROOT = @PROJECT_ROOT@
PGM=${ARCH}/libcpu.rel
# C source names, if any, go here -- minus the .c
C_PIECES=cpu
C_PIECES=cpu displayCpu
C_FILES=$(C_PIECES:%=%.c)
C_O_FILES=$(C_PIECES:%=${ARCH}/%.o)
H_FILES=$(srcdir)/cpu.h
H_FILES=$(srcdir)/cpu.h $(srcdir)/registers.h $(srcdir)/cpuModel.h
# Assembly source names, if any, go here -- minus the .s
S_PIECES=cpu_asm
S_PIECES=cpu_asm cpuModel
S_FILES=$(S_PIECES:%=%.S)
S_O_FILES=$(S_FILES:%.S=${ARCH}/%.o)
+6 -3
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@@ -18,8 +18,11 @@
* $Id$
*/
#ifndef _i386_CPU_H
#define _i386_CPU_H
#ifndef _LIBCPU_i386_CPU_H
#define _LIBCPU_i386_CPU_H
#include <libcpu/registers.h>
#ifndef ASM
@@ -63,7 +66,7 @@
: "=r" ((_eflags)) : "0" ((_eflags)) \
); \
\
_level = (_eflags & 0x0200) ? 0 : 1; \
_level = (_eflags & EFLAGS_INTR_ENABLE) ? 0 : 1; \
} while (0)
#define _CPU_ISR_Disable( _level ) i386_disable_interrupts( _level )
File diff suppressed because it is too large. Load diff
+32
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@@ -0,0 +1,32 @@
/* cpuModel.h
*
* This file contains declaration for variables and code
* that may be used to get the Intel Cpu identification
* that has been performed by checkCPUtypeSetCr0 function.
*
* COPYRIGHT (c) 1998 valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
/*
* Tell us the machine setup..
*/
#include <stdio.h>
#include <libcpu/cpu.h>
#include <string.h>
extern char hard_math; /* flotting point coprocessor present indicator */
extern char x86; /* type of cpu (3 = 386, 4 =486, ...) */
extern char x86_model;
extern char x86_mask;
extern int x86_capability;
extern char x86_vendor_id[13];
extern int have_cpuid;
extern unsigned char Cx86_step; /* cyrix processor identification */
extern voidget_cpuinfo(); /* Display this information in ascii form */
File diff suppressed because it is too large. Load diff
+159
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@@ -0,0 +1,159 @@
/* registers.h
*
* This file contains definition and constants related to Intel Cpu
*
* COPYRIGHT (c) 1998 valette@crf.canon.fr
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.OARcorp.com/rtems/license.html.
*
* $Id$
*/
#ifndef _LIBCPU_i386_REGISTERS_H
#define _LIBCPU_i386_REGISTERS_H
/*
* definition related to EFLAGS
*/
#define EFLAGS_CARRY 0x1
#define EFLAGS_PARITY 0x4
#define EFLAGS_AUX_CARRY 0x10
#define EFLAGS_ZERO 0x40
#define EFLAGS_SIGN 0x80
#define EFLAGS_TRAP 0x100
#define EFLAGS_INTR_ENABLE 0x200
#define EFLAGS_DIRECTION 0x400
#define EFLAGS_OVERFLOW 0x800
#define EFLAGS_IOPL_MASK 0x3000
#define EFLAGS_NESTED_TASK 0x8000
#define EFLAGS_RESUME 0x10000
#define EFLAGS_VIRTUAL_MODE 0x20000
#define EFLAGS_ALIGN_CHECK 0x40000
#define EFLAGS_VIRTUAL_INTR 0x80000
#define EFLAGS_VIRTUAL_INTR_PEND 0x100000
#define EFLAGS_ID 0x200000
/*
* definitions related to CR0
*/
#define CR0_PROTECTION_ENABLE 0x1
#define CR0_MONITOR_COPROC 0x2
#define CR0_COPROC_SOFT_EMUL 0x4
#define CR0_FLOATING_INSTR_EXCEPTION 0x8
#define CR0_EXTENSION_TYPE 0x10
#define CR0_NUMERIC_ERROR 0x20
#define CR0_WRITE_PROTECT 0x10000
#define CR0_ALIGMENT_MASK 0x40000
#define CR0_NO_WRITE_THROUGH 0x20000000
#define CR0_PAGE_LEVEL_CACHE_DISABLE 0x40000000
#define CR0_PAGING 0x80000000
#ifndef ASM
/*
* definition of eflags registers has a bit field structure
*/
typedef struct {
/*
* fist byte : bits 0->7
*/
unsigned int carry : 1;
unsigned int : 1;
unsigned int parity : 1;
unsigned int : 1;
unsigned int auxiliary_carry : 1;
unsigned int : 1;
unsigned int zero : 1; /* result is zero */
unsigned int sign : 1; /* result is less than zero */
/*
* Second byte : bits 7->15
*/
unsigned int trap : 1;
unsigned int intr_enable : 1; /* set => intr on */
unsigned int direction : 1; /* set => autodecrement */
unsigned int overflow : 1;
unsigned int IO_privilege : 2;
unsigned int nested_task : 1;
unsigned int : 1;
/*
* Third byte : bits 15->23
*/
unsigned int resume : 1;
unsigned int virtual_mode : 1;
unsigned int aligment_check : 1;
unsigned int virtual_intr : 1;
unsigned int virtual_intr_pending : 1;
unsigned int id : 1;
unsigned int : 2;
/*
* fourth byte : bits 24->31 : UNUSED
*/
unsigned int : 8;
}eflags_bits;
typedef union {
eflags_bits eflags;
unsigned int i;
}eflags;
/*
* definition of eflags registers has a bit field structure
*/
typedef struct {
/*
* fist byte : bits 0->7
*/
unsigned int protection_enable : 1;
unsigned int monitor_coproc : 1;
unsigned int coproc_soft_emul : 1;
unsigned int floating_instr_except : 1;
unsigned int extension_type : 1;
unsigned int numeric_error : 1;
unsigned int : 2;
/*
* second byte 8->15 : UNUSED
*/
unsigned int : 8;
/*
* third byte 16->23
*/
unsigned int write_protect : 1;
unsigned int : 1;
unsigned int aligment_mask : 1;
unsigned int : 1;
unsigned int : 4;
/*
* fourth byte 24->31
*/
unsigned int : 4;
unsigned int : 1;
unsigned int no_write_through : 1;
unsigned int page_level_cache_disable : 1;
unsigned int paging : 1;
}cr0_bits;
typedef union {
cr0_bits cr0;
unsigned int i;
}cr0;
#endif
#endif
+1
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@@ -92,6 +92,7 @@
#define edi REG (edi)
#define esp REG (esp)
#define ebp REG (ebp)
#define cr0 REG (cr0)
#define ax REG (ax)
#define bx REG (bx)
+1
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@@ -92,6 +92,7 @@
#define edi REG (edi)
#define esp REG (esp)
#define ebp REG (ebp)
#define cr0 REG (cr0)
#define ax REG (ax)
#define bx REG (bx)