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bsps/leon3: Send the IPI on bus line 0
The BSP sent the inter-processor interrupt on bus line 14 and followed the interrupt map. The GR765 reset map maps bus line 14 to controller line 1, which the DMA controllers use. The GR765 keeps the controller lines 13 and 14 free after reset. No peripheral drives bus line 0. Add the option LEON3_IPI_BUS_LINE for the initial value of LEON3_mp_irq. It is 0 for the GR740 and the GR765, and 14 otherwise. With a map, map bus line 0 in the copy to the controller line defined by the new option LEON3_IPI_CONTROLLER_LINE, which is 14 by default. Accept vector 0 where its map entry is not zero. Let the shared memory driver force the controller line of LEON3_mp_irq. Assisted-by: Claude:claude-opus-5-5 claude-code Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
This commit is contained in:
committed by
Kinsey Moore
parent
795abe60c4
commit
a7a701b67c
@@ -213,9 +213,14 @@ RTEMS_DEPRECATED static inline void BSP_shared_interrupt_mask( int irq )
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}
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#if defined( RTEMS_SMP ) || defined( RTEMS_MULTIPROCESSING )
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/* Irq used by the shared memory driver and for inter-processor interrupts.
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* The variable is weakly linked. Redefine the variable in your application
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* to override the BSP default.
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/**
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* @brief This constant is the bus line of the shared memory driver and of the
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* inter-processor interrupts.
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*
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* The BSP option LEON3_IPI_BUS_LINE defines the initial value. The constant
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* is weakly linked, so an application may define it. Where the BSP uses the
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* interrupt map, keep the value zero. The BSP maps bus line 0 to the
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* controller line defined by the BSP option LEON3_IPI_CONTROLLER_LINE.
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*/
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extern const unsigned char LEON3_mp_irq;
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#endif
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@@ -69,6 +69,8 @@ extern "C" {
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* Where the BSP uses no interrupt map, a bus line maps to the controller line
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* of the same number. Where the BSP uses the interrupt map, the directive
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* gets the controller line to which the interrupt map connects the bus line.
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* In SMP and multiprocessing configurations, bus line 0 connects to the
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* controller line defined by the BSP option LEON3_IPI_CONTROLLER_LINE.
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*
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* Bus lines which map to the same controller line share its interrupt
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* handlers. They also share its enable, pending and affinity state.
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@@ -118,9 +118,11 @@ extern uint32_t LEON3_IrqCtrl_EIrq;
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* interrupt clear register, which clears every pending interrupt. Where the
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* BSP uses the interrupt map, the function copies the interrupt map entry of
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* each bus line into the interrupt map copy of the BSP. It masks each entry
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* by the count of controller lines. Where the BSP determines the extended
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* controller line at run time, the function reads it from the interrupt
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* controller.
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* by the count of controller lines. In SMP and multiprocessing
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* configurations, it maps bus line 0 to the controller line defined by the
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* BSP option LEON3_IPI_CONTROLLER_LINE. Where the BSP determines the
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* extended controller line at run time, the function reads it from the
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* interrupt controller.
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*
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* @param[in, out] regs is the register block address of the first IRQ(A)MP
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* interrupt controller. Only the first controller provides the interrupt
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@@ -17,6 +17,7 @@
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#include <rtems.h>
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#include <bsp.h>
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#include <bsp/irqimpl.h>
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#include <leon.h>
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#include <shm_driver.h>
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@@ -63,7 +64,8 @@ void Shm_Get_configuration( uint32_t localnode, shm_config_table **shmcfg )
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LEON3_IrqCtrl_Regs->piforce[ LEON3_Cpu_Index ]
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);
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if ( BSP_shm_cfgtbl.Intr.value == 0 ) {
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BSP_shm_cfgtbl.Intr.value = 1 << LEON3_mp_irq; /* Use default MP-IRQ */
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BSP_shm_cfgtbl.Intr.value = 1U
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<< leon3_irqmap_get_unchecked( LEON3_mp_irq );
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}
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BSP_shm_cfgtbl.Intr.length = 4;
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@@ -49,10 +49,11 @@
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#include <rtems/sysinit.h>
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#if defined( RTEMS_SMP ) || defined( RTEMS_MULTIPROCESSING )
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/* Irq used by shared memory driver and for inter-processor interrupts.
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* Can be overridden by being defined in the application.
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/*
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* The bus line of the shared memory driver and of the inter-processor
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* interrupts. An application may define it.
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*/
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const unsigned char LEON3_mp_irq __attribute__(( weak )) = 14;
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const unsigned char LEON3_mp_irq __attribute__(( weak )) = LEON3_IPI_BUS_LINE;
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#endif
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/*
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@@ -119,19 +119,28 @@ void leon3_ext_irq_init( irqamp *regs )
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IRQAMP_IRQMAP_IRQMAP_4_N_3_GET( irqmap_n )
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);
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}
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#if defined( RTEMS_SMP ) || defined( RTEMS_MULTIPROCESSING )
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/*
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* No peripheral drives bus line 0. The copy maps it to the controller line
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* of the inter-processor interrupt.
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*/
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LEON3_IrqCtrl_Mapping[ 0 ] = LEON3_IPI_CONTROLLER_LINE;
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#endif
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#endif
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}
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bool bsp_interrupt_is_valid_vector( rtems_vector_number vector )
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{
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#if LEON3_IRQMAP_BUS_LINE_COUNT != 0
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return vector < BSP_INTERRUPT_VECTOR_COUNT &&
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leon3_irqmap_get_unchecked( vector ) != 0;
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#else
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if ( vector == 0 ) {
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return false;
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}
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#if LEON3_IRQMAP_BUS_LINE_COUNT != 0
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return vector < BSP_INTERRUPT_VECTOR_COUNT &&
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leon3_irqmap_get_unchecked( vector ) != 0;
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#elif defined( LEON3_IRQAMP_EXTENDED_INTERRUPT )
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#if defined( LEON3_IRQAMP_EXTENDED_INTERRUPT )
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return vector <= BSP_INTERRUPT_VECTOR_MAX_EXT;
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#else
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if ( LEON3_IrqCtrl_EIrq > 0 ) {
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@@ -140,6 +149,7 @@ bool bsp_interrupt_is_valid_vector( rtems_vector_number vector )
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return vector <= BSP_INTERRUPT_VECTOR_MAX_STD;
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#endif
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#endif
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}
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#if defined( RTEMS_SMP )
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@@ -46,8 +46,12 @@ links:
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uid: optirqampbase
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- role: build-dependency
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uid: optirqampextirq
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- role: build-dependency
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uid: optipibusline
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- role: build-dependency
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uid: optirqmapbuslinecount
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- role: build-dependency
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uid: optipicontrollerline
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- role: build-dependency
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uid: optirqampts
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- role: build-dependency
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@@ -0,0 +1,25 @@
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SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
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actions:
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- get-integer: null
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- format-and-define: null
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build-type: option
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copyrights:
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- Copyright (C) 2026 embedded brains GmbH & Co. KG
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default:
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- enabled-by:
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- sparc/gr740
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- sparc/gr765
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value: 0
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- enabled-by: true
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value: 14
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description: |
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This option defines the initial value of LEON3_mp_irq, the bus line of the
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inter-processor interrupt and of the shared memory driver. Where the BSP
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uses the interrupt map, the value zero selects bus line 0. No peripheral
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drives this bus line, and the BSP maps it to the controller line defined by
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LEON3_IPI_CONTROLLER_LINE.
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enabled-by: true
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format: '{}'
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links: []
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name: LEON3_IPI_BUS_LINE
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type: build
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@@ -0,0 +1,25 @@
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SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
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actions:
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- get-integer: null
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- assert-in-set:
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- 13
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- 14
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- format-and-define: null
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build-type: option
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copyrights:
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- Copyright (C) 2026 embedded brains GmbH & Co. KG
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default:
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- enabled-by: true
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value: 14
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description: |
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This option defines the controller line of the inter-processor interrupt.
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Only a BSP which uses the interrupt map uses the option. The BSP maps bus
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line 0 to this controller line in the copy of the interrupt map and leaves
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the interrupt map register unchanged. The GR765 keeps the controller lines
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13 and 14 free of peripherals after reset, see GR765-DSUM, section 14.2.3.
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Controller line 15 is not maskable.
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enabled-by: LEON3_IRQMAP_BUS_LINE_COUNT
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format: '{}'
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links: []
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name: LEON3_IPI_CONTROLLER_LINE
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type: build
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@@ -6,6 +6,7 @@ actions:
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- 32
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- 64
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- format-and-define: null
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- env-enable: null
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build-type: option
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copyrights:
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- Copyright (C) 2026 Frontgrade Gaisler
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