2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org>

* console/console.c, irq/irq.c:
	Use "__asm__" instead of "asm" for improved c99-compliance.
This commit is contained in:
Ralf Corsepius
2011-02-11 12:46:34 +00:00
parent 0d01467bb2
commit a42d8b00fe
3 changed files with 11 additions and 6 deletions
@@ -1,3 +1,8 @@
2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org>
* console/console.c, irq/irq.c:
Use "__asm__" instead of "asm" for improved c99-compliance.
2011-02-02 Ralf Corsépius <ralf.corsepius@rtems.org>
* configure.ac: Require autoconf-2.68, automake-1.11.1.
@@ -174,7 +174,7 @@ static int _EPPCBug_pollRead(
simask = m8xx.simask;
/* Check for a char in the input FIFO using .CIO_STAT */
asm volatile( "li 10,0x202\n\
__asm__ volatile( "li 10,0x202\n\
mr 3, %0\n\
mr 4, %1\n\
sc"
@@ -186,7 +186,7 @@ static int _EPPCBug_pollRead(
input_params.inbuf = &c;
input_params.nbytes_requested = 1;
asm volatile( "li 10,0x200 /* Code for .CIO_READ */\n\
__asm__ volatile( "li 10,0x200 /* Code for .CIO_READ */\n\
mr 3, %0 /* Address of input_params */\n\
mr 4, %1 /* Address of output_params */\n\
sc" /* Call EPPCBUG */
@@ -284,7 +284,7 @@ static ssize_t _EPPCBug_pollWrite(
/* Wait for space in the output buffer */
do {
/* Check for space in the output FIFO */
asm volatile( "li 10,0x202 /* Code for .CIO_STAT */\n\
__asm__ volatile( "li 10,0x202 /* Code for .CIO_STAT */\n\
mr 3, %0 /* Address of input_params */\n\
mr 4, %1 /* Address of output_params */\n\
sc" /* Call EPPCBUG */
@@ -298,7 +298,7 @@ static ssize_t _EPPCBug_pollWrite(
input_params.outbuf = &buf[i];
input_params.nbytes_to_output = len - i;
asm volatile( "li 10,0x201 /* Code for .CIO_WRITE */\n\
__asm__ volatile( "li 10,0x201 /* Code for .CIO_WRITE */\n\
mr 3, %0 /* Address of input_params */\n\
mr 4, %1 /* Address of output_params */\n\
sc" /* Call EPPCBUG */
+2 -2
View File
@@ -222,7 +222,7 @@ int C_dispatch_irq_handler (BSP_Exception_frame *frame, unsigned int excNum)
* make sure, that the masking operations in
* ICTL and MSR are executed in order
*/
asm volatile("sync":::"memory");
__asm__ volatile("sync":::"memory");
_CPU_MSR_GET(msr);
new_msr = msr | MSR_EE;
@@ -236,7 +236,7 @@ int C_dispatch_irq_handler (BSP_Exception_frame *frame, unsigned int excNum)
* make sure, that the masking operations in
* ICTL and MSR are executed in order
*/
asm volatile("sync":::"memory");
__asm__ volatile("sync":::"memory");
if (cpmIntr) {
irq -= BSP_CPM_IRQ_LOWEST_OFFSET;