mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
synced 2026-08-25 00:53:10 +08:00
2011-08-31 Sebastian Huber <sebastian.huber@embedded-brains.de>
* mpc55xx/include/fsl-mpc551x.h, mpc55xx/include/fsl-mpc555x.h, mpc55xx/include/fsl-mpc556x.h, mpc55xx/include/fsl-mpc567x.h, mpc55xx/include/regs-edma.h, mpc55xx/include/regs-mmu.h: New files. * Makefile.am, M preinstall.am: Reflect changes above. * mpc55xx/dspi/dspi.c: Update due to API changes. * mpc55xx/include/edma.h, mpc55xx/edma/edma.c: Rework to support multiple eDMA modules. Removed complex error interrupt handling. * mpc55xx/include/esci.h, mpc55xx/esci/esci.c: Support interrupt mode and printk(). Use configure options. * mpc55xx/include/irq.h: More defines. API changes. * mpc55xx/include/mpc55xx.h: API changes. * mpc55xx/include/reg-defs.h: Added register defines. * mpc55xx/include/regs.h: Use new register header files. * mpc55xx/include/siu.h: Fixed includes. * mpc55xx/misc/fmpll.S, mpc55xx/misc/copy.S, mpc55xx/misc/flash.S: Changed sections. API changes. Support MPC5674F.
This commit is contained in:
Sebastian Huber
@@ -1,3 +1,22 @@
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2011-08-31 Sebastian Huber <sebastian.huber@embedded-brains.de>
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* mpc55xx/include/fsl-mpc551x.h, mpc55xx/include/fsl-mpc555x.h,
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mpc55xx/include/fsl-mpc556x.h, mpc55xx/include/fsl-mpc567x.h,
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mpc55xx/include/regs-edma.h, mpc55xx/include/regs-mmu.h: New files.
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* Makefile.am, M preinstall.am: Reflect changes above.
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* mpc55xx/dspi/dspi.c: Update due to API changes.
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* mpc55xx/include/edma.h, mpc55xx/edma/edma.c: Rework to support
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multiple eDMA modules. Removed complex error interrupt handling.
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* mpc55xx/include/esci.h, mpc55xx/esci/esci.c: Support interrupt mode
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and printk(). Use configure options.
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* mpc55xx/include/irq.h: More defines. API changes.
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* mpc55xx/include/mpc55xx.h: API changes.
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* mpc55xx/include/reg-defs.h: Added register defines.
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* mpc55xx/include/regs.h: Use new register header files.
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* mpc55xx/include/siu.h: Fixed includes.
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* mpc55xx/misc/fmpll.S, mpc55xx/misc/copy.S, mpc55xx/misc/flash.S:
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Changed sections. API changes. Support MPC5674F.
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2011-08-31 Sebastian Huber <sebastian.huber@embedded-brains.de>
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* new-exceptions/bspsupport/ppc_exc_categories.c,
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@@ -411,15 +411,23 @@ if mpc55xx
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# Includes
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include_mpc55xxdir = $(includedir)/mpc55xx
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include_mpc55xx_HEADERS = mpc55xx/include/regs.h \
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mpc55xx/include/reg-defs.h \
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mpc55xx/include/dspi.h \
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mpc55xx/include/edma.h \
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mpc55xx/include/emios.h \
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mpc55xx/include/mpc55xx.h \
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mpc55xx/include/esci.h \
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mpc55xx/include/siu.h \
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mpc55xx/include/watchdog.h
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include_mpc55xx_HEADERS =
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include_mpc55xx_HEADERS += mpc55xx/include/regs.h
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include_mpc55xx_HEADERS += mpc55xx/include/reg-defs.h
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include_mpc55xx_HEADERS += mpc55xx/include/dspi.h
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include_mpc55xx_HEADERS += mpc55xx/include/edma.h
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include_mpc55xx_HEADERS += mpc55xx/include/emios.h
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include_mpc55xx_HEADERS += mpc55xx/include/mpc55xx.h
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include_mpc55xx_HEADERS += mpc55xx/include/esci.h
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include_mpc55xx_HEADERS += mpc55xx/include/siu.h
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include_mpc55xx_HEADERS += mpc55xx/include/irq.h
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include_mpc55xx_HEADERS += mpc55xx/include/watchdog.h
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include_mpc55xx_HEADERS += mpc55xx/include/fsl-mpc551x.h
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include_mpc55xx_HEADERS += mpc55xx/include/fsl-mpc555x.h
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include_mpc55xx_HEADERS += mpc55xx/include/fsl-mpc556x.h
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include_mpc55xx_HEADERS += mpc55xx/include/fsl-mpc567x.h
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include_mpc55xx_HEADERS += mpc55xx/include/regs-edma.h
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include_mpc55xx_HEADERS += mpc55xx/include/regs-mmu.h
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include_bsp_HEADERS += mpc55xx/include/irq.h
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@@ -22,6 +22,8 @@
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#include <mpc55xx/dspi.h>
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#include <mpc55xx/mpc55xx.h>
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#include <bsp/irq.h>
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#include <libcpu/powerpc-utility.h>
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#define RTEMS_STATUS_CHECKS_USE_PRINTK
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@@ -172,7 +174,7 @@ static rtems_status_code mpc55xx_dspi_init( rtems_libi2c_bus_t *bus)
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);
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RTEMS_CHECK_SC( sc, "create receive update semaphore");
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sc = mpc55xx_edma_obtain_channel( &e->edma_receive);
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sc = mpc55xx_edma_obtain_channel( &e->edma_receive, MPC55XX_INTC_DEFAULT_PRIORITY);
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RTEMS_CHECK_SC( sc, "obtain receive eDMA channel");
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/* eDMA transmit */
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@@ -185,10 +187,10 @@ static rtems_status_code mpc55xx_dspi_init( rtems_libi2c_bus_t *bus)
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);
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RTEMS_CHECK_SC( sc, "create transmit update semaphore");
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sc = mpc55xx_edma_obtain_channel( &e->edma_transmit);
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sc = mpc55xx_edma_obtain_channel( &e->edma_transmit, MPC55XX_INTC_DEFAULT_PRIORITY);
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RTEMS_CHECK_SC( sc, "obtain transmit eDMA channel");
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sc = mpc55xx_edma_obtain_channel( &e->edma_push);
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sc = mpc55xx_edma_obtain_channel( &e->edma_push, MPC55XX_INTC_DEFAULT_PRIORITY);
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RTEMS_CHECK_SC( sc, "obtain push eDMA channel");
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tcd_push.SADDR = mpc55xx_dspi_push_data_address( e);
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File diff suppressed because it is too large
Load Diff
@@ -7,15 +7,19 @@
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*/
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/*
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* Copyright (c) 2008
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* Embedded Brains GmbH
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* Obere Lagerstr. 30
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* D-82178 Puchheim
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* Germany
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* rtems@embedded-brains.de
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* Copyright (c) 2008-2011 embedded brains GmbH. All rights reserved.
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*
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* The license and distribution terms for this file may be found in the file
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* LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
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* embedded brains GmbH
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* Obere Lagerstr. 30
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* 82178 Puchheim
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* Germany
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* <rtems@embedded-brains.de>
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.com/license/LICENSE.
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*
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* $Id$
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*/
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/* Include order is important */
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@@ -23,6 +27,7 @@
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#include <mpc55xx/esci.h>
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#include <bsp/irq.h>
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#include <assert.h>
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#include <unistd.h>
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#include <termios.h>
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@@ -31,9 +36,7 @@
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#include <rtems/console.h>
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#include <rtems/bspIo.h>
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#define RTEMS_STATUS_CHECKS_USE_PRINTK
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#include <rtems/status-checks.h>
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#include <bspopts.h>
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/* Evil define conflicts */
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#define TERMIOS_CR1 CR1
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@@ -45,27 +48,23 @@
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#define MPC55XX_ESCI_IS_MINOR_INVALD(minor) ((minor) < 0 || (minor) >= MPC55XX_ESCI_NUMBER)
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#define MPC55XX_ESCI_USE_INTERRUPTS(e) (!(e)->console && (e)->use_interrupts)
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/**
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* @brief eSCI driver table.
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*/
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mpc55xx_esci_driver_entry mpc55xx_esci_driver_table [MPC55XX_ESCI_NUMBER] = { {
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.regs = &ESCI_A,
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.device_name = "/dev/tty1",
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.device_name = "/dev/ttyS0",
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.use_termios = 1,
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.use_interrupts = 0,
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.console = 1,
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.use_interrupts = MPC55XX_ESCI_USE_INTERRUPTS,
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.tty = NULL,
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.irq_number = 146
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.irq_number = MPC55XX_IRQ_ESCI(0)
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}, {
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.regs = &ESCI_B,
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.device_name = "/dev/tty2",
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.device_name = "/dev/ttyS1",
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.use_termios = 1,
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.use_interrupts = 0,
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.console = 0,
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.use_interrupts = MPC55XX_ESCI_USE_INTERRUPTS,
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.tty = NULL,
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.irq_number = 149
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.irq_number = MPC55XX_IRQ_ESCI(1)
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}
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};
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@@ -104,40 +103,51 @@ static inline uint8_t mpc55xx_esci_read_char( mpc55xx_esci_driver_entry *e)
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return data->B.D;
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}
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/**
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* @brief Writes the character @a c to the transmit register.
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*
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* @note Waits for the transmit data register empty flag.
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*/
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static inline void mpc55xx_esci_write_char( mpc55xx_esci_driver_entry *e, uint8_t c)
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static inline void mpc55xx_esci_write_char(mpc55xx_esci_driver_entry *e, char c)
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{
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volatile union ESCI_SR_tag *status = &e->regs->SR;
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volatile union ESCI_DR_tag *data = &e->regs->DR;
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union ESCI_SR_tag sr = MPC55XX_ZERO_FLAGS;
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static const union ESCI_SR_tag clear_tdre = { .B = { .TDRE = 1 } };
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volatile struct ESCI_tag *esci = e->regs;
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rtems_interrupt_level level;
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bool done = false;
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/* Set clear flag */
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sr.B.TDRE = 1;
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rtems_interrupt_disable(level);
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if (e->transmit_nest_level == 0) {
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union ESCI_CR1_tag cr1 = { .R = esci->CR1.R };
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while (true) {
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rtems_interrupt_disable( level);
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if (status->B.TDRE != 0) {
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/* Clear flag */
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status->R = sr.R;
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/* Write */
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data->B.D = c;
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/* Done */
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rtems_interrupt_enable( level);
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break;
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if (cr1.B.TIE != 0) {
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cr1.B.TIE = 0;
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e->transmit_nest_level = 1;
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esci->CR1.R = cr1.R;
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}
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rtems_interrupt_enable( level);
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} else {
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++e->transmit_nest_level;
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}
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rtems_interrupt_enable(level);
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while (status->B.TDRE == 0) {
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/* Wait */
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while (!done) {
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rtems_interrupt_disable(level);
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bool tx = e->transmit_in_progress;
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if (!tx || (tx && esci->SR.B.TDRE)) {
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esci->SR.R = clear_tdre.R;
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esci->DR.B.D = c;
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e->transmit_in_progress = true;
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done = true;
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}
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rtems_interrupt_enable(level);
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}
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rtems_interrupt_disable(level);
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if (e->transmit_nest_level > 0) {
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--e->transmit_nest_level;
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if (e->transmit_nest_level == 0) {
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union ESCI_CR1_tag cr1 = { .R = esci->CR1.R };
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cr1.B.TIE = 1;
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esci->CR1.R = cr1.R;
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}
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}
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rtems_interrupt_enable(level);
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}
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static inline void mpc55xx_esci_interrupts_enable( mpc55xx_esci_driver_entry *e)
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@@ -186,21 +196,21 @@ static int mpc55xx_esci_termios_first_open( int major, int minor, void *arg)
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/* Check minor number */
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if (MPC55XX_ESCI_IS_MINOR_INVALD( minor)) {
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return RTEMS_INVALID_NUMBER;
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return RTEMS_INVALID_ID;
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}
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/* Connect TTY */
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e->tty = tty;
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/* Enable interrupts */
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if (MPC55XX_ESCI_USE_INTERRUPTS( e)) {
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if (e->use_interrupts) {
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mpc55xx_esci_interrupts_enable( e);
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}
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rv = rtems_termios_set_initial_baud( e->tty, 115200);
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RTEMS_CHECK_RV_SC( rv, "Set initial baud");
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assert(rv == 0);
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return RTEMS_SUCCESSFUL;
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return 0;
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}
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/**
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@@ -214,7 +224,7 @@ static int mpc55xx_esci_termios_last_close( int major, int minor, void* arg)
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/* Check minor number */
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if (MPC55XX_ESCI_IS_MINOR_INVALD( minor)) {
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return RTEMS_INVALID_NUMBER;
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return RTEMS_INVALID_ID;
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}
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/* Disable interrupts */
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@@ -255,7 +265,7 @@ static int mpc55xx_esci_termios_poll_read( int minor)
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*
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* @return Returns number of chars sent on success or -1 otherwise.
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*/
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static int mpc55xx_esci_termios_poll_write( int minor, const char *out,
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static int mpc55xx_esci_termios_poll_write( int minor, const char *out,
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size_t n)
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{
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mpc55xx_esci_driver_entry *e = &mpc55xx_esci_driver_table [minor];
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@@ -285,9 +295,12 @@ static int mpc55xx_esci_termios_poll_write( int minor, const char *out,
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static int mpc55xx_esci_termios_write( int minor, const char *out, size_t n)
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{
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mpc55xx_esci_driver_entry *e = &mpc55xx_esci_driver_table [minor];
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rtems_interrupt_level level;
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/* Write */
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rtems_interrupt_disable(level);
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e->regs->DR.B.D = out [0];
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e->transmit_in_progress = true;
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rtems_interrupt_enable(level);
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return 0;
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}
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@@ -310,14 +323,14 @@ static int mpc55xx_esci_termios_set_attributes( int minor, const struct termios
|
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/* Check minor number */
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if (MPC55XX_ESCI_IS_MINOR_INVALD( minor)) {
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return RTEMS_INVALID_NUMBER;
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return RTEMS_INVALID_ID;
|
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}
|
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|
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/* Enable module */
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cr2.B.MDIS = 0;
|
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/* Interrupts */
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if (MPC55XX_ESCI_USE_INTERRUPTS( e) && e->tty != NULL) {
|
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if (e->use_interrupts && e->tty != NULL) {
|
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cr1.B.RIE = 1;
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cr1.B.TIE = 1;
|
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} else {
|
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@@ -418,6 +431,7 @@ static void mpc55xx_esci_termios_interrupt_handler( void *arg)
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volatile union ESCI_DR_tag *data = &e->regs->DR;
|
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union ESCI_SR_tag sr = MPC55XX_ZERO_FLAGS;
|
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union ESCI_SR_tag active = MPC55XX_ZERO_FLAGS;
|
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rtems_interrupt_level level;
|
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|
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/* Status */
|
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sr.R = status->R;
|
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@@ -433,7 +447,10 @@ static void mpc55xx_esci_termios_interrupt_handler( void *arg)
|
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}
|
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|
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/* Clear flags */
|
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rtems_interrupt_disable(level);
|
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status->R = active.R;
|
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e->transmit_in_progress = false;
|
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rtems_interrupt_enable(level);
|
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|
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/* Enqueue */
|
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if (active.B.RDRF != 0) {
|
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@@ -485,7 +502,6 @@ static const rtems_termios_callbacks mpc55xx_esci_termios_callbacks_polled = {
|
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rtems_device_driver console_initialize( rtems_device_major_number major, rtems_device_minor_number minor, void *arg)
|
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{
|
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rtems_status_code sc = RTEMS_SUCCESSFUL;
|
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int console_done = 0;
|
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int termios_do_init = 1;
|
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rtems_device_minor_number i = 0;
|
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mpc55xx_esci_driver_entry *e = NULL;
|
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@@ -493,17 +509,15 @@ rtems_device_driver console_initialize( rtems_device_major_number major, rtems_d
|
||||
for (i = 0; i < MPC55XX_ESCI_NUMBER; ++i) {
|
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e = &mpc55xx_esci_driver_table [i];
|
||||
sc = rtems_io_register_name ( e->device_name, major, i);
|
||||
RTEMS_CHECK_SC( sc, "Register IO device");
|
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if (e->console) {
|
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if (console_done) {
|
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RTEMS_SYSLOG_WARNING( "Multiple console ports defined\n");
|
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} else {
|
||||
console_done = 1;
|
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if (e->use_interrupts) {
|
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RTEMS_SYSLOG_WARNING( "Cannot use interrupts for console port\n");
|
||||
}
|
||||
sc = rtems_io_register_name( CONSOLE_DEVICE_NAME, major, i);
|
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RTEMS_CHECK_SC( sc, "Register IO device");
|
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if (sc != RTEMS_SUCCESSFUL) {
|
||||
/* FIXME */
|
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rtems_fatal_error_occurred(0xdeadbeef);
|
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}
|
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if (i == MPC55XX_ESCI_CONSOLE_MINOR) {
|
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sc = rtems_io_register_name( CONSOLE_DEVICE_NAME, major, i);
|
||||
if (sc != RTEMS_SUCCESSFUL) {
|
||||
/* FIXME */
|
||||
rtems_fatal_error_occurred(0xdeadbeef);
|
||||
}
|
||||
}
|
||||
if (e->use_termios && termios_do_init) {
|
||||
@@ -511,7 +525,7 @@ rtems_device_driver console_initialize( rtems_device_major_number major, rtems_d
|
||||
termios_do_init = 0;
|
||||
rtems_termios_initialize();
|
||||
}
|
||||
if (MPC55XX_ESCI_USE_INTERRUPTS( e)) {
|
||||
if (e->use_interrupts) {
|
||||
sc = mpc55xx_interrupt_handler_install(
|
||||
e->irq_number,
|
||||
"eSCI",
|
||||
@@ -520,7 +534,10 @@ rtems_device_driver console_initialize( rtems_device_major_number major, rtems_d
|
||||
mpc55xx_esci_termios_interrupt_handler,
|
||||
e
|
||||
);
|
||||
RTEMS_CHECK_SC( sc, "Install IRQ handler");
|
||||
if (sc != RTEMS_SUCCESSFUL) {
|
||||
/* FIXME */
|
||||
rtems_fatal_error_occurred(0xdeadbeef);
|
||||
}
|
||||
}
|
||||
}
|
||||
mpc55xx_esci_termios_set_attributes( (int) i, &mpc55xx_esci_termios_default);
|
||||
@@ -536,19 +553,18 @@ rtems_device_driver console_open( rtems_device_major_number major, rtems_device_
|
||||
|
||||
/* Check minor number */
|
||||
if (MPC55XX_ESCI_IS_MINOR_INVALD( minor)) {
|
||||
return RTEMS_INVALID_NUMBER;
|
||||
return RTEMS_INVALID_ID;
|
||||
}
|
||||
|
||||
if (e->use_termios) {
|
||||
if (MPC55XX_ESCI_USE_INTERRUPTS( e)) {
|
||||
if (e->use_interrupts) {
|
||||
sc = rtems_termios_open( major, minor, arg, &mpc55xx_esci_termios_callbacks);
|
||||
} else {
|
||||
sc = rtems_termios_open( major, minor, arg, &mpc55xx_esci_termios_callbacks_polled);
|
||||
}
|
||||
RTEMS_CHECK_SC( sc, "Open");
|
||||
}
|
||||
|
||||
return RTEMS_SUCCESSFUL;
|
||||
return sc;
|
||||
}
|
||||
|
||||
rtems_device_driver console_close( rtems_device_major_number major, rtems_device_minor_number minor, void *arg)
|
||||
@@ -557,7 +573,7 @@ rtems_device_driver console_close( rtems_device_major_number major, rtems_device
|
||||
|
||||
/* Check minor number */
|
||||
if (MPC55XX_ESCI_IS_MINOR_INVALD( minor)) {
|
||||
return RTEMS_INVALID_NUMBER;
|
||||
return RTEMS_INVALID_ID;
|
||||
}
|
||||
|
||||
if (e->use_termios) {
|
||||
@@ -573,7 +589,7 @@ rtems_device_driver console_read( rtems_device_major_number major, rtems_device_
|
||||
|
||||
/* Check minor number */
|
||||
if (MPC55XX_ESCI_IS_MINOR_INVALD( minor)) {
|
||||
return RTEMS_INVALID_NUMBER;
|
||||
return RTEMS_INVALID_ID;
|
||||
}
|
||||
|
||||
if (e->use_termios) {
|
||||
@@ -597,7 +613,7 @@ rtems_device_driver console_write( rtems_device_major_number major, rtems_device
|
||||
|
||||
/* Check minor number */
|
||||
if (MPC55XX_ESCI_IS_MINOR_INVALD( minor)) {
|
||||
return RTEMS_INVALID_NUMBER;
|
||||
return RTEMS_INVALID_ID;
|
||||
}
|
||||
|
||||
if (e->use_termios) {
|
||||
@@ -606,10 +622,10 @@ rtems_device_driver console_write( rtems_device_major_number major, rtems_device
|
||||
rtems_libio_rw_args_t *rw = (rtems_libio_rw_args_t *) arg;
|
||||
uint32_t i = 0;
|
||||
while (i < rw->count) {
|
||||
mpc55xx_esci_write_char( e, rw->buffer [i]);
|
||||
if (rw->buffer [i] == '\n') {
|
||||
mpc55xx_esci_write_char( e, '\r');
|
||||
}
|
||||
mpc55xx_esci_write_char( e, rw->buffer [i]);
|
||||
++i;
|
||||
}
|
||||
rw->bytes_moved = i;
|
||||
@@ -624,7 +640,7 @@ rtems_device_driver console_control( rtems_device_major_number major, rtems_devi
|
||||
|
||||
/* Check minor number */
|
||||
if (MPC55XX_ESCI_IS_MINOR_INVALD( minor)) {
|
||||
return RTEMS_INVALID_NUMBER;
|
||||
return RTEMS_INVALID_ID;
|
||||
}
|
||||
|
||||
if (e->use_termios) {
|
||||
@@ -636,13 +652,6 @@ rtems_device_driver console_control( rtems_device_major_number major, rtems_devi
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @brief Port number for the BSP character output function.
|
||||
*
|
||||
* The correct value will be set by mpc55xx_esci_output_char_init().
|
||||
*/
|
||||
static int mpc55xx_esci_output_char_minor = 0;
|
||||
|
||||
/**
|
||||
* @name BSP Character Output
|
||||
* @{
|
||||
@@ -650,41 +659,21 @@ static int mpc55xx_esci_output_char_minor = 0;
|
||||
|
||||
static void mpc55xx_esci_output_char( char c)
|
||||
{
|
||||
mpc55xx_esci_driver_entry *e = &mpc55xx_esci_driver_table [mpc55xx_esci_output_char_minor];
|
||||
mpc55xx_esci_driver_entry *e = &mpc55xx_esci_driver_table [MPC55XX_ESCI_CONSOLE_MINOR];
|
||||
|
||||
mpc55xx_esci_interrupts_disable( e);
|
||||
mpc55xx_esci_write_char( e, c);
|
||||
if (c == '\n') {
|
||||
mpc55xx_esci_write_char( e, '\r');
|
||||
}
|
||||
mpc55xx_esci_write_char( e, c);
|
||||
mpc55xx_esci_interrupts_enable( e);
|
||||
}
|
||||
|
||||
static void mpc55xx_esci_output_char_nop( char c)
|
||||
{
|
||||
/* Do nothing */
|
||||
}
|
||||
|
||||
static void mpc55xx_esci_output_char_init( char c)
|
||||
{
|
||||
bool console_found = false;
|
||||
int i = 0;
|
||||
|
||||
for (i = 0; i < MPC55XX_ESCI_NUMBER; ++i) {
|
||||
if (mpc55xx_esci_driver_table [i].console) {
|
||||
console_found = true;
|
||||
mpc55xx_esci_output_char_minor = i;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (console_found) {
|
||||
BSP_output_char = mpc55xx_esci_output_char;
|
||||
mpc55xx_esci_termios_set_attributes( mpc55xx_esci_output_char_minor, &mpc55xx_esci_termios_default);
|
||||
mpc55xx_esci_output_char( c);
|
||||
} else {
|
||||
BSP_output_char = mpc55xx_esci_output_char_nop;
|
||||
}
|
||||
mpc55xx_esci_termios_set_attributes( MPC55XX_ESCI_CONSOLE_MINOR, &mpc55xx_esci_termios_default);
|
||||
mpc55xx_esci_output_char( c);
|
||||
BSP_output_char = mpc55xx_esci_output_char;
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
@@ -32,17 +32,17 @@ extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
typedef struct mpc55xx_edma_channel_entry {
|
||||
rtems_chain_node node;
|
||||
unsigned channel;
|
||||
void (*done)( struct mpc55xx_edma_channel_entry *, uint32_t);
|
||||
rtems_id id;
|
||||
rtems_chain_node node;
|
||||
unsigned channel;
|
||||
void (*done)( struct mpc55xx_edma_channel_entry *, uint32_t);
|
||||
rtems_id id;
|
||||
} mpc55xx_edma_channel_entry;
|
||||
|
||||
rtems_status_code mpc55xx_edma_init();
|
||||
void mpc55xx_edma_init(void);
|
||||
|
||||
rtems_status_code mpc55xx_edma_obtain_channel( mpc55xx_edma_channel_entry *e);
|
||||
rtems_status_code mpc55xx_edma_obtain_channel( mpc55xx_edma_channel_entry *e, unsigned irq_priority);
|
||||
|
||||
rtems_status_code mpc55xx_edma_release_channel( mpc55xx_edma_channel_entry *e);
|
||||
void mpc55xx_edma_release_channel( mpc55xx_edma_channel_entry *e);
|
||||
|
||||
void mpc55xx_edma_enable_hardware_requests( unsigned channel, bool enable);
|
||||
|
||||
|
||||
@@ -27,6 +27,7 @@
|
||||
#ifndef LIBCPU_POWERPC_MPC55XX_ESCI_H
|
||||
#define LIBCPU_POWERPC_MPC55XX_ESCI_H
|
||||
|
||||
#include <rtems.h>
|
||||
#include <rtems/termiostypes.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
@@ -35,16 +36,15 @@ extern "C" {
|
||||
|
||||
#define MPC55XX_ESCI_NUMBER 2
|
||||
|
||||
struct ESCI_tag;
|
||||
|
||||
typedef struct {
|
||||
volatile struct ESCI_tag *regs;
|
||||
const char *device_name;
|
||||
int use_termios;
|
||||
int use_interrupts;
|
||||
int console;
|
||||
struct rtems_termios_tty *tty;
|
||||
unsigned irq_number;
|
||||
const char *device_name;
|
||||
rtems_vector_number irq_number;
|
||||
int transmit_nest_level;
|
||||
bool transmit_in_progress;
|
||||
bool use_termios;
|
||||
bool use_interrupts;
|
||||
} mpc55xx_esci_driver_entry;
|
||||
|
||||
extern mpc55xx_esci_driver_entry mpc55xx_esci_driver_table [ /* MPC55XX_ESCI_NUMBER */ ];
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -34,13 +34,8 @@ extern "C" {
|
||||
* Interrupt numbers
|
||||
*/
|
||||
|
||||
/* Basics */
|
||||
#define MPC55XX_IRQ_INVALID 0x10000U
|
||||
#define MPC55XX_IRQ_MIN 0U
|
||||
#define MPC55XX_IRQ_MAX 328U
|
||||
#define MPC55XX_IRQ_MIN 0U
|
||||
#define MPC55XX_IRQ_MAX 328U
|
||||
#define MPC55XX_IRQ_BASE MPC55XX_IRQ_MIN
|
||||
#define MPC55XX_IRQ_NUMBER (MPC55XX_IRQ_MAX + 1U)
|
||||
|
||||
/* Software interrupts */
|
||||
#define MPC55XX_IRQ_SOFTWARE_MIN 0U
|
||||
@@ -49,19 +44,18 @@ extern "C" {
|
||||
#define MPC55XX_IRQ_SOFTWARE_GET_REQUEST(i) (i)
|
||||
#define MPC55XX_IRQ_SOFTWARE_NUMBER (MPC55XX_IRQ_SOFTWARE_MAX + 1U)
|
||||
|
||||
#if MPC55XX_CHIP_TYPE >= 5510 && MPC55XX_CHIP_TYPE <= 5517
|
||||
/* eDMA interrupts */
|
||||
#define MPC55XX_IRQ_EDMA_ERROR_LOW 10U
|
||||
#define MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN 11U
|
||||
#define MPC55XX_IRQ_EDMA_REQUEST_LOW_MAX 26U
|
||||
#if MPC55XX_CHIP_TYPE / 10 == 551
|
||||
#define MPC55XX_IRQ_MAX 293U
|
||||
|
||||
#define MPC55XX_IRQ_EDMA_GET_CHANNEL(v) \
|
||||
((v) - MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN)
|
||||
#define MPC55XX_IRQ_EDMA_GET_REQUEST(c) \
|
||||
((c) + MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN)
|
||||
/* eDMA */
|
||||
#define MPC55XX_IRQ_EDMA_ERROR(group) \
|
||||
((group) == 0 ? 10U : MPC55XX_IRQ_INVALID)
|
||||
#define MPC55XX_IRQ_EDMA(ch) \
|
||||
((unsigned) (ch) < 16U ? 11U + (ch) : MPC55XX_IRQ_INVALID)
|
||||
|
||||
/* I2C interrupt */
|
||||
#define MPC55XX_IRQ_I2C 48U
|
||||
/* I2C */
|
||||
#define MPC55XX_IRQ_I2C(mod) \
|
||||
((mod) == 0 ? 48U : MPC55XX_IRQ_INVALID)
|
||||
|
||||
/* SIU external interrupts */
|
||||
#define MPC55XX_IRQ_SIU_EXTERNAL_0 53U
|
||||
@@ -70,31 +64,74 @@ extern "C" {
|
||||
#define MPC55XX_IRQ_SIU_EXTERNAL_3 56U
|
||||
#define MPC55XX_IRQ_SIU_EXTERNAL_4_15 57U
|
||||
|
||||
/* eMIOS interrupts */
|
||||
#define MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN 58U
|
||||
#define MPC55XX_IRQ_EMIOS_REQUEST_LOW_MAX 81U
|
||||
#define MPC55XX_IRQ_EMIOS_GET_CHANNEL(v) \
|
||||
((v) - MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN)
|
||||
#define MPC55XX_IRQ_EMIOS_GET_REQUEST(c) \
|
||||
((c) + MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN)
|
||||
#elif MPC55XX_CHIP_TYPE >= 5554 && MPC55XX_CHIP_TYPE <= 5567
|
||||
/* eDMA interrupts */
|
||||
#define MPC55XX_IRQ_EDMA_ERROR_LOW 10U
|
||||
#define MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN 11U
|
||||
#define MPC55XX_IRQ_EDMA_REQUEST_LOW_MAX 42U
|
||||
/* PIT */
|
||||
#define MPC55XX_IRQ_RTI 148U
|
||||
#define MPC55XX_IRQ_PIT(timer) (148U + (timer))
|
||||
|
||||
#define MPC55XX_IRQ_EDMA_ERROR_HIGH 210U
|
||||
#define MPC55XX_IRQ_EDMA_REQUEST_HIGH_MIN 211U
|
||||
#define MPC55XX_IRQ_EDMA_REQUEST_HIGH_MAX 242U
|
||||
/* eTPU */
|
||||
#define MPC55XX_IRQ_ETPU_BASE(mod) MPC55XX_IRQ_INVALID
|
||||
|
||||
#define MPC55XX_IRQ_EDMA_GET_CHANNEL(v) \
|
||||
(((v) > MPC55XX_IRQ_EDMA_REQUEST_LOW_MAX) \
|
||||
? ((v) + 32U - MPC55XX_IRQ_EDMA_REQUEST_HIGH_MIN) \
|
||||
: ((v) - MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN))
|
||||
#define MPC55XX_IRQ_EDMA_GET_REQUEST(c) \
|
||||
(((c) >= 32U) \
|
||||
? ((c) - 32U + MPC55XX_IRQ_EDMA_REQUEST_HIGH_MIN) \
|
||||
: ((c) + MPC55XX_IRQ_EDMA_REQUEST_LOW_MIN))
|
||||
/* DSPI */
|
||||
#define MPC55XX_IRQ_DSPI_BASE(mod) \
|
||||
((mod) == 0 ? 117U : \
|
||||
((mod) == 1 ? 122U : \
|
||||
((mod) == 2 ? 274U : \
|
||||
((mod) == 3 ? 279U : MPC55XX_IRQ_INVALID))))
|
||||
|
||||
/* eMIOS */
|
||||
#define MPC55XX_IRQ_EMIOS(ch) \
|
||||
((unsigned) (ch) < 24U ? 58U + (ch) : MPC55XX_IRQ_INVALID)
|
||||
|
||||
/* eQADC */
|
||||
#define MPC55XX_IRQ_EQADC_BASE(mod) \
|
||||
((mod) == 0 ? 82U : MPC55XX_IRQ_INVALID)
|
||||
|
||||
/* eSCI */
|
||||
#define MPC55XX_IRQ_ESCI_BASE(mod) \
|
||||
((mod) == 0 ? 113U : \
|
||||
((mod) == 1 ? 114U : \
|
||||
((mod) == 2 ? 115U : \
|
||||
((mod) == 3 ? 116U : \
|
||||
((mod) == 4 ? 270U : \
|
||||
((mod) == 5 ? 271U : \
|
||||
((mod) == 6 ? 272U : \
|
||||
((mod) == 7 ? 273U : MPC55XX_IRQ_INVALID))))))))
|
||||
|
||||
/* FlexCAN */
|
||||
#define MPC55XX_IRQ_CAN_BASE(mod) \
|
||||
((mod) == 0 ? 127U : \
|
||||
((mod) == 1 ? 157U : \
|
||||
((mod) == 2 ? 178U : \
|
||||
((mod) == 3 ? 199U : \
|
||||
((mod) == 4 ? 220U : \
|
||||
((mod) == 5 ? 241U : MPC55XX_IRQ_INVALID))))))
|
||||
|
||||
/* FlexRay */
|
||||
#define MPC55XX_IRQ_FLEXRAY_BASE(mod) \
|
||||
((mod) == 0 ? 284U : MPC55XX_IRQ_INVALID)
|
||||
#else
|
||||
#if MPC55XX_CHIP_TYPE / 10 == 555
|
||||
#define MPC55XX_IRQ_MAX 307U
|
||||
#elif MPC55XX_CHIP_TYPE / 10 == 556
|
||||
#define MPC55XX_IRQ_MAX 360U
|
||||
#elif MPC55XX_CHIP_TYPE / 10 == 567
|
||||
#define MPC55XX_IRQ_MAX 479U
|
||||
#else
|
||||
#error "unsupported chip type"
|
||||
#endif
|
||||
|
||||
/* eDMA */
|
||||
#define MPC55XX_IRQ_EDMA_ERROR(group) \
|
||||
((group) == 0 ? 10U : \
|
||||
((group) == 1 ? 210U : \
|
||||
((group) == 2 ? 425U : MPC55XX_IRQ_INVALID)))
|
||||
#define MPC55XX_IRQ_EDMA(ch) \
|
||||
((unsigned) (ch) < 32U ? 11U + (ch) : \
|
||||
((unsigned) (ch) < 64U ? 179U + (ch) : \
|
||||
((unsigned) (ch) < 96U ? 362U + (ch) : MPC55XX_IRQ_INVALID)))
|
||||
|
||||
/* I2C */
|
||||
#define MPC55XX_IRQ_I2C(mod) MPC55XX_IRQ_INVALID
|
||||
|
||||
/* SIU external interrupts */
|
||||
#define MPC55XX_IRQ_SIU_EXTERNAL_0 46U
|
||||
@@ -103,25 +140,116 @@ extern "C" {
|
||||
#define MPC55XX_IRQ_SIU_EXTERNAL_3 49U
|
||||
#define MPC55XX_IRQ_SIU_EXTERNAL_4_15 50U
|
||||
|
||||
/* eMIOS interrupts */
|
||||
#define MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN 51U
|
||||
#define MPC55XX_IRQ_EMIOS_REQUEST_LOW_MAX 66U
|
||||
#define MPC55XX_IRQ_EMIOS_REQUEST_HIGH_MIN 202U
|
||||
#define MPC55XX_IRQ_EMIOS_REQUEST_HIGH_MAX 209U
|
||||
/* PIT */
|
||||
#define MPC55XX_IRQ_RTI 305U
|
||||
#define MPC55XX_IRQ_PIT(ch) (301U + (ch))
|
||||
|
||||
#define MPC55XX_IRQ_EMIOS_GET_CHANNEL(v) \
|
||||
(((v) > MPC55XX_IRQ_EMIOS_REQUEST_LOW_MAX) \
|
||||
? ((v) + 16U - MPC55XX_IRQ_EMIOS_REQUEST_HIGH_MIN) \
|
||||
: ((v) - MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN))
|
||||
/* eTPU */
|
||||
#define MPC55XX_IRQ_ETPU_BASE(mod) \
|
||||
((mod) == 0 ? 67U : \
|
||||
((mod) == 1 ? 243U : MPC55XX_IRQ_INVALID))
|
||||
|
||||
#define MPC55XX_IRQ_EMIOS_GET_REQUEST(c) \
|
||||
(((c) >= 16U) \
|
||||
? ((c) - 16U + MPC55XX_IRQ_EMIOS_REQUEST_HIGH_MIN) \
|
||||
: ((c) + MPC55XX_IRQ_EMIOS_REQUEST_LOW_MIN))
|
||||
#else
|
||||
#error "unexpected chip type"
|
||||
/* DSPI */
|
||||
#define MPC55XX_IRQ_DSPI_BASE(mod) \
|
||||
((mod) == 0 ? 275U : \
|
||||
((mod) == 1 ? 131U : \
|
||||
((mod) == 2 ? 136U : \
|
||||
((mod) == 3 ? 141U : MPC55XX_IRQ_INVALID))))
|
||||
|
||||
/* eMIOS */
|
||||
#define MPC55XX_IRQ_EMIOS(ch) \
|
||||
((unsigned) (ch) < 16U ? 51U + (ch) : \
|
||||
((unsigned) (ch) < 24U ? 186U + (ch) : \
|
||||
((unsigned) (ch) < 32U ? 435U + (ch) : MPC55XX_IRQ_INVALID)))
|
||||
|
||||
/* eQADC */
|
||||
#define MPC55XX_IRQ_EQADC_BASE(mod) \
|
||||
((mod) == 0 ? 100U : \
|
||||
((mod) == 1 ? 394U : MPC55XX_IRQ_INVALID))
|
||||
|
||||
/* eSCI */
|
||||
#define MPC55XX_IRQ_ESCI_BASE(mod) \
|
||||
((mod) == 0 ? 146U : \
|
||||
((mod) == 1 ? 149U : \
|
||||
((mod) == 2 ? 473U : MPC55XX_IRQ_INVALID)))
|
||||
|
||||
/* FlexCAN */
|
||||
#define MPC55XX_IRQ_CAN_BASE(mod) \
|
||||
((mod) == 0 ? 152U : \
|
||||
((mod) == 1 ? 280U : \
|
||||
((mod) == 2 ? 173U : \
|
||||
((mod) == 3 ? 308U : \
|
||||
((mod) == 4 ? 329U : MPC55XX_IRQ_INVALID)))))
|
||||
|
||||
/* FlexRay */
|
||||
#define MPC55XX_IRQ_FLEXRAY_BASE(mod) \
|
||||
((mod) == 0 ? 350U : MPC55XX_IRQ_INVALID)
|
||||
#endif
|
||||
|
||||
#define MPC55XX_IRQ_NUMBER (MPC55XX_IRQ_MAX + 1U)
|
||||
|
||||
/* eTPU */
|
||||
#define MPC55XX_IRQ_ETPU(mod) \
|
||||
(MPC55XX_IRQ_ETPU_BASE(mod) + 0U)
|
||||
#define MPC55XX_IRQ_ETPU_CHANNEL(mod, ch) \
|
||||
(MPC55XX_IRQ_ETPU_BASE(mod) + 1U + (ch))
|
||||
|
||||
/* DSPI */
|
||||
#define MPC55XX_IRQ_DSPI_TFUF_RFOF(mod) (MPC55XX_IRQ_DSPI_BASE(mod) + 0U)
|
||||
#define MPC55XX_IRQ_DSPI_EOQF(mod) (MPC55XX_IRQ_DSPI_BASE(mod) + 1U)
|
||||
#define MPC55XX_IRQ_DSPI_TFFF(mod) (MPC55XX_IRQ_DSPI_BASE(mod) + 2U)
|
||||
#define MPC55XX_IRQ_DSPI_TCF(mod) (MPC55XX_IRQ_DSPI_BASE(mod) + 3U)
|
||||
#define MPC55XX_IRQ_DSPI_RFDF(mod) (MPC55XX_IRQ_DSPI_BASE(mod) + 4U)
|
||||
|
||||
/* eQADC */
|
||||
#define MPC55XX_IRQ_EQADC_TORF_RFOF_CFUF(mod) \
|
||||
(MPC55XX_IRQ_EQADC_BASE(mod) + 0U)
|
||||
#define MPC55XX_IRQ_EQADC_NCF(mod, fifo) \
|
||||
(MPC55XX_IRQ_EQADC_BASE(mod) + 1U + (fifo) * 5U + 0U)
|
||||
#define MPC55XX_IRQ_EQADC_PF(mod, fifo) \
|
||||
(MPC55XX_IRQ_EQADC_BASE(mod) + 1U + (fifo) * 5U + 1U)
|
||||
#define MPC55XX_IRQ_EQADC_EOQF(mod, fifo) \
|
||||
(MPC55XX_IRQ_EQADC_BASE(mod) + 1U + (fifo) * 5U + 2U)
|
||||
#define MPC55XX_IRQ_EQADC_CFFF(mod, fifo) \
|
||||
(MPC55XX_IRQ_EQADC_BASE(mod) + 1U + (fifo) * 5U + 3U)
|
||||
#define MPC55XX_IRQ_EQADC_RFDF(mod, fifo) \
|
||||
(MPC55XX_IRQ_EQADC_BASE(mod) + 1U + (fifo) * 5U + 4U)
|
||||
|
||||
/* eSCI */
|
||||
#define MPC55XX_IRQ_ESCI(mod) (MPC55XX_IRQ_ESCI_BASE(mod) + 0U)
|
||||
|
||||
/* FlexCAN */
|
||||
#define MPC55XX_IRQ_CAN_BOFF_TWRN_RWRN(mod) (MPC55XX_IRQ_CAN(mod) + 0U)
|
||||
#define MPC55XX_IRQ_CAN_ERR(mod) (MPC55XX_IRQ_CAN(mod) + 1U)
|
||||
#define MPC55XX_IRQ_CAN_BUF_0(mod) (MPC55XX_IRQ_CAN(mod) + 3U)
|
||||
#define MPC55XX_IRQ_CAN_BUF_1(mod) (MPC55XX_IRQ_CAN(mod) + 4U)
|
||||
#define MPC55XX_IRQ_CAN_BUF_2(mod) (MPC55XX_IRQ_CAN(mod) + 5U)
|
||||
#define MPC55XX_IRQ_CAN_BUF_3(mod) (MPC55XX_IRQ_CAN(mod) + 6U)
|
||||
#define MPC55XX_IRQ_CAN_BUF_4(mod) (MPC55XX_IRQ_CAN(mod) + 7U)
|
||||
#define MPC55XX_IRQ_CAN_BUF_5(mod) (MPC55XX_IRQ_CAN(mod) + 8U)
|
||||
#define MPC55XX_IRQ_CAN_BUF_6(mod) (MPC55XX_IRQ_CAN(mod) + 9U)
|
||||
#define MPC55XX_IRQ_CAN_BUF_7(mod) (MPC55XX_IRQ_CAN(mod) + 10U)
|
||||
#define MPC55XX_IRQ_CAN_BUF_8(mod) (MPC55XX_IRQ_CAN(mod) + 12U)
|
||||
#define MPC55XX_IRQ_CAN_BUF_9(mod) (MPC55XX_IRQ_CAN(mod) + 12U)
|
||||
#define MPC55XX_IRQ_CAN_BUF_10(mod) (MPC55XX_IRQ_CAN(mod) + 13U)
|
||||
#define MPC55XX_IRQ_CAN_BUF_11(mod) (MPC55XX_IRQ_CAN(mod) + 14U)
|
||||
#define MPC55XX_IRQ_CAN_BUF_12(mod) (MPC55XX_IRQ_CAN(mod) + 15U)
|
||||
#define MPC55XX_IRQ_CAN_BUF_13(mod) (MPC55XX_IRQ_CAN(mod) + 16U)
|
||||
#define MPC55XX_IRQ_CAN_BUF_14(mod) (MPC55XX_IRQ_CAN(mod) + 17U)
|
||||
#define MPC55XX_IRQ_CAN_BUF_15(mod) (MPC55XX_IRQ_CAN(mod) + 18U)
|
||||
#define MPC55XX_IRQ_CAN_BUF_16_31(mod) (MPC55XX_IRQ_CAN(mod) + 19U)
|
||||
#define MPC55XX_IRQ_CAN_BUF_32_63(mod) (MPC55XX_IRQ_CAN(mod) + 20U)
|
||||
|
||||
/* FlexRay */
|
||||
#define MPC55XX_IRQ_FLEXRAY_MIF(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 0U)
|
||||
#define MPC55XX_IRQ_FLEXRAY_PRIF(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 1U)
|
||||
#define MPC55XX_IRQ_FLEXRAY_CHIF(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 2U)
|
||||
#define MPC55XX_IRQ_FLEXRAY_WUP_IF(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 3U)
|
||||
#define MPC55XX_IRQ_FLEXRAY_FBNE_F(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 4U)
|
||||
#define MPC55XX_IRQ_FLEXRAY_FANE_F(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 5U)
|
||||
#define MPC55XX_IRQ_FLEXRAY_RBIF(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 6U)
|
||||
#define MPC55XX_IRQ_FLEXRAY_TBIF(mod) (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 7U)
|
||||
|
||||
/* Checks */
|
||||
#define MPC55XX_IRQ_IS_VALID(v) \
|
||||
((v) >= MPC55XX_IRQ_MIN && \
|
||||
@@ -171,9 +299,9 @@ rtems_status_code mpc55xx_intc_clear_software_irq(rtems_vector_number vector);
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define BSP_INTERRUPT_VECTOR_MIN 0
|
||||
#define BSP_INTERRUPT_VECTOR_MIN MPC55XX_IRQ_MIN
|
||||
|
||||
#define BSP_INTERRUPT_VECTOR_MAX 328
|
||||
#define BSP_INTERRUPT_VECTOR_MAX MPC55XX_IRQ_MAX
|
||||
|
||||
#define BSP_INTERRUPT_USE_INDEX_TABLE
|
||||
|
||||
@@ -186,6 +314,10 @@ rtems_status_code mpc55xx_intc_clear_software_irq(rtems_vector_number vector);
|
||||
|
||||
/** @} */
|
||||
|
||||
/* Legacy API */
|
||||
#define MPC55XX_IRQ_EDMA_GET_REQUEST(ch) MPC55XX_IRQ_EDMA(ch)
|
||||
#define MPC55XX_IRQ_EMIOS_GET_REQUEST(ch) MPC55XX_IRQ_EMIOS(ch)
|
||||
|
||||
#ifdef __cplusplus
|
||||
};
|
||||
#endif /* __cplusplus */
|
||||
|
||||
@@ -7,15 +7,19 @@
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (c) 2008
|
||||
* Embedded Brains GmbH
|
||||
* Obere Lagerstr. 30
|
||||
* D-82178 Puchheim
|
||||
* Germany
|
||||
* rtems@embedded-brains.de
|
||||
* Copyright (c) 2008-2011 embedded brains GmbH. All rights reserved.
|
||||
*
|
||||
* The license and distribution terms for this file may be found in the file
|
||||
* LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
|
||||
* embedded brains GmbH
|
||||
* Obere Lagerstr. 30
|
||||
* 82178 Puchheim
|
||||
* Germany
|
||||
* <rtems@embedded-brains.de>
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.com/license/LICENSE.
|
||||
*
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
/**
|
||||
@@ -43,23 +47,11 @@
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
|
||||
/* Defined in copy.S */
|
||||
int mpc55xx_copy_8( const void *src, void *dest, size_t n);
|
||||
/* Defined in fmpll.S */
|
||||
int mpc55xx_get_system_clock(void);
|
||||
|
||||
/* Defined in fmpll.S */
|
||||
void mpc55xx_fmpll_reset_config();
|
||||
|
||||
/* Defined in fmpll.S */
|
||||
void mpc55xx_fmpll_wait_for_lock();
|
||||
|
||||
/* Defined in fmpll.S */
|
||||
int mpc55xx_get_system_clock();
|
||||
|
||||
/* Defined in fmpll.S */
|
||||
void mpc55xx_system_reset();
|
||||
|
||||
/* Defined in flash.S */
|
||||
void mpc55xx_flash_config();
|
||||
void mpc55xx_system_reset(void);
|
||||
|
||||
int mpc55xx_flash_copy(void *dest, const void *src, size_t nbytes);
|
||||
int mpc55xx_flash_copy_op(void *rdest, const void *src, size_t nbytes,
|
||||
|
||||
@@ -7,15 +7,19 @@
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (c) 2008
|
||||
* Embedded Brains GmbH
|
||||
* Obere Lagerstr. 30
|
||||
* D-82178 Puchheim
|
||||
* Germany
|
||||
* rtems@embedded-brains.de
|
||||
* Copyright (c) 2008-2011 embedded brains GmbH. All rights reserved.
|
||||
*
|
||||
* The license and distribution terms for this file may be found in the file
|
||||
* LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
|
||||
* embedded brains GmbH
|
||||
* Obere Lagerstr. 30
|
||||
* 82178 Puchheim
|
||||
* Germany
|
||||
* <rtems@embedded-brains.de>
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.com/license/LICENSE.
|
||||
*
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef LIBCPU_POWERPC_MPC55XX_REG_DEFS_H
|
||||
@@ -47,9 +51,12 @@
|
||||
|
||||
#define FMPLL_SYNCR 0xC3F80000
|
||||
#define FMPLL_SYNSR 0xC3F80004
|
||||
#define FMPLL_ESYNCR1 0XC3F80008
|
||||
#define FMPLL_ESYNCR2 0XC3F8000C
|
||||
#define FLASH_BIUCR 0xC3F8801C
|
||||
#define SIU_ECCR 0xC3F90984
|
||||
#define SIU_SRCR 0xC3F90010
|
||||
#define SIU_SYSDIV 0xC3F909A0
|
||||
|
||||
#endif /*((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517))*/
|
||||
/*
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,172 @@
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @ingroup mpc55xx
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (c) 2008-2011 embedded brains GmbH. All rights reserved.
|
||||
*
|
||||
* embedded brains GmbH
|
||||
* Obere Lagerstr. 30
|
||||
* 82178 Puchheim
|
||||
* Germany
|
||||
* <rtems@embedded-brains.de>
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.com/license/LICENSE.
|
||||
*/
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* Copyright:
|
||||
* Freescale Semiconductor, INC. All Rights Reserved.
|
||||
* You are hereby granted a copyright license to use, modify, and
|
||||
* distribute the SOFTWARE so long as this entire notice is
|
||||
* retained without alteration in any modified and/or redistributed
|
||||
* versions, and that such modified versions are clearly identified
|
||||
* as such. No licenses are granted by implication, estoppel or
|
||||
* otherwise under any patents or trademarks of Freescale
|
||||
* Semiconductor, Inc. This software is provided on an "AS IS"
|
||||
* basis and without warranty.
|
||||
*
|
||||
* To the maximum extent permitted by applicable law, Freescale
|
||||
* Semiconductor DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
|
||||
* INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
|
||||
* PARTICULAR PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT WITH
|
||||
* REGARD TO THE SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
|
||||
* AND ANY ACCOMPANYING WRITTEN MATERIALS.
|
||||
*
|
||||
* To the maximum extent permitted by applicable law, IN NO EVENT
|
||||
* SHALL Freescale Semiconductor BE LIABLE FOR ANY DAMAGES WHATSOEVER
|
||||
* (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
|
||||
* BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER
|
||||
* PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
|
||||
*
|
||||
* Freescale Semiconductor assumes no responsibility for the
|
||||
* maintenance and support of this software
|
||||
*
|
||||
********************************************************************/
|
||||
|
||||
#ifndef LIBCPU_POWERPC_MPC55XX_REGS_MMU_H
|
||||
#define LIBCPU_POWERPC_MPC55XX_REGS_MMU_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#include <bspopts.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/****************************************************************************/
|
||||
/* MMU */
|
||||
/****************************************************************************/
|
||||
struct MMU_tag {
|
||||
union {
|
||||
uint32_t R;
|
||||
struct {
|
||||
uint32_t : 2;
|
||||
uint32_t TLBSEL : 2;
|
||||
uint32_t : 7;
|
||||
uint32_t ESEL : 5;
|
||||
uint32_t : 11;
|
||||
uint32_t NV : 5;
|
||||
} B;
|
||||
} MAS0;
|
||||
|
||||
union {
|
||||
uint32_t R;
|
||||
struct {
|
||||
uint32_t VALID : 1;
|
||||
uint32_t IPROT : 1;
|
||||
uint32_t : 6;
|
||||
uint32_t TID : 8;
|
||||
uint32_t : 3;
|
||||
uint32_t TS : 1;
|
||||
uint32_t TSIZE : 5;
|
||||
uint32_t : 7;
|
||||
} B;
|
||||
} MAS1;
|
||||
|
||||
union {
|
||||
uint32_t R;
|
||||
struct {
|
||||
uint32_t EPN : 22;
|
||||
uint32_t : 4;
|
||||
uint32_t VLE : 1;
|
||||
uint32_t W : 1;
|
||||
uint32_t I : 1;
|
||||
uint32_t M : 1;
|
||||
uint32_t G : 1;
|
||||
uint32_t E : 1;
|
||||
} B;
|
||||
} MAS2;
|
||||
|
||||
union {
|
||||
uint32_t R;
|
||||
struct {
|
||||
uint32_t RPN : 22;
|
||||
uint32_t U0 : 1;
|
||||
uint32_t U1 : 1;
|
||||
uint32_t U2 : 1;
|
||||
uint32_t U3 : 1;
|
||||
uint32_t UX : 1;
|
||||
uint32_t SX : 1;
|
||||
uint32_t UW : 1;
|
||||
uint32_t SW : 1;
|
||||
uint32_t UR : 1;
|
||||
uint32_t SR : 1;
|
||||
} B;
|
||||
} MAS3;
|
||||
};
|
||||
|
||||
union MMU_MAS4_tag {
|
||||
uint32_t R;
|
||||
struct {
|
||||
uint32_t : 2;
|
||||
uint32_t TLBSELD : 2;
|
||||
uint32_t : 10;
|
||||
uint32_t TIDSELD : 2;
|
||||
uint32_t : 4;
|
||||
uint32_t TSIZED : 4;
|
||||
uint32_t : 3;
|
||||
uint32_t WD : 1;
|
||||
uint32_t ID : 1;
|
||||
uint32_t MD : 1;
|
||||
uint32_t GD : 1;
|
||||
uint32_t ED : 1;
|
||||
} B;
|
||||
};
|
||||
|
||||
union MMU_MAS6_tag {
|
||||
uint32_t R;
|
||||
struct {
|
||||
uint32_t : 8;
|
||||
uint32_t SPID : 8;
|
||||
uint32_t : 15;
|
||||
uint32_t SAS : 1;
|
||||
} B;
|
||||
};
|
||||
|
||||
#define MPC55XX_MMU_TAG_INITIALIZER(idx, addr, size, x, w, r, io) \
|
||||
{ \
|
||||
.MAS0 = { .B = { .TLBSEL = 1, .ESEL = (idx) } }, \
|
||||
.MAS1 = { .B = { \
|
||||
.VALID = 1, .IPROT = 1, .TID = 0, .TS = 0, .TSIZE = (size) } \
|
||||
}, \
|
||||
.MAS2 = { .B = { \
|
||||
.EPN = (addr) >> 10, .VLE = 0, .W = 0, .I = (io), .M = 0, .G = (io), .E = 0 } \
|
||||
}, \
|
||||
.MAS3 = { .B = { \
|
||||
.RPN = (addr) >> 10, .U0 = 0, .U1 = 0, .U2 = 0, .U3 = 0, .UX = 0, \
|
||||
.SX = (x), .UW = 0, .SW = (w), .UR = 0, .SR = (r) } \
|
||||
} \
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* LIBCPU_POWERPC_MPC55XX_REGS_MMU_H */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -7,25 +7,25 @@
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (c) 2010
|
||||
* Embedded Brains GmbH
|
||||
* Obere Lagerstr. 30
|
||||
* D-82178 Puchheim
|
||||
* Germany
|
||||
* rtems@embedded-brains.de
|
||||
* Copyright (c) 2010-2011 embedded brains GmbH. All rights reserved.
|
||||
*
|
||||
* The license and distribution terms for this file may be found in the file
|
||||
* LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
|
||||
* embedded brains GmbH
|
||||
* Obere Lagerstr. 30
|
||||
* 82178 Puchheim
|
||||
* Germany
|
||||
* <rtems@embedded-brains.de>
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.com/license/LICENSE.
|
||||
*/
|
||||
|
||||
#ifndef LIBCPU_POWERPC_MPC55XX_SIU_H
|
||||
#define LIBCPU_POWERPC_MPC55XX_SIU_H
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
|
||||
#include <rtems.h>
|
||||
#include <rtems/chain.h>
|
||||
|
||||
#include <mpc55xx/regs.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
||||
@@ -21,7 +21,7 @@
|
||||
#include <libcpu/powerpc-utility.h>
|
||||
#include <bspopts.h>
|
||||
|
||||
.section ".text"
|
||||
.section ".bsp_start_text", "ax"
|
||||
|
||||
/**
|
||||
* @fn int mpc55xx_copy_8( const void *src, void *dest, size_t n)
|
||||
|
||||
@@ -7,36 +7,41 @@
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (c) 2008
|
||||
* Embedded Brains GmbH
|
||||
* Obere Lagerstr. 30
|
||||
* D-82178 Puchheim
|
||||
* Germany
|
||||
* rtems@embedded-brains.de
|
||||
* Copyright (c) 2008-2011 embedded brains GmbH. All rights reserved.
|
||||
*
|
||||
* The license and distribution terms for this file may be found in the file
|
||||
* LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
|
||||
* embedded brains GmbH
|
||||
* Obere Lagerstr. 30
|
||||
* 82178 Puchheim
|
||||
* Germany
|
||||
* <rtems@embedded-brains.de>
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.com/license/LICENSE.
|
||||
*
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#include <libcpu/powerpc-utility.h>
|
||||
#include <mpc55xx/reg-defs.h>
|
||||
|
||||
.section ".text"
|
||||
.section ".bsp_start_text", "ax"
|
||||
|
||||
/* Optimized flash configurations (Table 13-15 [MPC5567 Microcontroller Reference Manual]) */
|
||||
.equ FLASH_SETTINGS_RESET, 0xff00
|
||||
.equ FLASH_SETTINGS_82, FLASH_BUICR_CPU_PREFTCH | FLASH_BUICR_APC_1 | FLASH_BUICR_RWSC_1 | FLASH_BUICR_WWSC_1 | FLASH_BUICR_DPFEN_3 | FLASH_BUICR_IPFEN_3 | FLASH_BUICR_PFLIM_6 | FLASH_BUICR_BFEN
|
||||
.equ FLASH_SETTINGS_102, FLASH_BUICR_CPU_PREFTCH | FLASH_BUICR_APC_1 | FLASH_BUICR_RWSC_2 | FLASH_BUICR_WWSC_1 | FLASH_BUICR_DPFEN_3 | FLASH_BUICR_IPFEN_3 | FLASH_BUICR_PFLIM_6 | FLASH_BUICR_BFEN
|
||||
.equ FLASH_SETTINGS_132, FLASH_BUICR_CPU_PREFTCH | FLASH_BUICR_APC_2 | FLASH_BUICR_RWSC_3 | FLASH_BUICR_WWSC_1 | FLASH_BUICR_DPFEN_3 | FLASH_BUICR_IPFEN_3 | FLASH_BUICR_PFLIM_6 | FLASH_BUICR_BFEN
|
||||
.equ FLASH_SETTINGS_264, 0x01716B15
|
||||
|
||||
/**
|
||||
* @fn void mpc55xx_flash_config()
|
||||
* @fn void mpc55xx_flash_init()
|
||||
* @brief Optimized flash configuration.
|
||||
* @warning Code will be copied and executed on the stack. The stack pointer
|
||||
* will not be updated, since this function has to work before memory
|
||||
* initialization.
|
||||
*/
|
||||
GLOBAL_FUNCTION mpc55xx_flash_config
|
||||
GLOBAL_FUNCTION mpc55xx_flash_init
|
||||
mflr r31
|
||||
|
||||
/* Flash settings dependent on system clock */
|
||||
@@ -50,6 +55,9 @@ GLOBAL_FUNCTION mpc55xx_flash_config
|
||||
LWI r4, 132000000
|
||||
cmpw r3, r4
|
||||
ble clock_132
|
||||
LWI r4, 264000000
|
||||
cmpw r3, r4
|
||||
ble clock_264
|
||||
LWI r30, FLASH_SETTINGS_RESET
|
||||
b settings_done
|
||||
clock_82:
|
||||
@@ -61,6 +69,9 @@ clock_102:
|
||||
clock_132:
|
||||
LWI r30, FLASH_SETTINGS_132
|
||||
b settings_done
|
||||
clock_264:
|
||||
LWI r30, FLASH_SETTINGS_264
|
||||
b settings_done
|
||||
settings_done:
|
||||
|
||||
/* Copy store code on the stack */
|
||||
|
||||
@@ -7,22 +7,32 @@
|
||||
*/
|
||||
|
||||
/*
|
||||
* Copyright (c) 2008
|
||||
* Embedded Brains GmbH
|
||||
* Obere Lagerstr. 30
|
||||
* D-82178 Puchheim
|
||||
* Germany
|
||||
* rtems@embedded-brains.de
|
||||
* Copyright (c) 2008-2011 embedded brains GmbH. All rights reserved.
|
||||
*
|
||||
* The license and distribution terms for this file may be found in the file
|
||||
* LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
|
||||
* embedded brains GmbH
|
||||
* Obere Lagerstr. 30
|
||||
* 82178 Puchheim
|
||||
* Germany
|
||||
* <rtems@embedded-brains.de>
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.com/license/LICENSE.
|
||||
*
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#include <libcpu/powerpc-utility.h>
|
||||
#include <mpc55xx/reg-defs.h>
|
||||
#include <bspopts.h>
|
||||
|
||||
#define FMPLL_IS_MPC551X (5510 <= MPC55XX_CHIP_TYPE && MPC55XX_CHIP_TYPE <= 5517)
|
||||
|
||||
#define FMPLL_IS_MPC5674 (MPC55XX_CHIP_TYPE == 5674)
|
||||
|
||||
#define FMPLL_HAS_ENHANCED_FMPLL (FMPLL_IS_MPC551X || FMPLL_IS_MPC5674)
|
||||
|
||||
.section ".text"
|
||||
.section ".bsp_start_text", "ax"
|
||||
|
||||
/* Timeout for delay in clocks */
|
||||
.equ FMPLL_TIMEOUT, 6000
|
||||
@@ -31,20 +41,18 @@
|
||||
lwz r5, \setting
|
||||
stw r5, 0(r4)
|
||||
msync
|
||||
bl mpc55xx_fmpll_wait_for_lock
|
||||
bl fmpll_wait_for_lock
|
||||
.endm
|
||||
|
||||
/**
|
||||
* @fn void mpc55xx_fmpll_reset_config()
|
||||
* @fn void mpc55xx_fmpll_init()
|
||||
* @brief Configure FMPLL after reset.
|
||||
*
|
||||
* Sets the system clock from 12 MHz in two steps up to 128 MHz.
|
||||
*/
|
||||
GLOBAL_FUNCTION mpc55xx_fmpll_reset_config
|
||||
GLOBAL_FUNCTION mpc55xx_fmpll_init
|
||||
/* Save link register */
|
||||
mflr r9
|
||||
|
||||
#if ((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517))
|
||||
#if FMPLL_HAS_ENHANCED_FMPLL
|
||||
/*
|
||||
* for MPC5510: pass in ptr to array with:
|
||||
* off 0: temp setting for ESYNCR2
|
||||
@@ -60,10 +68,11 @@ GLOBAL_FUNCTION mpc55xx_fmpll_reset_config
|
||||
lwz r5, 8(r3)
|
||||
stw r5, (FMPLL_ESYNCR1-FMPLL_ESYNCR2)(r4)
|
||||
msync
|
||||
bl mpc55xx_fmpll_wait_for_lock
|
||||
bl fmpll_wait_for_lock
|
||||
|
||||
DO_SETTING 4(r3)
|
||||
|
||||
#if FMPLL_IS_MPC551X
|
||||
/*
|
||||
* switch to PLL clock in SIU
|
||||
*/
|
||||
@@ -74,7 +83,8 @@ GLOBAL_FUNCTION mpc55xx_fmpll_reset_config
|
||||
LWI r6, SIU_SYSCLK_SYSCLKSEL_PLL
|
||||
or r5, r5, r6
|
||||
stw r5, 0(r4)
|
||||
#else
|
||||
#endif /* FMPLL_IS_MPC551X */
|
||||
#else /* !FMPLL_HAS_ENHANCED_FMPLL */
|
||||
/*
|
||||
* for MPC5566: pass in ptr to array with:
|
||||
* off 0: temp setting for SYNCR
|
||||
@@ -95,19 +105,13 @@ GLOBAL_FUNCTION mpc55xx_fmpll_reset_config
|
||||
LWI r6, ~FMPLL_SYNCR_LOCRE & ~FMPLL_SYNCR_LOLRE
|
||||
and r5, r5, r6
|
||||
stw r5, 0(r4)
|
||||
#endif
|
||||
#endif /* !FMPLL_HAS_ENHANCED_FMPLL */
|
||||
|
||||
/* Restore link register and return */
|
||||
mtlr r9
|
||||
blr
|
||||
|
||||
/**
|
||||
* @fn void mpc55xx_fmpll_wait_for_lock()
|
||||
* @brief Wait for FMPLL lock.
|
||||
* @warning If the lock cannot be obtained within some clock cycles a software
|
||||
* system reset will be initiated.
|
||||
*/
|
||||
GLOBAL_FUNCTION mpc55xx_fmpll_wait_for_lock
|
||||
fmpll_wait_for_lock:
|
||||
LWI r6, FMPLL_TIMEOUT
|
||||
mtctr r6
|
||||
|
||||
@@ -126,12 +130,14 @@ fmpll_continue:
|
||||
|
||||
blr
|
||||
|
||||
.section ".text", "aw"
|
||||
|
||||
/**
|
||||
* @fn int mpc55xx_get_system_clock()
|
||||
* @brief Returns the system clock.
|
||||
*/
|
||||
GLOBAL_FUNCTION mpc55xx_get_system_clock
|
||||
#if ((MPC55XX_CHIP_TYPE >= 5510) && (MPC55XX_CHIP_TYPE <= 5517))
|
||||
#if FMPLL_HAS_ENHANCED_FMPLL
|
||||
LA r4, FMPLL_ESYNCR1
|
||||
lwz r3, 0(r4)
|
||||
/* EPREDIV */
|
||||
@@ -152,8 +158,7 @@ GLOBAL_FUNCTION mpc55xx_get_system_clock
|
||||
divw r3, r8, r5 /* REF_CLOCK/PREDIV */
|
||||
mullw r3, r6, r3 /* REF_CLOCK/PREDIV*MFD */
|
||||
divw r3, r3, r7 /* REF_CLOCK/PREDIV*MFD/RFD */
|
||||
|
||||
#else
|
||||
#else /* !FMPLL_HAS_ENHANCED_FMPLL */
|
||||
LA r4, FMPLL_SYNCR
|
||||
lwz r3, 0(r4)
|
||||
|
||||
@@ -172,7 +177,7 @@ GLOBAL_FUNCTION mpc55xx_get_system_clock
|
||||
mullw r6, r6, r8
|
||||
sraw r6, r6, r7
|
||||
divw r3, r6, r5
|
||||
#endif
|
||||
#endif /* !FMPLL_HAS_ENHANCED_FMPLL */
|
||||
|
||||
blr
|
||||
|
||||
|
||||
@@ -278,10 +278,38 @@ $(PROJECT_INCLUDE)/mpc55xx/siu.h: mpc55xx/include/siu.h $(PROJECT_INCLUDE)/mpc55
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc55xx/siu.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc55xx/siu.h
|
||||
|
||||
$(PROJECT_INCLUDE)/mpc55xx/irq.h: mpc55xx/include/irq.h $(PROJECT_INCLUDE)/mpc55xx/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc55xx/irq.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc55xx/irq.h
|
||||
|
||||
$(PROJECT_INCLUDE)/mpc55xx/watchdog.h: mpc55xx/include/watchdog.h $(PROJECT_INCLUDE)/mpc55xx/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc55xx/watchdog.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc55xx/watchdog.h
|
||||
|
||||
$(PROJECT_INCLUDE)/mpc55xx/fsl-mpc551x.h: mpc55xx/include/fsl-mpc551x.h $(PROJECT_INCLUDE)/mpc55xx/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc55xx/fsl-mpc551x.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc55xx/fsl-mpc551x.h
|
||||
|
||||
$(PROJECT_INCLUDE)/mpc55xx/fsl-mpc555x.h: mpc55xx/include/fsl-mpc555x.h $(PROJECT_INCLUDE)/mpc55xx/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc55xx/fsl-mpc555x.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc55xx/fsl-mpc555x.h
|
||||
|
||||
$(PROJECT_INCLUDE)/mpc55xx/fsl-mpc556x.h: mpc55xx/include/fsl-mpc556x.h $(PROJECT_INCLUDE)/mpc55xx/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc55xx/fsl-mpc556x.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc55xx/fsl-mpc556x.h
|
||||
|
||||
$(PROJECT_INCLUDE)/mpc55xx/fsl-mpc567x.h: mpc55xx/include/fsl-mpc567x.h $(PROJECT_INCLUDE)/mpc55xx/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc55xx/fsl-mpc567x.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc55xx/fsl-mpc567x.h
|
||||
|
||||
$(PROJECT_INCLUDE)/mpc55xx/regs-edma.h: mpc55xx/include/regs-edma.h $(PROJECT_INCLUDE)/mpc55xx/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc55xx/regs-edma.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc55xx/regs-edma.h
|
||||
|
||||
$(PROJECT_INCLUDE)/mpc55xx/regs-mmu.h: mpc55xx/include/regs-mmu.h $(PROJECT_INCLUDE)/mpc55xx/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc55xx/regs-mmu.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc55xx/regs-mmu.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/irq.h: mpc55xx/include/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
|
||||
|
||||
Reference in New Issue
Block a user