bsps/arm/tms570: prevent self clear when running from SRAM with HWINIT

The original internal SRAM build variant (tms570ls3137_hdk_intram)
has been used heavily during our initial TMS570 BSP development.
It is much faster then Flash application erase and update
and it prolongs kit usability as the guaranteed erase/write
cycles count is low (1000) for TMS570 used Flash technology.

The problem manifested when I have prepared tms570lc4357_hdk_intram
variant to help in #5537 with start of TMS570 development project
and environment.

HWINIT for internal SRAM build is enabled by

--- a/spec/build/bsps/arm/tms570/objhwinitlc4357hdk.yml
+++ b/spec/build/bsps/arm/tms570/objhwinitlc4357hdk.yml
@@ -5,7 +5,9 @@ copyrights:
 - Copyright (C) 2023 embedded brains GmbH & Co. KG
 cppflags: []
 cxxflags: []
-enabled-by: arm/tms570lc4357_hdk
+enabled-by:
+  - arm/tms570lc4357_hdk
+  - arm/tms570lc4357_hdk_intram
 includes: []
 install: []
 links: []
--- a/spec/build/bsps/arm/tms570/optlowinit.yml
+++ b/spec/build/bsps/arm/tms570/optlowinit.yml
@@ -10,6 +10,7 @@ default:
 - enabled-by:
   - arm/tms570ls3137_hdk
   - arm/tms570lc4357_hdk
+  - arm/tms570lc4357_hdk_intram
   value: true
 - enabled-by: true
   value: false

Closes #5539

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
This commit is contained in:
Pavel Pisa
2026-04-01 14:02:51 -05:00
committed by Kinsey Moore
parent 2e9e44a073
commit 9685c72e29
+1 -1
View File
@@ -60,7 +60,7 @@ __attribute__((__naked__)) void bsp_start_hook_0( void )
"ldr r1, =#" RTEMS_XSTRING( TMS570_MEMORY_SRAM_SIZE ) "\n"
"sub r0, lr, r0\n"
"cmp r1, r0\n"
"blt 1f\n"
"bhi 1f\n"
/*
* Initialize the SRAM if we are not running in SRAM. While we are called,