mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
synced 2026-09-25 06:04:17 +08:00
aarch64/raspberrypi: Add SPI support
- Standard SPI master mode. - Polling mode. - Interrupt mode. Close #5056
This commit is contained in:
@@ -47,6 +47,9 @@
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#define BCM2835_IRQ_ID_GPU_TIMER_M2 (BCM2711_IRQ_VC_PERIPHERAL_BASE + 2)
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#define BCM2835_IRQ_ID_GPU_TIMER_M3 (BCM2711_IRQ_VC_PERIPHERAL_BASE + 3)
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/* Interrupt Vectors: SPI */
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#define BCM2711_IRQ_SPI (BCM2711_IRQ_VC_PERIPHERAL_BASE + 54)
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#define BCM2835_IRQ_ID_USB 9
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#define BCM2835_IRQ_ID_AUX 29
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#define BCM2835_IRQ_ID_SPI_SLAVE 43
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@@ -0,0 +1,122 @@
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/* SPDX-License-Identifier: BSD-2-Clause */
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/**
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* @file
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*
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* @ingroup raspberrypi_4_spi
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*
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* @brief Raspberry Pi specific SPI definitions.
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*/
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/*
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* Copyright (C) 2024 Ning Yang
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef LIBBSP_AARCH64_RASPBERRYPI_4_SPI_H
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#define LIBBSP_AARCH64_RASPBERRYPI_4_SPI_H
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#include <bsp/utility.h>
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#include <bsp/rpi-gpio.h>
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typedef struct
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{
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uint32_t spics;
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#define RPI_SPICS_LEN_LONG BSP_BIT32(25)
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#define RPI_SPICS_DMA_LEN BSP_BIT32(24)
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#define RPI_SPICS_CSPOL2 BSP_BIT32(23)
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#define RPI_SPICS_CSPOL1 BSP_BIT32(22)
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#define RPI_SPICS_CSPOL0 BSP_BIT32(21)
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#define RPI_SPICS_RXF BSP_BIT32(20)
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#define RPI_SPICS_RXR BSP_BIT32(19)
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#define RPI_SPICS_TXD BSP_BIT32(18)
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#define RPI_SPICS_RXD BSP_BIT32(17)
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#define RPI_SPICS_DONE BSP_BIT32(16)
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#define RPI_SPICS_LEN BSP_BIT32(13)
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#define RPI_SPICS_REN BSP_BIT32(12)
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#define RPI_SPICS_ADCS BSP_BIT32(11)
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#define RPI_SPICS_INTR BSP_BIT32(10)
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#define RPI_SPICS_INTD BSP_BIT32(9)
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#define RPI_SPICS_DMAEN BSP_BIT32(8)
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#define RPI_SPICS_TA BSP_BIT32(7)
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#define RPI_SPICS_CSPOL BSP_BIT32(6)
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#define RPI_SPICS_CLEAR_TX BSP_BIT32(5)
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#define RPI_SPICS_CLEAR_RX BSP_BIT32(4)
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#define RPI_SPICS_CPOL BSP_BIT32(3)
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#define RPI_SPICS_CPHA BSP_BIT32(2)
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#define RPI_SPICS_CS(val) BSP_FLD32(val, 0, 1)
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#define RPI_SPICS_CS_SET(reg,val) BSP_FLD32SET(reg, val, 0, 1)
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uint32_t spififo;
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#define RPI_SPIFIFO_DATA(val) BSP_FLD32(val, 0, 31)
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#define RPI_SPIFIFO_DATA_GET(reg) BSP_FLD32GET(reg, 0, 31)
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#define RPI_SPIFIFO_DATA_SET(reg, val) BSP_FLD32SET(reg, val, 0, 31)
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uint32_t spiclk;
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#define RPI_SPICLK_CDIV(val) BSP_FLD32(val, 0, 15)
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#define RPI_SPICLK_CDIV_GET(reg) BSP_FLD32GET(reg, 0, 15)
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#define RPI_SPICLK_CDIV_SET(reg, val) BSP_FLD32SET(reg, val, 0, 15)
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uint32_t spidlen;
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#define RPI_SPIDLEN_LEN(val) BSP_FLD32(val, 0, 15)
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#define RPI_SPIDLEN_LEN_GET(reg) BSP_FLD32GET(reg, 0, 15)
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#define RPI_SPIDLEN_LEN_SET(reg, val) BSP_FLD32SET(reg, val, 0, 15)
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uint32_t spiltoh;
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#define RPI_SPILTOH_TOH(val) BSP_FLD32(val, 0, 3)
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#define RPI_SPILTOH_TOH_GET(reg) BSP_FLD32GET(reg, 0, 3)
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#define RPI_SPILTOH_TOH_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)
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uint32_t spidc;
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#define RPI_SPIDC_RPANIC(val) BSP_FLD32(val, 24, 31)
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#define RPI_SPIDC_RPANIC_GET(reg) BSP_FLD32GET(reg, 24, 31)
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#define RPI_SPIDC_RPANIC_SET(reg, val) BSP_FLD32SET(reg, val, 24, 31)
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#define RPI_SPIDC_RDREQ(val) BSP_FLD32(val, 16, 23)
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#define RPI_SPIDC_RDREQ_GET(reg) BSP_FLD32GET(reg, 16, 23)
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#define RPI_SPIDC_RDREQ_SET(reg, val) BSP_FLD32SET(reg, val, 16, 23)
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#define RPI_SPIDC_TPANIC(val) BSP_FLD32(val, 8, 15)
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#define RPI_SPIDC_TPANIC_GET(reg) BSP_FLD32GET(reg, 8, 15)
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#define RPI_SPIDC_TPANIC_SET(reg, val) BSP_FLD32SET(reg, val, 8, 15)
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#define RPI_SPIDC_TDREQ(val) BSP_FLD32(val, 0, 7)
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#define RPI_SPIDC_TDREQ_GET(reg) BSP_FLD32GET(reg, 0, 7)
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#define RPI_SPIDC_TDREQ_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7)
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} raspberrypi_spi;
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typedef enum {
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raspberrypi_SPI0,
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raspberrypi_SPI3,
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raspberrypi_SPI4,
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raspberrypi_SPI5,
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raspberrypi_SPI6
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} raspberrypi_spi_device;
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/**
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* @brief Register a spi device.
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*
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* @param device The optional devices are raspberrypi_SPI0, raspberrypi_SPI3,
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* raspberrypi_SPI4, raspberrypi_SPI5, raspberrypi_SPI6.
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*
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* @retval RTEMS_SUCCESSFUL Successfully registered SPI device.
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* @retval RTEMS_INVALID_NUMBER This status code indicates that a specified
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* number was invalid.
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* @retval RTEMS_UNSATISFIED This status code indicates that the request was
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* not satisfied.
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*/
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rtems_status_code raspberrypi_spi_init(raspberrypi_spi_device device);
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#endif /* LIBBSP_AARCH64_RASPBERRYPI_4_SPI_H */
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@@ -237,6 +237,20 @@
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/** @} */
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/**
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* @name SPI Registers
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*
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* @{
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*/
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#define BCM2711_SPI0_BASE (RPI_PERIPHERAL_BASE + 0x204000)
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#define BCM2711_SPI3_BASE (RPI_PERIPHERAL_BASE + 0x204600)
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#define BCM2711_SPI4_BASE (RPI_PERIPHERAL_BASE + 0x204800)
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#define BCM2711_SPI5_BASE (RPI_PERIPHERAL_BASE + 0x204A00)
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#define BCM2711_SPI6_BASE (RPI_PERIPHERAL_BASE + 0x204C00)
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/** @} */
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/**
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* @name Mailbox Registers
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*
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File diff suppressed because it is too large
Load Diff
@@ -19,6 +19,10 @@ install:
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- bsps/aarch64/raspberrypi/include/bsp/irq.h
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- bsps/aarch64/raspberrypi/include/bsp/raspberrypi.h
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links:
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- role: build-dependency
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uid: optcorerate
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- role: build-dependency
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uid: optspiirq
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- role: build-dependency
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uid: objclock
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- role: build-dependency
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@@ -51,6 +55,8 @@ links:
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uid: ../../objirq
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- role: build-dependency
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uid: objgpio
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- role: build-dependency
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uid: objspi
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source:
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- bsps/aarch64/raspberrypi/console/console.c
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- bsps/aarch64/raspberrypi/start/bspstart.c
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@@ -0,0 +1,17 @@
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SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
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build-type: objects
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cflags: []
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copyrights:
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- Copyright (C) 2024 Ning Yang
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cppflags: []
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cxxflags: []
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enabled-by: true
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includes: []
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install:
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- destination: ${BSP_INCLUDEDIR}/bsp
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source:
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- bsps/aarch64/raspberrypi/include/bsp/raspberrypi-spi.h
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links: []
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source:
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- bsps/aarch64/raspberrypi/spi/raspberrypi-spi.c
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type: build
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@@ -0,0 +1,17 @@
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SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
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actions:
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- get-integer: null
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- define: null
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build-type: option
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copyrights:
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- Copyright (C) 2024 Ning Yang
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default:
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- enabled-by: true
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value: 500000000
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description: |
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Frequency of the GPU processor core in MHz.
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enabled-by: true
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format: '{}'
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links: []
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name: GPU_CORE_CLOCK_RATE
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type: build
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@@ -0,0 +1,17 @@
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SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
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actions:
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- get-boolean: null
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- define-condition: null
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build-type: option
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copyrights:
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- Copyright (C) 2024 Ning Yang
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default:
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- enabled-by: true
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value: true
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description: |
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Use interrupt mode in the SPI driver.
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enabled-by: true
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format: '{}'
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links: []
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name: BSP_SPI_USE_INTERRUPTS
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type: build
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