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LEON: converted PCI peripherals to BSD header

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This commit is contained in:
Daniel Hellstrom
2015-04-17 01:10:27 +02:00
parent d5ca82167f
commit 8b29637c67
5 changed files with 24 additions and 24 deletions
Download Patch File Download Diff File Expand all files Collapse all files
c/src/lib/libbsp/sparc/shared/pci/gr_701.c
+3 -3
View File
@@ -269,9 +269,9 @@ static int gr701_hw_init(struct gr701_priv *priv)
priv->bus_maps_up[1].size = 0;
/* Enable I/O and Mem accesses */
pci_cfg_r32(pcidev, PCI_COMMAND, &com1);
com1 |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
pci_cfg_w32(pcidev, PCI_COMMAND, com1);
pci_cfg_r32(pcidev, PCIR_COMMAND, &com1);
com1 |= PCIM_CMD_PORTEN | PCIM_CMD_MEMEN;
pci_cfg_w32(pcidev, PCIR_COMMAND, com1);
/* Start AMBA PnP scan at first AHB bus */
ambapp_scan(&priv->abus, devinfo->resources[1].address + 0x3f00000,
c/src/lib/libbsp/sparc/shared/pci/gr_rasta_adcdac.c
+3 -3
View File
@@ -240,14 +240,14 @@ static int gr_rasta_adcdac_hw_init1(struct gr_rasta_adcdac_priv *priv)
*page0 = priv->version->amba_ioarea & 0xf0000000;
/* set parity error response */
pci_cfg_r32(priv->pcidev, PCI_COMMAND, &data);
pci_cfg_w32(priv->pcidev, PCI_COMMAND, (data|PCI_COMMAND_PARITY));
pci_cfg_r32(priv->pcidev, PCIR_COMMAND, &data);
pci_cfg_w32(priv->pcidev, PCIR_COMMAND, (data|PCIM_CMD_PERRESPEN));
/* Setup cache line size. Default cache line size will result in
* poor performance (256 word fetches), 0xff will set it according
* to the max size of the PCI FIFO.
*/
pci_cfg_w8(priv->pcidev, PCI_CACHE_LINE_SIZE, 0xff);
pci_cfg_w8(priv->pcidev, PCIR_CACHELNSZ, 0xff);
/* Scan AMBA Plug&Play */
c/src/lib/libbsp/sparc/shared/pci/gr_rasta_io.c
+7 -7
View File
@@ -274,8 +274,8 @@ static int gr_rasta_io_hw_init(struct gr_rasta_io_priv *priv)
{
uint32_t data;
/* set parity error response */
pci_cfg_r32(priv->pcidev, PCI_COMMAND, &data);
pci_cfg_w32(priv->pcidev, PCI_COMMAND, (data|PCI_COMMAND_PARITY));
pci_cfg_r32(priv->pcidev, PCIR_COMMAND, &data);
pci_cfg_w32(priv->pcidev, PCIR_COMMAND, (data|PCIM_CMD_PERRESPEN));
}
#endif
@@ -283,7 +283,7 @@ static int gr_rasta_io_hw_init(struct gr_rasta_io_priv *priv)
* poor performance (256 word fetches), 0xff will set it according
* to the max size of the PCI FIFO.
*/
pci_cfg_w8(priv->pcidev, PCI_CACHE_LINE_SIZE, 0xff);
pci_cfg_w8(priv->pcidev, PCIR_CACHELNSZ, 0xff);
/* Scan AMBA Plug&Play */
@@ -401,7 +401,7 @@ static int gr_rasta_io2_hw_init(struct gr_rasta_io_priv *priv)
struct pci_dev_info *devinfo = priv->devinfo;
/* Check capabilities list bit */
pci_cfg_r8(pcidev, PCI_STATUS, &tmp2);
pci_cfg_r8(pcidev, PCIR_STATUS, &tmp2);
if (!((tmp2 >> 4) & 1)) {
/* Capabilities list not available which it should be in the
@@ -411,7 +411,7 @@ static int gr_rasta_io2_hw_init(struct gr_rasta_io_priv *priv)
}
/* Read capabilities pointer */
pci_cfg_r8(pcidev, PCI_CAP_PTR, &cap_ptr);
pci_cfg_r8(pcidev, PCIR_CAP_PTR, &cap_ptr);
/* Set AHB address mappings for target PCI bars
* BAR0: 16MB : Mapped to I/O at 0x80000000
@@ -430,8 +430,8 @@ static int gr_rasta_io2_hw_init(struct gr_rasta_io_priv *priv)
#if 0
/* set parity error response */
pci_cfg_r32(pcidev, PCI_COMMAND, &data);
pci_cfg_w32(pcidev, PCI_COMMAND, (data|PCI_COMMAND_PARITY));
pci_cfg_r32(pcidev, PCIR_COMMAND, &data);
pci_cfg_w32(pcidev, PCIR_COMMAND, (data|PCIM_CMD_PERRESPEN));
#endif
/* Scan AMBA Plug&Play */
c/src/lib/libbsp/sparc/shared/pci/gr_rasta_spw_router.c
+4 -4
View File
@@ -256,7 +256,7 @@ static int gr_rasta_spw_router_hw_init(struct gr_rasta_spw_router_priv *priv)
}
/* Check capabilities list bit */
pci_cfg_r8(pcidev, PCI_STATUS, &tmp2);
pci_cfg_r8(pcidev, PCIR_STATUS, &tmp2);
if (!((tmp2 >> 4) & 1)) {
/* Capabilities list not available which it should be in the GRPCI2 */
@@ -264,7 +264,7 @@ static int gr_rasta_spw_router_hw_init(struct gr_rasta_spw_router_priv *priv)
}
/* Read capabilities pointer */
pci_cfg_r8(pcidev, PCI_CAP_PTR, &cap_ptr);
pci_cfg_r8(pcidev, PCIR_CAP_PTR, &cap_ptr);
/* Set AHB address mappings for target PCI bars */
pci_cfg_w32(pcidev, cap_ptr+GRPCI2_BAR0_TO_AHB_MAP, 0xffe00000); /* APB bus, AHB I/O bus 2 MB */
@@ -276,8 +276,8 @@ static int gr_rasta_spw_router_hw_init(struct gr_rasta_spw_router_priv *priv)
#if 0
/* set parity error response */
pci_cfg_r32(pcidev, PCI_COMMAND, &data);
pci_cfg_w32(pcidev, PCI_COMMAND, (data|PCI_COMMAND_PARITY));
pci_cfg_r32(pcidev, PCIR_COMMAND, &data);
pci_cfg_w32(pcidev, PCIR_COMMAND, (data|PCIM_CMD_PERRESPEN));
#endif
/* Scan AMBA Plug&Play */
c/src/lib/libbsp/sparc/shared/pci/gr_rasta_tmtc.c
+7 -7
View File
@@ -340,8 +340,8 @@ static int gr_rasta_tmtc0_hw_init(struct gr_rasta_tmtc_priv *priv)
{
uint32_t data;
/* set parity error response */
pci_cfg_r32(pcidev, PCI_COMMAND, &data);
pci_cfg_w32(pcidev, PCI_COMMAND, (data|PCI_COMMAND_PARITY));
pci_cfg_r32(pcidev, PCIR_COMMAND, &data);
pci_cfg_w32(pcidev, PCIR_COMMAND, (data|PCIM_CMD_PERRESPEN));
}
#endif
@@ -349,7 +349,7 @@ static int gr_rasta_tmtc0_hw_init(struct gr_rasta_tmtc_priv *priv)
* poor performance (256 word fetches), 0xff will set it according
* to the max size of the PCI FIFO.
*/
pci_cfg_w8(pcidev, PCI_CACHE_LINE_SIZE, 0xff);
pci_cfg_w8(pcidev, PCIR_CACHELNSZ, 0xff);
/* Scan AMBA Plug&Play */
@@ -442,7 +442,7 @@ static int gr_rasta_tmtc1_hw_init(struct gr_rasta_tmtc_priv *priv)
struct pci_dev_info *devinfo = priv->devinfo;
/* Check capabilities list bit */
pci_cfg_r8(pcidev, PCI_STATUS, &tmp2);
pci_cfg_r8(pcidev, PCIR_STATUS, &tmp2);
if (!((tmp2 >> 4) & 1)) {
/* Capabilities list not available which it should be in the
@@ -452,7 +452,7 @@ static int gr_rasta_tmtc1_hw_init(struct gr_rasta_tmtc_priv *priv)
}
/* Read capabilities pointer */
pci_cfg_r8(pcidev, PCI_CAP_PTR, &cap_ptr);
pci_cfg_r8(pcidev, PCIR_CAP_PTR, &cap_ptr);
/* Set AHB address mappings for target PCI bars
* BAR0: 16MB : Mapped to I/O at 0x80000000
@@ -471,8 +471,8 @@ static int gr_rasta_tmtc1_hw_init(struct gr_rasta_tmtc_priv *priv)
#if 0
/* set parity error response */
pci_cfg_r32(pcidev, PCI_COMMAND, &data);
pci_cfg_w32(pcidev, PCI_COMMAND, (data|PCI_COMMAND_PARITY));
pci_cfg_r32(pcidev, PCIR_COMMAND, &data);
pci_cfg_w32(pcidev, PCIR_COMMAND, (data|PCIM_CMD_PERRESPEN));
#endif
/* Scan AMBA Plug&Play */