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Remove stray white spaces.

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This commit is contained in:
Ralf Corsepius
2004-04-16 11:08:36 +00:00
parent 27138f3566
commit 84c5345224
6 changed files with 44 additions and 44 deletions
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cpukit/score/cpu/i386/cpu.c
+4 -4
View File
@@ -76,13 +76,13 @@ void _CPU_Initialize(
*
* _CPU_ISR_Get_level
*/
uint32_t _CPU_ISR_Get_level( void )
{
uint32_t level;
i386_get_interrupt_level( level );
return level;
}
@@ -184,7 +184,7 @@ void rtems_exception_init_mngt()
interrupt_gate_descriptor *currentIdtEntry;
unsigned limit;
unsigned level;
i = sizeof(tbl) / sizeof (rtems_raw_irq_hdl);
i386_get_info_from_IDTR (&currentIdtEntry, &limit);
cpukit/score/cpu/i386/cpu_asm.S
+20 -20
View File
@@ -118,7 +118,7 @@ SYM (_Exception_Handler):
popa /* restore general purpose registers */
addl $8, esp /* skill vector number and faultCode */
iret
#define DISTINCT_EXCEPTION_WITH_FAULTCODE_ENTRY(_vector) \
.p2align 4 ; \
PUBLIC (rtems_exception_prologue_ ## _vector ) ; \
@@ -136,77 +136,77 @@ SYM (rtems_exception_prologue_ ## _vector ): \
/*
* Divide Error
*/
*/
DISTINCT_EXCEPTION_WITHOUT_FAULTCODE_ENTRY (0)
/*
* Debug Exception
*/
*/
DISTINCT_EXCEPTION_WITHOUT_FAULTCODE_ENTRY (1)
/*
* NMI
*/
*/
DISTINCT_EXCEPTION_WITHOUT_FAULTCODE_ENTRY (2)
/*
* Breakpoint
*/
*/
DISTINCT_EXCEPTION_WITHOUT_FAULTCODE_ENTRY (3)
/*
* Overflow
*/
*/
DISTINCT_EXCEPTION_WITHOUT_FAULTCODE_ENTRY (4)
/*
* Bound Range Exceeded
*/
*/
DISTINCT_EXCEPTION_WITHOUT_FAULTCODE_ENTRY (5)
/*
* Invalid Opcode
*/
*/
DISTINCT_EXCEPTION_WITHOUT_FAULTCODE_ENTRY (6)
/*
* No Math Coproc
*/
*/
DISTINCT_EXCEPTION_WITHOUT_FAULTCODE_ENTRY (7)
/*
* Double Fault
*/
*/
DISTINCT_EXCEPTION_WITH_FAULTCODE_ENTRY (8)
/*
* Coprocessor segment overrun
*/
*/
DISTINCT_EXCEPTION_WITHOUT_FAULTCODE_ENTRY (9)
/*
* Invalid TSS
*/
*/
DISTINCT_EXCEPTION_WITH_FAULTCODE_ENTRY (10)
/*
* Segment Not Present
*/
*/
DISTINCT_EXCEPTION_WITH_FAULTCODE_ENTRY (11)
/*
* Stack segment Fault
*/
*/
DISTINCT_EXCEPTION_WITH_FAULTCODE_ENTRY (12)
/*
* General Protection Fault
*/
*/
DISTINCT_EXCEPTION_WITH_FAULTCODE_ENTRY (13)
/*
* Page Fault
*/
*/
DISTINCT_EXCEPTION_WITH_FAULTCODE_ENTRY (14)
/*
* Floating point error (NB 15 is reserved it is therefor skipped)
*/
*/
DISTINCT_EXCEPTION_WITHOUT_FAULTCODE_ENTRY (16)
/*
* Aligment Check
*/
*/
DISTINCT_EXCEPTION_WITH_FAULTCODE_ENTRY (17)
/*
* Machine Check
*/
*/
DISTINCT_EXCEPTION_WITH_FAULTCODE_ENTRY (18)
/*
* void *i386_Logical_to_physical(
cpukit/score/cpu/i386/rtems/score/cpu.h
+7 -7
View File
@@ -43,7 +43,7 @@ extern "C" {
/*
* Does the RTEMS invoke the user's ISR with the vector number and
* a pointer to the saved interrupt frame (1) or just the vector
* a pointer to the saved interrupt frame (1) or just the vector
* number (0)?
*/
@@ -70,7 +70,7 @@ extern "C" {
/*
* Does this port provide a CPU dependent IDLE task implementation?
*
*
* If TRUE, then the routine _CPU_Thread_Idle_body
* must be provided and is the default IDLE thread body instead of
* _CPU_Thread_Idle_body.
@@ -78,7 +78,7 @@ extern "C" {
* If FALSE, then use the generic IDLE thread body if the BSP does
* not provide one.
*/
#define CPU_PROVIDES_IDLE_THREAD_BODY TRUE
/*
@@ -174,7 +174,7 @@ typedef enum {
I386_EXCEPTION_ENTER_RDBG = 50 /* to enter manually RDBG */
} Intel_symbolic_exception_name;
/*
* The following table contains the information required to configure
@@ -199,7 +199,7 @@ typedef struct {
} rtems_cpu_table;
/*
* Macros to access required entires in the CPU Table are in
* Macros to access required entires in the CPU Table are in
* the file rtems/system.h.
*/
@@ -429,10 +429,10 @@ void _CPU_Initialize(
/*
* _CPU_ISR_install_raw_handler
*
* This routine installs a "raw" interrupt handler directly into the
* This routine installs a "raw" interrupt handler directly into the
* processor's vector table.
*/
void _CPU_ISR_install_raw_handler(
uint32_t vector,
proc_ptr new_handler,
cpukit/score/cpu/i386/rtems/score/i386.h
+7 -7
View File
@@ -38,7 +38,7 @@ extern "C" {
*
* CPU Model Feature Flags:
*
* I386_HAS_BSWAP: Defined to "1" if the instruction for endian swapping
* I386_HAS_BSWAP: Defined to "1" if the instruction for endian swapping
* (bswap) should be used. This instruction appears to
* be present in all i486's and above.
*
@@ -145,7 +145,7 @@ static inline unsigned int i386_swap_u16(
/*
* Added for pagination management
*/
static inline unsigned int i386_get_cr0()
{
register unsigned int segment = 0;
@@ -213,26 +213,26 @@ void *i386_Physical_to_logical(
*/
/* segment access routines */
#define get_cs() i386_get_cs()
#define get_ds() i386_get_ds()
#define get_es() i386_get_es()
#define get_ss() i386_get_ss()
#define get_fs() i386_get_fs()
#define get_gs() i386_get_gs()
#define CPU_swap_u32( _value ) i386_swap_u32( _value )
#define CPU_swap_u16( _value ) i386_swap_u16( _value )
/* i80x86 I/O instructions */
#define outport_byte( _port, _value ) i386_outport_byte( _port, _value )
#define outport_word( _port, _value ) i386_outport_word( _port, _value )
#define outport_long( _port, _value ) i386_outport_long( _port, _value )
#define inport_byte( _port, _value ) i386_inport_byte( _port, _value )
#define inport_word( _port, _value ) i386_inport_word( _port, _value )
#define inport_long( _port, _value ) i386_inport_long( _port, _value )
#ifdef __cplusplus
}
cpukit/score/cpu/i386/rtems/score/interrupts.h
+2 -2
View File
@@ -8,7 +8,7 @@
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
*
* $Id$
*
* Applications must not include this file directly.
@@ -70,6 +70,6 @@ typedef int (*rtems_raw_irq_is_enabled) (const struct __rtems_raw_irq_connect_d
#define _CPU_ISR_Disable( _level ) i386_disable_interrupts( _level )
#define _CPU_ISR_Enable( _level ) i386_enable_interrupts( _level )
#endif
#endif
cpukit/score/cpu/i386/rtems/score/registers.h
+4 -4
View File
@@ -1,5 +1,5 @@
/* registers.h
*
*
* This file contains definition and constants related to Intel Cpu
*
* COPYRIGHT (c) 1998 valette@crf.canon.fr
@@ -106,7 +106,7 @@ typedef struct {
unsigned int virtual_intr_pending : 1;
unsigned int id : 1;
unsigned int : 2;
/*
* fourth byte : bits 24->31 : UNUSED
*/
@@ -128,7 +128,7 @@ typedef struct {
unsigned int monitor_coproc : 1;
unsigned int coproc_soft_emul : 1;
unsigned int floating_instr_except : 1;
unsigned int extension_type : 1;
unsigned int numeric_error : 1;
unsigned int : 2;
@@ -149,7 +149,7 @@ typedef struct {
* fourth byte 24->31
*/
unsigned int : 4;
unsigned int : 1;
unsigned int no_write_through : 1;
unsigned int page_level_cache_disable : 1;