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contrib: Import stm32u5xx-hal-driver 1.5.0
URL https://github.com/STMicroelectronics/stm32u5xx-hal-driver Hash 55765b13c9425e79c5bbc1dda00973858e1fb437
This commit is contained in:
Amar Takhar
Chris Johns
@@ -0,0 +1,37 @@
|
||||
---
|
||||
name: 'Issue report'
|
||||
about: 'Create a report to help us improve the quality of our software'
|
||||
title: ''
|
||||
labels: ''
|
||||
assignees: ''
|
||||
---
|
||||
|
||||
**Caution**
|
||||
|
||||
The Issues are strictly limited for the reporting of problem encountered with the software provided in this project.
|
||||
For any other problem related to the STM32 product, the performance, the hardware characteristics and boards, the tools the environment in general, please post your report to the **ST Community** in the STM32 MCUs dedicated [page](https://community.st.com/s/topic/0TO0X000000BSqSWAW/stm32-mcus).
|
||||
|
||||
**Describe the set-up**
|
||||
|
||||
* The board (either ST RPN reference or your custom board)
|
||||
* IDE or at least the compiler and its version
|
||||
|
||||
**Describe the bug (skip if none)**
|
||||
|
||||
A clear and concise description of what the bug is.
|
||||
|
||||
**How to reproduce the bug (skip if none)**
|
||||
|
||||
1. Indicate the global behavior of your application project
|
||||
2. List the modules that you suspect to be the cause of the problem (Drivers, BSP, MW...)
|
||||
3. Describe the use case that generates the problem
|
||||
4. How we can reproduce the problem
|
||||
|
||||
|
||||
**Additional context**
|
||||
|
||||
If you have a first analysis, an enhancement, a fix or a patch, thank you to share your proposal.
|
||||
|
||||
**Screenshots**
|
||||
|
||||
If applicable, add screenshots to help explain your problem.
|
||||
+5
@@ -0,0 +1,5 @@
|
||||
## IMPORTANT INFORMATION
|
||||
|
||||
### Contributor License Agreement (CLA)
|
||||
* The Pull Request feature will be considered by STMicroelectronics after the signature of a **Contributor License Agreement (CLA)** by the submitter.
|
||||
* If you did not sign such agreement, please follow the steps mentioned in the [CONTRIBUTING.md](https://github.com/STMicroelectronics/stm32u5xx_hal_driver/blob/main/CONTRIBUTING.md) file.
|
||||
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|
||||
# Contributor Covenant Code of Conduct
|
||||
|
||||
## Our Pledge
|
||||
|
||||
In the interest of fostering an open and welcoming environment, we as
|
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contributors and maintainers pledge to making participation in our project and
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our community a harassment-free experience for everyone, regardless of age, body
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size, disability, ethnicity, sex characteristics, gender identity and expression,
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level of experience, education, socio-economic status, nationality, personal
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appearance, race, religion, or sexual identity and orientation.
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## Our Standards
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||||
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Examples of behavior that contributes to creating a positive environment
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include:
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||||
|
||||
* Using welcoming and inclusive language
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* Being respectful of differing viewpoints and experiences
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* Gracefully accepting constructive criticism
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* Focusing on what is best for the community
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* Showing empathy towards other community members
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Examples of unacceptable behavior by participants include:
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* The use of sexualized language or imagery and unwelcome sexual attention or
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advances
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* Public or private harassment
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* Publishing others' private information, such as a physical or electronic
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address, without explicit permission
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* Other conduct which could reasonably be considered inappropriate in a
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professional setting
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|
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## Our Responsibilities
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|
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Project maintainers are responsible for clarifying the standards of acceptable
|
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behavior and are expected to take appropriate and fair corrective action in
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response to any instances of unacceptable behavior.
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Project maintainers have the right and responsibility to remove, edit, or
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reject comments, commits, code, wiki edits, issues, and other contributions
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that are not aligned to this Code of Conduct, or to ban temporarily or
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permanently any contributor for other behaviors that they deem inappropriate,
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threatening, offensive, or harmful.
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||||
|
||||
## Scope
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||||
|
||||
This Code of Conduct applies both within project spaces and in public spaces
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||||
when an individual is representing the project or its community. Examples of
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representing a project or community include using an official project e-mail
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address, posting via an official social media account, or acting as an appointed
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representative at an online or offline event. Representation of a project may be
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||||
further defined and clarified by project maintainers.
|
||||
|
||||
## Enforcement
|
||||
|
||||
Instances of abusive, harassing, or otherwise unacceptable behavior may be
|
||||
reported by contacting the project team at https://www.st.com/content/st_com/en/contact-us.html. All
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complaints will be reviewed and investigated and will result in a response that
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||||
is deemed necessary and appropriate to the circumstances. The project team is
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||||
obligated to maintain confidentiality with regard to the reporter of an incident.
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Further details of specific enforcement policies may be posted separately.
|
||||
|
||||
Project maintainers who do not follow or enforce the Code of Conduct in good
|
||||
faith may face temporary or permanent repercussions as determined by other
|
||||
members of the project's leadership.
|
||||
|
||||
## Attribution
|
||||
|
||||
This Code of Conduct is adapted from the [Contributor Covenant][homepage], version 1.4,
|
||||
available [here](https://www.contributor-covenant.org/version/1/4/code-of-conduct.html).
|
||||
|
||||
[homepage]: https://www.contributor-covenant.org
|
||||
|
||||
For answers to common questions about this code of conduct, refer to the FAQ section [here](https://www.contributor-covenant.org/faq).
|
||||
@@ -0,0 +1,40 @@
|
||||
# Contributing guide
|
||||
|
||||
This guide serves as a checklist before contributing to this repository. It mainly focuses on the steps to follow to submit an issue or a pull-request.
|
||||
|
||||
## 1. Issues
|
||||
|
||||
### 1.1 Before opening an issue
|
||||
|
||||
Please check the following points before posting an issue:
|
||||
* Make sure you are using the latest commit (major releases are tagged, but corrections are available as new commits).
|
||||
* Make sure your issue is a question/feedback/suggestions **related to** the software provided in this repository. Otherwise, please refer to section [3](CONTRIBUTING.md#3-support-requests-and-questions) below.
|
||||
* Make sure your issue is not already reported/fixed on GitHub or discussed on a previous issue. Do not forget to browse into the **closed** issues.
|
||||
|
||||
### 1.2 Posting the issue
|
||||
|
||||
When you have checked the previous points, create a new report from the **Issues** tab of this repository. A template is available [here](../../issues/new/choose) to help you report the issue you are facing or the enhancement you would like to propose.
|
||||
|
||||
## 2. Pull Requests
|
||||
|
||||
### 2.1 Before opening a pull-request
|
||||
|
||||
STMicrolectronics is happy to receive contributions from the community, based on an initial Contributor License Agreement (CLA) procedure.
|
||||
|
||||
* If you are an individual writing original source code and you are sure **you own the intellectual property**, then you need to sign an Individual [CLA](https://cla.st.com).
|
||||
* If you work for a company that wants also to allow you to contribute with your work, your company needs to provide a Corporate [CLA](https://cla.st.com) mentioning your GitHub account name.
|
||||
* If you are not sure that a CLA (Individual or Corporate) has been signed for your GitHub account you can check the [CLA](https://cla.st.com) dedicated page.
|
||||
|
||||
Please note that:
|
||||
* The Corporate CLA will always take precedence over the Individual CLA.
|
||||
* One CLA submission is sufficient, for any project proposed by STMicroelectronics.
|
||||
|
||||
### 2.2 How to proceed
|
||||
|
||||
* We recommend to engage first a communication thru an issue, in order to present your proposal, just to confirm that it corresponds to STMicroelectronics' domain or scope.
|
||||
* Then fork the project to your GitHub account to further develop your contribution. Please use the latest commit version.
|
||||
* Please, submit one pull-request per new feature or proposal. This will ease the analysis and the final merge if accepted.
|
||||
|
||||
## 3. Support requests and questions
|
||||
|
||||
For support requests or any other question related to the product, the tools, the environment, you can submit a post to the **ST Community** on the appropriate topic [page](https://community.st.com/s/topiccatalog).
|
||||
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/**
|
||||
******************************************************************************
|
||||
* @file stm32_assert.h
|
||||
* @author MCD Application Team
|
||||
* @brief STM32 assert template file.
|
||||
* This file should be copied to the application folder and renamed
|
||||
* to stm32_assert.h.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32_ASSERT_H
|
||||
#define __STM32_ASSERT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t *file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0U)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32_ASSERT_H */
|
||||
|
||||
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/**
|
||||
******************************************************************************
|
||||
* @file stm32u5xx_hal_cortex.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of CORTEX HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32U5xx_HAL_CORTEX_H
|
||||
#define __STM32U5xx_HAL_CORTEX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32u5xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32U5xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX CORTEX
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup CORTEX_Exported_Types CORTEX Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Region_Initialization_Structure_definition MPU Region Initialization Structure Definition
|
||||
* @{
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint8_t Enable; /*!< Specifies the status of the region.
|
||||
This parameter can be a value of @ref CORTEX_MPU_Region_Enable */
|
||||
uint8_t Number; /*!< Specifies the index of the region to protect.
|
||||
This parameter can be a value of @ref CORTEX_MPU_Region_Number */
|
||||
uint32_t BaseAddress; /*!< Specifies the base address of the region to protect. */
|
||||
uint32_t LimitAddress; /*!< Specifies the limit address of the region to protect. */
|
||||
uint8_t AttributesIndex; /*!< Specifies the memory attributes index.
|
||||
This parameter can be a value of @ref CORTEX_MPU_Attributes_Number */
|
||||
uint8_t AccessPermission; /*!< Specifies the region access permission type. This parameter
|
||||
can be a value of @ref CORTEX_MPU_Region_Permission_Attributes */
|
||||
uint8_t DisableExec; /*!< Specifies the instruction access status.
|
||||
This parameter can be a value of @ref CORTEX_MPU_Instruction_Access */
|
||||
uint8_t IsShareable; /*!< Specifies the shareability status of the protected region.
|
||||
This parameter can be a value of @ref CORTEX_MPU_Access_Shareable */
|
||||
} MPU_Region_InitTypeDef;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Attributes_Initialization_Structure_definition MPU Attributes
|
||||
* Initialization Structure Definition
|
||||
* @{
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint8_t Number; /*!< Specifies the number of the memory attributes to configure.
|
||||
This parameter can be a value of @ref CORTEX_MPU_Attributes_Number */
|
||||
|
||||
uint8_t Attributes; /*!< Specifies the memory attributes value. Attributes This parameter
|
||||
can be a combination of @ref CORTEX_MPU_Attributes */
|
||||
|
||||
} MPU_Attributes_InitTypeDef;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_Preemption_Priority_Group CORTEX Preemption Priority Group
|
||||
* @{
|
||||
*/
|
||||
#define NVIC_PRIORITYGROUP_0 0x7U /*!< 0 bit for pre-emption priority,
|
||||
4 bits for subpriority */
|
||||
#define NVIC_PRIORITYGROUP_1 0x6U /*!< 1 bit for pre-emption priority,
|
||||
3 bits for subpriority */
|
||||
#define NVIC_PRIORITYGROUP_2 0x5U /*!< 2 bits for pre-emption priority,
|
||||
2 bits for subpriority */
|
||||
#define NVIC_PRIORITYGROUP_3 0x4U /*!< 3 bits for pre-emption priority,
|
||||
1 bit for subpriority */
|
||||
#define NVIC_PRIORITYGROUP_4 0x3U /*!< 4 bits for pre-emption priority,
|
||||
0 bit for subpriority */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_SysTick_clock_source CORTEX SysTick clock source
|
||||
* @{
|
||||
*/
|
||||
#define SYSTICK_CLKSOURCE_HCLK_DIV8 0x0U /*!< AHB clock divided by 8 selected as SysTick clock source */
|
||||
#define SYSTICK_CLKSOURCE_LSI 0x1U /*!< LSI clock selected as SysTick clock source */
|
||||
#define SYSTICK_CLKSOURCE_LSE 0x2U /*!< LSE clock selected as SysTick clock source */
|
||||
#define SYSTICK_CLKSOURCE_HCLK 0x4U /*!< AHB clock selected as SysTick clock source */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_HFNMI_PRIVDEF_Control CORTEX MPU HFNMI and PRIVILEGED Access control
|
||||
* @{
|
||||
*/
|
||||
#define MPU_HFNMI_PRIVDEF_NONE 0U
|
||||
#define MPU_HARDFAULT_NMI 2U
|
||||
#define MPU_PRIVILEGED_DEFAULT 4U
|
||||
#define MPU_HFNMI_PRIVDEF 6U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Region_Enable CORTEX MPU Region Enable
|
||||
* @{
|
||||
*/
|
||||
#define MPU_REGION_ENABLE 1U
|
||||
#define MPU_REGION_DISABLE 0U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Instruction_Access CORTEX MPU Instruction Access
|
||||
* @{
|
||||
*/
|
||||
#define MPU_INSTRUCTION_ACCESS_ENABLE 0U
|
||||
#define MPU_INSTRUCTION_ACCESS_DISABLE 1U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Access_Shareable CORTEX MPU Instruction Access Shareable
|
||||
* @{
|
||||
*/
|
||||
#define MPU_ACCESS_NOT_SHAREABLE 0U
|
||||
#define MPU_ACCESS_OUTER_SHAREABLE 2U
|
||||
#define MPU_ACCESS_INNER_SHAREABLE 3U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Region_Permission_Attributes CORTEX MPU Region Permission Attributes
|
||||
* @{
|
||||
*/
|
||||
#define MPU_REGION_PRIV_RW 0U
|
||||
#define MPU_REGION_ALL_RW 1U
|
||||
#define MPU_REGION_PRIV_RO 2U
|
||||
#define MPU_REGION_ALL_RO 3U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Region_Number CORTEX MPU Region Number
|
||||
* @{
|
||||
*/
|
||||
#define MPU_REGION_NUMBER0 0U
|
||||
#define MPU_REGION_NUMBER1 1U
|
||||
#define MPU_REGION_NUMBER2 2U
|
||||
#define MPU_REGION_NUMBER3 3U
|
||||
#define MPU_REGION_NUMBER4 4U
|
||||
#define MPU_REGION_NUMBER5 5U
|
||||
#define MPU_REGION_NUMBER6 6U
|
||||
#define MPU_REGION_NUMBER7 7U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Attributes_Number CORTEX MPU Memory Attributes Number
|
||||
* @{
|
||||
*/
|
||||
#define MPU_ATTRIBUTES_NUMBER0 0U
|
||||
#define MPU_ATTRIBUTES_NUMBER1 1U
|
||||
#define MPU_ATTRIBUTES_NUMBER2 2U
|
||||
#define MPU_ATTRIBUTES_NUMBER3 3U
|
||||
#define MPU_ATTRIBUTES_NUMBER4 4U
|
||||
#define MPU_ATTRIBUTES_NUMBER5 5U
|
||||
#define MPU_ATTRIBUTES_NUMBER6 6U
|
||||
#define MPU_ATTRIBUTES_NUMBER7 7U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Attributes CORTEX MPU Attributes
|
||||
* @{
|
||||
*/
|
||||
#define MPU_DEVICE_NGNRNE 0x0U /* Device, noGather, noReorder, noEarly acknowledge. */
|
||||
#define MPU_DEVICE_NGNRE 0x4U /* Device, noGather, noReorder, Early acknowledge. */
|
||||
#define MPU_DEVICE_NGRE 0x8U /* Device, noGather, Reorder, Early acknowledge. */
|
||||
#define MPU_DEVICE_GRE 0xCU /* Device, Gather, Reorder, Early acknowledge. */
|
||||
|
||||
#define MPU_WRITE_THROUGH 0x0U /* Normal memory, write-through. */
|
||||
#define MPU_NOT_CACHEABLE 0x4U /* Normal memory, non-cacheable. */
|
||||
#define MPU_WRITE_BACK 0x4U /* Normal memory, write-back. */
|
||||
|
||||
#define MPU_TRANSIENT 0x0U /* Normal memory, transient. */
|
||||
#define MPU_NON_TRANSIENT 0x8U /* Normal memory, non-transient. */
|
||||
|
||||
#define MPU_NO_ALLOCATE 0x0U /* Normal memory, no allocate. */
|
||||
#define MPU_W_ALLOCATE 0x1U /* Normal memory, write allocate. */
|
||||
#define MPU_R_ALLOCATE 0x2U /* Normal memory, read allocate. */
|
||||
#define MPU_RW_ALLOCATE 0x3U /* Normal memory, read/write allocate. */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
/** @defgroup CORTEX_Exported_Macros CORTEX Exported Macros
|
||||
* @{
|
||||
*/
|
||||
#define OUTER(__ATTR__) ((__ATTR__) << 4U)
|
||||
#define INNER_OUTER(__ATTR__) ((__ATTR__) | ((__ATTR__) << 4U))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_Exported_Functions_Group1 Initialization and Configuration functions
|
||||
* @brief Initialization and Configuration functions
|
||||
* @{
|
||||
*/
|
||||
/* Initialization and Configuration functions *****************************/
|
||||
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup);
|
||||
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority);
|
||||
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn);
|
||||
void HAL_NVIC_DisableIRQ(IRQn_Type IRQn);
|
||||
void HAL_NVIC_SystemReset(void);
|
||||
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions
|
||||
* @brief Cortex control functions
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral Control functions ***********************************************/
|
||||
uint32_t HAL_NVIC_GetPriorityGrouping(void);
|
||||
void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t *const pPreemptPriority,
|
||||
uint32_t *const pSubPriority);
|
||||
uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn);
|
||||
void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn);
|
||||
void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn);
|
||||
uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn);
|
||||
void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource);
|
||||
uint32_t HAL_SYSTICK_GetCLKSourceConfig(void);
|
||||
void HAL_SYSTICK_IRQHandler(void);
|
||||
void HAL_SYSTICK_Callback(void);
|
||||
|
||||
void HAL_MPU_Enable(uint32_t MPU_Control);
|
||||
void HAL_MPU_Disable(void);
|
||||
void HAL_MPU_EnableRegion(uint32_t RegionNumber);
|
||||
void HAL_MPU_DisableRegion(uint32_t RegionNumber);
|
||||
void HAL_MPU_ConfigRegion(const MPU_Region_InitTypeDef *const pMPU_RegionInit);
|
||||
void HAL_MPU_ConfigMemoryAttributes(const MPU_Attributes_InitTypeDef *const pMPU_AttributesInit);
|
||||
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||
/* MPU_NS Control functions ***********************************************/
|
||||
void HAL_MPU_Enable_NS(uint32_t MPU_Control);
|
||||
void HAL_MPU_Disable_NS(void);
|
||||
void HAL_MPU_EnableRegion_NS(uint32_t RegionNumber);
|
||||
void HAL_MPU_DisableRegion_NS(uint32_t RegionNumber);
|
||||
void HAL_MPU_ConfigRegion_NS(const MPU_Region_InitTypeDef *const pMPU_RegionInit);
|
||||
void HAL_MPU_ConfigMemoryAttributes_NS(const MPU_Attributes_InitTypeDef *const pMPU_AttributesInit);
|
||||
#endif /* __ARM_FEATURE_CMSE */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup CORTEX_Private_Macros CORTEX Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PRIORITYGROUP_0) || \
|
||||
((GROUP) == NVIC_PRIORITYGROUP_1) || \
|
||||
((GROUP) == NVIC_PRIORITYGROUP_2) || \
|
||||
((GROUP) == NVIC_PRIORITYGROUP_3) || \
|
||||
((GROUP) == NVIC_PRIORITYGROUP_4))
|
||||
|
||||
#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < (1UL<<__NVIC_PRIO_BITS))
|
||||
|
||||
#define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < (1UL<<__NVIC_PRIO_BITS))
|
||||
|
||||
#define IS_NVIC_DEVICE_IRQ(IRQ) ((IRQ) > SysTick_IRQn)
|
||||
|
||||
#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_LSI) || \
|
||||
((SOURCE) == SYSTICK_CLKSOURCE_LSE) || \
|
||||
((SOURCE) == SYSTICK_CLKSOURCE_HCLK)|| \
|
||||
((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8))
|
||||
|
||||
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||
#define IS_MPU_INSTANCE(INSTANCE) (((INSTANCE) == MPU) || ((INSTANCE) == MPU_NS))
|
||||
#endif /* __ARM_FEATURE_CMSE */
|
||||
|
||||
#define IS_MPU_REGION_ENABLE(STATE) (((STATE) == MPU_REGION_ENABLE) || \
|
||||
((STATE) == MPU_REGION_DISABLE))
|
||||
|
||||
#define IS_MPU_INSTRUCTION_ACCESS(STATE) (((STATE) == MPU_INSTRUCTION_ACCESS_ENABLE) || \
|
||||
((STATE) == MPU_INSTRUCTION_ACCESS_DISABLE))
|
||||
|
||||
#define IS_MPU_ACCESS_SHAREABLE(STATE) (((STATE) == MPU_ACCESS_OUTER_SHAREABLE) || \
|
||||
((STATE) == MPU_ACCESS_INNER_SHAREABLE) || \
|
||||
((STATE) == MPU_ACCESS_NOT_SHAREABLE))
|
||||
|
||||
#define IS_MPU_REGION_PERMISSION_ATTRIBUTE(TYPE) (((TYPE) == MPU_REGION_PRIV_RW) || \
|
||||
((TYPE) == MPU_REGION_ALL_RW) || \
|
||||
((TYPE) == MPU_REGION_PRIV_RO) || \
|
||||
((TYPE) == MPU_REGION_ALL_RO))
|
||||
|
||||
#define IS_MPU_REGION_NUMBER(NUMBER) (((NUMBER) == MPU_REGION_NUMBER0) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER1) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER2) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER3) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER4) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER5) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER6) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER7))
|
||||
|
||||
#define IS_MPU_ATTRIBUTES_NUMBER(NUMBER) (((NUMBER) == MPU_ATTRIBUTES_NUMBER0) || \
|
||||
((NUMBER) == MPU_ATTRIBUTES_NUMBER1) || \
|
||||
((NUMBER) == MPU_ATTRIBUTES_NUMBER2) || \
|
||||
((NUMBER) == MPU_ATTRIBUTES_NUMBER3) || \
|
||||
((NUMBER) == MPU_ATTRIBUTES_NUMBER4) || \
|
||||
((NUMBER) == MPU_ATTRIBUTES_NUMBER5) || \
|
||||
((NUMBER) == MPU_ATTRIBUTES_NUMBER6) || \
|
||||
((NUMBER) == MPU_ATTRIBUTES_NUMBER7))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32U5xx_HAL_CORTEX_H */
|
||||
|
||||
|
||||
@@ -0,0 +1,342 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32u5xx_hal_crc.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of CRC HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32U5xx_HAL_CRC_H
|
||||
#define STM32U5xx_HAL_CRC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32u5xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32U5xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup CRC
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup CRC_Exported_Types CRC Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief CRC HAL State Structure definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_CRC_STATE_RESET = 0x00U, /*!< CRC not yet initialized or disabled */
|
||||
HAL_CRC_STATE_READY = 0x01U, /*!< CRC initialized and ready for use */
|
||||
HAL_CRC_STATE_BUSY = 0x02U, /*!< CRC internal process is ongoing */
|
||||
HAL_CRC_STATE_TIMEOUT = 0x03U, /*!< CRC timeout state */
|
||||
HAL_CRC_STATE_ERROR = 0x04U /*!< CRC error state */
|
||||
} HAL_CRC_StateTypeDef;
|
||||
|
||||
/**
|
||||
* @brief CRC Init Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint8_t DefaultPolynomialUse; /*!< This parameter is a value of @ref CRC_Default_Polynomial and indicates if default polynomial is used.
|
||||
If set to DEFAULT_POLYNOMIAL_ENABLE, resort to default
|
||||
X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 +
|
||||
X^4 + X^2+ X +1.
|
||||
In that case, there is no need to set GeneratingPolynomial field.
|
||||
If otherwise set to DEFAULT_POLYNOMIAL_DISABLE, GeneratingPolynomial and
|
||||
CRCLength fields must be set. */
|
||||
|
||||
uint8_t DefaultInitValueUse; /*!< This parameter is a value of @ref CRC_Default_InitValue_Use and indicates if default init value is used.
|
||||
If set to DEFAULT_INIT_VALUE_ENABLE, resort to default
|
||||
0xFFFFFFFF value. In that case, there is no need to set InitValue field. If
|
||||
otherwise set to DEFAULT_INIT_VALUE_DISABLE, InitValue field must be set. */
|
||||
|
||||
uint32_t GeneratingPolynomial; /*!< Set CRC generating polynomial as a 7, 8, 16 or 32-bit long value for a polynomial degree
|
||||
respectively equal to 7, 8, 16 or 32. This field is written in normal,
|
||||
representation e.g., for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1
|
||||
is written 0x65. No need to specify it if DefaultPolynomialUse is set to
|
||||
DEFAULT_POLYNOMIAL_ENABLE. */
|
||||
|
||||
uint32_t CRCLength; /*!< This parameter is a value of @ref CRC_Polynomial_Sizes and indicates CRC length.
|
||||
Value can be either one of
|
||||
@arg @ref CRC_POLYLENGTH_32B (32-bit CRC),
|
||||
@arg @ref CRC_POLYLENGTH_16B (16-bit CRC),
|
||||
@arg @ref CRC_POLYLENGTH_8B (8-bit CRC),
|
||||
@arg @ref CRC_POLYLENGTH_7B (7-bit CRC). */
|
||||
|
||||
uint32_t InitValue; /*!< Init value to initiate CRC computation. No need to specify it if DefaultInitValueUse
|
||||
is set to DEFAULT_INIT_VALUE_ENABLE. */
|
||||
|
||||
uint32_t InputDataInversionMode; /*!< This parameter is a value of @ref CRCEx_Input_Data_Inversion and specifies input data inversion mode.
|
||||
Can be either one of the following values
|
||||
@arg @ref CRC_INPUTDATA_INVERSION_NONE no input data inversion
|
||||
@arg @ref CRC_INPUTDATA_INVERSION_BYTE byte-wise inversion, 0x1A2B3C4D
|
||||
becomes 0x58D43CB2
|
||||
@arg @ref CRC_INPUTDATA_INVERSION_HALFWORD halfword-wise inversion,
|
||||
0x1A2B3C4D becomes 0xD458B23C
|
||||
@arg @ref CRC_INPUTDATA_INVERSION_WORD word-wise inversion, 0x1A2B3C4D
|
||||
becomes 0xB23CD458 */
|
||||
|
||||
uint32_t OutputDataInversionMode; /*!< This parameter is a value of @ref CRCEx_Output_Data_Inversion and specifies output data (i.e. CRC) inversion mode.
|
||||
Can be either
|
||||
@arg @ref CRC_OUTPUTDATA_INVERSION_DISABLE no CRC inversion,
|
||||
@arg @ref CRC_OUTPUTDATA_INVERSION_ENABLE CRC 0x11223344 is converted
|
||||
into 0x22CC4488 */
|
||||
} CRC_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief CRC Handle Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
CRC_TypeDef *Instance; /*!< Register base address */
|
||||
|
||||
CRC_InitTypeDef Init; /*!< CRC configuration parameters */
|
||||
|
||||
HAL_LockTypeDef Lock; /*!< CRC Locking object */
|
||||
|
||||
__IO HAL_CRC_StateTypeDef State; /*!< CRC communication state */
|
||||
|
||||
uint32_t InputDataFormat; /*!< This parameter is a value of @ref CRC_Input_Buffer_Format and specifies input data format.
|
||||
Can be either
|
||||
@arg @ref CRC_INPUTDATA_FORMAT_BYTES input data is a stream of bytes
|
||||
(8-bit data)
|
||||
@arg @ref CRC_INPUTDATA_FORMAT_HALFWORDS input data is a stream of
|
||||
half-words (16-bit data)
|
||||
@arg @ref CRC_INPUTDATA_FORMAT_WORDS input data is a stream of words
|
||||
(32-bit data)
|
||||
|
||||
Note that constant CRC_INPUT_FORMAT_UNDEFINED is defined but an initialization
|
||||
error must occur if InputBufferFormat is not one of the three values listed
|
||||
above */
|
||||
} CRC_HandleTypeDef;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup CRC_Exported_Constants CRC Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup CRC_Default_Polynomial_Value Default CRC generating polynomial
|
||||
* @{
|
||||
*/
|
||||
#define DEFAULT_CRC32_POLY 0x04C11DB7U /*!< X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2+ X +1 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CRC_Default_InitValue Default CRC computation initialization value
|
||||
* @{
|
||||
*/
|
||||
#define DEFAULT_CRC_INITVALUE 0xFFFFFFFFU /*!< Initial CRC default value */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CRC_Default_Polynomial Indicates whether or not default polynomial is used
|
||||
* @{
|
||||
*/
|
||||
#define DEFAULT_POLYNOMIAL_ENABLE ((uint8_t)0x00U) /*!< Enable default generating polynomial 0x04C11DB7 */
|
||||
#define DEFAULT_POLYNOMIAL_DISABLE ((uint8_t)0x01U) /*!< Disable default generating polynomial 0x04C11DB7 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CRC_Default_InitValue_Use Indicates whether or not default init value is used
|
||||
* @{
|
||||
*/
|
||||
#define DEFAULT_INIT_VALUE_ENABLE ((uint8_t)0x00U) /*!< Enable initial CRC default value */
|
||||
#define DEFAULT_INIT_VALUE_DISABLE ((uint8_t)0x01U) /*!< Disable initial CRC default value */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CRC_Polynomial_Sizes Polynomial sizes to configure the peripheral
|
||||
* @{
|
||||
*/
|
||||
#define CRC_POLYLENGTH_32B 0x00000000U /*!< Resort to a 32-bit long generating polynomial */
|
||||
#define CRC_POLYLENGTH_16B CRC_CR_POLYSIZE_0 /*!< Resort to a 16-bit long generating polynomial */
|
||||
#define CRC_POLYLENGTH_8B CRC_CR_POLYSIZE_1 /*!< Resort to a 8-bit long generating polynomial */
|
||||
#define CRC_POLYLENGTH_7B CRC_CR_POLYSIZE /*!< Resort to a 7-bit long generating polynomial */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CRC_Polynomial_Size_Definitions CRC polynomial possible sizes actual definitions
|
||||
* @{
|
||||
*/
|
||||
#define HAL_CRC_LENGTH_32B 32U /*!< 32-bit long CRC */
|
||||
#define HAL_CRC_LENGTH_16B 16U /*!< 16-bit long CRC */
|
||||
#define HAL_CRC_LENGTH_8B 8U /*!< 8-bit long CRC */
|
||||
#define HAL_CRC_LENGTH_7B 7U /*!< 7-bit long CRC */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CRC_Input_Buffer_Format Input Buffer Format
|
||||
* @{
|
||||
*/
|
||||
/* WARNING: CRC_INPUT_FORMAT_UNDEFINED is created for reference purposes but
|
||||
* an error is triggered in HAL_CRC_Init() if InputDataFormat field is set
|
||||
* to CRC_INPUT_FORMAT_UNDEFINED: the format MUST be defined by the user for
|
||||
* the CRC APIs to provide a correct result */
|
||||
#define CRC_INPUTDATA_FORMAT_UNDEFINED 0x00000000U /*!< Undefined input data format */
|
||||
#define CRC_INPUTDATA_FORMAT_BYTES 0x00000001U /*!< Input data in byte format */
|
||||
#define CRC_INPUTDATA_FORMAT_HALFWORDS 0x00000002U /*!< Input data in half-word format */
|
||||
#define CRC_INPUTDATA_FORMAT_WORDS 0x00000003U /*!< Input data in word format */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
/** @defgroup CRC_Exported_Macros CRC Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Reset CRC handle state.
|
||||
* @param __HANDLE__ CRC handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET)
|
||||
|
||||
/**
|
||||
* @brief Reset CRC Data Register.
|
||||
* @param __HANDLE__ CRC handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_CRC_DR_RESET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_RESET)
|
||||
|
||||
/**
|
||||
* @brief Set CRC INIT non-default value
|
||||
* @param __HANDLE__ CRC handle
|
||||
* @param __INIT__ 32-bit initial value
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_CRC_INITIALCRCVALUE_CONFIG(__HANDLE__, __INIT__) ((__HANDLE__)->Instance->INIT = (__INIT__))
|
||||
|
||||
/**
|
||||
* @brief Store data in the Independent Data (ID) register.
|
||||
* @param __HANDLE__ CRC handle
|
||||
* @param __VALUE__ Value to be stored in the ID register
|
||||
* @note Refer to the Reference Manual to get the authorized __VALUE__ length in bits
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__)))
|
||||
|
||||
/**
|
||||
* @brief Return the data stored in the Independent Data (ID) register.
|
||||
* @param __HANDLE__ CRC handle
|
||||
* @note Refer to the Reference Manual to get the authorized __VALUE__ length in bits
|
||||
* @retval Value of the ID register
|
||||
*/
|
||||
#define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Private macros --------------------------------------------------------*/
|
||||
/** @defgroup CRC_Private_Macros CRC Private Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_DEFAULT_POLYNOMIAL(DEFAULT) (((DEFAULT) == DEFAULT_POLYNOMIAL_ENABLE) || \
|
||||
((DEFAULT) == DEFAULT_POLYNOMIAL_DISABLE))
|
||||
|
||||
#define IS_DEFAULT_INIT_VALUE(VALUE) (((VALUE) == DEFAULT_INIT_VALUE_ENABLE) || \
|
||||
((VALUE) == DEFAULT_INIT_VALUE_DISABLE))
|
||||
|
||||
#define IS_CRC_POL_LENGTH(LENGTH) (((LENGTH) == CRC_POLYLENGTH_32B) || \
|
||||
((LENGTH) == CRC_POLYLENGTH_16B) || \
|
||||
((LENGTH) == CRC_POLYLENGTH_8B) || \
|
||||
((LENGTH) == CRC_POLYLENGTH_7B))
|
||||
|
||||
#define IS_CRC_INPUTDATA_FORMAT(FORMAT) (((FORMAT) == CRC_INPUTDATA_FORMAT_BYTES) || \
|
||||
((FORMAT) == CRC_INPUTDATA_FORMAT_HALFWORDS) || \
|
||||
((FORMAT) == CRC_INPUTDATA_FORMAT_WORDS))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Include CRC HAL Extended module */
|
||||
#include "stm32u5xx_hal_crc_ex.h"
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @defgroup CRC_Exported_Functions CRC Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Initialization and de-initialization functions ****************************/
|
||||
/** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @{
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc);
|
||||
HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc);
|
||||
void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc);
|
||||
void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Peripheral Control functions ***********************************************/
|
||||
/** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions
|
||||
* @{
|
||||
*/
|
||||
uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
|
||||
uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Peripheral State and Error functions ***************************************/
|
||||
/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions
|
||||
* @{
|
||||
*/
|
||||
HAL_CRC_StateTypeDef HAL_CRC_GetState(const CRC_HandleTypeDef *hcrc);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32U5xx_HAL_CRC_H */
|
||||
@@ -0,0 +1,150 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32u5xx_hal_crc_ex.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of CRC HAL extended module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32U5xx_HAL_CRC_EX_H
|
||||
#define STM32U5xx_HAL_CRC_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32u5xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32U5xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup CRCEx
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup CRCEx_Exported_Constants CRC Extended Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup CRCEx_Input_Data_Inversion Input Data Inversion Modes
|
||||
* @{
|
||||
*/
|
||||
#define CRC_INPUTDATA_INVERSION_NONE 0x00000000U /*!< No input data inversion */
|
||||
#define CRC_INPUTDATA_INVERSION_BYTE CRC_CR_REV_IN_0 /*!< Byte-wise input data inversion */
|
||||
#define CRC_INPUTDATA_INVERSION_HALFWORD CRC_CR_REV_IN_1 /*!< HalfWord-wise input data inversion */
|
||||
#define CRC_INPUTDATA_INVERSION_WORD CRC_CR_REV_IN /*!< Word-wise input data inversion */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CRCEx_Output_Data_Inversion Output Data Inversion Modes
|
||||
* @{
|
||||
*/
|
||||
#define CRC_OUTPUTDATA_INVERSION_DISABLE 0x00000000U /*!< No output data inversion */
|
||||
#define CRC_OUTPUTDATA_INVERSION_ENABLE CRC_CR_REV_OUT /*!< Bit-wise output data inversion */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/** @defgroup CRCEx_Exported_Macros CRC Extended Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Set CRC output reversal
|
||||
* @param __HANDLE__ CRC handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_CRC_OUTPUTREVERSAL_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_REV_OUT)
|
||||
|
||||
/**
|
||||
* @brief Unset CRC output reversal
|
||||
* @param __HANDLE__ CRC handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_CRC_OUTPUTREVERSAL_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(CRC_CR_REV_OUT))
|
||||
|
||||
/**
|
||||
* @brief Set CRC non-default polynomial
|
||||
* @param __HANDLE__ CRC handle
|
||||
* @param __POLYNOMIAL__ 7, 8, 16 or 32-bit polynomial
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_CRC_POLYNOMIAL_CONFIG(__HANDLE__, __POLYNOMIAL__) ((__HANDLE__)->Instance->POL = (__POLYNOMIAL__))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros --------------------------------------------------------*/
|
||||
/** @defgroup CRCEx_Private_Macros CRC Extended Private Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_CRC_INPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_INPUTDATA_INVERSION_NONE) || \
|
||||
((MODE) == CRC_INPUTDATA_INVERSION_BYTE) || \
|
||||
((MODE) == CRC_INPUTDATA_INVERSION_HALFWORD) || \
|
||||
((MODE) == CRC_INPUTDATA_INVERSION_WORD))
|
||||
|
||||
#define IS_CRC_OUTPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_OUTPUTDATA_INVERSION_DISABLE) || \
|
||||
((MODE) == CRC_OUTPUTDATA_INVERSION_ENABLE))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup CRCEx_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup CRCEx_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
/* Initialization and de-initialization functions ****************************/
|
||||
HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength);
|
||||
HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode);
|
||||
HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32U5xx_HAL_CRC_EX_H */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,154 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32u5xx_hal_cryp_ex.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of CRYPEx HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32U5xx_HAL_CRYP_EX_H
|
||||
#define STM32U5xx_HAL_CRYP_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32u5xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32U5xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(AES)
|
||||
|
||||
/** @defgroup CRYPEx CRYPEx
|
||||
* @brief CRYP Extension HAL module driver.
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup CRYPEx_Exported_Types CRYPEx Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup CRYPEx_Exported_Constants CRYPEx Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/** @defgroup CRYPEx_Private_Types CRYPEx Private Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/** @defgroup CRYPEx_Private_Variables CRYPEx Private Variables
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/** @defgroup CRYPEx_Private_Constants CRYPEx Private Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup CRYPEx_Private_Macros CRYPEx Private Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
/** @defgroup CRYPEx_Private_Functions CRYPEx Private Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @defgroup CRYPEx_Exported_Functions CRYPEx Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup CRYPEx_Exported_Functions_Group1 Extended AES processing functions
|
||||
* @{
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_CRYPEx_AESGCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, const uint32_t *pAuthTag,
|
||||
uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_CRYPEx_AESCCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, const uint32_t *pAuthTag,
|
||||
uint32_t Timeout);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup CRYPEx_Exported_Functions_Group2 Wrap and Unwrap key functions
|
||||
* @{
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_CRYPEx_UnwrapKey(CRYP_HandleTypeDef *hcryp, uint32_t *pInput, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_CRYPEx_WrapKey(CRYP_HandleTypeDef *hcryp, uint32_t *pInput, uint32_t *pOutput, uint32_t Timeout);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup CRYPEx_Exported_Functions_Group3 Encrypt and Decrypt Shared key functions
|
||||
* @{
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_CRYPEx_EncryptSharedKey(CRYP_HandleTypeDef *hcryp, uint32_t *pKey, uint32_t *pOutput, uint32_t ID,
|
||||
uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_CRYPEx_DecryptSharedKey(CRYP_HandleTypeDef *hcryp, uint32_t *pKey, uint32_t ID, uint32_t Timeout);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* AES */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32U5xx_HAL_CRYP_EX_H */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,264 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32u5xx_hal_dac_ex.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of DAC HAL Extended module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32U5xx_HAL_DAC_EX_H
|
||||
#define STM32U5xx_HAL_DAC_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** @addtogroup STM32U5xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32u5xx_hal_def.h"
|
||||
|
||||
#if defined(DAC1)
|
||||
|
||||
/** @addtogroup DACEx
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief DAC Autonomous Mode Configuration structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t AutonomousModeState; /*!< Specifies the autonomous mode state.
|
||||
This parameter can be a value of @ref DAC_AutonomousMode */
|
||||
|
||||
} DAC_AutonomousModeConfTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL State structures definition
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup DACEx_Exported_Constants DACEx Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup DACEx_lfsrunmask_triangleamplitude DACEx lfsrunmask triangle amplitude
|
||||
* @{
|
||||
*/
|
||||
#define DAC_LFSRUNMASK_BIT0 0x00000000UL /*!< Unmask DAC channel LFSR bit0 for noise wave generation */
|
||||
#define DAC_LFSRUNMASK_BITS1_0 ( DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[1:0] for noise wave generation */
|
||||
#define DAC_LFSRUNMASK_BITS2_0 ( DAC_CR_MAMP1_1 ) /*!< Unmask DAC channel LFSR bit[2:0] for noise wave generation */
|
||||
#define DAC_LFSRUNMASK_BITS3_0 ( DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[3:0] for noise wave generation */
|
||||
#define DAC_LFSRUNMASK_BITS4_0 ( DAC_CR_MAMP1_2 ) /*!< Unmask DAC channel LFSR bit[4:0] for noise wave generation */
|
||||
#define DAC_LFSRUNMASK_BITS5_0 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[5:0] for noise wave generation */
|
||||
#define DAC_LFSRUNMASK_BITS6_0 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 ) /*!< Unmask DAC channel LFSR bit[6:0] for noise wave generation */
|
||||
#define DAC_LFSRUNMASK_BITS7_0 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[7:0] for noise wave generation */
|
||||
#define DAC_LFSRUNMASK_BITS8_0 (DAC_CR_MAMP1_3 ) /*!< Unmask DAC channel LFSR bit[8:0] for noise wave generation */
|
||||
#define DAC_LFSRUNMASK_BITS9_0 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[9:0] for noise wave generation */
|
||||
#define DAC_LFSRUNMASK_BITS10_0 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 ) /*!< Unmask DAC channel LFSR bit[10:0] for noise wave generation */
|
||||
#define DAC_LFSRUNMASK_BITS11_0 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[11:0] for noise wave generation */
|
||||
#define DAC_TRIANGLEAMPLITUDE_1 0x00000000UL /*!< Select max triangle amplitude of 1 */
|
||||
#define DAC_TRIANGLEAMPLITUDE_3 ( DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 3 */
|
||||
#define DAC_TRIANGLEAMPLITUDE_7 ( DAC_CR_MAMP1_1 ) /*!< Select max triangle amplitude of 7 */
|
||||
#define DAC_TRIANGLEAMPLITUDE_15 ( DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 15 */
|
||||
#define DAC_TRIANGLEAMPLITUDE_31 ( DAC_CR_MAMP1_2 ) /*!< Select max triangle amplitude of 31 */
|
||||
#define DAC_TRIANGLEAMPLITUDE_63 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 63 */
|
||||
#define DAC_TRIANGLEAMPLITUDE_127 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 ) /*!< Select max triangle amplitude of 127 */
|
||||
#define DAC_TRIANGLEAMPLITUDE_255 ( DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 255 */
|
||||
#define DAC_TRIANGLEAMPLITUDE_511 (DAC_CR_MAMP1_3 ) /*!< Select max triangle amplitude of 511 */
|
||||
#define DAC_TRIANGLEAMPLITUDE_1023 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 1023 */
|
||||
#define DAC_TRIANGLEAMPLITUDE_2047 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 ) /*!< Select max triangle amplitude of 2047 */
|
||||
#define DAC_TRIANGLEAMPLITUDE_4095 (DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 4095 */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
|
||||
/** @defgroup DACEx_Private_Macros DACEx Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T1_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T5_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T8_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_T15_TRGO) || \
|
||||
((TRIGGER) == DAC_TRIGGER_LPTIM1_CH1) || \
|
||||
((TRIGGER) == DAC_TRIGGER_LPTIM3_CH1) || \
|
||||
((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
|
||||
((TRIGGER) == DAC_TRIGGER_STOP_LPTIM1_CH1) || \
|
||||
((TRIGGER) == DAC_TRIGGER_STOP_LPTIM3_CH1) || \
|
||||
((TRIGGER) == DAC_TRIGGER_STOP_EXT_IT9) || \
|
||||
((TRIGGER) == DAC_TRIGGER_SOFTWARE))
|
||||
|
||||
#define IS_DAC_HIGH_FREQUENCY_MODE(MODE) (((MODE) == DAC_HIGH_FREQUENCY_INTERFACE_MODE_DISABLE) || \
|
||||
((MODE) == DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_80MHZ) || \
|
||||
((MODE) == DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_160MHZ) || \
|
||||
((MODE) == DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC))
|
||||
|
||||
#define IS_DAC_SAMPLETIME(TIME) ((TIME) <= 0x000003FFU)
|
||||
|
||||
#define IS_DAC_HOLDTIME(TIME) ((TIME) <= 0x000003FFU)
|
||||
|
||||
#define IS_DAC_SAMPLEANDHOLD(MODE) (((MODE) == DAC_SAMPLEANDHOLD_DISABLE) || \
|
||||
((MODE) == DAC_SAMPLEANDHOLD_ENABLE))
|
||||
|
||||
#define IS_DAC_TRIMMINGVALUE(TRIMMINGVALUE) ((TRIMMINGVALUE) <= 0x1FU)
|
||||
|
||||
#define IS_DAC_NEWTRIMMINGVALUE(TRIMMINGVALUE) ((TRIMMINGVALUE) <= 0x1FU)
|
||||
|
||||
#define IS_DAC_CHIP_CONNECTION(CONNECT) (((CONNECT) == DAC_CHIPCONNECT_EXTERNAL) || \
|
||||
((CONNECT) == DAC_CHIPCONNECT_INTERNAL) || \
|
||||
((CONNECT) == DAC_CHIPCONNECT_BOTH))
|
||||
|
||||
#define IS_DAC_TRIMMING(TRIMMING) (((TRIMMING) == DAC_TRIMMING_FACTORY) || \
|
||||
((TRIMMING) == DAC_TRIMMING_USER))
|
||||
|
||||
#define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUNMASK_BIT0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS1_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS2_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS3_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS4_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS5_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS6_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS7_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS8_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS9_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS10_0) || \
|
||||
((VALUE) == DAC_LFSRUNMASK_BITS11_0) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_1) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_3) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_7) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_15) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_31) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_63) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_127) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_255) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_511) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_1023) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_2047) || \
|
||||
((VALUE) == DAC_TRIANGLEAMPLITUDE_4095))
|
||||
|
||||
#define IS_DAC_AUTONOMOUS(AUTONOMOUS) (((AUTONOMOUS) == DAC_AUTONOMOUS_MODE_DISABLE) || \
|
||||
((AUTONOMOUS) == DAC_AUTONOMOUS_MODE_ENABLE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/* Extended features functions ***********************************************/
|
||||
|
||||
/** @addtogroup DACEx_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup DACEx_Exported_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
/* IO operation functions *****************************************************/
|
||||
|
||||
HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Amplitude);
|
||||
HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Amplitude);
|
||||
|
||||
HAL_StatusTypeDef HAL_DACEx_DualStart(DAC_HandleTypeDef *hdac);
|
||||
HAL_StatusTypeDef HAL_DACEx_DualStop(DAC_HandleTypeDef *hdac);
|
||||
HAL_StatusTypeDef HAL_DACEx_DualStart_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel,
|
||||
const uint32_t *pData, uint32_t Length, uint32_t Alignment);
|
||||
HAL_StatusTypeDef HAL_DACEx_DualStop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel);
|
||||
HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef *hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2);
|
||||
uint32_t HAL_DACEx_DualGetValue(const DAC_HandleTypeDef *hdac);
|
||||
|
||||
void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef *hdac);
|
||||
void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef *hdac);
|
||||
void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac);
|
||||
void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac);
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup DACEx_Exported_Functions_Group3
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral Control functions ***********************************************/
|
||||
|
||||
HAL_StatusTypeDef HAL_DACEx_SelfCalibrate(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel);
|
||||
HAL_StatusTypeDef HAL_DACEx_SetUserTrimming(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel,
|
||||
uint32_t NewTrimmingValue);
|
||||
uint32_t HAL_DACEx_GetTrimOffset(const DAC_HandleTypeDef *hdac, uint32_t Channel);
|
||||
|
||||
/* Autonomous Mode Control functions **********************************************/
|
||||
HAL_StatusTypeDef HAL_DACEx_SetConfigAutonomousMode(DAC_HandleTypeDef *hdac,
|
||||
const DAC_AutonomousModeConfTypeDef *sConfig);
|
||||
HAL_StatusTypeDef HAL_DACEx_GetConfigAutonomousMode(const DAC_HandleTypeDef *hdac,
|
||||
DAC_AutonomousModeConfTypeDef *sConfig);
|
||||
HAL_StatusTypeDef HAL_DACEx_ClearConfigAutonomousMode(DAC_HandleTypeDef *hdac);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup DACEx_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* DAC_DMAConvCpltCh2 / DAC_DMAErrorCh2 / DAC_DMAHalfConvCpltCh2 */
|
||||
/* are called by HAL_DAC_Start_DMA */
|
||||
void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma);
|
||||
void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma);
|
||||
void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* DAC1 */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32U5xx_HAL_DAC_EX_H */
|
||||
@@ -0,0 +1,355 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32u5xx_hal_dcache.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of DCACHE HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion ------------------------------------*/
|
||||
#ifndef STM32U5xx_HAL_DCACHE_H
|
||||
#define STM32U5xx_HAL_DCACHE_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes -----------------------------------------------------------------*/
|
||||
#include "stm32u5xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32U5xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined (DCACHE1) || defined (DCACHE2)
|
||||
|
||||
/** @addtogroup DCACHE
|
||||
* @{
|
||||
*/
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/** @defgroup DCACHE_Exported_Types DCACHE Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief DCACHE Init structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t ReadBurstType; /*!< Burst type to be applied for Data Cache
|
||||
This parameter can be a value of @ref DCACHE_Read_Burst_Type*/
|
||||
} DCACHE_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL State structures definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_DCACHE_STATE_RESET = 0x00U, /*!< DCACHE not yet initialized or disabled */
|
||||
HAL_DCACHE_STATE_READY = 0x01U, /*!< Peripheral initialized and ready for use */
|
||||
HAL_DCACHE_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */
|
||||
HAL_DCACHE_STATE_TIMEOUT = 0x05U, /*!< Timeout state */
|
||||
HAL_DCACHE_STATE_ERROR = 0x06U, /*!< DCACHE state error */
|
||||
} HAL_DCACHE_StateTypeDef;
|
||||
|
||||
/** @defgroup DCACHE_Configuration_Structure_definition DCACHE Configuration Structure definition
|
||||
* @brief DCACHE Configuration Structure definition
|
||||
* @{
|
||||
*/
|
||||
typedef struct __DCACHE_HandleTypeDef
|
||||
{
|
||||
DCACHE_TypeDef *Instance; /*!< DCACHE register base address. */
|
||||
DCACHE_InitTypeDef Init; /*!< DCACHE Initialization Structure. */
|
||||
|
||||
void (* ErrorCallback)(struct __DCACHE_HandleTypeDef *hdcache);
|
||||
void (* CleanByAddrCallback)(struct __DCACHE_HandleTypeDef *hdcache);
|
||||
void (* InvalidateByAddrCallback)(struct __DCACHE_HandleTypeDef *hdcache);
|
||||
void (* InvalidateCompleteCallback)(struct __DCACHE_HandleTypeDef *hdcache);
|
||||
void (* CleanAndInvalidateByAddrCallback)(struct __DCACHE_HandleTypeDef *hdcache);
|
||||
|
||||
void (* MspInitCallback)(struct __DCACHE_HandleTypeDef *hdcache);
|
||||
void (* MspDeInitCallback)(struct __DCACHE_HandleTypeDef *hdcache);
|
||||
|
||||
__IO HAL_DCACHE_StateTypeDef State;
|
||||
__IO uint32_t ErrorCode;
|
||||
} DCACHE_HandleTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL DCACHE Callback pointer definition
|
||||
*/
|
||||
/*!< Pointer to a DCACHE common callback function */
|
||||
typedef void (*pDCACHE_CallbackTypeDef)(DCACHE_HandleTypeDef *hdcache);
|
||||
|
||||
/**
|
||||
* @brief HAL DCACHE Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_DCACHE_CLEAN_BY_ADDRESS_CB_ID = 0x00U, /*!< DCACHE Clean By Address callback ID */
|
||||
HAL_DCACHE_INVALIDATE_BY_ADDRESS_CB_ID = 0x01U, /*!< DCACHE Invalidate By Address callback ID */
|
||||
HAL_DCACHE_CLEAN_AND_INVALIDATE_BY_ADDRESS_CB_ID = 0x02U, /*!< DCACHE Clean And Invalidate By Address callback ID */
|
||||
HAL_DCACHE_INVALIDATE_COMPLETE_CB_ID = 0x03U, /*!< DCACHE Invalidate Complete ID */
|
||||
HAL_DCACHE_ERROR_CB_ID = 0x04U, /*!< DCACHE Error callback ID */
|
||||
|
||||
HAL_DCACHE_MSPINIT_CB_ID = 0x05U, /*!< DCACHE Msp Init callback ID */
|
||||
HAL_DCACHE_MSPDEINIT_CB_ID = 0x06U /*!< DCACHE Msp DeInit callback ID */
|
||||
} HAL_DCACHE_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants -------------------------------------------------------*/
|
||||
/** @defgroup DCACHE_Exported_Constants DCACHE Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup DCACHE_Error_Code DCACHE Error Code
|
||||
* @{
|
||||
*/
|
||||
#define HAL_DCACHE_ERROR_NONE 0x00000000U /*!< No error */
|
||||
#define HAL_DCACHE_ERROR_TIMEOUT 0x00000010U /*!< Timeout error */
|
||||
#define HAL_DCACHE_ERROR_INVALID_CALLBACK 0x00000020U /*!< Invalid callback error */
|
||||
#define HAL_DCACHE_ERROR_EVICTION_CLEAN 0x00000040U /*!< Eviction or clean operation write-back error */
|
||||
#define HAL_DCACHE_ERROR_INVALID_OPERATION 0x00000080U /*!< Invalid operation */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DCACHE_Monitor_Type Monitor type
|
||||
* @{
|
||||
*/
|
||||
#define DCACHE_MONITOR_READ_HIT DCACHE_CR_RHITMEN /*!< Read Hit monitoring */
|
||||
#define DCACHE_MONITOR_READ_MISS DCACHE_CR_RMISSMEN /*!< Read Miss monitoring */
|
||||
#define DCACHE_MONITOR_WRITE_HIT DCACHE_CR_WHITMEN /*!< Write Hit monitoring */
|
||||
#define DCACHE_MONITOR_WRITE_MISS DCACHE_CR_WMISSMEN /*!< Write Miss monitoring */
|
||||
#define DCACHE_MONITOR_ALL (DCACHE_CR_RHITMEN | DCACHE_CR_RMISSMEN | \
|
||||
DCACHE_CR_WHITMEN | DCACHE_CR_WMISSMEN)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DCACHE_Read_Burst_Type Remapped Output burst type
|
||||
* @{
|
||||
*/
|
||||
#define DCACHE_READ_BURST_WRAP 0U /*!< WRAP */
|
||||
#define DCACHE_READ_BURST_INCR DCACHE_CR_HBURST /*!< INCR */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DCACHE_Interrupts Interrupts
|
||||
* @{
|
||||
*/
|
||||
#define DCACHE_IT_BUSYEND DCACHE_IER_BSYENDIE /*!< Busy end interrupt */
|
||||
#define DCACHE_IT_ERROR DCACHE_IER_ERRIE /*!< Cache error interrupt */
|
||||
#define DCACHE_IT_CMDEND DCACHE_IER_CMDENDIE /*!< Command end interrupt */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DCACHE_Flags Flags
|
||||
* @{
|
||||
*/
|
||||
#define DCACHE_FLAG_BUSY DCACHE_SR_BUSYF /*!< Busy flag */
|
||||
#define DCACHE_FLAG_BUSYEND DCACHE_SR_BSYENDF /*!< Busy end flag */
|
||||
#define DCACHE_FLAG_ERROR DCACHE_SR_ERRF /*!< Cache error flag */
|
||||
#define DCACHE_FLAG_BUSYCMD DCACHE_SR_BUSYCMDF /*!< Busy command flag */
|
||||
#define DCACHE_FLAG_CMDEND DCACHE_SR_CMDENDF /*!< Command end flag */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macros ----------------------------------------------------------*/
|
||||
/** @defgroup DCACHE_Exported_Macros DCACHE Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Enable DCACHE interrupts.
|
||||
* @param __HANDLE__ specifies the DCACHE handle.
|
||||
* @param __INTERRUPT__ specifies the DCACHE interrupt sources to be enabled.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg @ref DCACHE_IT_BUSYEND Busy end interrupt
|
||||
* @arg @ref DCACHE_IT_ERROR Cache error interrupt
|
||||
* @arg @ref DCACHE_IT_CMDEND Cache Command end interrupt
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_DCACHE_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->IER, (__INTERRUPT__))
|
||||
|
||||
/** @brief Disable DCACHE interrupts.
|
||||
* @param __HANDLE__ specifies the DCACHE handle.
|
||||
* @param __INTERRUPT__ specifies the DCACHE interrupt sources to be disabled.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg @ref DCACHE_IT_BUSYEND Busy end interrupt
|
||||
* @arg @ref DCACHE_IT_ERROR Cache error interrupt
|
||||
* @arg @ref DCACHE_IT_CMDEND Cache Command end interrupt
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_DCACHE_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->IER, (__INTERRUPT__))
|
||||
|
||||
/** @brief Check whether the specified DCACHE interrupt source is enabled or not.
|
||||
* @param __HANDLE__ specifies the DCACHE handle.
|
||||
* @param __INTERRUPT__ specifies the DCACHE interrupt source to check.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg @ref DCACHE_IT_BUSYEND Busy end interrupt
|
||||
* @arg @ref DCACHE_IT_ERROR Cache error interrupt
|
||||
* @arg @ref DCACHE_IT_CMDEND Cache Command end interrupt
|
||||
*
|
||||
* @retval The state of __INTERRUPT__ (SET or RESET).
|
||||
*/
|
||||
#define __HAL_DCACHE_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \
|
||||
((READ_BIT((__HANDLE__)->Instance->IER, (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
||||
|
||||
/** @brief Check whether the selected DCACHE flag is set or not.
|
||||
* @param __HANDLE__ specifies the DCACHE handle.
|
||||
* @param __FLAG__ specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg @ref DCACHE_FLAG_BUSY Busy flag
|
||||
* @arg @ref DCACHE_FLAG_BUSYEND Busy end flag
|
||||
* @arg @ref DCACHE_FLAG_ERROR Cache error flag
|
||||
* @arg @ref DCACHE_FLAG_BUSYCMD Cache Busy command flag
|
||||
* @arg @ref DCACHE_FLAG_CMDEND Cache command end flag
|
||||
* @retval The state of __FLAG__ (0 or 1).
|
||||
*/
|
||||
#define __HAL_DCACHE_GET_FLAG(__HANDLE__, __FLAG__) ((READ_BIT((__HANDLE__)->Instance->SR, (__FLAG__)) != 0U) ? 1U : 0U)
|
||||
|
||||
/** @brief Clear the selected DCACHE flags.
|
||||
* @param __HANDLE__ specifies the DCACHE handle.
|
||||
* @param __FLAG__ specifies the DCACHE flags to clear.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg @ref DCACHE_FLAG_BUSYEND Busy end flag
|
||||
* @arg @ref DCACHE_FLAG_ERROR Cache error flag
|
||||
* @arg @ref DCACHE_FLAG_CMDEND Cache command end flag
|
||||
*/
|
||||
#define __HAL_DCACHE_CLEAR_FLAG(__HANDLE__, __FLAG__) WRITE_REG((__HANDLE__)->Instance->FCR, (__FLAG__))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions -------------------------------------------------------*/
|
||||
/** @defgroup DCACHE_Exported_Functions DCACHE Exported Functions
|
||||
* @brief DCACHE Exported functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup DCACHE_Exported_Functions_Group1 Initialization and De-Initialization Functions
|
||||
* @brief Initialization and De-Initialization Functions
|
||||
* @{
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_DCACHE_Init(DCACHE_HandleTypeDef *hdcache);
|
||||
HAL_StatusTypeDef HAL_DCACHE_DeInit(DCACHE_HandleTypeDef *hdcache);
|
||||
void HAL_DCACHE_MspInit(DCACHE_HandleTypeDef *hdcache);
|
||||
void HAL_DCACHE_MspDeInit(DCACHE_HandleTypeDef *hdcache);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DCACHE_Exported_Functions_Group2 I/O Operation Functions
|
||||
* @brief I/O Operation Functions
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral Control functions ***/
|
||||
HAL_StatusTypeDef HAL_DCACHE_Enable(DCACHE_HandleTypeDef *hdcache);
|
||||
HAL_StatusTypeDef HAL_DCACHE_Disable(DCACHE_HandleTypeDef *hdcache);
|
||||
uint32_t HAL_DCACHE_IsEnabled(const DCACHE_HandleTypeDef *hdcache);
|
||||
HAL_StatusTypeDef HAL_DCACHE_SetReadBurstType(DCACHE_HandleTypeDef *hdcache, uint32_t ReadBurstType);
|
||||
|
||||
/*** Cache maintenance in blocking mode (Polling) ***/
|
||||
HAL_StatusTypeDef HAL_DCACHE_Invalidate(DCACHE_HandleTypeDef *hdcache);
|
||||
HAL_StatusTypeDef HAL_DCACHE_InvalidateByAddr(DCACHE_HandleTypeDef *hdcache, const uint32_t *const pAddr,
|
||||
uint32_t dSize);
|
||||
HAL_StatusTypeDef HAL_DCACHE_CleanByAddr(DCACHE_HandleTypeDef *hdcache, const uint32_t *const pAddr, uint32_t dSize);
|
||||
HAL_StatusTypeDef HAL_DCACHE_CleanInvalidByAddr(DCACHE_HandleTypeDef *hdcache, const uint32_t *const pAddr,
|
||||
uint32_t dSize);
|
||||
|
||||
/*** Cache maintenance in non-blocking mode (Interrupt) ***/
|
||||
HAL_StatusTypeDef HAL_DCACHE_Invalidate_IT(DCACHE_HandleTypeDef *hdcache);
|
||||
HAL_StatusTypeDef HAL_DCACHE_InvalidateByAddr_IT(DCACHE_HandleTypeDef *hdcache, const uint32_t *const pAddr,
|
||||
uint32_t dSize);
|
||||
HAL_StatusTypeDef HAL_DCACHE_CleanByAddr_IT(DCACHE_HandleTypeDef *hdcache, const uint32_t *const pAddr,
|
||||
uint32_t dSize);
|
||||
HAL_StatusTypeDef HAL_DCACHE_CleanInvalidByAddr_IT(DCACHE_HandleTypeDef *hdcache, const uint32_t *const pAddr,
|
||||
uint32_t dSize);
|
||||
|
||||
/*** IRQHandler and Callbacks ***/
|
||||
void HAL_DCACHE_IRQHandler(DCACHE_HandleTypeDef *hdcache);
|
||||
void HAL_DCACHE_ErrorCallback(DCACHE_HandleTypeDef *hdcache);
|
||||
void HAL_DCACHE_CleanByAddrCallback(DCACHE_HandleTypeDef *hdcache);
|
||||
void HAL_DCACHE_InvalidateByAddrCallback(DCACHE_HandleTypeDef *hdcache);
|
||||
void HAL_DCACHE_InvalidateCompleteCallback(DCACHE_HandleTypeDef *hdcache);
|
||||
void HAL_DCACHE_CleanAndInvalidateByAddrCallback(DCACHE_HandleTypeDef *hdcache);
|
||||
|
||||
/* Callbacks Register/UnRegister functions ***/
|
||||
HAL_StatusTypeDef HAL_DCACHE_RegisterCallback(DCACHE_HandleTypeDef *hdcache, HAL_DCACHE_CallbackIDTypeDef CallbackID,
|
||||
pDCACHE_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_DCACHE_UnRegisterCallback(DCACHE_HandleTypeDef *hdcache, HAL_DCACHE_CallbackIDTypeDef CallbackID);
|
||||
|
||||
/*** Performance instruction cache monitoring functions ***/
|
||||
uint32_t HAL_DCACHE_Monitor_GetReadHitValue(const DCACHE_HandleTypeDef *hdcache);
|
||||
uint32_t HAL_DCACHE_Monitor_GetReadMissValue(const DCACHE_HandleTypeDef *hdcache);
|
||||
uint32_t HAL_DCACHE_Monitor_GetWriteHitValue(const DCACHE_HandleTypeDef *hdcache);
|
||||
uint32_t HAL_DCACHE_Monitor_GetWriteMissValue(const DCACHE_HandleTypeDef *hdcache);
|
||||
HAL_StatusTypeDef HAL_DCACHE_Monitor_Reset(DCACHE_HandleTypeDef *hdcache, uint32_t MonitorType);
|
||||
HAL_StatusTypeDef HAL_DCACHE_Monitor_Start(DCACHE_HandleTypeDef *hdcache, uint32_t MonitorType);
|
||||
HAL_StatusTypeDef HAL_DCACHE_Monitor_Stop(DCACHE_HandleTypeDef *hdcache, uint32_t MonitorType);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DCACHE_Exported_Functions_Group3 State and Error Functions
|
||||
* @brief State and Error Functions
|
||||
* @{
|
||||
*/
|
||||
HAL_DCACHE_StateTypeDef HAL_DCACHE_GetState(const DCACHE_HandleTypeDef *hdcache);
|
||||
uint32_t HAL_DCACHE_GetError(const DCACHE_HandleTypeDef *hdcache);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* DCACHE1 || DCACHE2 */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32U5xx_HAL_DCACHE_H */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,229 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32u5xx_hal_def.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains HAL common defines, enumeration, macros and
|
||||
* structures definitions.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32U5xx_HAL_DEF
|
||||
#define __STM32U5xx_HAL_DEF
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||
#include <arm_cmse.h>
|
||||
#endif /* __ARM_FEATURE_CMSE */
|
||||
|
||||
#include "stm32u5xx.h"
|
||||
#include "Legacy/stm32_hal_legacy.h" /* Aliases file for old names compatibility */
|
||||
#include <stddef.h>
|
||||
#include <math.h>
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief HAL Status structures definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_OK = 0x00,
|
||||
HAL_ERROR = 0x01,
|
||||
HAL_BUSY = 0x02,
|
||||
HAL_TIMEOUT = 0x03
|
||||
} HAL_StatusTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL Lock structures definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_UNLOCKED = 0x00,
|
||||
HAL_LOCKED = 0x01
|
||||
} HAL_LockTypeDef;
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
|
||||
#define HAL_MAX_DELAY 0xFFFFFFFFU
|
||||
|
||||
#define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) == (BIT))
|
||||
#define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == 0U)
|
||||
|
||||
#define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \
|
||||
do{ \
|
||||
(__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \
|
||||
(__DMA_HANDLE__).Parent = (__HANDLE__); \
|
||||
} while(0)
|
||||
|
||||
#if !defined(UNUSED)
|
||||
#define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */
|
||||
#endif /* UNUSED */
|
||||
|
||||
/** @brief Reset the Handle's State field.
|
||||
* @param __HANDLE__: specifies the Peripheral Handle.
|
||||
* @note This macro can be used for the following purpose:
|
||||
* - When the Handle is declared as local variable; before passing it as parameter
|
||||
* to HAL_PPP_Init() for the first time, it is mandatory to use this macro
|
||||
* to set to 0 the Handle's "State" field.
|
||||
* Otherwise, "State" field may have any random value and the first time the function
|
||||
* HAL_PPP_Init() is called, the low level hardware initialization will be missed
|
||||
* (i.e. HAL_PPP_MspInit() will not be executed).
|
||||
* - When there is a need to reconfigure the low level hardware: instead of calling
|
||||
* HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init().
|
||||
* In this later function, when the Handle's "State" field is set to 0, it will execute the function
|
||||
* HAL_PPP_MspInit() which will reconfigure the low level hardware.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0)
|
||||
|
||||
#if (USE_RTOS == 1)
|
||||
/* Reserved for future use */
|
||||
#error " USE_RTOS should be 0 in the current HAL release "
|
||||
#else
|
||||
#define __HAL_LOCK(__HANDLE__) \
|
||||
do{ \
|
||||
if((__HANDLE__)->Lock == HAL_LOCKED) \
|
||||
{ \
|
||||
return HAL_BUSY; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Lock = HAL_LOCKED; \
|
||||
} \
|
||||
}while (0)
|
||||
|
||||
#define __HAL_UNLOCK(__HANDLE__) \
|
||||
do{ \
|
||||
(__HANDLE__)->Lock = HAL_UNLOCKED; \
|
||||
}while (0)
|
||||
#endif /* USE_RTOS */
|
||||
|
||||
#if defined ( __GNUC__ )
|
||||
#ifndef __weak
|
||||
#define __weak __attribute__((weak))
|
||||
#endif /* __weak */
|
||||
#ifndef __packed
|
||||
#define __packed __attribute__((__packed__))
|
||||
#endif /* __packed */
|
||||
#endif /* __GNUC__ */
|
||||
|
||||
#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#ifndef __weak
|
||||
#define __weak __attribute__((weak))
|
||||
#endif /* __weak */
|
||||
#ifndef __packed
|
||||
#define __packed __attribute__((packed))
|
||||
#endif /* __packed */
|
||||
#endif /* __ARMCC_VERSION */
|
||||
|
||||
/* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used
|
||||
instead */
|
||||
#if defined (__GNUC__) /* GNU Compiler */
|
||||
#ifndef __ALIGN_END
|
||||
#define __ALIGN_END __attribute__ ((aligned (4)))
|
||||
#endif /* __ALIGN_END */
|
||||
#ifndef __ALIGN_BEGIN
|
||||
#define __ALIGN_BEGIN
|
||||
#endif /* __ALIGN_BEGIN */
|
||||
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#ifndef __ALIGN_END
|
||||
#define __ALIGN_END __ALIGNED(4)
|
||||
#endif /* __ALIGN_END */
|
||||
#ifndef __ALIGN_BEGIN
|
||||
#define __ALIGN_BEGIN
|
||||
#endif /* __ALIGN_BEGIN */
|
||||
#else
|
||||
#ifndef __ALIGN_END
|
||||
#define __ALIGN_END
|
||||
#endif /* __ALIGN_END */
|
||||
#ifndef __ALIGN_BEGIN
|
||||
#if defined (__CC_ARM) /* ARM Compiler */
|
||||
#define __ALIGN_BEGIN __align(4)
|
||||
#elif defined (__ICCARM__) /* IAR Compiler */
|
||||
#define __ALIGN_BEGIN
|
||||
#endif /* __CC_ARM */
|
||||
#endif /* __ALIGN_BEGIN */
|
||||
#endif /* __GNUC__ */
|
||||
|
||||
/* Macro to get variable aligned on 32-bytes,needed for cache maintenance purpose */
|
||||
#if defined (__GNUC__) /* GNU Compiler */
|
||||
#define ALIGN_32BYTES(buf) buf __attribute__ ((aligned (32)))
|
||||
#elif defined (__ICCARM__) /* IAR Compiler */
|
||||
#define ALIGN_32BYTES(buf) _Pragma("data_alignment=32") buf
|
||||
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#define ALIGN_32BYTES(buf) __ALIGNED(32) buf
|
||||
#elif defined (__CC_ARM) /* ARM Compiler */
|
||||
#define ALIGN_32BYTES(buf) __align(32) buf
|
||||
#endif /* __GNUC__ */
|
||||
|
||||
/**
|
||||
* @brief __RAM_FUNC definition
|
||||
*/
|
||||
#if defined ( __CC_ARM ) || ((__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
|
||||
|
||||
/* ARM Compiler
|
||||
------------
|
||||
RAM functions are defined using the toolchain options.
|
||||
Functions that are executed in RAM should reside in a separate source module.
|
||||
Using the 'Options for File' dialog you can simply change the 'Code / Const'
|
||||
area of a module to a memory space in physical RAM.
|
||||
Available memory areas are declared in the 'Target' tab of the 'Options for Target'
|
||||
dialog.
|
||||
*/
|
||||
#define __RAM_FUNC HAL_StatusTypeDef
|
||||
|
||||
#elif defined ( __ICCARM__ )
|
||||
/* ICCARM Compiler
|
||||
---------------
|
||||
RAM functions are defined using a specific toolchain keyword "__ramfunc".
|
||||
*/
|
||||
#define __RAM_FUNC __ramfunc HAL_StatusTypeDef
|
||||
|
||||
#elif defined ( __GNUC__ )
|
||||
/* GNU Compiler
|
||||
------------
|
||||
RAM functions are defined using a specific toolchain attribute
|
||||
"__attribute__((section(".RamFunc")))".
|
||||
*/
|
||||
#define __RAM_FUNC HAL_StatusTypeDef __attribute__((section(".RamFunc")))
|
||||
|
||||
#endif /* __RAM_FUNC */
|
||||
|
||||
/**
|
||||
* @brief __NOINLINE definition
|
||||
*/
|
||||
#if defined ( __CC_ARM ) || ((__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) || defined ( __GNUC__ )
|
||||
/* ARM & GNUCompiler
|
||||
----------------
|
||||
*/
|
||||
#define __NOINLINE __attribute__ ( (noinline) )
|
||||
|
||||
#elif defined ( __ICCARM__ )
|
||||
/* ICCARM Compiler
|
||||
---------------
|
||||
*/
|
||||
#define __NOINLINE _Pragma("optimize = no_inline")
|
||||
|
||||
#endif /* __NOINLINE */
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ___STM32U5xx_HAL_DEF */
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,393 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32u5xx_hal_exti.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of EXTI HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32U5xx_HAL_EXTI_H
|
||||
#define STM32U5xx_HAL_EXTI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32u5xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32U5xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI EXTI
|
||||
* @brief EXTI HAL module driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/** @defgroup EXTI_Exported_Types EXTI Exported Types
|
||||
* @{
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_EXTI_COMMON_CB_ID = 0x00U,
|
||||
HAL_EXTI_RISING_CB_ID = 0x01U,
|
||||
HAL_EXTI_FALLING_CB_ID = 0x02U,
|
||||
} EXTI_CallbackIDTypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief EXTI Handle structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Line; /*!< Exti line number */
|
||||
void (* RisingCallback)(void); /*!< Exti rising callback */
|
||||
void (* FallingCallback)(void); /*!< Exti falling callback */
|
||||
} EXTI_HandleTypeDef;
|
||||
|
||||
/**
|
||||
* @brief EXTI Configuration structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Line; /*!< The Exti line to be configured. This parameter
|
||||
can be a value of @ref EXTI_Line */
|
||||
uint32_t Mode; /*!< The Exit Mode to be configured for a core.
|
||||
This parameter can be a combination of @ref EXTI_Mode */
|
||||
uint32_t Trigger; /*!< The Exti Trigger to be configured. This parameter
|
||||
can be a value of @ref EXTI_Trigger */
|
||||
uint32_t GPIOSel; /*!< The Exti GPIO multiplexer selection to be configured.
|
||||
This parameter is only possible for line 0 to 15. It
|
||||
can be a value of @ref EXTI_GPIOSel */
|
||||
} EXTI_ConfigTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup EXTI_Exported_Constants EXTI Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_Line EXTI Line
|
||||
* @{
|
||||
*/
|
||||
#define EXTI_LINE_0 (EXTI_GPIO | EXTI_REG1 | 0x00U)
|
||||
#define EXTI_LINE_1 (EXTI_GPIO | EXTI_REG1 | 0x01U)
|
||||
#define EXTI_LINE_2 (EXTI_GPIO | EXTI_REG1 | 0x02U)
|
||||
#define EXTI_LINE_3 (EXTI_GPIO | EXTI_REG1 | 0x03U)
|
||||
#define EXTI_LINE_4 (EXTI_GPIO | EXTI_REG1 | 0x04U)
|
||||
#define EXTI_LINE_5 (EXTI_GPIO | EXTI_REG1 | 0x05U)
|
||||
#define EXTI_LINE_6 (EXTI_GPIO | EXTI_REG1 | 0x06U)
|
||||
#define EXTI_LINE_7 (EXTI_GPIO | EXTI_REG1 | 0x07U)
|
||||
#define EXTI_LINE_8 (EXTI_GPIO | EXTI_REG1 | 0x08U)
|
||||
#define EXTI_LINE_9 (EXTI_GPIO | EXTI_REG1 | 0x09U)
|
||||
#define EXTI_LINE_10 (EXTI_GPIO | EXTI_REG1 | 0x0AU)
|
||||
#define EXTI_LINE_11 (EXTI_GPIO | EXTI_REG1 | 0x0BU)
|
||||
#define EXTI_LINE_12 (EXTI_GPIO | EXTI_REG1 | 0x0CU)
|
||||
#define EXTI_LINE_13 (EXTI_GPIO | EXTI_REG1 | 0x0DU)
|
||||
#define EXTI_LINE_14 (EXTI_GPIO | EXTI_REG1 | 0x0EU)
|
||||
#define EXTI_LINE_15 (EXTI_GPIO | EXTI_REG1 | 0x0FU)
|
||||
#define EXTI_LINE_16 (EXTI_CONFIG | EXTI_REG1 | 0x10U)
|
||||
#define EXTI_LINE_17 (EXTI_CONFIG | EXTI_REG1 | 0x11U)
|
||||
#if defined(EXTI_IMR1_IM18)
|
||||
#define EXTI_LINE_18 (EXTI_CONFIG | EXTI_REG1 | 0x12U)
|
||||
#endif /* EXTI_IMR1_IM18 */
|
||||
#define EXTI_LINE_19 (EXTI_CONFIG | EXTI_REG1 | 0x13U)
|
||||
#define EXTI_LINE_20 (EXTI_CONFIG | EXTI_REG1 | 0x14U)
|
||||
#define EXTI_LINE_21 (EXTI_CONFIG | EXTI_REG1 | 0x15U)
|
||||
#define EXTI_LINE_22 (EXTI_CONFIG | EXTI_REG1 | 0x16U)
|
||||
#define EXTI_LINE_23 (EXTI_CONFIG | EXTI_REG1 | 0x17U)
|
||||
#if defined(EXTI_IMR1_IM24)
|
||||
#define EXTI_LINE_24 (EXTI_CONFIG | EXTI_REG1 | 0x18U)
|
||||
#endif /* EXTI_IMR1_IM24 */
|
||||
#if defined(EXTI_IMR1_IM25)
|
||||
#define EXTI_LINE_25 (EXTI_CONFIG | EXTI_REG1 | 0x19U)
|
||||
#endif /* EXTI_IMR1_IM25 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_Mode EXTI Mode
|
||||
* @{
|
||||
*/
|
||||
#define EXTI_MODE_NONE 0x00000000U
|
||||
#define EXTI_MODE_INTERRUPT 0x00000001U
|
||||
#define EXTI_MODE_EVENT 0x00000002U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_Trigger EXTI Trigger
|
||||
* @{
|
||||
*/
|
||||
#define EXTI_TRIGGER_NONE 0x00000000U
|
||||
#define EXTI_TRIGGER_RISING 0x00000001U
|
||||
#define EXTI_TRIGGER_FALLING 0x00000002U
|
||||
#define EXTI_TRIGGER_RISING_FALLING (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_GPIOSel EXTI GPIOSel
|
||||
* @brief
|
||||
* @{
|
||||
*/
|
||||
#define EXTI_GPIOA 0x00000000U
|
||||
#define EXTI_GPIOB 0x00000001U
|
||||
#define EXTI_GPIOC 0x00000002U
|
||||
#define EXTI_GPIOD 0x00000003U
|
||||
#define EXTI_GPIOE 0x00000004U
|
||||
#if defined(GPIOF)
|
||||
#define EXTI_GPIOF 0x00000005U
|
||||
#endif /* GPIOF */
|
||||
#define EXTI_GPIOG 0x00000006U
|
||||
#define EXTI_GPIOH 0x00000007U
|
||||
#if defined(GPIOI)
|
||||
#define EXTI_GPIOI 0x00000008U
|
||||
#endif /* GPIOI */
|
||||
#if defined(GPIOJ)
|
||||
#define EXTI_GPIOJ 0x00000009U
|
||||
#endif /* GPIOJ */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_Line_attributes EXTI line attributes
|
||||
* @brief EXTI line secure or non-secure and privileged or non-privileged attributes
|
||||
* @note secure and non-secure attributes are only available from secure state when the system
|
||||
* implement the security (TZEN=1)
|
||||
* @{
|
||||
*/
|
||||
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||
/*!< Secure line attribute */
|
||||
#define EXTI_LINE_SEC (EXTI_LINE_ATTR_SEC_MASK | 0x00000001U)
|
||||
/*!< Non-secure line attribute */
|
||||
#define EXTI_LINE_NSEC (EXTI_LINE_ATTR_SEC_MASK | 0x00000000U)
|
||||
#endif /* __ARM_FEATURE_CMSE */
|
||||
/*!< Privileged line attribute */
|
||||
#define EXTI_LINE_PRIV (EXTI_LINE_ATTR_PRIV_MASK | 0x00000002U)
|
||||
/*!< Non-privileged line attribute */
|
||||
#define EXTI_LINE_NPRIV (EXTI_LINE_ATTR_PRIV_MASK | 0x00000000U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* Private constants --------------------------------------------------------*/
|
||||
/** @defgroup EXTI_Private_Constants EXTI Private Constants
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief EXTI Line property definition
|
||||
*/
|
||||
#define EXTI_PROPERTY_SHIFT 24U
|
||||
#define EXTI_DIRECT (0x01U << EXTI_PROPERTY_SHIFT)
|
||||
#define EXTI_CONFIG (0x02U << EXTI_PROPERTY_SHIFT)
|
||||
#define EXTI_GPIO ((0x04U << EXTI_PROPERTY_SHIFT) | EXTI_CONFIG)
|
||||
#define EXTI_RESERVED (0x08U << EXTI_PROPERTY_SHIFT)
|
||||
#define EXTI_PROPERTY_MASK (EXTI_DIRECT | EXTI_CONFIG | EXTI_GPIO)
|
||||
|
||||
/**
|
||||
* @brief EXTI Register and bit usage
|
||||
*/
|
||||
#define EXTI_REG_SHIFT 16U
|
||||
#define EXTI_REG1 (0x00U << EXTI_REG_SHIFT)
|
||||
#define EXTI_REG2 (0x01U << EXTI_REG_SHIFT)
|
||||
#define EXTI_REG_MASK (EXTI_REG1 | EXTI_REG2)
|
||||
#define EXTI_PIN_MASK 0x0000001FU
|
||||
|
||||
/**
|
||||
* @brief EXTI Mask for interrupt & event mode
|
||||
*/
|
||||
#define EXTI_MODE_MASK (EXTI_MODE_EVENT | EXTI_MODE_INTERRUPT)
|
||||
|
||||
/**
|
||||
* @brief EXTI Mask for trigger possibilities
|
||||
*/
|
||||
#define EXTI_TRIGGER_MASK (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING)
|
||||
|
||||
/**
|
||||
* @brief EXTI Line number
|
||||
*/
|
||||
#if defined(EXTI_IMR1_IM24) && defined(EXTI_IMR1_IM25)
|
||||
#define EXTI_LINE_NB 26U
|
||||
#else
|
||||
#define EXTI_LINE_NB 24U
|
||||
#endif /* defined(EXTI_IMR1_IM24) && defined(EXTI_IMR1_IM25) */
|
||||
|
||||
/**
|
||||
* @brief EXTI Mask for secure & privilege attributes
|
||||
*/
|
||||
#define EXTI_LINE_ATTR_SEC_MASK 0x100U
|
||||
#define EXTI_LINE_ATTR_PRIV_MASK 0x200U
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup EXTI_Private_Macros EXTI Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IS_EXTI_LINE(__EXTI_LINE__) ((((__EXTI_LINE__) & ~(EXTI_PROPERTY_MASK | \
|
||||
EXTI_REG_MASK | EXTI_PIN_MASK)) == 0x00U) \
|
||||
&&((((__EXTI_LINE__) & EXTI_PROPERTY_MASK) == EXTI_DIRECT) || \
|
||||
(((__EXTI_LINE__) & EXTI_PROPERTY_MASK) == EXTI_CONFIG) || \
|
||||
(((__EXTI_LINE__) & EXTI_PROPERTY_MASK) == EXTI_GPIO)) && \
|
||||
(((__EXTI_LINE__) & (EXTI_REG_MASK | EXTI_PIN_MASK)) < \
|
||||
(((EXTI_LINE_NB / 32U) << EXTI_REG_SHIFT) | (EXTI_LINE_NB % 32U))))
|
||||
|
||||
#define IS_EXTI_MODE(__EXTI_LINE__) ((((__EXTI_LINE__) & EXTI_MODE_MASK) != 0x00U) && \
|
||||
(((__EXTI_LINE__) & ~EXTI_MODE_MASK) == 0x00U))
|
||||
|
||||
#define IS_EXTI_TRIGGER(__EXTI_LINE__) (((__EXTI_LINE__) & ~EXTI_TRIGGER_MASK) == 0x00U)
|
||||
|
||||
#define IS_EXTI_PENDING_EDGE(__EXTI_LINE__) (((__EXTI_LINE__) == EXTI_TRIGGER_RISING) || \
|
||||
((__EXTI_LINE__) == EXTI_TRIGGER_FALLING))
|
||||
|
||||
#define IS_EXTI_CONFIG_LINE(__EXTI_LINE__) (((__EXTI_LINE__) & EXTI_CONFIG) != 0x00U)
|
||||
|
||||
#if defined(GPIOJ)
|
||||
#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
|
||||
((__PORT__) == EXTI_GPIOB) || \
|
||||
((__PORT__) == EXTI_GPIOC) || \
|
||||
((__PORT__) == EXTI_GPIOD) || \
|
||||
((__PORT__) == EXTI_GPIOE) || \
|
||||
((__PORT__) == EXTI_GPIOF) || \
|
||||
((__PORT__) == EXTI_GPIOG) || \
|
||||
((__PORT__) == EXTI_GPIOH) || \
|
||||
((__PORT__) == EXTI_GPIOI) || \
|
||||
((__PORT__) == EXTI_GPIOJ))
|
||||
#elif defined(GPIOF) && defined (GPIOI)
|
||||
#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
|
||||
((__PORT__) == EXTI_GPIOB) || \
|
||||
((__PORT__) == EXTI_GPIOC) || \
|
||||
((__PORT__) == EXTI_GPIOD) || \
|
||||
((__PORT__) == EXTI_GPIOE) || \
|
||||
((__PORT__) == EXTI_GPIOF) || \
|
||||
((__PORT__) == EXTI_GPIOG) || \
|
||||
((__PORT__) == EXTI_GPIOH) || \
|
||||
((__PORT__) == EXTI_GPIOI))
|
||||
#else
|
||||
#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
|
||||
((__PORT__) == EXTI_GPIOB) || \
|
||||
((__PORT__) == EXTI_GPIOC) || \
|
||||
((__PORT__) == EXTI_GPIOD) || \
|
||||
((__PORT__) == EXTI_GPIOE) || \
|
||||
((__PORT__) == EXTI_GPIOG) || \
|
||||
((__PORT__) == EXTI_GPIOH))
|
||||
#endif /* GPIOJ */
|
||||
|
||||
#define IS_EXTI_GPIO_PIN(__PIN__) ((__PIN__) < 16U)
|
||||
|
||||
|
||||
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||
|
||||
#define IS_EXTI_LINE_ATTRIBUTES(__ATTRIBUTES__) (((((__ATTRIBUTES__) & EXTI_LINE_SEC) == EXTI_LINE_SEC) || \
|
||||
(((__ATTRIBUTES__) & EXTI_LINE_NSEC) == EXTI_LINE_NSEC) || \
|
||||
(((__ATTRIBUTES__) & EXTI_LINE_PRIV) == EXTI_LINE_PRIV) || \
|
||||
(((__ATTRIBUTES__) & EXTI_LINE_NPRIV) == EXTI_LINE_NPRIV)) && \
|
||||
(((__ATTRIBUTES__) & ~(EXTI_LINE_SEC|EXTI_LINE_NSEC|EXTI_LINE_PRIV| \
|
||||
EXTI_LINE_NPRIV)) == 0U))
|
||||
|
||||
#else
|
||||
|
||||
#define IS_EXTI_LINE_ATTRIBUTES(__ATTRIBUTES__) (((((__ATTRIBUTES__) & EXTI_LINE_PRIV) == EXTI_LINE_PRIV) || \
|
||||
(((__ATTRIBUTES__) & EXTI_LINE_NPRIV) == EXTI_LINE_NPRIV)) && \
|
||||
(((__ATTRIBUTES__) & ~(EXTI_LINE_PRIV|EXTI_LINE_NPRIV)) == 0U))
|
||||
|
||||
#endif /* __ARM_FEATURE_CMSE */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @defgroup EXTI_Exported_Functions EXTI Exported Functions
|
||||
* @brief EXTI Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_Exported_Functions_Group1 Configuration functions
|
||||
* @brief Configuration functions
|
||||
* @{
|
||||
*/
|
||||
/* Configuration functions ****************************************************/
|
||||
HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
|
||||
HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
|
||||
HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(const EXTI_HandleTypeDef *hexti);
|
||||
HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID,
|
||||
void (*pPendingCbfn)(void));
|
||||
HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_Exported_Functions_Group2 IO operation functions
|
||||
* @brief IO operation functions
|
||||
* @{
|
||||
*/
|
||||
/* IO operation functions *****************************************************/
|
||||
void HAL_EXTI_IRQHandler(const EXTI_HandleTypeDef *hexti);
|
||||
uint32_t HAL_EXTI_GetPending(const EXTI_HandleTypeDef *hexti, uint32_t Edge);
|
||||
void HAL_EXTI_ClearPending(const EXTI_HandleTypeDef *hexti, uint32_t Edge);
|
||||
void HAL_EXTI_GenerateSWI(const EXTI_HandleTypeDef *hexti);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup EXTI_Exported_Functions_Group3 EXTI line attributes management functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* EXTI line attributes management functions **********************************/
|
||||
void HAL_EXTI_ConfigLineAttributes(uint32_t ExtiLine, uint32_t LineAttributes);
|
||||
HAL_StatusTypeDef HAL_EXTI_GetConfigLineAttributes(uint32_t ExtiLine, uint32_t *pLineAttributes);
|
||||
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||
void HAL_EXTI_LockAttributes(void);
|
||||
uint32_t HAL_EXTI_GetLockAttributes(void);
|
||||
#endif /* __ARM_FEATURE_CMSE */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32U5xx_HAL_EXTI_H */
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,240 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32u5xx_hal_flash_ex.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of FLASH HAL Extended module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32U5xx_HAL_FLASH_EX_H
|
||||
#define STM32U5xx_HAL_FLASH_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32u5xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32U5xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup FLASHEx
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @addtogroup FLASHEx_Exported_Types FLASHEx Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief FLASHEx Block-based attributes structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Bank; /*!< Selection of the associated bank of Block-based Area.
|
||||
This parameter must be a value of @ref FLASH_Banks */
|
||||
uint32_t BBAttributesType; /*!< Block-Based Attributes type. This parameter must
|
||||
be a value of @ref FLASH_BB_Attributes */
|
||||
uint32_t BBAttributes_array[FLASH_BLOCKBASED_NB_REG]; /*!< Each bit specifies the block-based attribute configuration
|
||||
of a page: 0 means page non-protected, 1 means page
|
||||
protected. Protection (secure or privilege) depends
|
||||
on BBAttributesType value */
|
||||
} FLASH_BBAttributesTypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief FLASHEx Operation structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t OperationType; /*!< Flash operation Type.
|
||||
This parameter must be a value of @ref FLASH_Operation_Type */
|
||||
uint32_t FlashArea; /*!< Flash operation memory area.
|
||||
This parameter must be a value of @ref FLASH_Operation_Area */
|
||||
uint32_t Address; /*!< Flash operation Address offset.
|
||||
This parameter is given by bank, and must be a value between 0x0 and 0xFFFF0 */
|
||||
} FLASH_OperationTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @addtogroup FLASHEx_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
/** @defgroup PRIV_MODE_CFG FLASH privilege mode configuration
|
||||
* @{
|
||||
*/
|
||||
#define FLASH_NSPRIV_GRANTED 0x00000000U /*!< access to non-secure Flash registers is granted
|
||||
to privileged or unprivileged access */
|
||||
#define FLASH_NSPRIV_DENIED FLASH_PRIVCFGR_NSPRIV /*!< access to non-secure Flash registers is denied
|
||||
to non-privilege access */
|
||||
#define FLASH_SPRIV_GRANTED 0x00000000U /*!< access to secure Flash registers is granted to privileged
|
||||
or unprivileged access */
|
||||
#define FLASH_SPRIV_DENIED FLASH_PRIVCFGR_SPRIV /*!< access to secure Flash registers is denied
|
||||
to non-privilege access */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||
/** @defgroup SEC_INVERSION_CFG FLASH security inversion configuration
|
||||
* @{
|
||||
*/
|
||||
#define FLASH_INV_DISABLE 0x00000000U /*!< Security state of Flash is not inverted */
|
||||
#define FLASH_INV_ENABLE FLASH_SECCR_INV /*!< Security state of Flash is inverted */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* __ARM_FEATURE_CMSE */
|
||||
|
||||
/** @defgroup FLASH_LPM_CFG FLASH LPM configuration
|
||||
* @{
|
||||
*/
|
||||
#define FLASH_LPM_DISABLE 0x00000000U /*!< Flash is in normal read mode */
|
||||
#define FLASH_LPM_ENABLE FLASH_ACR_LPM /*!< Flash is in low-power read mode */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup FLASH_BB_Attributes FLASH Block-Base Attributes
|
||||
* @{
|
||||
*/
|
||||
#define FLASH_BB_SEC 0x01U /*!< Flash Block-Based Security Attributes */
|
||||
#define FLASH_BB_PRIV 0x02U /*!< Flash Block-Based Privilege Attributes */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup FLASH_Operation_Type FLASH Operation Type
|
||||
* @{
|
||||
*/
|
||||
#define FLASH_OPERATION_TYPE_NONE 00000000U /*!< No Flash operation */
|
||||
#define FLASH_OPERATION_TYPE_QUADWORD FLASH_OPSR_CODE_OP_0 /*!< Single write operation */
|
||||
#define FLASH_OPERATION_TYPE_BURST FLASH_OPSR_CODE_OP_1 /*!< Burst write operation */
|
||||
#define FLASH_OPERATION_TYPE_PAGEERASE (FLASH_OPSR_CODE_OP_1 | FLASH_OPSR_CODE_OP_0) /*!< Page erase operation */
|
||||
#define FLASH_OPERATION_TYPE_BANKERASE FLASH_OPSR_CODE_OP_2 /*!< Bank erase operation */
|
||||
#define FLASH_OPERATION_TYPE_MASSERASE (FLASH_OPSR_CODE_OP_2 | FLASH_OPSR_CODE_OP_0) /*!< Mass erase operation */
|
||||
#define FLASH_OPERATION_TYPE_OPTIONCHANGE (FLASH_OPSR_CODE_OP_2 | FLASH_OPSR_CODE_OP_1) /*!< Option change operation */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup FLASH_Operation_Area FLASH Operation Area
|
||||
* @{
|
||||
*/
|
||||
#define FLASH_OPERATION_AREA_BANK_1 00000000U /*!< Operation in Bank 1 */
|
||||
#define FLASH_OPERATION_AREA_BANK_2 FLASH_OPSR_BK_OP /*!< Operation in Bank 2 */
|
||||
#define FLASH_OPERATION_AREA_SYSF FLASH_OPSR_SYSF_OP /*!< Operation in System Flash memory */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup FLASHEx_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Extended Program operation functions *************************************/
|
||||
/** @addtogroup FLASHEx_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError);
|
||||
HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
|
||||
HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
|
||||
void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
|
||||
HAL_StatusTypeDef HAL_FLASHEx_ConfigBBAttributes(FLASH_BBAttributesTypeDef *pBBAttributes);
|
||||
void HAL_FLASHEx_GetConfigBBAttributes(FLASH_BBAttributesTypeDef *pBBAttributes);
|
||||
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||
void HAL_FLASHEx_EnableSecHideProtection(uint32_t Banks);
|
||||
#endif /* __ARM_FEATURE_CMSE */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup FLASHEx_Exported_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
void HAL_FLASHEx_ConfigPrivMode(uint32_t PrivMode);
|
||||
uint32_t HAL_FLASHEx_GetPrivMode(void);
|
||||
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||
HAL_StatusTypeDef HAL_FLASHEx_ConfigSecInversion(uint32_t SecInvState);
|
||||
uint32_t HAL_FLASHEx_GetSecInversion(void);
|
||||
#endif /* __ARM_FEATURE_CMSE */
|
||||
HAL_StatusTypeDef HAL_FLASHEx_EnablePowerDown(uint32_t Banks);
|
||||
HAL_StatusTypeDef HAL_FLASHEx_ConfigLowPowerRead(uint32_t ConfigLPM);
|
||||
uint32_t HAL_FLASHEx_GetLowPowerRead(void);
|
||||
void HAL_FLASHEx_GetOperation(FLASH_OperationTypeDef *pFlashOperation);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private function ----------------------------------------------------------*/
|
||||
/** @addtogroup FLASHEx_Private_Functions FLASHEx Private Functions
|
||||
* @{
|
||||
*/
|
||||
void FLASH_PageErase(uint32_t Page, uint32_t Banks);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup FLASHEx_Private_Macros FLASH Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IS_FLASH_BB_EXCLUSIVE(CFG) (((CFG) == FLASH_BB_SEC) || \
|
||||
((CFG) == FLASH_BB_PRIV))
|
||||
|
||||
#define IS_FLASH_CFGPRIVMODE(CFG) (((CFG) & 0xFFFFFFFCU) == 0U)
|
||||
|
||||
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||
#define IS_FLASH_CFGSECINV(CFG) (((CFG) == FLASH_INV_DISABLE) || \
|
||||
((CFG) == FLASH_INV_ENABLE))
|
||||
#endif /* __ARM_FEATURE_CMSE */
|
||||
|
||||
#define IS_FLASH_CFGLPM(CFG) (((CFG) == FLASH_LPM_DISABLE) || \
|
||||
((CFG) == FLASH_LPM_ENABLE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32U5xx_HAL_FLASH_EX_H */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,499 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32u5xx_hal_gfxmmu.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of GFXMMU HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32U5xx_HAL_GFXMMU_H
|
||||
#define STM32U5xx_HAL_GFXMMU_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32u5xx_hal_def.h"
|
||||
|
||||
#if defined(GFXMMU)
|
||||
|
||||
/** @addtogroup STM32U5xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup GFXMMU
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup GFXMMU_Exported_Types GFXMMU Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief HAL GFXMMU states definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_GFXMMU_STATE_RESET = 0x00U, /*!< GFXMMU not initialized. */
|
||||
HAL_GFXMMU_STATE_READY = 0x01U, /*!< GFXMMU initialized and ready for use. */
|
||||
} HAL_GFXMMU_StateTypeDef;
|
||||
|
||||
/**
|
||||
* @brief GFXMMU buffers structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Buf0Address; /*!< Physical address of buffer 0. */
|
||||
uint32_t Buf1Address; /*!< Physical address of buffer 1. */
|
||||
uint32_t Buf2Address; /*!< Physical address of buffer 2. */
|
||||
uint32_t Buf3Address; /*!< Physical address of buffer 3. */
|
||||
} GFXMMU_BuffersTypeDef;
|
||||
|
||||
#if defined(GFXMMU_CR_CE)
|
||||
/**
|
||||
* @brief GFXMMU cache and pre-fetch structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
FunctionalState Activation; /*!< Cache and pre-fetch enable/disable.
|
||||
@note: All following parameters are useful only if cache
|
||||
and pre-fetch are enabled. */
|
||||
uint32_t CacheLock; /*!< Locking the cache to a buffer.
|
||||
This parameter can be a value of @ref GFXMMU_CacheLock. */
|
||||
uint32_t CacheLockBuffer; /*!< Buffer on which the cache is locked.
|
||||
This parameter can be a value of @ref GFXMMU_CacheLockBuffer.
|
||||
@note: Useful only when lock of the cache is enabled. */
|
||||
uint32_t CacheForce; /*!< Forcing the cache regardless MPU attributes.
|
||||
This parameter can be a value of @ref GFXMMU_CacheForce.
|
||||
@note: Useful only when lock of the cache is enabled. */
|
||||
uint32_t OutterBufferability; /*!< Bufferability of an access generated by the GFXMMU cache.
|
||||
This parameter can be a value of @ref GFXMMU_OutterBufferability. */
|
||||
uint32_t OutterCachability; /*!< Cachability of an access generated by the GFXMMU cache.
|
||||
This parameter can be a value of @ref GFXMMU_OutterCachability. */
|
||||
uint32_t Prefetch; /*!< Pre-fetch enable/disable.
|
||||
This parameter can be a value of @ref GFXMMU_Prefetch. */
|
||||
} GFXMMU_CachePrefetchTypeDef;
|
||||
|
||||
#endif /* GFXMMU_CR_CE */
|
||||
#if defined(GFXMMU_CR_ACE)
|
||||
/**
|
||||
* @brief GFXMMU address cache structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
FunctionalState Activation; /*!< Address Cache and enable/disable.
|
||||
@note: All following parameters are useful only if address
|
||||
cache is enabled. */
|
||||
uint32_t AddressCacheLockBuffer; /*!< Buffer on which the address cache is locked.
|
||||
This parameter can be a value of @ref GFXMMU_AddressCacheLockBuffer.
|
||||
@note: Useful only when lock of the address cache is enabled. */
|
||||
} GFXMMU_AddressCacheTypeDef;
|
||||
|
||||
#endif /* GFXMMU_CR_ACE */
|
||||
/**
|
||||
* @brief GFXMMU interrupts structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
FunctionalState Activation; /*!< Interrupts enable/disable. */
|
||||
uint32_t UsedInterrupts; /*!< Interrupts used.
|
||||
This parameter can be a values combination of @ref GFXMMU_Interrupts.
|
||||
@note: Useful only when interrupts are enabled. */
|
||||
} GFXMMU_InterruptsTypeDef;
|
||||
|
||||
/**
|
||||
* @brief GFXMMU init structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t BlocksPerLine; /*!< Number of blocks of 16 bytes per line.
|
||||
This parameter can be a value of @ref GFXMMU_BlocksPerLine. */
|
||||
uint32_t DefaultValue; /*!< Value returned when virtual memory location not physically mapped. */
|
||||
GFXMMU_BuffersTypeDef Buffers; /*!< Physical buffers addresses. */
|
||||
#if defined(GFXMMU_CR_CE)
|
||||
GFXMMU_CachePrefetchTypeDef CachePrefetch; /*!< Cache and pre-fetch parameters. */
|
||||
#endif /* GFXMMU_CR_CE */
|
||||
#if defined(GFXMMU_CR_ACE)
|
||||
GFXMMU_AddressCacheTypeDef AddressCache; /*!< Address Cache parameters. */
|
||||
#endif /* GFXMMU_CR_ACE */
|
||||
GFXMMU_InterruptsTypeDef Interrupts; /*!< Interrupts parameters. */
|
||||
} GFXMMU_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief GFXMMU handle structure definition
|
||||
*/
|
||||
#if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1)
|
||||
typedef struct __GFXMMU_HandleTypeDef
|
||||
#else
|
||||
typedef struct
|
||||
#endif /* USE_HAL_GFXMMU_REGISTER_CALLBACKS */
|
||||
{
|
||||
GFXMMU_TypeDef *Instance; /*!< GFXMMU instance. */
|
||||
GFXMMU_InitTypeDef Init; /*!< GFXMMU init parameters. */
|
||||
HAL_GFXMMU_StateTypeDef State; /*!< GFXMMU state. */
|
||||
__IO uint32_t ErrorCode; /*!< GFXMMU error code. */
|
||||
#if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1)
|
||||
void (*ErrorCallback) (struct __GFXMMU_HandleTypeDef *hgfxmmu); /*!< GFXMMU error callback. */
|
||||
void (*MspInitCallback) (struct __GFXMMU_HandleTypeDef *hgfxmmu); /*!< GFXMMU MSP init callback. */
|
||||
void (*MspDeInitCallback) (struct __GFXMMU_HandleTypeDef *hgfxmmu); /*!< GFXMMU MSP de-init callback. */
|
||||
#endif /* USE_HAL_GFXMMU_REGISTER_CALLBACKS */
|
||||
} GFXMMU_HandleTypeDef;
|
||||
|
||||
/**
|
||||
* @brief GFXMMU LUT line structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t LineNumber; /*!< LUT line number.
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 1023. */
|
||||
uint32_t LineStatus; /*!< LUT line enable/disable.
|
||||
This parameter can be a value of @ref GFXMMU_LutLineStatus. */
|
||||
uint32_t FirstVisibleBlock; /*!< First visible block on this line.
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 255. */
|
||||
uint32_t LastVisibleBlock; /*!< Last visible block on this line.
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 255. */
|
||||
int32_t LineOffset; /*!< Offset of block 0 of the current line in physical buffer.
|
||||
This parameter must be a number between Min_Data = -4080 and Max_Data = 4190208.
|
||||
@note: Line offset has to be computed with the following formula:
|
||||
LineOffset = [(Blocks already used) - (1st visible block)]*BlockSize. */
|
||||
} GFXMMU_LutLineTypeDef;
|
||||
|
||||
#if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief GFXMMU callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_GFXMMU_ERROR_CB_ID = 0x00U, /*!< GFXMMU error callback ID. */
|
||||
HAL_GFXMMU_MSPINIT_CB_ID = 0x01U, /*!< GFXMMU MSP init callback ID. */
|
||||
HAL_GFXMMU_MSPDEINIT_CB_ID = 0x02U /*!< GFXMMU MSP de-init callback ID. */
|
||||
} HAL_GFXMMU_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief GFXMMU callback pointer definition
|
||||
*/
|
||||
typedef void (*pGFXMMU_CallbackTypeDef)(GFXMMU_HandleTypeDef *hgfxmmu);
|
||||
#endif /* USE_HAL_GFXMMU_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* End of exported types -----------------------------------------------------*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup GFXMMU_Exported_Constants GFXMMU Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GFXMMU_BlocksPerLine GFXMMU blocks per line
|
||||
* @{
|
||||
*/
|
||||
#define GFXMMU_256BLOCKS 0x00000000U /*!< 256 blocks of 16 bytes per line */
|
||||
#define GFXMMU_192BLOCKS GFXMMU_CR_192BM /*!< 192 blocks of 16 bytes per line */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GFXMMU_CacheLock GFXMMU cache lock
|
||||
* @{
|
||||
*/
|
||||
#define GFXMMU_CACHE_LOCK_DISABLE 0x00000000U /*!< Cache not locked to a buffer */
|
||||
#define GFXMMU_CACHE_LOCK_ENABLE GFXMMU_CR_CL /*!< Cache locked to a buffer */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GFXMMU_CacheLockBuffer GFXMMU cache lock buffer
|
||||
* @{
|
||||
*/
|
||||
#define GFXMMU_CACHE_LOCK_BUFFER0 0x00000000U /*!< Cache locked to buffer 0 */
|
||||
#define GFXMMU_CACHE_LOCK_BUFFER1 GFXMMU_CR_CLB_0 /*!< Cache locked to buffer 1 */
|
||||
#define GFXMMU_CACHE_LOCK_BUFFER2 GFXMMU_CR_CLB_1 /*!< Cache locked to buffer 2 */
|
||||
#define GFXMMU_CACHE_LOCK_BUFFER3 GFXMMU_CR_CLB /*!< Cache locked to buffer 3 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GFXMMU_CacheForce GFXMMU cache force
|
||||
* @{
|
||||
*/
|
||||
#define GFXMMU_CACHE_FORCE_DISABLE 0x00000000U /*!< Caching not forced */
|
||||
#define GFXMMU_CACHE_FORCE_ENABLE GFXMMU_CR_FC /*!< Caching forced */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GFXMMU_OutterBufferability GFXMMU outer bufferability
|
||||
* @{
|
||||
*/
|
||||
#define GFXMMU_OUTTER_BUFFERABILITY_DISABLE 0x00000000U /*!< No bufferable */
|
||||
#define GFXMMU_OUTTER_BUFFERABILITY_ENABLE GFXMMU_CR_OB /*!< Bufferable */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GFXMMU_OutterCachability GFXMMU outer cachability
|
||||
* @{
|
||||
*/
|
||||
#define GFXMMU_OUTTER_CACHABILITY_DISABLE 0x00000000U /*!< No cacheable */
|
||||
#define GFXMMU_OUTTER_CACHABILITY_ENABLE GFXMMU_CR_OC /*!< Cacheable */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GFXMMU_Prefetch GFXMMU pre-fetch
|
||||
* @{
|
||||
*/
|
||||
#define GFXMMU_PREFETCH_DISABLE GFXMMU_CR_PD /*!< Pre-fetch disable */
|
||||
#define GFXMMU_PREFETCH_ENABLE 0x00000000U /*!< Pre-fetch enable */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GFXMMU_Interrupts GFXMMU interrupts
|
||||
* @{
|
||||
*/
|
||||
#define GFXMMU_AHB_MASTER_ERROR_IT GFXMMU_CR_AMEIE /*!< AHB master error interrupt. */
|
||||
#define GFXMMU_BUFFER0_OVERFLOW_IT GFXMMU_CR_B0OIE /*!< Buffer 0 overflow interrupt. */
|
||||
#define GFXMMU_BUFFER1_OVERFLOW_IT GFXMMU_CR_B1OIE /*!< Buffer 1 overflow interrupt. */
|
||||
#define GFXMMU_BUFFER2_OVERFLOW_IT GFXMMU_CR_B2OIE /*!< Buffer 2 overflow interrupt. */
|
||||
#define GFXMMU_BUFFER3_OVERFLOW_IT GFXMMU_CR_B3OIE /*!< Buffer 3 overflow interrupt. */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GFXMMU_Error_Code GFXMMU Error Code
|
||||
* @{
|
||||
*/
|
||||
#define GFXMMU_ERROR_NONE 0x00000000U /*!< No error. */
|
||||
#define GFXMMU_ERROR_BUFFER0_OVERFLOW GFXMMU_SR_B0OF /*!< Buffer 0 overflow. */
|
||||
#define GFXMMU_ERROR_BUFFER1_OVERFLOW GFXMMU_SR_B1OF /*!< Buffer 1 overflow. */
|
||||
#define GFXMMU_ERROR_BUFFER2_OVERFLOW GFXMMU_SR_B2OF /*!< Buffer 2 overflow. */
|
||||
#define GFXMMU_ERROR_BUFFER3_OVERFLOW GFXMMU_SR_B3OF /*!< Buffer 3 overflow. */
|
||||
#define GFXMMU_ERROR_AHB_MASTER GFXMMU_SR_AMEF /*!< AHB master error. */
|
||||
#if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1)
|
||||
#define GFXMMU_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid callback error. */
|
||||
#endif /* USE_HAL_GFXMMU_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GFXMMU_LutLineStatus GFXMMU LUT line status
|
||||
* @{
|
||||
*/
|
||||
#define GFXMMU_LUT_LINE_DISABLE 0x00000000U /*!< LUT line disabled. */
|
||||
#define GFXMMU_LUT_LINE_ENABLE GFXMMU_LUTxL_EN /*!< LUT line enabled. */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/** @defgroup GFXMMU_CacheForceParam GFXMMU cache force parameter
|
||||
* @{
|
||||
*/
|
||||
#define GFXMMU_CACHE_FORCE_FLUSH GFXMMU_CCR_FF /*!< Force cache flush */
|
||||
#define GFXMMU_CACHE_FORCE_INVALIDATE GFXMMU_CCR_FI /*!< Force cache invalidate */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#if defined(GFXMMU_CR_ACE)
|
||||
/** @defgroup GFXMMU_AddressCacheLockBuffer GFXMMU address cache lock buffer
|
||||
* @{
|
||||
*/
|
||||
#define GFXMMU_ADDRESSCACHE_LOCK_BUFFER0 0x00000000U /*!< Address Cache locked to buffer 0 */
|
||||
#define GFXMMU_ADDRESSCACHE_LOCK_BUFFER1 GFXMMU_CR_ACLB_0 /*!< Address Cache locked to buffer 1 */
|
||||
#define GFXMMU_ADDRESSCACHE_LOCK_BUFFER2 GFXMMU_CR_ACLB_1 /*!< Address Cache locked to buffer 2 */
|
||||
#define GFXMMU_ADDRESSCACHE_LOCK_BUFFER3 GFXMMU_CR_ACLB /*!< Address Cache locked to buffer 3 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* GFXMMU_CR_ACE */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* End of exported constants -------------------------------------------------*/
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
/** @defgroup GFXMMU_Exported_Macros GFXMMU Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Reset GFXMMU handle state.
|
||||
* @param __HANDLE__ GFXMMU handle.
|
||||
* @retval None
|
||||
*/
|
||||
#if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1)
|
||||
#define __HAL_GFXMMU_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
||||
(__HANDLE__)->State = HAL_GFXMMU_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
} while(0)
|
||||
#else
|
||||
#define __HAL_GFXMMU_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_GFXMMU_STATE_RESET)
|
||||
#endif /* USE_HAL_GFXMMU_REGISTER_CALLBACKS */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* End of exported macros ----------------------------------------------------*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup GFXMMU_Exported_Functions GFXMMU Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup GFXMMU_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @{
|
||||
*/
|
||||
/* Initialization and de-initialization functions *****************************/
|
||||
HAL_StatusTypeDef HAL_GFXMMU_Init(GFXMMU_HandleTypeDef *hgfxmmu);
|
||||
HAL_StatusTypeDef HAL_GFXMMU_DeInit(GFXMMU_HandleTypeDef *hgfxmmu);
|
||||
void HAL_GFXMMU_MspInit(GFXMMU_HandleTypeDef *hgfxmmu);
|
||||
void HAL_GFXMMU_MspDeInit(GFXMMU_HandleTypeDef *hgfxmmu);
|
||||
#if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1)
|
||||
/* GFXMMU callbacks register/unregister functions *****************************/
|
||||
HAL_StatusTypeDef HAL_GFXMMU_RegisterCallback(GFXMMU_HandleTypeDef *hgfxmmu,
|
||||
HAL_GFXMMU_CallbackIDTypeDef CallbackID,
|
||||
pGFXMMU_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_GFXMMU_UnRegisterCallback(GFXMMU_HandleTypeDef *hgfxmmu,
|
||||
HAL_GFXMMU_CallbackIDTypeDef CallbackID);
|
||||
#endif /* USE_HAL_GFXMMU_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup GFXMMU_Exported_Functions_Group2 Operations functions
|
||||
* @{
|
||||
*/
|
||||
/* Operation functions ********************************************************/
|
||||
HAL_StatusTypeDef HAL_GFXMMU_ConfigLut(GFXMMU_HandleTypeDef *hgfxmmu,
|
||||
uint32_t FirstLine,
|
||||
uint32_t LinesNumber,
|
||||
uint32_t Address);
|
||||
|
||||
HAL_StatusTypeDef HAL_GFXMMU_DisableLutLines(GFXMMU_HandleTypeDef *hgfxmmu,
|
||||
uint32_t FirstLine,
|
||||
uint32_t LinesNumber);
|
||||
|
||||
HAL_StatusTypeDef HAL_GFXMMU_ConfigLutLine(GFXMMU_HandleTypeDef *hgfxmmu, GFXMMU_LutLineTypeDef *lutLine);
|
||||
#if defined(GFXMMU_CR_CE)
|
||||
|
||||
HAL_StatusTypeDef HAL_GFXMMU_ConfigForceCache(GFXMMU_HandleTypeDef *hgfxmmu, uint32_t ForceParam);
|
||||
|
||||
HAL_StatusTypeDef HAL_GFXMMU_ModifyCachePrefetch(GFXMMU_HandleTypeDef *hgfxmmu,
|
||||
GFXMMU_CachePrefetchTypeDef *CachePrefetch);
|
||||
#endif /* GFXMMU_CR_CE */
|
||||
|
||||
HAL_StatusTypeDef HAL_GFXMMU_ModifyBuffers(GFXMMU_HandleTypeDef *hgfxmmu, GFXMMU_BuffersTypeDef *Buffers);
|
||||
#if defined(GFXMMU_CR_ACE)
|
||||
HAL_StatusTypeDef HAL_GFXMMU_ModifyAddressCache(GFXMMU_HandleTypeDef *hgfxmmu,
|
||||
GFXMMU_AddressCacheTypeDef *AddressCache);
|
||||
#endif /* GFXMMU_CR_ACE */
|
||||
|
||||
void HAL_GFXMMU_IRQHandler(GFXMMU_HandleTypeDef *hgfxmmu);
|
||||
|
||||
void HAL_GFXMMU_ErrorCallback(GFXMMU_HandleTypeDef *hgfxmmu);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GFXMMU_Exported_Functions_Group3 State functions
|
||||
* @{
|
||||
*/
|
||||
/* State function *************************************************************/
|
||||
HAL_GFXMMU_StateTypeDef HAL_GFXMMU_GetState(GFXMMU_HandleTypeDef *hgfxmmu);
|
||||
|
||||
uint32_t HAL_GFXMMU_GetError(GFXMMU_HandleTypeDef *hgfxmmu);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* End of exported functions -------------------------------------------------*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup GFXMMU_Private_Macros GFXMMU Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IS_GFXMMU_BLOCKS_PER_LINE(VALUE) (((VALUE) == GFXMMU_256BLOCKS) || \
|
||||
((VALUE) == GFXMMU_192BLOCKS))
|
||||
|
||||
#define IS_GFXMMU_LUT_LINE_OFFSET(VALUE) (((VALUE) >= -4080) && ((VALUE) <= 4190208))
|
||||
|
||||
#define IS_GFXMMU_BUFFER_ADDRESS(VALUE) (((VALUE) & 0xFU) == 0U)
|
||||
|
||||
#define IS_GFXMMU_CACHE_LOCK(VALUE) (((VALUE) == GFXMMU_CACHE_LOCK_DISABLE) || \
|
||||
((VALUE) == GFXMMU_CACHE_LOCK_ENABLE))
|
||||
|
||||
#define IS_GFXMMU_CACHE_LOCK_BUFFER(VALUE) (((VALUE) == GFXMMU_CACHE_LOCK_BUFFER0) || \
|
||||
((VALUE) == GFXMMU_CACHE_LOCK_BUFFER1) || \
|
||||
((VALUE) == GFXMMU_CACHE_LOCK_BUFFER2) || \
|
||||
((VALUE) == GFXMMU_CACHE_LOCK_BUFFER3))
|
||||
|
||||
#define IS_GFXMMU_CACHE_FORCE(VALUE) (((VALUE) == GFXMMU_CACHE_FORCE_DISABLE) || \
|
||||
((VALUE) == GFXMMU_CACHE_FORCE_ENABLE))
|
||||
|
||||
#define IS_GFXMMU_OUTTER_BUFFERABILITY(VALUE) (((VALUE) == GFXMMU_OUTTER_BUFFERABILITY_DISABLE) || \
|
||||
((VALUE) == GFXMMU_OUTTER_BUFFERABILITY_ENABLE))
|
||||
|
||||
#define IS_GFXMMU_OUTTER_CACHABILITY(VALUE) (((VALUE) == GFXMMU_OUTTER_CACHABILITY_DISABLE) || \
|
||||
((VALUE) == GFXMMU_OUTTER_CACHABILITY_ENABLE))
|
||||
|
||||
#define IS_GFXMMU_PREFETCH(VALUE) (((VALUE) == GFXMMU_PREFETCH_DISABLE) || \
|
||||
((VALUE) == GFXMMU_PREFETCH_ENABLE))
|
||||
|
||||
#if defined(GFXMMU_CR_ACE)
|
||||
#define IS_GFXMMU_ADDRESSCACHE_LOCK_BUFFER(VALUE) (((VALUE) == GFXMMU_ADDRESSCACHE_LOCK_BUFFER0) || \
|
||||
((VALUE) == GFXMMU_ADDRESSCACHE_LOCK_BUFFER1) || \
|
||||
((VALUE) == GFXMMU_ADDRESSCACHE_LOCK_BUFFER2) || \
|
||||
((VALUE) == GFXMMU_ADDRESSCACHE_LOCK_BUFFER3))
|
||||
#endif /* GFXMMU_CR_ACE */
|
||||
|
||||
#define IS_GFXMMU_CACHE_FORCE_ACTION(VALUE) (((VALUE) == GFXMMU_CACHE_FORCE_FLUSH) || \
|
||||
((VALUE) == GFXMMU_CACHE_FORCE_INVALIDATE) || \
|
||||
((VALUE) == (GFXMMU_CACHE_FORCE_FLUSH | GFXMMU_CACHE_FORCE_INVALIDATE)))
|
||||
|
||||
#define IS_GFXMMU_INTERRUPTS(VALUE) (((VALUE) & 0x1FU) != 0U)
|
||||
|
||||
#define IS_GFXMMU_LUT_LINE(VALUE) ((VALUE) < 1024U)
|
||||
|
||||
#define IS_GFXMMU_LUT_LINES_NUMBER(VALUE) (((VALUE) > 0U) && ((VALUE) <= 1024U))
|
||||
|
||||
#define IS_GFXMMU_LUT_LINE_STATUS(VALUE) (((VALUE) == GFXMMU_LUT_LINE_DISABLE) || \
|
||||
((VALUE) == GFXMMU_LUT_LINE_ENABLE))
|
||||
|
||||
#define IS_GFXMMU_LUT_BLOCK(VALUE) ((VALUE) < 256U)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* End of private macros -----------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* GFXMMU */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32U5xx_HAL_GFXMMU_H */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,410 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32u5xx_hal_gpio.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of GPIO HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32U5xx_HAL_GPIO_H
|
||||
#define STM32U5xx_HAL_GPIO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32u5xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32U5xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO GPIO
|
||||
* @brief GPIO HAL module driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/** @defgroup GPIO_Exported_Types GPIO Exported Types
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief GPIO Init structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Pin; /*!< Specifies the GPIO pins to be configured.
|
||||
This parameter can be a value of @ref GPIO_pins */
|
||||
|
||||
uint32_t Mode; /*!< Specifies the operating mode for the selected pins.
|
||||
This parameter can be a value of @ref GPIO_mode */
|
||||
|
||||
uint32_t Pull; /*!< Specifies the Pull-up or Pull-Down activation for the selected pins.
|
||||
This parameter can be a value of @ref GPIO_pull */
|
||||
|
||||
uint32_t Speed; /*!< Specifies the speed for the selected pins.
|
||||
This parameter can be a value of @ref GPIO_speed */
|
||||
|
||||
uint32_t Alternate; /*!< Peripheral to be connected to the selected pins
|
||||
This parameter can be a value of @ref GPIOEx_Alternate_function_selection */
|
||||
} GPIO_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief GPIO Bit SET and Bit RESET enumeration
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
GPIO_PIN_RESET = 0U,
|
||||
GPIO_PIN_SET
|
||||
} GPIO_PinState;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup GPIO_Exported_Constants GPIO Exported Constants
|
||||
* @{
|
||||
*/
|
||||
/** @defgroup GPIO_pins GPIO pins
|
||||
* @{
|
||||
*/
|
||||
#define GPIO_PIN_0 ((uint16_t)0x0001)
|
||||
#define GPIO_PIN_1 ((uint16_t)0x0002)
|
||||
#define GPIO_PIN_2 ((uint16_t)0x0004)
|
||||
#define GPIO_PIN_3 ((uint16_t)0x0008)
|
||||
#define GPIO_PIN_4 ((uint16_t)0x0010)
|
||||
#define GPIO_PIN_5 ((uint16_t)0x0020)
|
||||
#define GPIO_PIN_6 ((uint16_t)0x0040)
|
||||
#define GPIO_PIN_7 ((uint16_t)0x0080)
|
||||
#define GPIO_PIN_8 ((uint16_t)0x0100)
|
||||
#define GPIO_PIN_9 ((uint16_t)0x0200)
|
||||
#define GPIO_PIN_10 ((uint16_t)0x0400)
|
||||
#define GPIO_PIN_11 ((uint16_t)0x0800)
|
||||
#define GPIO_PIN_12 ((uint16_t)0x1000)
|
||||
#define GPIO_PIN_13 ((uint16_t)0x2000)
|
||||
#define GPIO_PIN_14 ((uint16_t)0x4000)
|
||||
#define GPIO_PIN_15 ((uint16_t)0x8000)
|
||||
#define GPIO_PIN_ALL ((uint16_t)0xFFFF)
|
||||
|
||||
#define GPIO_PIN_MASK (0x0000FFFFU)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_mode GPIO mode
|
||||
* @brief GPIO Configuration Mode
|
||||
* Elements values convention: 0xX0yz00YZ
|
||||
* - X : GPIO mode or EXTI Mode
|
||||
* - y : External IT or Event trigger detection
|
||||
* - z : IO configuration on External IT or Event
|
||||
* - Y : Output type (Push Pull or Open Drain)
|
||||
* - Z : IO Direction mode (Input, Output, (Alternate or Analog) not applicable in case of LPGPIO)
|
||||
* @{
|
||||
*/
|
||||
/*!< Input Floating Mode */
|
||||
#define GPIO_MODE_INPUT (0x00000000U)
|
||||
/*!< Output Push Pull Mode */
|
||||
#define GPIO_MODE_OUTPUT_PP (0x00000001U)
|
||||
/*!< Output Open Drain Mode */
|
||||
#define GPIO_MODE_OUTPUT_OD (0x00000011U)
|
||||
/*!< Alternate Function Push Pull Mode */
|
||||
#define GPIO_MODE_AF_PP (0x00000002U)
|
||||
/*!< Alternate Function Open Drain Mode */
|
||||
#define GPIO_MODE_AF_OD (0x00000012U)
|
||||
/*!< Analog Mode */
|
||||
#define GPIO_MODE_ANALOG (0x00000003U)
|
||||
/*!< External Interrupt Mode with Rising edge trigger detection */
|
||||
#define GPIO_MODE_IT_RISING (0x10110000U)
|
||||
/*!< External Interrupt Mode with Falling edge trigger detection */
|
||||
#define GPIO_MODE_IT_FALLING (0x10210000U)
|
||||
/*!< External Interrupt Mode with Rising/Falling edge trigger detection */
|
||||
#define GPIO_MODE_IT_RISING_FALLING (0x10310000U)
|
||||
/*!< External Event Mode with Rising edge trigger detection */
|
||||
#define GPIO_MODE_EVT_RISING (0x10120000U)
|
||||
/*!< External Event Mode with Falling edge trigger detection */
|
||||
#define GPIO_MODE_EVT_FALLING (0x10220000U)
|
||||
/*!< External Event Mode with Rising/Falling edge trigger detection */
|
||||
#define GPIO_MODE_EVT_RISING_FALLING (0x10320000U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_speed GPIO speed
|
||||
* @brief GPIO Output Maximum frequency
|
||||
* @{
|
||||
*/
|
||||
#define GPIO_SPEED_FREQ_LOW (0x00000000U) /*!< Low speed */
|
||||
#define GPIO_SPEED_FREQ_MEDIUM (0x00000001U) /*!< Medium speed */
|
||||
#define GPIO_SPEED_FREQ_HIGH (0x00000002U) /*!< High speed */
|
||||
#define GPIO_SPEED_FREQ_VERY_HIGH (0x00000003U) /*!< Very-high speed */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_pull GPIO pull
|
||||
* @brief GPIO Pull-Up or Pull-Down Activation
|
||||
* @{
|
||||
*/
|
||||
#define GPIO_NOPULL (0x00000000U) /*!< No Pull-up or Pull-down activation */
|
||||
#define GPIO_PULLUP (0x00000001U) /*!< Pull-up activation */
|
||||
#define GPIO_PULLDOWN (0x00000002U) /*!< Pull-down activation */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||
|
||||
/** @defgroup GPIO_attributes GPIO attributes
|
||||
* @brief GPIO pin secure or non-secure attributes
|
||||
* @{
|
||||
*/
|
||||
#define GPIO_PIN_SEC (0x00000001U) /*!< Secure pin attribute */
|
||||
#define GPIO_PIN_NSEC (0x00000000U) /*!< Non-secure pin attribute */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* __ARM_FEATURE_CMSE */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/** @defgroup GPIO_Exported_Macros GPIO Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Check whether the specified EXTI line is rising edge asserted or not.
|
||||
* @param __EXTI_LINE__: specifies the EXTI line to check.
|
||||
* This parameter can be GPIO_PIN_x where x can be(0..15)
|
||||
* @retval The new state of __EXTI_LINE__ (SET or RESET).
|
||||
*/
|
||||
#define __HAL_GPIO_EXTI_GET_RISING_IT(__EXTI_LINE__) (EXTI->RPR1 & (__EXTI_LINE__))
|
||||
|
||||
/**
|
||||
* @brief Clear the EXTI's line rising pending bits.
|
||||
* @param __EXTI_LINE__: specifies the EXTI lines to clear.
|
||||
* This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_GPIO_EXTI_CLEAR_RISING_IT(__EXTI_LINE__) (EXTI->RPR1 = (__EXTI_LINE__))
|
||||
|
||||
/**
|
||||
* @brief Check whether the specified EXTI line is falling edge asserted or not.
|
||||
* @param __EXTI_LINE__: specifies the EXTI line to check.
|
||||
* This parameter can be GPIO_PIN_x where x can be(0..15)
|
||||
* @retval The new state of __EXTI_LINE__ (SET or RESET).
|
||||
*/
|
||||
#define __HAL_GPIO_EXTI_GET_FALLING_IT(__EXTI_LINE__) (EXTI->FPR1 & (__EXTI_LINE__))
|
||||
|
||||
/**
|
||||
* @brief Clear the EXTI's line falling pending bits.
|
||||
* @param __EXTI_LINE__: specifies the EXTI lines to clear.
|
||||
* This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_GPIO_EXTI_CLEAR_FALLING_IT(__EXTI_LINE__) (EXTI->FPR1 = (__EXTI_LINE__))
|
||||
|
||||
/**
|
||||
* @brief Check whether the specified EXTI line is asserted or not.
|
||||
* @param __EXTI_LINE__: specifies the EXTI line to check.
|
||||
* This parameter can be GPIO_PIN_x where x can be(0..15)
|
||||
* @retval The new state of __EXTI_LINE__ (SET or RESET).
|
||||
*/
|
||||
#define __HAL_GPIO_EXTI_GET_IT(__EXTI_LINE__) (__HAL_GPIO_EXTI_GET_RISING_IT(__EXTI_LINE__) || \
|
||||
__HAL_GPIO_EXTI_GET_FALLING_IT(__EXTI_LINE__))
|
||||
|
||||
/**
|
||||
* @brief Clear the EXTI's line pending bits.
|
||||
* @param __EXTI_LINE__: specifies the EXTI lines to clear.
|
||||
* This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_GPIO_EXTI_CLEAR_IT(__EXTI_LINE__) \
|
||||
do { \
|
||||
__HAL_GPIO_EXTI_CLEAR_RISING_IT(__EXTI_LINE__); \
|
||||
__HAL_GPIO_EXTI_CLEAR_FALLING_IT(__EXTI_LINE__); \
|
||||
} while(0)
|
||||
|
||||
|
||||
/**
|
||||
* @brief Generate a Software interrupt on selected EXTI line(s).
|
||||
* @param __EXTI_LINE__: specifies the EXTI line to set.
|
||||
* This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_GPIO_EXTI_GENERATE_SWIT(__EXTI_LINE__) (EXTI->SWIER1 = (__EXTI_LINE__))
|
||||
|
||||
/**
|
||||
* @brief Check whether the specified EXTI line flag is set or not.
|
||||
* @param __EXTI_LINE__ specifies the EXTI line flag to check.
|
||||
* This parameter can be GPIO_PIN_x where x can be(0..15)
|
||||
* @retval The new state of __EXTI_LINE__ (SET or RESET).
|
||||
*/
|
||||
#define __HAL_GPIO_EXTI_GET_FLAG(__EXTI_LINE__) __HAL_GPIO_EXTI_GET_IT(__EXTI_LINE__)
|
||||
|
||||
/**
|
||||
* @brief Clear the EXTI line pending flags.
|
||||
* @param __EXTI_LINE__ specifies the EXTI lines flags to clear.
|
||||
* This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_GPIO_EXTI_CLEAR_FLAG(__EXTI_LINE__) __HAL_GPIO_EXTI_CLEAR_IT(__EXTI_LINE__)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup GPIO_Private_Macros GPIO Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET))
|
||||
|
||||
#define IS_GPIO_PIN(__PIN__) ((((uint32_t)(__PIN__) & GPIO_PIN_MASK) != 0x00U) &&\
|
||||
(((uint32_t)(__PIN__) & ~GPIO_PIN_MASK) == 0x00U))
|
||||
|
||||
#define IS_GPIO_SINGLE_PIN(__PIN__) (((__PIN__) == GPIO_PIN_0) ||\
|
||||
((__PIN__) == GPIO_PIN_1) ||\
|
||||
((__PIN__) == GPIO_PIN_2) ||\
|
||||
((__PIN__) == GPIO_PIN_3) ||\
|
||||
((__PIN__) == GPIO_PIN_4) ||\
|
||||
((__PIN__) == GPIO_PIN_5) ||\
|
||||
((__PIN__) == GPIO_PIN_6) ||\
|
||||
((__PIN__) == GPIO_PIN_7) ||\
|
||||
((__PIN__) == GPIO_PIN_8) ||\
|
||||
((__PIN__) == GPIO_PIN_9) ||\
|
||||
((__PIN__) == GPIO_PIN_10) ||\
|
||||
((__PIN__) == GPIO_PIN_11) ||\
|
||||
((__PIN__) == GPIO_PIN_12) ||\
|
||||
((__PIN__) == GPIO_PIN_13) ||\
|
||||
((__PIN__) == GPIO_PIN_14) ||\
|
||||
((__PIN__) == GPIO_PIN_15))
|
||||
|
||||
#define IS_GPIO_COMMON_PIN(__RESETMASK__, __SETMASK__) \
|
||||
(((uint32_t)(__RESETMASK__) & (uint32_t)(__SETMASK__)) == 0x00u)
|
||||
|
||||
#define IS_GPIO_MODE(__MODE__) (((__MODE__) == GPIO_MODE_INPUT) ||\
|
||||
((__MODE__) == GPIO_MODE_OUTPUT_PP) ||\
|
||||
((__MODE__) == GPIO_MODE_OUTPUT_OD) ||\
|
||||
((__MODE__) == GPIO_MODE_AF_PP) ||\
|
||||
((__MODE__) == GPIO_MODE_AF_OD) ||\
|
||||
((__MODE__) == GPIO_MODE_IT_RISING) ||\
|
||||
((__MODE__) == GPIO_MODE_IT_FALLING) ||\
|
||||
((__MODE__) == GPIO_MODE_IT_RISING_FALLING) ||\
|
||||
((__MODE__) == GPIO_MODE_EVT_RISING) ||\
|
||||
((__MODE__) == GPIO_MODE_EVT_FALLING) ||\
|
||||
((__MODE__) == GPIO_MODE_EVT_RISING_FALLING) ||\
|
||||
((__MODE__) == GPIO_MODE_ANALOG))
|
||||
|
||||
#define IS_GPIO_SPEED(__SPEED__) (((__SPEED__) == GPIO_SPEED_FREQ_LOW) ||\
|
||||
((__SPEED__) == GPIO_SPEED_FREQ_MEDIUM) ||\
|
||||
((__SPEED__) == GPIO_SPEED_FREQ_HIGH) ||\
|
||||
((__SPEED__) == GPIO_SPEED_FREQ_VERY_HIGH))
|
||||
|
||||
#define IS_GPIO_PULL(__PULL__) (((__PULL__) == GPIO_NOPULL) ||\
|
||||
((__PULL__) == GPIO_PULLUP) || \
|
||||
((__PULL__) == GPIO_PULLDOWN))
|
||||
|
||||
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||
|
||||
#define IS_GPIO_PIN_ATTRIBUTES(__ATTRIBUTES__) (((__ATTRIBUTES__) == GPIO_PIN_SEC) ||\
|
||||
((__ATTRIBUTES__) == GPIO_PIN_NSEC))
|
||||
|
||||
#endif /* __ARM_FEATURE_CMSE */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Include GPIO HAL Extended module */
|
||||
#include "stm32u5xx_hal_gpio_ex.h"
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @defgroup GPIO_Exported_Functions GPIO Exported Functions
|
||||
* @brief GPIO Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Exported_Functions_Group1 Initialization/de-initialization functions
|
||||
* @brief Initialization and Configuration functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Initialization and de-initialization functions *****************************/
|
||||
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, const GPIO_InitTypeDef *pGPIO_Init);
|
||||
void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Exported_Functions_Group2 IO operation functions
|
||||
* @brief IO operation functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* IO operation functions *****************************************************/
|
||||
GPIO_PinState HAL_GPIO_ReadPin(const GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
|
||||
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState);
|
||||
void HAL_GPIO_WriteMultipleStatePin(GPIO_TypeDef *GPIOx, uint16_t PinReset, uint16_t PinSet);
|
||||
void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
|
||||
void HAL_GPIO_EnableHighSPeedLowVoltage(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
|
||||
void HAL_GPIO_DisableHighSPeedLowVoltage(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
|
||||
HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin);
|
||||
void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin);
|
||||
void HAL_GPIO_EXTI_Rising_Callback(uint16_t GPIO_Pin);
|
||||
void HAL_GPIO_EXTI_Falling_Callback(uint16_t GPIO_Pin);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
||||
|
||||
/** @defgroup GPIO_Exported_Functions_Group3 IO attributes management functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* IO attributes management functions *****************************************/
|
||||
void HAL_GPIO_ConfigPinAttributes(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, uint32_t PinAttributes);
|
||||
HAL_StatusTypeDef HAL_GPIO_GetConfigPinAttributes(const GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin,
|
||||
uint32_t *pPinAttributes);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* __ARM_FEATURE_CMSE */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32U5xx_HAL_GPIO_H */
|
||||
@@ -0,0 +1,342 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32u5xx_hal_gpio_ex.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of GPIO HAL Extended module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32U5xx_HAL_GPIO_EX_H
|
||||
#define STM32U5xx_HAL_GPIO_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32u5xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32U5xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIOEx GPIOEx
|
||||
* @brief GPIO Extended HAL module driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup LPGPIO_MapTypeDef GPIO/Ex Exported Types
|
||||
* @{
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
GPIO_TypeDef *GPIO_PORT;
|
||||
uint32_t Pin_Pos;
|
||||
} LPGPIO_MapTypeDef;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup GPIOEx_Exported_Constants GPIOEx Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIOEx_Alternate_function_selection GPIOEx Alternate function selection
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief AF 0 selection
|
||||
*/
|
||||
#define GPIO_AF0_RTC_50HZ ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */
|
||||
#define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */
|
||||
#define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */
|
||||
#define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */
|
||||
#define GPIO_AF0_LPTIM1 ((uint8_t)0x00) /* LPTIM1 Alternate Function mapping */
|
||||
#define GPIO_AF0_CSLEEP ((uint8_t)0x00) /* CSLEEP Alternate Function mapping */
|
||||
#define GPIO_AF0_CSTOP ((uint8_t)0x00) /* CSTOP Alternate Function mapping */
|
||||
#define GPIO_AF0_CRS ((uint8_t)0x00) /* CRS Alternate Function mapping */
|
||||
#define GPIO_AF0_SRDSTOP ((uint8_t)0x00) /* SRDSTOP Alternate Function mapping */
|
||||
|
||||
/**
|
||||
* @brief AF 1 selection
|
||||
*/
|
||||
#define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
|
||||
#define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
|
||||
#define GPIO_AF1_TIM5 ((uint8_t)0x01) /* TIM5 Alternate Function mapping */
|
||||
#define GPIO_AF1_TIM8 ((uint8_t)0x01) /* TIM8 Alternate Function mapping */
|
||||
#define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */
|
||||
#define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */
|
||||
|
||||
/**
|
||||
* @brief AF 2 selection
|
||||
*/
|
||||
#define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */
|
||||
#define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */
|
||||
#define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */
|
||||
#define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */
|
||||
#define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */
|
||||
#define GPIO_AF2_LPTIM1 ((uint8_t)0x02) /* LPTIM1 Alternate Function mapping */
|
||||
#define GPIO_AF2_LPTIM2 ((uint8_t)0x02) /* LPTIM2 Alternate Function mapping */
|
||||
#define GPIO_AF2_LPTIM3 ((uint8_t)0x02) /* LPTIM3 Alternate Function mapping */
|
||||
#if defined(I2C5)
|
||||
#define GPIO_AF2_I2C5 ((uint8_t)0x02) /* I2C5 Alternate Function mapping */
|
||||
#endif /* I2C5 */
|
||||
#if defined(I2C6)
|
||||
#define GPIO_AF2_I2C6 ((uint8_t)0x02) /* I2C6 Alternate Function mapping */
|
||||
#endif /* I2C6 */
|
||||
#if defined(GFXTIM)
|
||||
#define GPIO_AF2_GFXTIM ((uint8_t)0x02) /* GFXTIM Alternate Function mapping */
|
||||
#endif /* GFXTIM */
|
||||
|
||||
/**
|
||||
* @brief AF 3 selection
|
||||
*/
|
||||
#define GPIO_AF3_I2C4 ((uint8_t)0x03) /* I2C4 Alternate Function mapping */
|
||||
#define GPIO_AF3_OCTOSPI1 ((uint8_t)0x03) /* OCTOSPI1 Alternate Function mapping */
|
||||
#define GPIO_AF3_SAI1 ((uint8_t)0x03) /* SAI1 Alternate Function mapping */
|
||||
#define GPIO_AF3_SPI2 ((uint8_t)0x03) /* SPI2 Alternate Function mapping */
|
||||
#define GPIO_AF3_TIM1 ((uint8_t)0x03) /* TIM1 Alternate Function mapping */
|
||||
#define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */
|
||||
#define GPIO_AF3_TIM8_COMP1 ((uint8_t)0x03) /* TIM8/COMP1 Break in Alternate Function mapping */
|
||||
#define GPIO_AF3_TIM8_COMP2 ((uint8_t)0x03) /* TIM8/COMP2 Break in Alternate Function mapping */
|
||||
#define GPIO_AF3_TIM1_COMP1 ((uint8_t)0x03) /* TIM1/COMP1 Break in Alternate Function mapping */
|
||||
#define GPIO_AF3_TIM1_COMP2 ((uint8_t)0x03) /* TIM1/COMP2 Break in Alternate Function mapping */
|
||||
#if defined(USART2)
|
||||
#define GPIO_AF3_USART2 ((uint8_t)0x03) /* USART2 Alternate Function mapping */
|
||||
#endif /* USART2 */
|
||||
#define GPIO_AF3_ADF1 ((uint8_t)0x03) /* ADF1 Alternate Function mapping */
|
||||
#if defined(USB_OTG_HS)
|
||||
#define GPIO_AF3_USB_HS ((uint8_t)0x03) /* USB_HS Alternate Function mapping */
|
||||
#endif /* USB_OTG_HS */
|
||||
|
||||
/**
|
||||
* @brief AF 4 selection
|
||||
*/
|
||||
#define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */
|
||||
#define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */
|
||||
#define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */
|
||||
#define GPIO_AF4_I2C4 ((uint8_t)0x04) /* I2C4 Alternate Function mapping */
|
||||
#define GPIO_AF4_PSSI ((uint8_t)0x04) /* PSSI Alternate Function mapping */
|
||||
#define GPIO_AF4_DCMI ((uint8_t)0x04) /* DCMI Alternate Function mapping */
|
||||
#define GPIO_AF4_LPTIM3 ((uint8_t)0x04) /* LPTIM3 Alternate Function mapping */
|
||||
#if defined (I2C5)
|
||||
#define GPIO_AF4_I2C5 ((uint8_t)0x04) /* I2C5 Alternate Function mapping */
|
||||
#endif /* I2C5 */
|
||||
|
||||
/**
|
||||
* @brief AF 5 selection
|
||||
*/
|
||||
#define GPIO_AF5_I2C4 ((uint8_t)0x05) /* I2C4 Alternate Function mapping */
|
||||
#define GPIO_AF5_OCTOSPI1 ((uint8_t)0x05) /* OCTOSPI1 Alternate Function mapping */
|
||||
#if defined(OCTOSPI2)
|
||||
#define GPIO_AF5_OCTOSPI2 ((uint8_t)0x05) /* OCTOSPI2 Alternate Function mapping */
|
||||
#endif /* OCTOSPI2 */
|
||||
#define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */
|
||||
#define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */
|
||||
#define GPIO_AF5_SPI3 ((uint8_t)0x05) /* SPI3 Alternate Function mapping */
|
||||
#define GPIO_AF5_DCMI ((uint8_t)0x05) /* DCMI Alternate Function mapping */
|
||||
#define GPIO_AF5_MDF1 ((uint8_t)0x05) /* MDF1 Alternate Function mapping */
|
||||
#define GPIO_AF5_PSSI ((uint8_t)0x05) /* PSSI Alternate Function mapping */
|
||||
#if defined(GFXTIM)
|
||||
#define GPIO_AF5_GFXTIM ((uint8_t)0x05) /* GFXTIM Alternate Function mapping */
|
||||
#endif /* GFXTIM */
|
||||
|
||||
/**
|
||||
* @brief AF 6 selection
|
||||
*/
|
||||
#define GPIO_AF6_OCTOSPI1 ((uint8_t)0x06) /* OCTOSPI1 Alternate Function mapping */
|
||||
#if defined(OCTOSPI2)
|
||||
#define GPIO_AF6_OCTOSPI2 ((uint8_t)0x06) /* OCTOSPI2 Alternate Function mapping */
|
||||
#endif /* OCTOPSI2 */
|
||||
#define GPIO_AF6_MDF1 ((uint8_t)0x06) /* MDF1 Alternate Function mapping */
|
||||
#define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */
|
||||
#define GPIO_AF6_I2C3 ((uint8_t)0x06) /* I2C3 Alternate Function mapping */
|
||||
|
||||
/**
|
||||
* @brief AF 7 selection
|
||||
*/
|
||||
#define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */
|
||||
#if defined(USART2)
|
||||
#define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */
|
||||
#endif /* USART2 */
|
||||
#define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */
|
||||
#if defined(USART6)
|
||||
#define GPIO_AF7_USART6 ((uint8_t)0x07) /* USART6 Alternate Function mapping */
|
||||
#endif /* USART6 */
|
||||
#if defined(LTDC)
|
||||
#define GPIO_AF7_LTDC ((uint8_t)0x07) /* LTDC Alternate Function mapping */
|
||||
#endif /* LTDC */
|
||||
|
||||
/**
|
||||
* @brief AF 8 selection
|
||||
*/
|
||||
#define GPIO_AF8_LPUART1 ((uint8_t)0x08) /* LPUART1 Alternate Function mapping */
|
||||
#define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */
|
||||
#define GPIO_AF8_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */
|
||||
#define GPIO_AF8_SDMMC1 ((uint8_t)0x08) /* SDMMC1 Alternate Function mapping */
|
||||
#if defined(SDMMC2)
|
||||
#define GPIO_AF8_SDMMC2 ((uint8_t)0x08) /* SDMMC2 Alternate Function mapping */
|
||||
#endif /* SDMMC2 */
|
||||
#if defined(LTDC)
|
||||
#define GPIO_AF8_LTDC ((uint8_t)0x08) /* LTDC Alternate Function mapping */
|
||||
#endif /* LTDC */
|
||||
#if defined(HSPI1)
|
||||
#define GPIO_AF8_HSPI1 ((uint8_t)0x08) /* HSPI1 Alternate Function mapping */
|
||||
#endif /* HSPI1 */
|
||||
|
||||
/**
|
||||
* @brief AF 9 selection
|
||||
*/
|
||||
#define GPIO_AF9_FDCAN1 ((uint8_t)0x09) /* FDCAN1 Alternate Function mapping */
|
||||
#define GPIO_AF9_TSC ((uint8_t)0x09) /* TSC Alternate Function mapping */
|
||||
|
||||
/**
|
||||
* @brief AF 10 selection
|
||||
*/
|
||||
#define GPIO_AF10_DCMI ((uint8_t)0x0A) /* DCMI Alternate Function mapping */
|
||||
#define GPIO_AF10_PSSI ((uint8_t)0x0A) /* PSSI Alternate Function mapping */
|
||||
#define GPIO_AF10_USB ((uint8_t)0x0A) /* USB Alternate Function mapping */
|
||||
#define GPIO_AF10_OCTOSPI1 ((uint8_t)0x0A) /* OCTOSPI1 Alternate Function mapping */
|
||||
#if defined(OCTOSPI2)
|
||||
#define GPIO_AF10_OCTOSPI2 ((uint8_t)0x0A) /* OCTOSPI2 Alternate Function mapping */
|
||||
#endif /* OCTOSPI2 */
|
||||
#define GPIO_AF10_CRS ((uint8_t)0x0A) /* CRS Alternate Function mapping */
|
||||
#if defined(USB_OTG_HS)
|
||||
#define GPIO_AF10_USB_HS ((uint8_t)0x0A) /* USB_HS Alternate Function mapping */
|
||||
#endif /* USB_OTG_HS */
|
||||
#if defined(DSI)
|
||||
#define GPIO_AF10_DSI ((uint8_t)0x0A) /* DSI Alternate Function mapping */
|
||||
#endif /* DSI */
|
||||
#if defined(GFXTIM)
|
||||
#define GPIO_AF10_GFXTIM ((uint8_t)0x0A) /* GFXTIM Alternate Function mapping */
|
||||
#endif /* GFXTIM */
|
||||
|
||||
/**
|
||||
* @brief AF 11 selection
|
||||
*/
|
||||
#if defined(UCPD1)
|
||||
#define GPIO_AF11_UCPD1 ((uint8_t)0x0B) /* UCPD1 Alternate Function mapping */
|
||||
#endif /* UCPD1 */
|
||||
#if defined(SDMMC2)
|
||||
#define GPIO_AF11_SDMMC2 ((uint8_t)0x0B) /* SDMMC2 Alternate Function mapping */
|
||||
#endif /* SDMMC2 */
|
||||
#define GPIO_AF11_LPGPIO1 ((uint8_t)0x0B) /* LPGPIO1 Alternate Function mapping */
|
||||
#if defined(FMC_BASE)
|
||||
#define GPIO_AF11_FMC ((uint8_t)0x0B) /* FMC Alternate Function mapping */
|
||||
#endif /* FMC_BASE */
|
||||
#if defined(DSI)
|
||||
#define GPIO_AF11_DSI ((uint8_t)0x0B) /* DSI Alternate Function mapping */
|
||||
#endif /* DSI */
|
||||
#if defined(GFXTIM)
|
||||
#define GPIO_AF11_GFXTIM ((uint8_t)0x0B) /* GFXTIM Alternate Function mapping */
|
||||
#endif /* GFXTIM */
|
||||
|
||||
/**
|
||||
* @brief AF 12 selection
|
||||
*/
|
||||
#define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */
|
||||
#define GPIO_AF12_COMP2 ((uint8_t)0x0C) /* COMP2 Alternate Function mapping */
|
||||
#if defined(FMC_BASE)
|
||||
#define GPIO_AF12_FMC ((uint8_t)0x0C) /* FMC Alternate Function mapping */
|
||||
#endif /* FMC_BASE */
|
||||
#define GPIO_AF12_TIM1_COMP1 ((uint8_t)0x0C) /* TIM1/COMP1 Break in Alternate Function mapping */
|
||||
#define GPIO_AF12_TIM1_COMP2 ((uint8_t)0x0C) /* TIM1/COMP2 Break in Alternate Function mapping */
|
||||
#define GPIO_AF12_TIM8_COMP2 ((uint8_t)0x0C) /* TIM8/COMP2 Break in Alternate Function mapping */
|
||||
#define GPIO_AF12_SDMMC1 ((uint8_t)0x0C) /* SDMMC1 Alternate Function mapping */
|
||||
#if defined(SDMMC2)
|
||||
#define GPIO_AF12_SDMMC2 ((uint8_t)0x0C) /* SDMMC2 Alternate Function mapping */
|
||||
#endif /* SDMMC2 */
|
||||
|
||||
/**
|
||||
* @brief AF 13 selection
|
||||
*/
|
||||
#define GPIO_AF13_SAI1 ((uint8_t)0x0D) /* SAI1 Alternate Function mapping */
|
||||
#if defined(SAI2)
|
||||
#define GPIO_AF13_SAI2 ((uint8_t)0x0D) /* SAI2 Alternate Function mapping */
|
||||
#endif /* SAI2 */
|
||||
#define GPIO_AF13_LPTIM4 ((uint8_t)0x0D) /* LPTIM4 Alternate Function mapping */
|
||||
#define GPIO_AF13_LPTIM2 ((uint8_t)0x0D) /* LPTIM2 Alternate Function mapping */
|
||||
#if defined(GFXTIM)
|
||||
#define GPIO_AF13_GFXTIM ((uint8_t)0x0D) /* GFXTIM Alternate Function mapping */
|
||||
#endif /* GFXTIM */
|
||||
|
||||
/**
|
||||
* @brief AF 14 selection
|
||||
*/
|
||||
#define GPIO_AF14_LPTIM2 ((uint8_t)0x0E) /* LPTIM2 Alternate Function mapping */
|
||||
#define GPIO_AF14_LPTIM3 ((uint8_t)0x0E) /* LPTIM3 Alternate Function mapping */
|
||||
#define GPIO_AF14_TIM2 ((uint8_t)0x0E) /* TIM2 Alternate Function mapping */
|
||||
#define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */
|
||||
#define GPIO_AF14_TIM15_COMP1 ((uint8_t)0x0E) /* TIM15/COMP1 Alternate Function mapping */
|
||||
#define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */
|
||||
#define GPIO_AF14_TIM16_COMP1 ((uint8_t)0x0E) /* TIM16/COMP1 Alternate Function mapping */
|
||||
#define GPIO_AF14_TIM17 ((uint8_t)0x0E) /* TIM17 Alternate Function mapping */
|
||||
#define GPIO_AF14_TIM17_COMP1 ((uint8_t)0x0E) /* TIM17/COMP1 Alternate Function mapping */
|
||||
#if defined(FMC_BASE)
|
||||
#define GPIO_AF14_FMC ((uint8_t)0x0E) /* FMC Alternate Function mapping */
|
||||
#endif /* FMC_BASE */
|
||||
|
||||
/**
|
||||
* @brief AF 15 selection
|
||||
*/
|
||||
#define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */
|
||||
|
||||
#define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/** @defgroup GPIOEx_Exported_Macros GPIOEx Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIOEx_Get_Port_Index GPIOEx Get Port Index
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* GPIO_Peripheral_Memory_Mapping Peripheral Memory Mapping */
|
||||
#define GPIO_GET_INDEX(__GPIOx__) (((uint32_t )(__GPIOx__) & (~GPIOA_BASE)) >> 10)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32U5xx_HAL_GPIO_EX_H */
|
||||
@@ -0,0 +1,324 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32u5xx_hal_gpu2d.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of GPU2D HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32U5xx_HAL_GPU2D_H
|
||||
#define STM32U5xx_HAL_GPU2D_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32u5xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32U5xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined (GPU2D)
|
||||
|
||||
/** @addtogroup GPU2D GPU2D
|
||||
* @brief GPU2D HAL module driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup GPU2D_Exported_Types GPU2D Exported Types
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief HAL GPU2D State enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_GPU2D_STATE_RESET = 0x00U, /*!< GPU2D not yet initialized or disabled */
|
||||
HAL_GPU2D_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
|
||||
HAL_GPU2D_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */
|
||||
HAL_GPU2D_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
|
||||
HAL_GPU2D_STATE_ERROR = 0x04U
|
||||
} HAL_GPU2D_StateTypeDef;
|
||||
|
||||
/**
|
||||
* @brief GPU2D_TypeDef definition
|
||||
*/
|
||||
typedef uint32_t GPU2D_TypeDef;
|
||||
|
||||
/**
|
||||
* @brief GPU2D handle Structure definition
|
||||
*/
|
||||
#if (USE_HAL_GPU2D_REGISTER_CALLBACKS == 1)
|
||||
typedef struct __GPU2D_HandleTypeDef
|
||||
#else
|
||||
typedef struct
|
||||
#endif /* USE_HAL_GPU2D_REGISTER_CALLBACKS = 1 */
|
||||
{
|
||||
GPU2D_TypeDef Instance; /*!< GPU2D register base address. */
|
||||
|
||||
HAL_LockTypeDef Lock; /*!< GPU2D lock. */
|
||||
|
||||
HAL_GPU2D_StateTypeDef State; /*!< GPU2D transfer state. */
|
||||
|
||||
uint32_t ErrorCode; /*!< GPU2D error code. */
|
||||
|
||||
#if (USE_HAL_GPU2D_REGISTER_CALLBACKS == 1)
|
||||
void (* CommandListCpltCallback)(struct __GPU2D_HandleTypeDef *hgpu2d, uint32_t CmdListID); /*!< GPU2D Command Complete Callback */
|
||||
|
||||
void (* MspInitCallback)(struct __GPU2D_HandleTypeDef *hgpu2d); /*!< GPU2D Msp Init callback */
|
||||
|
||||
void (* MspDeInitCallback)(struct __GPU2D_HandleTypeDef *hgpu2d); /*!< GPU2D Msp DeInit callback */
|
||||
#endif /* USE_HAL_GPU2D_REGISTER_CALLBACKS = 1 */
|
||||
} GPU2D_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_GPU2D_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief HAL GPU2D Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_GPU2D_MSPINIT_CB_ID = 0x00U, /*!< GPU2D MspInit callback ID */
|
||||
HAL_GPU2D_MSPDEINIT_CB_ID = 0x01U, /*!< GPU2D MspDeInit callback ID */
|
||||
} HAL_GPU2D_CallbackIDTypeDef;
|
||||
|
||||
/** @defgroup HAL_GPU2D_Callback_pointer_definition HAL GPU2D Callback pointer definition
|
||||
* @brief HAL GPU2D Callback pointer definition
|
||||
* @{
|
||||
*/
|
||||
typedef void (*pGPU2D_CallbackTypeDef)(GPU2D_HandleTypeDef *hgpu2d); /*!< pointer to an GPU2D Callback function */
|
||||
typedef void (*pGPU2D_CommandListCpltCallbackTypeDef)(GPU2D_HandleTypeDef *hgpu2d, uint32_t CmdID); /*!< pointer to an GPU2D Command List Complete Callback function */
|
||||
#endif /* USE_HAL_GPU2D_REGISTER_CALLBACKS = 1 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup GPU2D_Exported_Constants GPU2D Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPU2D_Error_Code_definition GPU2D Error Code definition
|
||||
* @brief GPU2D Error Code definition
|
||||
* @{
|
||||
*/
|
||||
#define HAL_GPU2D_ERROR_NONE (0x00000000U) /*!< No error */
|
||||
#define HAL_GPU2D_ERROR_TIMEOUT (0x00000001U) /*!< Timeout error */
|
||||
#if (USE_HAL_GPU2D_REGISTER_CALLBACKS == 1)
|
||||
#define HAL_GPU2D_ERROR_INVALID_CALLBACK (0x00000002U) /*!< Invalid callback error */
|
||||
#endif /* USE_HAL_GPU2D_REGISTER_CALLBACKS = 1 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPU2D_Interrupt_configuration_definition GPU2D Interrupt configuration definition
|
||||
* @brief GPU2D Interrupt definition
|
||||
* @{
|
||||
*/
|
||||
#define GPU2D_IT_CLC 0x00000001U /*!< Command List Complete Interrupt */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPU2D_Flag_definition GPU2D Flag definition
|
||||
* @brief GPU2D Flags definition
|
||||
* @{
|
||||
*/
|
||||
#define GPU2D_FLAG_CLC 0x00000001U /*!< Command List Complete Interrupt Flag */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macros ------------------------------------------------------------*/
|
||||
/** @defgroup GPU2D_Exported_Macros GPU2D Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Reset GPU2D handle state
|
||||
* @param __HANDLE__: specifies the GPU2D handle.
|
||||
* @retval None
|
||||
*/
|
||||
#if (USE_HAL_GPU2D_REGISTER_CALLBACKS == 1)
|
||||
#define __HAL_GPU2D_RESET_HANDLE_STATE(__HANDLE__) do { \
|
||||
(__HANDLE__)->State = HAL_GPU2D_STATE_RESET; \
|
||||
(__HANDLE__)->MspInitCallback = NULL; \
|
||||
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||
(__HANDLE__)->CommandListCpltCallback = NULL; \
|
||||
} while(0)
|
||||
#else /* USE_HAL_GPU2D_REGISTER_CALLBACKS = 0 */
|
||||
#define __HAL_GPU2D_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_GPU2D_STATE_RESET)
|
||||
#endif /* USE_HAL_GPU2D_REGISTER_CALLBACKS = 1 */
|
||||
|
||||
/* Interrupt & Flag management */
|
||||
/**
|
||||
* @brief Get the GPU2D pending flags.
|
||||
* @param __HANDLE__: GPU2D handle
|
||||
* @param __FLAG__: flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg GPU2D_FLAG_CLC: Command List Complete interrupt mask
|
||||
* @retval The state of FLAG.
|
||||
*/
|
||||
#define __HAL_GPU2D_GET_FLAG(__HANDLE__, __FLAG__) (READ_REG(*(__IO uint32_t *)((uint32_t)(__HANDLE__)->Instance\
|
||||
+ GPU2D_ITCTRL)) & (__FLAG__))
|
||||
|
||||
/**
|
||||
* @brief Clear the GPU2D pending flags.
|
||||
* @param __HANDLE__: GPU2D handle
|
||||
* @param __FLAG__: specifies the flag to clear.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg GPU2D_FLAG_CLC: Command List Complete interrupt mask
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_GPU2D_CLEAR_FLAG(__HANDLE__, __FLAG__) do { \
|
||||
__IO uint32_t *tmpreg = \
|
||||
(__IO uint32_t *)((uint32_t)(__HANDLE__)->Instance\
|
||||
+ GPU2D_ITCTRL); \
|
||||
CLEAR_BIT(*tmpreg, __FLAG__); \
|
||||
} while(0U)
|
||||
|
||||
/**
|
||||
* @brief Check whether the specified GPU2D interrupt source is enabled or not.
|
||||
* @param __HANDLE__: GPU2D handle
|
||||
* @param __INTERRUPT__: specifies the GPU2D interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg GPU2D_IT_CLC: Command List Complete interrupt mask
|
||||
* @retval The state of INTERRUPT source.
|
||||
*/
|
||||
#define __HAL_GPU2D_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (READ_REG(*(__IO uint32_t *)\
|
||||
((uint32_t)(__HANDLE__)->Instance\
|
||||
+ GPU2D_ITCTRL)) & (__INTERRUPT__))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup GPU2D_Exported_Functions GPU2D Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup GPU2D_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Initialization and de-initialization functions *******************************/
|
||||
HAL_StatusTypeDef HAL_GPU2D_Init(GPU2D_HandleTypeDef *hgpu2d);
|
||||
HAL_StatusTypeDef HAL_GPU2D_DeInit(GPU2D_HandleTypeDef *hgpu2d);
|
||||
void HAL_GPU2D_MspInit(GPU2D_HandleTypeDef *hgpu2d);
|
||||
void HAL_GPU2D_MspDeInit(GPU2D_HandleTypeDef *hgpu2d);
|
||||
/* Callbacks Register/UnRegister functions ***********************************/
|
||||
#if (USE_HAL_GPU2D_REGISTER_CALLBACKS == 1)
|
||||
HAL_StatusTypeDef HAL_GPU2D_RegisterCallback(GPU2D_HandleTypeDef *hgpu2d, HAL_GPU2D_CallbackIDTypeDef CallbackID,
|
||||
pGPU2D_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_GPU2D_UnRegisterCallback(GPU2D_HandleTypeDef *hgpu2d, HAL_GPU2D_CallbackIDTypeDef CallbackID);
|
||||
HAL_StatusTypeDef HAL_GPU2D_RegisterCommandListCpltCallback(GPU2D_HandleTypeDef *hgpu2d,
|
||||
pGPU2D_CommandListCpltCallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_GPU2D_UnRegisterCommandListCpltCallback(GPU2D_HandleTypeDef *hgpu2d);
|
||||
#endif /* USE_HAL_GPU2D_REGISTER_CALLBACKS = 1 */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @addtogroup GPU2D_Exported_Functions_Group2 IO operation functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* IO operation functions *******************************************************/
|
||||
uint32_t HAL_GPU2D_ReadRegister(GPU2D_HandleTypeDef *hgpu2d, uint32_t offset);
|
||||
HAL_StatusTypeDef HAL_GPU2D_WriteRegister(GPU2D_HandleTypeDef *hgpu2d, uint32_t offset, uint32_t value);
|
||||
void HAL_GPU2D_IRQHandler(GPU2D_HandleTypeDef *hgpu2d);
|
||||
void HAL_GPU2D_ER_IRQHandler(GPU2D_HandleTypeDef *hgpu2d);
|
||||
void HAL_GPU2D_CommandListCpltCallback(GPU2D_HandleTypeDef *hgpu2d, uint32_t CmdListID);
|
||||
void HAL_GPU2D_ErrorCallback(GPU2D_HandleTypeDef *hgpu2d);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup GPU2D_Exported_Functions_Group3 Peripheral State and Error functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Peripheral State functions ***************************************************/
|
||||
HAL_GPU2D_StateTypeDef HAL_GPU2D_GetState(GPU2D_HandleTypeDef const *const hgpu2d);
|
||||
uint32_t HAL_GPU2D_GetError(GPU2D_HandleTypeDef const *const hgpu2d);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup GPU2D_Private_Constants GPU2D Private Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define GPU2D_ITCTRL (0x0F8U) /*!< GPU2D Interrupt Control Register Offset */
|
||||
#define GPU2D_CLID (0x148U) /*!< GPU2D Last Command List Identifier Register Offset */
|
||||
#define GPU2D_BREAKPOINT (0x080U) /*!< GPU2D Breakpoint Register Offset */
|
||||
#define GPU2D_SYS_INTERRUPT (0xff8U) /*!< GPU2D System Interrupt Register Offset */
|
||||
|
||||
/** @defgroup GPU2D_Offset GPU2D Last Register Offset
|
||||
* @{
|
||||
*/
|
||||
#define GPU2D_OFFSET 0x1000U /*!< Last GPU2D Register Offset */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup GPU2D_Private_Macros GPU2D Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IS_GPU2D_OFFSET(OFFSET) ((OFFSET) < GPU2D_OFFSET)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* defined (GPU2D) */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32U5xx_HAL_GPU2D_H */
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,175 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32u5xx_hal_hash_ex.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of HASH HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32U5xx_HAL_HASH_EX_H
|
||||
#define STM32U5xx_HAL_HASH_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32u5xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32U5xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
#if defined (HASH)
|
||||
/** @addtogroup HASHEx
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup HASHEx_Exported_Functions HASH Extended Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup HASHEx_Exported_Functions_Group1 HASH extended processing functions in polling mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
HAL_StatusTypeDef HAL_HASHEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size,
|
||||
uint8_t *pOutBuffer, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
|
||||
HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size,
|
||||
uint8_t *pOutBuffer, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_HASHEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size,
|
||||
uint8_t *pOutBuffer, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
|
||||
HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size,
|
||||
uint8_t *pOutBuffer, uint32_t Timeout);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup HASHEx_Exported_Functions_Group2 HASH extended processing functions in interrupt mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size,
|
||||
uint8_t *pOutBuffer);
|
||||
HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
|
||||
HAL_StatusTypeDef HAL_HASHEx_SHA224_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size,
|
||||
uint8_t *pOutBuffer);
|
||||
HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size,
|
||||
uint8_t *pOutBuffer);
|
||||
HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
|
||||
HAL_StatusTypeDef HAL_HASHEx_SHA256_Accmlt_End_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size,
|
||||
uint8_t *pOutBuffer);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup HASHEx_Exported_Functions_Group3 HASH extended processing functions in DMA mode
|
||||
* @{
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
|
||||
HAL_StatusTypeDef HAL_HASHEx_SHA224_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutBuffer, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
|
||||
HAL_StatusTypeDef HAL_HASHEx_SHA256_Finish(HASH_HandleTypeDef *hhash, uint8_t *pOutBuffer, uint32_t Timeout);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup HASHEx_Exported_Functions_Group4 HMAC extended processing functions in polling mode
|
||||
* @{
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_HMACEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size,
|
||||
uint8_t *pOutBuffer, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_HMACEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size,
|
||||
uint8_t *pOutBuffer, uint32_t Timeout);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup HASHEx_Exported_Functions_Group5 HMAC extended processing functions in interrupt mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size,
|
||||
uint8_t *pOutBuffer);
|
||||
HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size,
|
||||
uint8_t *pOutBuffer);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup HASHEx_Exported_Functions_Group6 HMAC extended processing functions in DMA mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
|
||||
HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup HASHEx_Exported_Functions_Group7 Multi-buffer HMAC extended processing functions in DMA mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
HAL_StatusTypeDef HAL_HMACEx_MD5_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
|
||||
HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
|
||||
HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
|
||||
|
||||
HAL_StatusTypeDef HAL_HMACEx_SHA1_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
|
||||
HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
|
||||
HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
|
||||
HAL_StatusTypeDef HAL_HMACEx_SHA224_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
|
||||
HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
|
||||
HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
|
||||
|
||||
HAL_StatusTypeDef HAL_HMACEx_SHA256_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
|
||||
HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
|
||||
HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* HASH*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* STM32U5xx_HAL_HASH_EX_H */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,312 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32u5xx_hal_i2c_ex.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of I2C HAL Extended module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32U5xx_HAL_I2C_EX_H
|
||||
#define STM32U5xx_HAL_I2C_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32u5xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32U5xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup I2CEx
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup I2C_Exported_Types I2C Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_Autonomous_Mode_Configuration_Structure_definition Autonomous Mode Configuration Structure definition
|
||||
* @brief I2C Autonomous Mode Configuration structure definition
|
||||
* @{
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t TriggerState; /*!< Specifies the trigger state. This parameter can be a value
|
||||
of @ref I2CEx_AutonomousMode_FunctionalState */
|
||||
|
||||
uint32_t TriggerSelection; /*!< Specifies the autonomous mode trigger signal selection. This parameter
|
||||
can be a value of @ref I2CEx_AutonomousMode_TriggerSelection */
|
||||
|
||||
uint32_t TriggerPolarity; /*!< Specifies the autonomous mode trigger signal polarity sensitivity. This parameter
|
||||
can be a value of @ref I2CEx_AutonomousMode_TriggerPolarity */
|
||||
|
||||
} I2C_AutonomousModeConfTypeDef;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup I2CEx_Exported_Constants I2C Extended Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup I2CEx_Analog_Filter I2C Extended Analog Filter
|
||||
* @{
|
||||
*/
|
||||
#define I2C_ANALOGFILTER_ENABLE 0x00000000U
|
||||
#define I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2CEx_FastModePlus I2C Extended Fast Mode Plus
|
||||
* @{
|
||||
*/
|
||||
#define I2C_FASTMODEPLUS_ENABLE 0x00000000U /*!< Enable Fast Mode Plus */
|
||||
#define I2C_FASTMODEPLUS_DISABLE 0x00000001U /*!< Disable Fast Mode Plus */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2CEx_AutonomousMode_FunctionalState I2C Extended Autonomous Mode State
|
||||
* @{
|
||||
*/
|
||||
#define I2C_AUTO_MODE_DISABLE (0x00000000U) /*!< Autonomous mode disable */
|
||||
#define I2C_AUTO_MODE_ENABLE I2C_AUTOCR_TRIGEN /*!< Autonomous mode enable */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2CEx_AutonomousMode_TriggerSelection I2C Extended Autonomous Mode Trigger Selection
|
||||
* @{
|
||||
*/
|
||||
#define I2C_TRIG_GRP1 (0x10000000U) /*!< Trigger Group for I2C1, I2C2, I2C4, I2C5, I2C6 (depends on Product) */
|
||||
#define I2C_TRIG_GRP2 (0x20000000U) /*!< Trigger Group for I2C3 */
|
||||
|
||||
#define I2C_GRP1_GPDMA_CH0_TCF_TRG (uint32_t)(I2C_TRIG_GRP1 | (0x00000000U))
|
||||
/*!< HW Trigger signal is GPDMA_CH0_TRG */
|
||||
#define I2C_GRP1_GPDMA_CH1_TCF_TRG (uint32_t)(I2C_TRIG_GRP1 | (0x1U << I2C_AUTOCR_TRIGSEL_Pos))
|
||||
/*!< HW Trigger signal is GPDMA_CH1_TRG */
|
||||
#define I2C_GRP1_GPDMA_CH2_TCF_TRG (uint32_t)(I2C_TRIG_GRP1 | (0x2U << I2C_AUTOCR_TRIGSEL_Pos))
|
||||
/*!< HW Trigger signal is GPDMA_CH2_TRG */
|
||||
#define I2C_GRP1_GPDMA_CH3_TCF_TRG (uint32_t)(I2C_TRIG_GRP1 | (0x3U << I2C_AUTOCR_TRIGSEL_Pos))
|
||||
/*!< HW Trigger signal is GPDMA_CH3_TRG */
|
||||
#define I2C_GRP1_EXTI5_TRG (uint32_t)(I2C_TRIG_GRP1 | (0x4U << I2C_AUTOCR_TRIGSEL_Pos))
|
||||
/*!< HW Trigger signal is EXTI5_TRG */
|
||||
#define I2C_GRP1_EXTI9_TRG (uint32_t)(I2C_TRIG_GRP1 | (0x5U << I2C_AUTOCR_TRIGSEL_Pos))
|
||||
/*!< HW Trigger signal is EXTI9_TRG */
|
||||
#define I2C_GRP1_LPTIM1_CH1_TRG (uint32_t)(I2C_TRIG_GRP1 | (0x6U << I2C_AUTOCR_TRIGSEL_Pos))
|
||||
/*!< HW Trigger signal is LPTIM1_CH1_TRG */
|
||||
#define I2C_GRP1_LPTIM2_CH1_TRG (uint32_t)(I2C_TRIG_GRP1 | (0x7U << I2C_AUTOCR_TRIGSEL_Pos))
|
||||
/*!< HW Trigger signal is LPTIM2_CH1_TRG */
|
||||
#define I2C_GRP1_COMP1_TRG (uint32_t)(I2C_TRIG_GRP1 | (0x8U << I2C_AUTOCR_TRIGSEL_Pos))
|
||||
/*!< HW Trigger signal is COMP1_TRG */
|
||||
#define I2C_GRP1_COMP2_TRG (uint32_t)(I2C_TRIG_GRP1 | (0x9U << I2C_AUTOCR_TRIGSEL_Pos))
|
||||
/*!< HW Trigger signal is COMP2_TRG */
|
||||
#define I2C_GRP1_RTC_ALRA_TRG (uint32_t)(I2C_TRIG_GRP1 | (0xAU << I2C_AUTOCR_TRIGSEL_Pos))
|
||||
/*!< HW Trigger signal is RTC_ALRA_TRG */
|
||||
#define I2C_GRP1_RTC_WUT_TRG (uint32_t)(I2C_TRIG_GRP1 | (0xBU << I2C_AUTOCR_TRIGSEL_Pos))
|
||||
/*!< HW Trigger signal is RTC_WUT_TRG */
|
||||
|
||||
#define I2C_GRP2_LPDMA_CH0_TCF_TRG (uint32_t)(I2C_TRIG_GRP2 | (0x00000000U))
|
||||
/*!< HW Trigger signal is LPDMA_CH0_TRG */
|
||||
#define I2C_GRP2_LPDMA_CH1_TCF_TRG (uint32_t)(I2C_TRIG_GRP2 | (0x1U << I2C_AUTOCR_TRIGSEL_Pos))
|
||||
/*!< HW Trigger signal is LPDMA_CH1_TRG */
|
||||
#define I2C_GRP2_LPDMA_CH2_TCF_TRG (uint32_t)(I2C_TRIG_GRP2 | (0x2U << I2C_AUTOCR_TRIGSEL_Pos))
|
||||
/*!< HW Trigger signal is LPDMA_CH2_TRG */
|
||||
#define I2C_GRP2_LPDMA_CH3_TCF_TRG (uint32_t)(I2C_TRIG_GRP2 | (0x3U << I2C_AUTOCR_TRIGSEL_Pos))
|
||||
/*!< HW Trigger signal is LPDMA_CH3_TRG */
|
||||
#define I2C_GRP2_EXTI5_TRG (uint32_t)(I2C_TRIG_GRP2 | (0x4U << I2C_AUTOCR_TRIGSEL_Pos))
|
||||
/*!< HW Trigger signal is EXTI5_TRG */
|
||||
#define I2C_GRP2_EXTI8_TRG (uint32_t)(I2C_TRIG_GRP2 | (0x5U << I2C_AUTOCR_TRIGSEL_Pos))
|
||||
/*!< HW Trigger signal is EXTI8_TRG */
|
||||
#define I2C_GRP2_LPTIM1_CH1_TRG (uint32_t)(I2C_TRIG_GRP2 | (0x6U << I2C_AUTOCR_TRIGSEL_Pos))
|
||||
/*!< HW Trigger signal is LPTIM1_CH1_TRG */
|
||||
#define I2C_GRP2_LPTIM3_CH1_TRG (uint32_t)(I2C_TRIG_GRP2 | (0x7U << I2C_AUTOCR_TRIGSEL_Pos))
|
||||
/*!< HW Trigger signal is LPTIM3_CH1_TRG */
|
||||
#define I2C_GRP2_COMP1_TRG (uint32_t)(I2C_TRIG_GRP2 | (0x8U << I2C_AUTOCR_TRIGSEL_Pos))
|
||||
/*!< HW Trigger signal is COMP1_TRG */
|
||||
#define I2C_GRP2_COMP2_TRG (uint32_t)(I2C_TRIG_GRP2 | (0x9U << I2C_AUTOCR_TRIGSEL_Pos))
|
||||
/*!< HW Trigger signal is COMP2_TRG */
|
||||
#define I2C_GRP2_RTC_ALRA_TRG (uint32_t)(I2C_TRIG_GRP2 | (0xAU << I2C_AUTOCR_TRIGSEL_Pos))
|
||||
/*!< HW Trigger signal is RTC_ALRA_TRG */
|
||||
#define I2C_GRP2_RTC_WUT_TRG (uint32_t)(I2C_TRIG_GRP2 | (0xBU << I2C_AUTOCR_TRIGSEL_Pos))
|
||||
/*!< HW Trigger signal is RTC_WUT_TRG */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup I2CEx_AutonomousMode_TriggerPolarity Extended Autonomous Mode Trigger Polarity
|
||||
* @{
|
||||
*/
|
||||
#define I2C_TRIG_POLARITY_RISING (0x00000000U) /*!< I2C HW Trigger signal on rising edge */
|
||||
#define I2C_TRIG_POLARITY_FALLING I2C_AUTOCR_TRIGPOL /*!< I2C HW Trigger signal on falling edge */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/** @defgroup I2CEx_Exported_Macros I2C Extended Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup I2CEx_Exported_Functions I2C Extended Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup I2CEx_Exported_Functions_Group1 Filter Mode Functions
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral Control functions ************************************************/
|
||||
HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter);
|
||||
HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup I2CEx_Exported_Functions_Group2 WakeUp Mode Functions
|
||||
* @{
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c);
|
||||
HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup I2CEx_Exported_Functions_Group3 Fast Mode Plus Functions
|
||||
* @{
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_I2CEx_ConfigFastModePlus(I2C_HandleTypeDef *hi2c, uint32_t FastModePlus);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup I2CEx_Exported_Functions_Group4 Autonomous Mode Functions
|
||||
* @{
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_I2CEx_SetConfigAutonomousMode(I2C_HandleTypeDef *hi2c,
|
||||
const I2C_AutonomousModeConfTypeDef *sConfig);
|
||||
HAL_StatusTypeDef HAL_I2CEx_GetConfigAutonomousMode(const I2C_HandleTypeDef *hi2c,
|
||||
I2C_AutonomousModeConfTypeDef *sConfig);
|
||||
HAL_StatusTypeDef HAL_I2CEx_ClearConfigAutonomousMode(I2C_HandleTypeDef *hi2c);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/** @defgroup I2CEx_Private_Constants I2C Extended Private Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup I2CEx_Private_Macro I2C Extended Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_ANALOGFILTER_ENABLE) || \
|
||||
((FILTER) == I2C_ANALOGFILTER_DISABLE))
|
||||
|
||||
#define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU)
|
||||
|
||||
#define IS_I2C_FASTMODEPLUS(__CONFIG__) (((__CONFIG__) == (I2C_FASTMODEPLUS_ENABLE)) || \
|
||||
((__CONFIG__) == (I2C_FASTMODEPLUS_DISABLE)))
|
||||
|
||||
#define IS_I2C_AUTO_MODE(__MODE__) (((__MODE__) == I2C_AUTO_MODE_DISABLE) || \
|
||||
((__MODE__) == I2C_AUTO_MODE_ENABLE))
|
||||
|
||||
#define IS_I2C_TRIG_SOURCE(__INSTANCE__, __SOURCE__) (((__INSTANCE__) == I2C3) ? \
|
||||
IS_I2C_GRP2_TRIG_SOURCE(__SOURCE__) : \
|
||||
IS_I2C_GRP1_TRIG_SOURCE(__SOURCE__))
|
||||
|
||||
#define IS_I2C_GRP1_TRIG_SOURCE(__SOURCE__) (((__SOURCE__) == I2C_GRP1_GPDMA_CH0_TCF_TRG ) || \
|
||||
((__SOURCE__) == I2C_GRP1_GPDMA_CH1_TCF_TRG ) || \
|
||||
((__SOURCE__) == I2C_GRP1_GPDMA_CH2_TCF_TRG ) || \
|
||||
((__SOURCE__) == I2C_GRP1_GPDMA_CH3_TCF_TRG ) || \
|
||||
((__SOURCE__) == I2C_GRP1_EXTI5_TRG ) || \
|
||||
((__SOURCE__) == I2C_GRP1_EXTI9_TRG ) || \
|
||||
((__SOURCE__) == I2C_GRP1_LPTIM1_CH1_TRG ) || \
|
||||
((__SOURCE__) == I2C_GRP1_LPTIM2_CH1_TRG ) || \
|
||||
((__SOURCE__) == I2C_GRP1_COMP1_TRG ) || \
|
||||
((__SOURCE__) == I2C_GRP1_COMP2_TRG ) || \
|
||||
((__SOURCE__) == I2C_GRP1_RTC_ALRA_TRG ) || \
|
||||
((__SOURCE__) == I2C_GRP1_RTC_WUT_TRG ))
|
||||
|
||||
#define IS_I2C_GRP2_TRIG_SOURCE(__SOURCE__) (((__SOURCE__) == I2C_GRP2_LPDMA_CH0_TCF_TRG ) || \
|
||||
((__SOURCE__) == I2C_GRP2_LPDMA_CH1_TCF_TRG ) || \
|
||||
((__SOURCE__) == I2C_GRP2_LPDMA_CH2_TCF_TRG ) || \
|
||||
((__SOURCE__) == I2C_GRP2_LPDMA_CH3_TCF_TRG ) || \
|
||||
((__SOURCE__) == I2C_GRP2_EXTI5_TRG ) || \
|
||||
((__SOURCE__) == I2C_GRP2_EXTI8_TRG ) || \
|
||||
((__SOURCE__) == I2C_GRP2_LPTIM1_CH1_TRG ) || \
|
||||
((__SOURCE__) == I2C_GRP2_LPTIM3_CH1_TRG ) || \
|
||||
((__SOURCE__) == I2C_GRP2_COMP1_TRG ) || \
|
||||
((__SOURCE__) == I2C_GRP2_COMP2_TRG ) || \
|
||||
((__SOURCE__) == I2C_GRP2_RTC_ALRA_TRG ) || \
|
||||
((__SOURCE__) == I2C_GRP2_RTC_WUT_TRG ))
|
||||
|
||||
#define IS_I2C_TRIG_INPUT_INSTANCE(__INSTANCE__) (IS_I2C_GRP1_INSTANCE(__INSTANCE__) || \
|
||||
IS_I2C_GRP2_INSTANCE(__INSTANCE__))
|
||||
|
||||
#define IS_I2C_AUTO_MODE_TRG_POL(__POLARITY__) (((__POLARITY__) == I2C_TRIG_POLARITY_RISING) || \
|
||||
((__POLARITY__) == I2C_TRIG_POLARITY_FALLING))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private Functions ---------------------------------------------------------*/
|
||||
/** @defgroup I2CEx_Private_Functions I2C Extended Private Functions
|
||||
* @{
|
||||
*/
|
||||
/* Private functions are defined in stm32u5xx_hal_i2c_ex.c file */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32U5xx_HAL_I2C_EX_H */
|
||||
@@ -0,0 +1,294 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32u5xx_hal_icache.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of ICACHE HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion ------------------------------------*/
|
||||
#ifndef STM32U5xx_HAL_ICACHE_H
|
||||
#define STM32U5xx_HAL_ICACHE_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes -----------------------------------------------------------------*/
|
||||
#include "stm32u5xx_hal_def.h"
|
||||
|
||||
#if defined(ICACHE)
|
||||
/** @addtogroup STM32U5xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup ICACHE
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types -----------------------------------------------------------*/
|
||||
/** @defgroup ICACHE_Exported_Types ICACHE Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief HAL ICACHE region configuration structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t BaseAddress; /*!< Configures the Base address of Region i to be remapped */
|
||||
|
||||
uint32_t RemapAddress; /*!< Configures the Remap address of Region i to be remapped */
|
||||
|
||||
uint32_t Size; /*!< Configures the Region size.
|
||||
This parameter can be a value of @ref ICACHE_Region_Size */
|
||||
|
||||
uint32_t TrafficRoute; /*!< Selects the traffic route.
|
||||
This parameter can be a value of @ref ICACHE_Traffic_Route */
|
||||
|
||||
uint32_t OutputBurstType; /*!< Selects the output burst type.
|
||||
This parameter can be a value of @ref ICACHE_Output_Burst_Type */
|
||||
} ICACHE_RegionConfigTypeDef;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants -------------------------------------------------------*/
|
||||
/** @defgroup ICACHE_Exported_Constants ICACHE Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup ICACHE_WaysSelection Ways selection
|
||||
* @{
|
||||
*/
|
||||
#define ICACHE_1WAY 0U /*!< 1-way cache (direct mapped cache) */
|
||||
#define ICACHE_2WAYS ICACHE_CR_WAYSEL /*!< 2-ways set associative cache (default) */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ICACHE_Monitor_Type Monitor type
|
||||
* @{
|
||||
*/
|
||||
#define ICACHE_MONITOR_HIT_MISS (ICACHE_CR_HITMEN | ICACHE_CR_MISSMEN) /*!< Hit & Miss monitoring */
|
||||
#define ICACHE_MONITOR_HIT ICACHE_CR_HITMEN /*!< Hit monitoring */
|
||||
#define ICACHE_MONITOR_MISS ICACHE_CR_MISSMEN /*!< Miss monitoring */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ICACHE_Region Remapped Region number
|
||||
* @{
|
||||
*/
|
||||
#define ICACHE_REGION_0 0U /*!< Region 0 */
|
||||
#define ICACHE_REGION_1 1U /*!< Region 1 */
|
||||
#define ICACHE_REGION_2 2U /*!< Region 2 */
|
||||
#define ICACHE_REGION_3 3U /*!< Region 3 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ICACHE_Region_Size Remapped Region size
|
||||
* @{
|
||||
*/
|
||||
#define ICACHE_REGIONSIZE_2MB 1U /*!< Region size 2MB */
|
||||
#define ICACHE_REGIONSIZE_4MB 2U /*!< Region size 4MB */
|
||||
#define ICACHE_REGIONSIZE_8MB 3U /*!< Region size 8MB */
|
||||
#define ICACHE_REGIONSIZE_16MB 4U /*!< Region size 16MB */
|
||||
#define ICACHE_REGIONSIZE_32MB 5U /*!< Region size 32MB */
|
||||
#define ICACHE_REGIONSIZE_64MB 6U /*!< Region size 64MB */
|
||||
#define ICACHE_REGIONSIZE_128MB 7U /*!< Region size 128MB */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ICACHE_Traffic_Route Remapped Traffic route
|
||||
* @{
|
||||
*/
|
||||
#define ICACHE_MASTER1_PORT 0U /*!< Master1 port */
|
||||
#define ICACHE_MASTER2_PORT ICACHE_CRRx_MSTSEL /*!< Master2 port */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ICACHE_Output_Burst_Type Remapped Output burst type
|
||||
* @{
|
||||
*/
|
||||
#define ICACHE_OUTPUT_BURST_WRAP 0U /*!< WRAP */
|
||||
#define ICACHE_OUTPUT_BURST_INCR ICACHE_CRRx_HBURST /*!< INCR */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ICACHE_Interrupts Interrupts
|
||||
* @{
|
||||
*/
|
||||
#define ICACHE_IT_BUSYEND ICACHE_IER_BSYENDIE /*!< Busy end interrupt */
|
||||
#define ICACHE_IT_ERROR ICACHE_IER_ERRIE /*!< Cache error interrupt */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ICACHE_Flags Flags
|
||||
* @{
|
||||
*/
|
||||
#define ICACHE_FLAG_BUSY ICACHE_SR_BUSYF /*!< Busy flag */
|
||||
#define ICACHE_FLAG_BUSYEND ICACHE_SR_BSYENDF /*!< Busy end flag */
|
||||
#define ICACHE_FLAG_ERROR ICACHE_SR_ERRF /*!< Cache error flag */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macros ----------------------------------------------------------*/
|
||||
/** @defgroup ICACHE_Exported_Macros ICACHE Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup ICACHE_Flags_Interrupts_Management Flags and Interrupts Management
|
||||
* @brief macros to manage the specified ICACHE flags and interrupts.
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Enable ICACHE interrupts.
|
||||
* @param __INTERRUPT__ specifies the ICACHE interrupt sources to be enabled.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg @ref ICACHE_IT_BUSYEND Busy end interrupt
|
||||
* @arg @ref ICACHE_IT_ERROR Cache error interrupt
|
||||
*/
|
||||
#define __HAL_ICACHE_ENABLE_IT(__INTERRUPT__) SET_BIT(ICACHE->IER, (__INTERRUPT__))
|
||||
|
||||
/** @brief Disable ICACHE interrupts.
|
||||
* @param __INTERRUPT__ specifies the ICACHE interrupt sources to be disabled.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg @ref ICACHE_IT_BUSYEND Busy end interrupt
|
||||
* @arg @ref ICACHE_IT_ERROR Cache error interrupt
|
||||
*/
|
||||
#define __HAL_ICACHE_DISABLE_IT(__INTERRUPT__) CLEAR_BIT(ICACHE->IER, (__INTERRUPT__))
|
||||
|
||||
/** @brief Check whether the specified ICACHE interrupt source is enabled or not.
|
||||
* @param __INTERRUPT__ specifies the ICACHE interrupt source to check.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg @ref ICACHE_IT_BUSYEND Busy end interrupt
|
||||
* @arg @ref ICACHE_IT_ERROR Cache error interrupt
|
||||
* @retval The state of __INTERRUPT__ (0 or 1).
|
||||
*/
|
||||
#define __HAL_ICACHE_GET_IT_SOURCE(__INTERRUPT__) \
|
||||
((READ_BIT(ICACHE->IER, (__INTERRUPT__)) == (__INTERRUPT__)) ? 1U : 0U)
|
||||
|
||||
/** @brief Check whether the selected ICACHE flag is set or not.
|
||||
* @param __FLAG__ specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg @ref ICACHE_FLAG_BUSY Busy flag
|
||||
* @arg @ref ICACHE_FLAG_BUSYEND Busy end flag
|
||||
* @arg @ref ICACHE_FLAG_ERROR Cache error flag
|
||||
* @retval The state of __FLAG__ (0 or 1).
|
||||
*/
|
||||
#define __HAL_ICACHE_GET_FLAG(__FLAG__) ((READ_BIT(ICACHE->SR, (__FLAG__)) != 0U) ? 1U : 0U)
|
||||
|
||||
/** @brief Clear the selected ICACHE flags.
|
||||
* @param __FLAG__ specifies the ICACHE flags to clear.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg @ref ICACHE_FLAG_BUSYEND Busy end flag
|
||||
* @arg @ref ICACHE_FLAG_ERROR Cache error flag
|
||||
*/
|
||||
#define __HAL_ICACHE_CLEAR_FLAG(__FLAG__) WRITE_REG(ICACHE->FCR, (__FLAG__))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions -------------------------------------------------------*/
|
||||
/** @addtogroup ICACHE_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup ICACHE_Exported_Functions_Group1
|
||||
* @brief Initialization and control functions
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral Control functions **********************************************/
|
||||
HAL_StatusTypeDef HAL_ICACHE_Enable(void);
|
||||
HAL_StatusTypeDef HAL_ICACHE_Disable(void);
|
||||
uint32_t HAL_ICACHE_IsEnabled(void);
|
||||
HAL_StatusTypeDef HAL_ICACHE_ConfigAssociativityMode(uint32_t AssociativityMode);
|
||||
HAL_StatusTypeDef HAL_ICACHE_DeInit(void);
|
||||
|
||||
/******* Invalidate in blocking mode (Polling) */
|
||||
HAL_StatusTypeDef HAL_ICACHE_Invalidate(void);
|
||||
/******* Invalidate in non-blocking mode (Interrupt) */
|
||||
HAL_StatusTypeDef HAL_ICACHE_Invalidate_IT(void);
|
||||
/******* Wait for Invalidate complete in blocking mode (Polling) */
|
||||
HAL_StatusTypeDef HAL_ICACHE_WaitForInvalidateComplete(void);
|
||||
|
||||
/******* Performance instruction cache monitoring functions */
|
||||
HAL_StatusTypeDef HAL_ICACHE_Monitor_Start(uint32_t MonitorType);
|
||||
HAL_StatusTypeDef HAL_ICACHE_Monitor_Stop(uint32_t MonitorType);
|
||||
HAL_StatusTypeDef HAL_ICACHE_Monitor_Reset(uint32_t MonitorType);
|
||||
uint32_t HAL_ICACHE_Monitor_GetHitValue(void);
|
||||
uint32_t HAL_ICACHE_Monitor_GetMissValue(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup ICACHE_Exported_Functions_Group2
|
||||
* @brief IRQ and callback functions
|
||||
* @{
|
||||
*/
|
||||
/******* IRQHandler and Callbacks used in non-blocking mode (Interrupt) */
|
||||
void HAL_ICACHE_IRQHandler(void);
|
||||
void HAL_ICACHE_InvalidateCompleteCallback(void);
|
||||
void HAL_ICACHE_ErrorCallback(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup ICACHE_Exported_Functions_Group3
|
||||
* @brief Memory remapped regions functions
|
||||
* @{
|
||||
*/
|
||||
/******* Memory remapped regions functions */
|
||||
HAL_StatusTypeDef HAL_ICACHE_EnableRemapRegion(uint32_t Region, const ICACHE_RegionConfigTypeDef *const pRegionConfig);
|
||||
HAL_StatusTypeDef HAL_ICACHE_DisableRemapRegion(uint32_t Region);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* ICACHE */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32U5xx_HAL_ICACHE_H */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,485 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32u5xx_hal_irda_ex.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of IRDA HAL Extended module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32U5xx_HAL_IRDA_EX_H
|
||||
#define STM32U5xx_HAL_IRDA_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32u5xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32U5xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup IRDAEx IRDAEx
|
||||
* @brief IRDA Extended HAL module driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup IRDAEx_Extended_Exported_Constants IRDAEx Extended Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup IRDAEx_Word_Length IRDAEx Word Length
|
||||
* @{
|
||||
*/
|
||||
#define IRDA_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long frame */
|
||||
#define IRDA_WORDLENGTH_8B 0x00000000U /*!< 8-bit long frame */
|
||||
#define IRDA_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long frame */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
|
||||
/** @defgroup IRDAEx_Private_Macros IRDAEx Private Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Report the IRDA clock source.
|
||||
* @param __HANDLE__ specifies the IRDA Handle.
|
||||
* @param __CLOCKSOURCE__ output variable.
|
||||
* @retval IRDA clocking source, written in __CLOCKSOURCE__.
|
||||
*/
|
||||
#if defined(USART6)
|
||||
#define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART1CLKSOURCE_PCLK2: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK2; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART2) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART2_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART2CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART3) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART3_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART3CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == UART4) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_UART4_SOURCE()) \
|
||||
{ \
|
||||
case RCC_UART4CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_UART4CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_UART4CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_UART4CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == UART5) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_UART5_SOURCE()) \
|
||||
{ \
|
||||
case RCC_UART5CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_UART5CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_UART5CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_UART5CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART6) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART6_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART6CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART6CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART6CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART6CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
} \
|
||||
} while(0U)
|
||||
#elif defined(USART2)
|
||||
#define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART1CLKSOURCE_PCLK2: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK2; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART2) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART2_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART2CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART2CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART3) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART3_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART3CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == UART4) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_UART4_SOURCE()) \
|
||||
{ \
|
||||
case RCC_UART4CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_UART4CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_UART4CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_UART4CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == UART5) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_UART5_SOURCE()) \
|
||||
{ \
|
||||
case RCC_UART5CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_UART5CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_UART5CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_UART5CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
} \
|
||||
} while(0U)
|
||||
#else
|
||||
#define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
|
||||
do { \
|
||||
if((__HANDLE__)->Instance == USART1) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART1_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART1CLKSOURCE_PCLK2: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK2; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART1CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == USART3) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_USART3_SOURCE()) \
|
||||
{ \
|
||||
case RCC_USART3CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_USART3CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == UART4) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_UART4_SOURCE()) \
|
||||
{ \
|
||||
case RCC_UART4CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_UART4CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_UART4CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_UART4CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else if((__HANDLE__)->Instance == UART5) \
|
||||
{ \
|
||||
switch(__HAL_RCC_GET_UART5_SOURCE()) \
|
||||
{ \
|
||||
case RCC_UART5CLKSOURCE_PCLK1: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
|
||||
break; \
|
||||
case RCC_UART5CLKSOURCE_HSI: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
|
||||
break; \
|
||||
case RCC_UART5CLKSOURCE_SYSCLK: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
|
||||
break; \
|
||||
case RCC_UART5CLKSOURCE_LSE: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
|
||||
break; \
|
||||
default: \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
break; \
|
||||
} \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
|
||||
} \
|
||||
} while(0U)
|
||||
#endif /* USART6 */
|
||||
|
||||
/** @brief Compute the mask to apply to retrieve the received data
|
||||
* according to the word length and to the parity bits activation.
|
||||
* @param __HANDLE__ specifies the IRDA Handle.
|
||||
* @retval None, the mask to apply to the associated UART RDR register is stored in (__HANDLE__)->Mask field.
|
||||
*/
|
||||
#define IRDA_MASK_COMPUTATION(__HANDLE__) \
|
||||
do { \
|
||||
if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_9B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x01FFU ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FFU ; \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_8B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x00FFU ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x007FU ; \
|
||||
} \
|
||||
} \
|
||||
else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_7B) \
|
||||
{ \
|
||||
if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x007FU ; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x003FU ; \
|
||||
} \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Mask = 0x0000U; \
|
||||
} \
|
||||
} while(0U)
|
||||
|
||||
/** @brief Ensure that IRDA frame length is valid.
|
||||
* @param __LENGTH__ IRDA frame length.
|
||||
* @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
|
||||
*/
|
||||
#define IS_IRDA_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == IRDA_WORDLENGTH_7B) || \
|
||||
((__LENGTH__) == IRDA_WORDLENGTH_8B) || \
|
||||
((__LENGTH__) == IRDA_WORDLENGTH_9B))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32U5xx_HAL_IRDA_EX_H */
|
||||
|
||||
@@ -0,0 +1,292 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32u5xx_hal_iwdg.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of IWDG HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32U5xx_HAL_IWDG_H
|
||||
#define STM32U5xx_HAL_IWDG_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32u5xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32U5xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup IWDG IWDG
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup IWDG_Exported_Types IWDG Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief IWDG Init structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
|
||||
This parameter can be a value of @ref IWDG_Prescaler */
|
||||
|
||||
uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
|
||||
|
||||
uint32_t Window; /*!< Specifies the window value to be compared to the down-counter.
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
|
||||
|
||||
uint32_t EWI; /*!< Specifies if IWDG Early Wakeup Interrupt is enable or not and the comparator value.
|
||||
This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF
|
||||
value 0 means that EWI is disabled */
|
||||
} IWDG_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief IWDG Handle Structure definition
|
||||
*/
|
||||
#if (USE_HAL_IWDG_REGISTER_CALLBACKS == 1)
|
||||
typedef struct __IWDG_HandleTypeDef
|
||||
#else
|
||||
typedef struct
|
||||
#endif /* USE_HAL_IWDG_REGISTER_CALLBACKS */
|
||||
{
|
||||
IWDG_TypeDef *Instance; /*!< Register base address */
|
||||
|
||||
IWDG_InitTypeDef Init; /*!< IWDG required parameters */
|
||||
|
||||
#if (USE_HAL_IWDG_REGISTER_CALLBACKS == 1)
|
||||
void (* EwiCallback)(struct __IWDG_HandleTypeDef *hiwdg); /*!< IWDG Early WakeUp Interrupt callback */
|
||||
void (* MspInitCallback)(struct __IWDG_HandleTypeDef *hiwdg); /*!< IWDG Msp Init callback */
|
||||
#endif /* USE_HAL_IWDG_REGISTER_CALLBACKS */
|
||||
} IWDG_HandleTypeDef;
|
||||
|
||||
#if (USE_HAL_IWDG_REGISTER_CALLBACKS == 1)
|
||||
/**
|
||||
* @brief HAL IWDG common Callback ID enumeration definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_IWDG_EWI_CB_ID = 0x00U, /*!< IWDG EWI callback ID */
|
||||
HAL_IWDG_MSPINIT_CB_ID = 0x01U, /*!< IWDG MspInit callback ID */
|
||||
} HAL_IWDG_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL IWDG Callback pointer definition
|
||||
*/
|
||||
typedef void (*pIWDG_CallbackTypeDef)(IWDG_HandleTypeDef *hppp); /*!< pointer to a IWDG common callback functions */
|
||||
#endif /* USE_HAL_IWDG_REGISTER_CALLBACKS */
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup IWDG_Exported_Constants IWDG Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup IWDG_Prescaler IWDG Prescaler
|
||||
* @{
|
||||
*/
|
||||
#define IWDG_PRESCALER_4 0x00000000u /*!< IWDG prescaler set to 4 */
|
||||
#define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */
|
||||
#define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */
|
||||
#define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */
|
||||
#define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */
|
||||
#define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */
|
||||
#define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */
|
||||
#define IWDG_PRESCALER_512 (IWDG_PR_PR_2 | IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 512 */
|
||||
#define IWDG_PRESCALER_1024 IWDG_PR_PR_3 /*!< IWDG prescaler set to 1024 */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup IWDG_Window_option IWDG Window option
|
||||
* @{
|
||||
*/
|
||||
#define IWDG_WINDOW_DISABLE IWDG_WINR_WIN
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup IWDG_EWI_Mode IWDG Early Wakeup Interrupt Mode
|
||||
* @{
|
||||
*/
|
||||
#define IWDG_EWI_DISABLE 0x00000000u /*!< EWI Disable */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
/** @defgroup IWDG_Exported_Macros IWDG Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Enable the IWDG peripheral.
|
||||
* @param __HANDLE__ IWDG handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
|
||||
|
||||
/**
|
||||
* @brief Reload IWDG counter with value defined in the reload register
|
||||
* (write access to IWDG_PR, IWDG_RLR, IWDG_WINR, IWDG_EWCR registers disabled).
|
||||
* @param __HANDLE__ IWDG handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @defgroup IWDG_Exported_Functions IWDG Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions
|
||||
* @{
|
||||
*/
|
||||
/* Initialization/Start functions ********************************************/
|
||||
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
|
||||
void HAL_IWDG_MspInit(IWDG_HandleTypeDef *hiwdg);
|
||||
/* Callbacks Register/UnRegister functions ***********************************/
|
||||
#if (USE_HAL_IWDG_REGISTER_CALLBACKS == 1)
|
||||
HAL_StatusTypeDef HAL_IWDG_RegisterCallback(IWDG_HandleTypeDef *hiwdg, HAL_IWDG_CallbackIDTypeDef CallbackID,
|
||||
pIWDG_CallbackTypeDef pCallback);
|
||||
HAL_StatusTypeDef HAL_IWDG_UnRegisterCallback(IWDG_HandleTypeDef *hiwdg, HAL_IWDG_CallbackIDTypeDef CallbackID);
|
||||
#endif /* USE_HAL_IWDG_REGISTER_CALLBACKS */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup IWDG_Exported_Functions_Group2 IO operation functions
|
||||
* @{
|
||||
*/
|
||||
/* I/O operation functions ****************************************************/
|
||||
HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
|
||||
void HAL_IWDG_IRQHandler(IWDG_HandleTypeDef *hiwdg);
|
||||
void HAL_IWDG_EarlyWakeupCallback(IWDG_HandleTypeDef *hiwdg);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/** @defgroup IWDG_Private_Constants IWDG Private Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief IWDG Key Register BitMask
|
||||
*/
|
||||
#define IWDG_KEY_RELOAD 0x0000AAAAu /*!< IWDG Reload Counter Enable */
|
||||
#define IWDG_KEY_ENABLE 0x0000CCCCu /*!< IWDG Peripheral Enable */
|
||||
#define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555u /*!< IWDG KR Write Access Enable */
|
||||
#define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000u /*!< IWDG KR Write Access Disable */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup IWDG_Private_Macros IWDG Private Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Enable write access to IWDG_PR, IWDG_RLR, IWDG_WINR, IWDG_EWCR registers.
|
||||
* @param __HANDLE__ IWDG handle
|
||||
* @retval None
|
||||
*/
|
||||
#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
|
||||
|
||||
/**
|
||||
* @brief Disable write access to IWDG_PR, IWDG_RLR, IWDG_WINR, IWDG_EWCR registers.
|
||||
* @param __HANDLE__ IWDG handle
|
||||
* @retval None
|
||||
*/
|
||||
#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
|
||||
|
||||
/**
|
||||
* @brief Check IWDG prescaler value.
|
||||
* @param __PRESCALER__ IWDG prescaler value
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \
|
||||
((__PRESCALER__) == IWDG_PRESCALER_8) || \
|
||||
((__PRESCALER__) == IWDG_PRESCALER_16) || \
|
||||
((__PRESCALER__) == IWDG_PRESCALER_32) || \
|
||||
((__PRESCALER__) == IWDG_PRESCALER_64) || \
|
||||
((__PRESCALER__) == IWDG_PRESCALER_128)|| \
|
||||
((__PRESCALER__) == IWDG_PRESCALER_256)|| \
|
||||
((__PRESCALER__) == IWDG_PRESCALER_512)|| \
|
||||
((__PRESCALER__) == IWDG_PRESCALER_1024))
|
||||
|
||||
/**
|
||||
* @brief Check IWDG reload value.
|
||||
* @param __RELOAD__ IWDG reload value
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL)
|
||||
|
||||
/**
|
||||
* @brief Check IWDG window value.
|
||||
* @param __WINDOW__ IWDG window value
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= IWDG_WINR_WIN)
|
||||
|
||||
/**
|
||||
* @brief Check IWDG ewi value.
|
||||
* @param __EWI__ IWDG ewi value
|
||||
* @retval None
|
||||
*/
|
||||
#define IS_IWDG_EWI(__EWI__) ((__EWI__) <= IWDG_EWCR_EWIT)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32U5xx_HAL_IWDG_H */
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,83 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32u5xx_hal_ltdc_ex.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of LTDC HAL Extension module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32U5xx_HAL_LTDC_EX_H
|
||||
#define STM32U5xx_HAL_LTDC_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32u5xx_hal_def.h"
|
||||
|
||||
#if defined (LTDC) && defined (DSI)
|
||||
|
||||
#include "stm32u5xx_hal_dsi.h"
|
||||
|
||||
/** @addtogroup STM32U5xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup LTDCEx
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup LTDCEx_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup LTDCEx_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_LTDCEx_StructInitFromVideoConfig(LTDC_HandleTypeDef *hltdc, DSI_VidCfgTypeDef *VidCfg);
|
||||
HAL_StatusTypeDef HAL_LTDCEx_StructInitFromAdaptedCommandConfig(LTDC_HandleTypeDef *hltdc, DSI_CmdCfgTypeDef *CmdCfg);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* LTDC && DSI */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32U5xx_HAL_LTDC_EX_H */
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user