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Replacement for the sis bsp which supports the simulator and real
hardware. From Jiri Gaisler <jgais@wd.estec.esa.nl>. Supports sis 2.6 and later.
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/* bsp.h
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*
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* This include file contains all SPARC simulator definitions.
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*
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* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
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* On-Line Applications Research Corporation (OAR).
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* All rights assigned to U.S. Government, 1994.
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*
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* This material may be reproduced by or for the U.S. Government pursuant
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* to the copyright license under the clause at DFARS 252.227-7013. This
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* notice must appear in all copies of this file and its derivatives.
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*
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* Ported to ERC32 implementation of the SPARC by On-Line Applications
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* Research Corporation (OAR) under contract to the European Space
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* Agency (ESA).
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*
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* ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995.
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* European Space Agency.
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*
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* $Id$
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*/
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#ifndef __SIS_h
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#define __SIS_h
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <rtems.h>
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#include <clockdrv.h>
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#include <console.h>
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#include <iosupp.h>
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#include <erc32.h>
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/*
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* Define the time limits for RTEMS Test Suite test durations.
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* Long test and short test duration limits are provided. These
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* values are in seconds and need to be converted to ticks for the
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* application.
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*
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*/
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#define MAX_LONG_TEST_DURATION 3 /* 3 seconds */
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#define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */
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/*
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* Define the interrupt mechanism for Time Test 27
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*
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* NOTE: Since the interrupt code for the SPARC supports both synchronous
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* and asynchronous trap handlers, support for testing with both
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* is included.
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*/
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#define SIS_USE_SYNCHRONOUS_TRAP 0
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/*
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* The synchronous trap is an arbitrarily chosen software trap.
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*/
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#if (SIS_USE_SYNCHRONOUS_TRAP == 1)
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#define TEST_VECTOR SPARC_SYNCHRONOUS_TRAP( 0x90 )
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#define MUST_WAIT_FOR_INTERRUPT 1
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#define Install_tm27_vector( handler ) \
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set_vector( (handler), TEST_VECTOR, 1 );
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#define Cause_tm27_intr() \
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asm volatile( "ta 0x10; nop " );
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#define Clear_tm27_intr()
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#define Lower_tm27_intr()
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/*
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* The asynchronous trap is an arbitrarily chosen ERC32 interrupt source.
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*/
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#else /* use a regular asynchronous trap */
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#define TEST_INTERRUPT_SOURCE ERC32_INTERRUPT_EXTERNAL_1
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#define TEST_VECTOR ERC32_TRAP_TYPE( TEST_INTERRUPT_SOURCE )
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#define MUST_WAIT_FOR_INTERRUPT 1
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#define Install_tm27_vector( handler ) \
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set_vector( (handler), TEST_VECTOR, 1 );
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#define Cause_tm27_intr() \
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do { \
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ERC32_Force_interrupt( TEST_INTERRUPT_SOURCE ); \
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nop(); \
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nop(); \
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nop(); \
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} while (0)
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#define Clear_tm27_intr() \
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ERC32_Clear_interrupt( TEST_INTERRUPT_SOURCE )
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#define Lower_tm27_intr()
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#endif
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/*
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* Simple spin delay in microsecond units for device drivers.
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* This is very dependent on the clock speed of the target.
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*/
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extern void Clock_delay(rtems_unsigned32 microseconds);
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#define delay( microseconds ) Clock_delay(microseconds)
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/* Constants */
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/*
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* Information placed in the linkcmds file.
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*/
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extern int RAM_START;
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extern int RAM_END;
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extern int RAM_SIZE;
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extern int PROM_START;
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extern int PROM_END;
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extern int PROM_SIZE;
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extern int CLOCK_SPEED;
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extern int end; /* last address in the program */
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/*
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* Device Driver Table Entries
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*/
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/*
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* NOTE: Use the standard Console driver entry
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*/
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/*
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* NOTE: Use the standard Clock driver entry
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*/
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/*
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* How many libio files we want
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*/
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#define BSP_LIBIO_MAX_FDS 20
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/* miscellaneous stuff assumed to exist */
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void bsp_cleanup( void );
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void bsp_start( void );
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rtems_isr_entry set_vector( /* returns old vector */
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rtems_isr_entry handler, /* isr routine */
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rtems_vector_number vector, /* vector number */
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int type /* RTEMS or RAW intr */
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);
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void DEBUG_puts( char *string );
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void BSP_fatal_return( void );
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void bsp_spurious_initialize( void );
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extern rtems_configuration_table BSP_Configuration; /* owned by BSP */
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extern rtems_cpu_table Cpu_table; /* owned by BSP */
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extern rtems_unsigned32 bsp_isr_level;
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#ifdef __cplusplus
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}
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#endif
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#endif
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/* end of include file */
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@@ -0,0 +1,111 @@
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/* coverhd.h
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*
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* This include file has defines to represent the overhead associated
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* with calling a particular directive from C for this target.
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*
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* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
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* On-Line Applications Research Corporation (OAR).
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* All rights assigned to U.S. Government, 1994.
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*
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* This material may be reproduced by or for the U.S. Government pursuant
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* to the copyright license under the clause at DFARS 252.227-7013. This
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* notice must appear in all copies of this file and its derivatives.
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*
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* Ported to ERC32 implementation of the SPARC by On-Line Applications
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* Research Corporation (OAR) under contract to the European Space
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* Agency (ESA).
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*
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* ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995.
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* European Space Agency.
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*
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* $Id$
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*/
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#ifndef __COVERHD_h
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#define __COVERHD_h
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE 0
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#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE 0
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#define CALLING_OVERHEAD_TASK_CREATE 0
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#define CALLING_OVERHEAD_TASK_IDENT 0
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#define CALLING_OVERHEAD_TASK_START 0
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#define CALLING_OVERHEAD_TASK_RESTART 0
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#define CALLING_OVERHEAD_TASK_DELETE 0
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#define CALLING_OVERHEAD_TASK_SUSPEND 0
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#define CALLING_OVERHEAD_TASK_RESUME 0
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#define CALLING_OVERHEAD_TASK_SET_PRIORITY 0
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#define CALLING_OVERHEAD_TASK_MODE 0
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#define CALLING_OVERHEAD_TASK_GET_NOTE 0
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#define CALLING_OVERHEAD_TASK_SET_NOTE 0
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#define CALLING_OVERHEAD_TASK_WAKE_WHEN 0
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#define CALLING_OVERHEAD_TASK_WAKE_AFTER 0
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#define CALLING_OVERHEAD_INTERRUPT_CATCH 0
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#define CALLING_OVERHEAD_CLOCK_GET 0
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#define CALLING_OVERHEAD_CLOCK_SET 0
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#define CALLING_OVERHEAD_CLOCK_TICK 0
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#define CALLING_OVERHEAD_TIMER_CREATE 0
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#define CALLING_OVERHEAD_TIMER_IDENT 0
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#define CALLING_OVERHEAD_TIMER_DELETE 0
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#define CALLING_OVERHEAD_TIMER_FIRE_AFTER 0
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#define CALLING_OVERHEAD_TIMER_FIRE_WHEN 0
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#define CALLING_OVERHEAD_TIMER_RESET 0
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#define CALLING_OVERHEAD_TIMER_CANCEL 0
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#define CALLING_OVERHEAD_SEMAPHORE_CREATE 0
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#define CALLING_OVERHEAD_SEMAPHORE_IDENT 0
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#define CALLING_OVERHEAD_SEMAPHORE_DELETE 0
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#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN 0
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#define CALLING_OVERHEAD_SEMAPHORE_RELEASE 0
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#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE 0
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#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT 0
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#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE 0
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#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND 0
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#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT 0
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#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST 0
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#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE 0
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#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH 0
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#define CALLING_OVERHEAD_EVENT_SEND 0
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#define CALLING_OVERHEAD_EVENT_RECEIVE 0
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#define CALLING_OVERHEAD_SIGNAL_CATCH 0
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#define CALLING_OVERHEAD_SIGNAL_SEND 0
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#define CALLING_OVERHEAD_PARTITION_CREATE 0
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#define CALLING_OVERHEAD_PARTITION_IDENT 0
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#define CALLING_OVERHEAD_PARTITION_DELETE 0
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#define CALLING_OVERHEAD_PARTITION_GET_BUFFER 0
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#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER 0
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#define CALLING_OVERHEAD_REGION_CREATE 0
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#define CALLING_OVERHEAD_REGION_IDENT 0
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#define CALLING_OVERHEAD_REGION_DELETE 0
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#define CALLING_OVERHEAD_REGION_GET_SEGMENT 0
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#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT 0
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#define CALLING_OVERHEAD_PORT_CREATE 0
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#define CALLING_OVERHEAD_PORT_IDENT 0
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#define CALLING_OVERHEAD_PORT_DELETE 0
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#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 0
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#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 0
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#define CALLING_OVERHEAD_IO_INITIALIZE 0
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#define CALLING_OVERHEAD_IO_OPEN 0
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#define CALLING_OVERHEAD_IO_CLOSE 0
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#define CALLING_OVERHEAD_IO_READ 0
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#define CALLING_OVERHEAD_IO_WRITE 0
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#define CALLING_OVERHEAD_IO_CONTROL 0
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#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED 0
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#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE 0
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#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT 0
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#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE 0
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#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL 0
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#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD 0
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#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE 0
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#ifdef __cplusplus
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}
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#endif
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#endif
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/* end of include file */
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