mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
synced 2026-08-26 08:08:26 +08:00
Replacement for the sis bsp which supports the simulator and real
hardware. From Jiri Gaisler <jgais@wd.estec.esa.nl>. Supports sis 2.6 and later.
This commit is contained in:
Joel Sherrill
@@ -0,0 +1,262 @@
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/*
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* Clock Tick Device Driver
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*
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* This routine initializes the Real Time Clock Counter Timer which is
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* part of the MEC on the ERC32 CPU.
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*
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* The tick frequency is directly programmed to the configured number of
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* microseconds per tick.
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*
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* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
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* On-Line Applications Research Corporation (OAR).
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* All rights assigned to U.S. Government, 1994.
|
||||
*
|
||||
* This material may be reproduced by or for the U.S. Government pursuant
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* Ported to ERC32 implementation of the SPARC by On-Line Applications
|
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* Research Corporation (OAR) under contract to the European Space
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* Agency (ESA).
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*
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* ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995.
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* European Space Agency.
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*
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* $Id$
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*/
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#include <stdlib.h>
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#include <bsp.h>
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#include <rtems/libio.h>
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/*
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* The Real Time Clock Counter Timer uses this trap type.
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*/
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#define CLOCK_VECTOR ERC32_TRAP_TYPE( ERC32_INTERRUPT_REAL_TIME_CLOCK )
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/*
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* Clock ticks since initialization
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*/
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volatile rtems_unsigned32 Clock_driver_ticks;
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/*
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* This is the value programmed into the count down timer. It
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* is artificially lowered when SIMSPARC_FAST_IDLE is defined to
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* cut down how long we spend in the idle task while executing on
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* the simulator.
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*/
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extern rtems_unsigned32 CPU_SPARC_CLICKS_PER_TICK;
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rtems_isr_entry Old_ticker;
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void Clock_exit( void );
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/*
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* These are set by clock driver during its init
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*/
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rtems_device_major_number rtems_clock_major = ~0;
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rtems_device_minor_number rtems_clock_minor;
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/*
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* Clock_isr
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*
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* This is the clock tick interrupt handler.
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*
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* Input parameters:
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* vector - vector number
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*
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* Output parameters: NONE
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*
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* Return values: NONE
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*
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*/
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rtems_isr Clock_isr(
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rtems_vector_number vector
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)
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{
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/*
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* If we are in "fast idle" mode, then the value for clicks per tick
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* is lowered to decrease the amount of time spent executing the idle
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* task while using the SPARC Instruction Simulator.
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*/
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#if SIMSPARC_FAST_IDLE
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ERC32_MEC.Real_Time_Clock_Counter = CPU_SPARC_CLICKS_PER_TICK;
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ERC32_MEC_Set_Real_Time_Clock_Timer_Control(
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ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING |
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ERC32_MEC_TIMER_COUNTER_LOAD_COUNTER
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);
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#endif
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/*
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* The driver has seen another tick.
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*/
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Clock_driver_ticks += 1;
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/*
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* Real Time Clock counter/timer is set to automatically reload.
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*/
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rtems_clock_tick();
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}
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/*
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* Install_clock
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*
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* This routine actually performs the hardware initialization for the clock.
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*
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* Input parameters:
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* clock_isr - clock interrupt service routine entry point
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*
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* Output parameters: NONE
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*
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* Return values: NONE
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*
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*/
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extern int CLOCK_SPEED;
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void Install_clock(
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rtems_isr_entry clock_isr
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)
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{
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Clock_driver_ticks = 0;
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if ( BSP_Configuration.ticks_per_timeslice ) {
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Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
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/* approximately 1 us per countdown */
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ERC32_MEC.Real_Time_Clock_Scalar = CLOCK_SPEED - 1;
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ERC32_MEC.Real_Time_Clock_Counter = CPU_SPARC_CLICKS_PER_TICK;
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ERC32_MEC_Set_Real_Time_Clock_Timer_Control(
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ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING |
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ERC32_MEC_TIMER_COUNTER_LOAD_SCALER |
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ERC32_MEC_TIMER_COUNTER_LOAD_COUNTER
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);
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ERC32_MEC_Set_Real_Time_Clock_Timer_Control(
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ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING |
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ERC32_MEC_TIMER_COUNTER_RELOAD_AT_ZERO
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);
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atexit( Clock_exit );
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}
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}
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/*
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* Clock_exit
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*
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* This routine allows the clock driver to exit by masking the interrupt and
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* disabling the clock's counter.
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*
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* Input parameters: NONE
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*
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* Output parameters: NONE
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*
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* Return values: NONE
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*
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*/
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void Clock_exit( void )
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{
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if ( BSP_Configuration.ticks_per_timeslice ) {
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ERC32_Mask_interrupt( ERC32_INTERRUPT_REAL_TIME_CLOCK );
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ERC32_MEC_Set_Real_Time_Clock_Timer_Control(
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ERC32_MEC_TIMER_COUNTER_DISABLE_COUNTING
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);
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/* do not restore old vector */
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}
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}
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/*
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* Clock_initialize
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*
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* This routine initializes the clock driver.
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*
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* Input parameters:
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* major - clock device major number
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* minor - clock device minor number
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* parg - pointer to optional device driver arguments
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*
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* Output parameters: NONE
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*
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* Return values:
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* rtems_device_driver status code
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*/
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rtems_device_driver Clock_initialize(
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rtems_device_major_number major,
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rtems_device_minor_number minor,
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void *pargp
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)
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{
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Install_clock( Clock_isr );
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/*
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* make major/minor avail to others such as shared memory driver
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*/
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rtems_clock_major = major;
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rtems_clock_minor = minor;
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return RTEMS_SUCCESSFUL;
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}
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/*
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* Clock_control
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*
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* This routine is the clock device driver control entry point.
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*
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* Input parameters:
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* major - clock device major number
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* minor - clock device minor number
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* parg - pointer to optional device driver arguments
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*
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* Output parameters: NONE
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*
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* Return values:
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* rtems_device_driver status code
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*/
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rtems_device_driver Clock_control(
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rtems_device_major_number major,
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rtems_device_minor_number minor,
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void *pargp
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)
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{
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rtems_unsigned32 isrlevel;
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rtems_libio_ioctl_args_t *args = pargp;
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if (args == 0)
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goto done;
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/*
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* This is hokey, but until we get a defined interface
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* to do this, it will just be this simple...
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*/
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if (args->command == rtems_build_name('I', 'S', 'R', ' '))
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{
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Clock_isr(CLOCK_VECTOR);
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}
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else if (args->command == rtems_build_name('N', 'E', 'W', ' '))
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{
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rtems_interrupt_disable( isrlevel );
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(void) set_vector( args->buffer, CLOCK_VECTOR, 1 );
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rtems_interrupt_enable( isrlevel );
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}
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done:
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return RTEMS_SUCCESSFUL;
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}
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,181 @@
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/* bsp.h
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*
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* This include file contains all SPARC simulator definitions.
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*
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* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
|
||||
* On-Line Applications Research Corporation (OAR).
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||||
* All rights assigned to U.S. Government, 1994.
|
||||
*
|
||||
* This material may be reproduced by or for the U.S. Government pursuant
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* Ported to ERC32 implementation of the SPARC by On-Line Applications
|
||||
* Research Corporation (OAR) under contract to the European Space
|
||||
* Agency (ESA).
|
||||
*
|
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* ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995.
|
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* European Space Agency.
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*
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* $Id$
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*/
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#ifndef __SIS_h
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#define __SIS_h
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <rtems.h>
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#include <clockdrv.h>
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#include <console.h>
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#include <iosupp.h>
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#include <erc32.h>
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/*
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* Define the time limits for RTEMS Test Suite test durations.
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* Long test and short test duration limits are provided. These
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* values are in seconds and need to be converted to ticks for the
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* application.
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*
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*/
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#define MAX_LONG_TEST_DURATION 3 /* 3 seconds */
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#define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */
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/*
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* Define the interrupt mechanism for Time Test 27
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*
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* NOTE: Since the interrupt code for the SPARC supports both synchronous
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* and asynchronous trap handlers, support for testing with both
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* is included.
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*/
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#define SIS_USE_SYNCHRONOUS_TRAP 0
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/*
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* The synchronous trap is an arbitrarily chosen software trap.
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||||
*/
|
||||
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||||
#if (SIS_USE_SYNCHRONOUS_TRAP == 1)
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#define TEST_VECTOR SPARC_SYNCHRONOUS_TRAP( 0x90 )
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|
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#define MUST_WAIT_FOR_INTERRUPT 1
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#define Install_tm27_vector( handler ) \
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set_vector( (handler), TEST_VECTOR, 1 );
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||||
#define Cause_tm27_intr() \
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asm volatile( "ta 0x10; nop " );
|
||||
|
||||
#define Clear_tm27_intr()
|
||||
|
||||
#define Lower_tm27_intr()
|
||||
|
||||
/*
|
||||
* The asynchronous trap is an arbitrarily chosen ERC32 interrupt source.
|
||||
*/
|
||||
|
||||
#else /* use a regular asynchronous trap */
|
||||
|
||||
#define TEST_INTERRUPT_SOURCE ERC32_INTERRUPT_EXTERNAL_1
|
||||
#define TEST_VECTOR ERC32_TRAP_TYPE( TEST_INTERRUPT_SOURCE )
|
||||
|
||||
#define MUST_WAIT_FOR_INTERRUPT 1
|
||||
|
||||
#define Install_tm27_vector( handler ) \
|
||||
set_vector( (handler), TEST_VECTOR, 1 );
|
||||
|
||||
#define Cause_tm27_intr() \
|
||||
do { \
|
||||
ERC32_Force_interrupt( TEST_INTERRUPT_SOURCE ); \
|
||||
nop(); \
|
||||
nop(); \
|
||||
nop(); \
|
||||
} while (0)
|
||||
|
||||
#define Clear_tm27_intr() \
|
||||
ERC32_Clear_interrupt( TEST_INTERRUPT_SOURCE )
|
||||
|
||||
#define Lower_tm27_intr()
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Simple spin delay in microsecond units for device drivers.
|
||||
* This is very dependent on the clock speed of the target.
|
||||
*/
|
||||
|
||||
extern void Clock_delay(rtems_unsigned32 microseconds);
|
||||
|
||||
#define delay( microseconds ) Clock_delay(microseconds)
|
||||
|
||||
/* Constants */
|
||||
|
||||
/*
|
||||
* Information placed in the linkcmds file.
|
||||
*/
|
||||
|
||||
extern int RAM_START;
|
||||
extern int RAM_END;
|
||||
extern int RAM_SIZE;
|
||||
|
||||
extern int PROM_START;
|
||||
extern int PROM_END;
|
||||
extern int PROM_SIZE;
|
||||
|
||||
extern int CLOCK_SPEED;
|
||||
|
||||
extern int end; /* last address in the program */
|
||||
|
||||
/*
|
||||
* Device Driver Table Entries
|
||||
*/
|
||||
|
||||
/*
|
||||
* NOTE: Use the standard Console driver entry
|
||||
*/
|
||||
|
||||
/*
|
||||
* NOTE: Use the standard Clock driver entry
|
||||
*/
|
||||
|
||||
/*
|
||||
* How many libio files we want
|
||||
*/
|
||||
|
||||
#define BSP_LIBIO_MAX_FDS 20
|
||||
|
||||
|
||||
/* miscellaneous stuff assumed to exist */
|
||||
|
||||
void bsp_cleanup( void );
|
||||
|
||||
void bsp_start( void );
|
||||
|
||||
rtems_isr_entry set_vector( /* returns old vector */
|
||||
rtems_isr_entry handler, /* isr routine */
|
||||
rtems_vector_number vector, /* vector number */
|
||||
int type /* RTEMS or RAW intr */
|
||||
);
|
||||
|
||||
void DEBUG_puts( char *string );
|
||||
|
||||
void BSP_fatal_return( void );
|
||||
|
||||
void bsp_spurious_initialize( void );
|
||||
|
||||
extern rtems_configuration_table BSP_Configuration; /* owned by BSP */
|
||||
|
||||
extern rtems_cpu_table Cpu_table; /* owned by BSP */
|
||||
|
||||
extern rtems_unsigned32 bsp_isr_level;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
/* end of include file */
|
||||
@@ -0,0 +1,111 @@
|
||||
/* coverhd.h
|
||||
*
|
||||
* This include file has defines to represent the overhead associated
|
||||
* with calling a particular directive from C for this target.
|
||||
*
|
||||
* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
* All rights assigned to U.S. Government, 1994.
|
||||
*
|
||||
* This material may be reproduced by or for the U.S. Government pursuant
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* Ported to ERC32 implementation of the SPARC by On-Line Applications
|
||||
* Research Corporation (OAR) under contract to the European Space
|
||||
* Agency (ESA).
|
||||
*
|
||||
* ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995.
|
||||
* European Space Agency.
|
||||
*
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __COVERHD_h
|
||||
#define __COVERHD_h
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE 0
|
||||
#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE 0
|
||||
#define CALLING_OVERHEAD_TASK_CREATE 0
|
||||
#define CALLING_OVERHEAD_TASK_IDENT 0
|
||||
#define CALLING_OVERHEAD_TASK_START 0
|
||||
#define CALLING_OVERHEAD_TASK_RESTART 0
|
||||
#define CALLING_OVERHEAD_TASK_DELETE 0
|
||||
#define CALLING_OVERHEAD_TASK_SUSPEND 0
|
||||
#define CALLING_OVERHEAD_TASK_RESUME 0
|
||||
#define CALLING_OVERHEAD_TASK_SET_PRIORITY 0
|
||||
#define CALLING_OVERHEAD_TASK_MODE 0
|
||||
#define CALLING_OVERHEAD_TASK_GET_NOTE 0
|
||||
#define CALLING_OVERHEAD_TASK_SET_NOTE 0
|
||||
#define CALLING_OVERHEAD_TASK_WAKE_WHEN 0
|
||||
#define CALLING_OVERHEAD_TASK_WAKE_AFTER 0
|
||||
#define CALLING_OVERHEAD_INTERRUPT_CATCH 0
|
||||
#define CALLING_OVERHEAD_CLOCK_GET 0
|
||||
#define CALLING_OVERHEAD_CLOCK_SET 0
|
||||
#define CALLING_OVERHEAD_CLOCK_TICK 0
|
||||
|
||||
#define CALLING_OVERHEAD_TIMER_CREATE 0
|
||||
#define CALLING_OVERHEAD_TIMER_IDENT 0
|
||||
#define CALLING_OVERHEAD_TIMER_DELETE 0
|
||||
#define CALLING_OVERHEAD_TIMER_FIRE_AFTER 0
|
||||
#define CALLING_OVERHEAD_TIMER_FIRE_WHEN 0
|
||||
#define CALLING_OVERHEAD_TIMER_RESET 0
|
||||
#define CALLING_OVERHEAD_TIMER_CANCEL 0
|
||||
#define CALLING_OVERHEAD_SEMAPHORE_CREATE 0
|
||||
#define CALLING_OVERHEAD_SEMAPHORE_IDENT 0
|
||||
#define CALLING_OVERHEAD_SEMAPHORE_DELETE 0
|
||||
#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN 0
|
||||
#define CALLING_OVERHEAD_SEMAPHORE_RELEASE 0
|
||||
#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE 0
|
||||
#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT 0
|
||||
#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE 0
|
||||
#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND 0
|
||||
#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT 0
|
||||
#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST 0
|
||||
#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE 0
|
||||
#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH 0
|
||||
|
||||
#define CALLING_OVERHEAD_EVENT_SEND 0
|
||||
#define CALLING_OVERHEAD_EVENT_RECEIVE 0
|
||||
#define CALLING_OVERHEAD_SIGNAL_CATCH 0
|
||||
#define CALLING_OVERHEAD_SIGNAL_SEND 0
|
||||
#define CALLING_OVERHEAD_PARTITION_CREATE 0
|
||||
#define CALLING_OVERHEAD_PARTITION_IDENT 0
|
||||
#define CALLING_OVERHEAD_PARTITION_DELETE 0
|
||||
#define CALLING_OVERHEAD_PARTITION_GET_BUFFER 0
|
||||
#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER 0
|
||||
#define CALLING_OVERHEAD_REGION_CREATE 0
|
||||
#define CALLING_OVERHEAD_REGION_IDENT 0
|
||||
#define CALLING_OVERHEAD_REGION_DELETE 0
|
||||
#define CALLING_OVERHEAD_REGION_GET_SEGMENT 0
|
||||
#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT 0
|
||||
#define CALLING_OVERHEAD_PORT_CREATE 0
|
||||
#define CALLING_OVERHEAD_PORT_IDENT 0
|
||||
#define CALLING_OVERHEAD_PORT_DELETE 0
|
||||
#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 0
|
||||
#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 0
|
||||
|
||||
#define CALLING_OVERHEAD_IO_INITIALIZE 0
|
||||
#define CALLING_OVERHEAD_IO_OPEN 0
|
||||
#define CALLING_OVERHEAD_IO_CLOSE 0
|
||||
#define CALLING_OVERHEAD_IO_READ 0
|
||||
#define CALLING_OVERHEAD_IO_WRITE 0
|
||||
#define CALLING_OVERHEAD_IO_CONTROL 0
|
||||
#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED 0
|
||||
#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE 0
|
||||
#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT 0
|
||||
#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE 0
|
||||
#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL 0
|
||||
#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD 0
|
||||
#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE 0
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
/* end of include file */
|
||||
Reference in New Issue
Block a user