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powerpc: Set PPC_DEFAULT_CACHE_LINE_SIZE for e6500

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This commit is contained in:
Sebastian Huber
2015-01-09 14:05:08 +01:00
parent 84d3b9b0a2
commit 7c16e1a514
3 changed files with 23 additions and 21 deletions
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c/src/lib/libcpu/powerpc/new-exceptions/cpu_asm.S
+11 -15
View File
@@ -36,10 +36,6 @@
#include <libcpu/powerpc-utility.h>
#include <bspopts.h>
#if PPC_DEFAULT_CACHE_LINE_SIZE != 32
#error "unexpected PPC_DEFAULT_CACHE_LINE_SIZE value"
#endif
#ifdef BSP_USE_DATA_CACHE_BLOCK_TOUCH
#define DATA_CACHE_TOUCH(rega, regb) \
dcbt rega, regb
@@ -47,18 +43,18 @@
#define DATA_CACHE_TOUCH(rega, regb)
#endif
#if BSP_DATA_CACHE_ENABLED && PPC_CACHE_ALIGNMENT == 32
#if BSP_DATA_CACHE_ENABLED && PPC_DEFAULT_CACHE_LINE_SIZE == 32
#define DATA_CACHE_ZERO_AND_TOUCH(reg, offset) \
li reg, offset; dcbz reg, r3; DATA_CACHE_TOUCH(reg, r4)
#else
#define DATA_CACHE_ZERO_AND_TOUCH(reg, offset)
#endif
#define PPC_CONTEXT_CACHE_LINE_0 32
#define PPC_CONTEXT_CACHE_LINE_1 64
#define PPC_CONTEXT_CACHE_LINE_2 96
#define PPC_CONTEXT_CACHE_LINE_3 128
#define PPC_CONTEXT_CACHE_LINE_4 160
#define PPC_CONTEXT_CACHE_LINE_0 (1 * PPC_DEFAULT_CACHE_LINE_SIZE)
#define PPC_CONTEXT_CACHE_LINE_1 (2 * PPC_DEFAULT_CACHE_LINE_SIZE)
#define PPC_CONTEXT_CACHE_LINE_2 (3 * PPC_DEFAULT_CACHE_LINE_SIZE)
#define PPC_CONTEXT_CACHE_LINE_3 (4 * PPC_DEFAULT_CACHE_LINE_SIZE)
#define PPC_CONTEXT_CACHE_LINE_4 (5 * PPC_DEFAULT_CACHE_LINE_SIZE)
/*
* Offsets for various Contexts
@@ -257,8 +253,8 @@ PROC (_CPU_Context_switch):
#endif
/* Align to a cache line */
clrrwi r3, r3, 5
clrrwi r5, r4, 5
clrrwi r3, r3, PPC_DEFAULT_CACHE_LINE_POWER
clrrwi r5, r4, PPC_DEFAULT_CACHE_LINE_POWER
DATA_CACHE_ZERO_AND_TOUCH(r10, PPC_CONTEXT_CACHE_LINE_0)
DATA_CACHE_ZERO_AND_TOUCH(r11, PPC_CONTEXT_CACHE_LINE_1)
@@ -278,7 +274,7 @@ PROC (_CPU_Context_switch):
*/
#if PPC_CONTEXT_OFFSET_GPR1 != PPC_CONTEXT_CACHE_LINE_0 \
|| !BSP_DATA_CACHE_ENABLED \
|| PPC_CACHE_ALIGNMENT != 32
|| PPC_DEFAULT_CACHE_LINE_SIZE != 32
li r10, PPC_CONTEXT_OFFSET_GPR1
#endif
#ifndef RTEMS_SMP
@@ -407,7 +403,7 @@ restore_context:
PUBLIC_PROC (_CPU_Context_restore)
PROC (_CPU_Context_restore):
/* Align to a cache line */
clrrwi r5, r3, 5
clrrwi r5, r3, PPC_DEFAULT_CACHE_LINE_POWER
#ifdef __ALTIVEC__
li r3, 0
@@ -439,7 +435,7 @@ check_thread_dispatch_necessary:
/* Calculate the heir context pointer */
sub r7, r4, r7
add r4, r8, r7
clrrwi r5, r4, 5
clrrwi r5, r4, PPC_DEFAULT_CACHE_LINE_POWER
/* Update the executing */
stw r8, PER_CPU_OFFSET_EXECUTING(r6)
cpukit/score/cpu/powerpc/rtems/score/cpu.h
+5 -5
View File
@@ -358,13 +358,13 @@ static inline ppc_context *ppc_get_context( const Context_Control *context )
#endif
#endif /* ASM */
#define PPC_CONTEXT_OFFSET_GPR1 32
#define PPC_CONTEXT_OFFSET_MSR 36
#define PPC_CONTEXT_OFFSET_LR 40
#define PPC_CONTEXT_OFFSET_CR 44
#define PPC_CONTEXT_OFFSET_GPR1 (PPC_DEFAULT_CACHE_LINE_SIZE + 0)
#define PPC_CONTEXT_OFFSET_MSR (PPC_DEFAULT_CACHE_LINE_SIZE + 4)
#define PPC_CONTEXT_OFFSET_LR (PPC_DEFAULT_CACHE_LINE_SIZE + 8)
#define PPC_CONTEXT_OFFSET_CR (PPC_DEFAULT_CACHE_LINE_SIZE + 12)
#define PPC_CONTEXT_GPR_OFFSET( gpr ) \
(((gpr) - 14) * PPC_GPR_SIZE + 48)
(((gpr) - 14) * PPC_GPR_SIZE + PPC_DEFAULT_CACHE_LINE_SIZE + 16)
#define PPC_CONTEXT_OFFSET_GPR14 PPC_CONTEXT_GPR_OFFSET( 14 )
#define PPC_CONTEXT_OFFSET_GPR15 PPC_CONTEXT_GPR_OFFSET( 15 )
cpukit/score/cpu/powerpc/rtems/score/powerpc.h
+7 -1
View File
@@ -74,7 +74,13 @@ extern "C" {
#define PPC_ALIGNMENT 8
#define PPC_DEFAULT_CACHE_LINE_SIZE 32
#ifdef __PPC_CPU_E6500__
#define PPC_DEFAULT_CACHE_LINE_POWER 6
#else
#define PPC_DEFAULT_CACHE_LINE_POWER 5
#endif
#define PPC_DEFAULT_CACHE_LINE_SIZE (1 << PPC_DEFAULT_CACHE_LINE_POWER)
#define PPC_STRUCTURE_ALIGNMENT PPC_DEFAULT_CACHE_LINE_SIZE