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lm32: Remove obsolete architecture

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Updates rtems/rtos/rtems#5025
This commit is contained in:
Joel Sherrill
2025-01-29 18:23:45 +00:00
committed by Kinsey Moore
parent 82624328da
commit 740f736f9e
88 changed files with 0 additions and 10344 deletions
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bsps/lm32/include/bsp/irq.h
-56
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@@ -1,56 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSImplClassicIntr
*
* @brief BSP interrupt support for LM32.
*/
/*
* Based on concepts of Pavel Pisa, Till Straumann and Eric Valette.
*
* Copyright (C) 2008, 2009 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_LM32_IRQ_CONFIG_H
#define LIBBSP_LM32_IRQ_CONFIG_H
#include <stdint.h>
/**
* @addtogroup RTEMSImplClassicIntr
*
* @{
*/
/**
* @brief Maximum vector number.
*/
#define BSP_INTERRUPT_VECTOR_COUNT 32
/** @} */
#endif /* LIBBSP_LM32_IRQ_CONFIG_H */
bsps/lm32/include/bsp/milkymist_ac97.h
-76
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@@ -1,76 +0,0 @@
/**
* @file
* @ingroup lm32_milkymist_ac97 RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist AC97 driver
*/
/* milkymist_ac97.h
*
* Milkymist AC97 driver for RTEMS
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
* COPYRIGHT (c) 2010 Sebastien Bourdeauducq
*/
/**
* @defgroup lm32_milkymist_ac97 Milkymist AC97
* @ingroup RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist AC97 driver
* @{
*/
#ifndef __MILKYMIST_AC97_H_
#define __MILKYMIST_AC97_H_
#ifdef __cplusplus
extern "C" {
#endif
/* Ioctls. 0x41 is 'A' */
#define SOUND_MIXER_MIC 0x0
#define SOUND_MIXER_LINE 0x1
#define SOUND_MIXER_READ(x) (0x4100+x)
#define SOUND_MIXER_WRITE(x) (0x4110+x)
#define SOUND_SND_SUBMIT_PLAY 0x4120
#define SOUND_SND_COLLECT_PLAY 0x4121
#define SOUND_SND_SUBMIT_RECORD 0x4122
#define SOUND_SND_COLLECT_RECORD 0x4123
struct snd_buffer {
unsigned int nsamples;
void *user;
unsigned int samples[];
};
rtems_device_driver ac97_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver ac97_open(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver ac97_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
#define AC97_DRIVER_TABLE_ENTRY {ac97_initialize, \
ac97_open, NULL, NULL, NULL, ac97_control}
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* __MILKYMIST_AC97_H_ */
bsps/lm32/include/bsp/milkymist_buttons.h
-59
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@@ -1,59 +0,0 @@
/**
* @file
* @ingroup lm32_milkymist_buttons RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist buttons driver
*/
/* milkymist_buttons.h
*
* Milkymist buttons driver for RTEMS
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
* COPYRIGHT (c) 2011 Sebastien Bourdeauducq
*/
/**
* @defgroup lm32_milkymist_buttons Milkymist buttons
* @ingroup RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist buttons driver
* @{
*/
#ifndef __MILKYMIST_BUTTONS_H_
#define __MILKYMIST_BUTTONS_H_
#ifdef __cplusplus
extern "C" {
#endif
rtems_device_driver buttons_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver buttons_open(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver buttons_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
#define BUTTONS_DRIVER_TABLE_ENTRY { buttons_initialize, \
buttons_open, NULL, buttons_read, NULL, NULL}
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* __MILKYMIST_BUTTONS_H_ */
bsps/lm32/include/bsp/milkymist_dmx.h
-68
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@@ -1,68 +0,0 @@
/**
* @file
* @ingroup lm32_milkymist_dmx RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist DMX512 driver
*/
/* milkymist_dmx.h
*
* Milkymist DMX512 driver for RTEMS
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
* COPYRIGHT (c) 2010 Sebastien Bourdeauducq
*/
/**
* @defgroup lm32_milkymist_dmx Milkymist DMX512
* @ingroup RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist DMX512 driver
* @{
*/
#ifndef __MILKYMIST_DMX_H_
#define __MILKYMIST_DMX_H_
#ifdef __cplusplus
extern "C" {
#endif
#define DMX_SET_THRU 0x4400
#define DMX_GET_THRU 0x4401
rtems_device_driver dmx_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver dmx_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver dmx_write(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver dmx_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
#define DMX_DRIVER_TABLE_ENTRY {dmx_initialize, \
NULL, NULL, dmx_read, dmx_write, dmx_control}
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* __MILKYMIST_DMX_H_ */
bsps/lm32/include/bsp/milkymist_flash.h
-64
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@@ -1,64 +0,0 @@
/**
* @file
* @ingroup lm32_milkymist_flash RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist Flash
*/
/* milkymist_flash.h
*
* Copyright (C) 2010 Sebastien Bourdeauducq
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
*/
/**
* @defgroup lm32_milkymist_flash Milkymist Flash
* @ingroup RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist Flash
* @{
*/
#ifndef __MILKYMIST_FLASH_H_
#define __MILKYMIST_FLASH_H_
/* Ioctls */
#define FLASH_GET_SIZE 0x4600
#define FLASH_GET_BLOCKSIZE 0x4601
#define FLASH_ERASE_BLOCK 0x4602
struct flash_partition {
unsigned int start_address;
unsigned int length;
};
rtems_device_driver flash_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver flash_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver flash_write(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver flash_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
#define FLASH_DRIVER_TABLE_ENTRY {flash_initialize, \
NULL, NULL, flash_read, flash_write, flash_control}
#endif /* __MILKYMIST_FLASH_H_ */
bsps/lm32/include/bsp/milkymist_gpio.h
-59
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@@ -1,59 +0,0 @@
/**
* @file
* @ingroup lm32_milkymist_gpio RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist GPIO driver
*/
/* milkymist_gpio.h
*
* Milkymist GPIO driver for RTEMS
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
* COPYRIGHT (c) 2010 Sebastien Bourdeauducq
*/
/**
* @defgroup lm32_milkymist_gpio Milkymist GPIO
* @ingroup RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist GPIO driver
* @{
*/
#ifndef __MILKYMIST_GPIO_H_
#define __MILKYMIST_GPIO_H_
#ifdef __cplusplus
extern "C" {
#endif
rtems_device_driver gpio_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver gpio_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver gpio_write(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
#define GPIO_DRIVER_TABLE_ENTRY { gpio_initialize, \
NULL, NULL, gpio_read, gpio_write, NULL}
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* __MILKYMIST_GPIO_H_ */
bsps/lm32/include/bsp/milkymist_ir.h
-59
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@@ -1,59 +0,0 @@
/**
* @file
* @ingroup lm32_milkymist_ir RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist RC5 IR driver
*/
/* milkymist_ir.h
*
* Milkymist RC5 IR driver for RTEMS
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
* COPYRIGHT (c) 2010 Sebastien Bourdeauducq
*/
/**
* @defgroup lm32_milkymist_ir Milkymist IR
* @ingroup RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist RC5 IR driver
* @{
*/
#ifndef __MILKYMIST_IR_H_
#define __MILKYMIST_IR_H_
#ifdef __cplusplus
extern "C" {
#endif
rtems_device_driver ir_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver ir_open(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver ir_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
#define IR_DRIVER_TABLE_ENTRY {ir_initialize, \
ir_open, NULL, ir_read, NULL, NULL}
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* __MILKYMIST_IR_H_ */
bsps/lm32/include/bsp/milkymist_memcard.h
-32
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@@ -1,32 +0,0 @@
/**
* @file
* @ingroup lm32_milkymist_memcard RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist memory card driver
*/
/* milkymist_memcard.h
*
* Milkymist memory card driver for RTEMS
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
* COPYRIGHT (c) 2010 Sebastien Bourdeauducq
*/
/**
* @defgroup lm32_milkymist_memcard Milkymist memory card
* @ingroup RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist memory card driver
* @{
*/
#ifndef __MILKYMIST_MEMCARD_H_
#define __MILKYMIST_MEMCARD_H_
rtems_status_code memcard_register(void);
#endif /* __MILKYMIST_MEMCARD_H_ */
/** @} */
bsps/lm32/include/bsp/milkymist_midi.h
-59
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@@ -1,59 +0,0 @@
/**
* @file
* @ingroup lm32_milkymist_midi RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist MIDI driver
*/
/* milkymist_midi.h
*
* Milkymist MIDI driver for RTEMS
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
* COPYRIGHT (c) 2010 Sebastien Bourdeauducq
*/
/**
* @defgroup lm32_milkymist_midi Milkymist MIDI
* @ingroup RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist MIDI driver
* @{
*/
#ifndef __MILKYMIST_MIDI_H_
#define __MILKYMIST_MIDI_H_
#ifdef __cplusplus
extern "C" {
#endif
rtems_device_driver midi_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver midi_open(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver midi_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
#define MIDI_DRIVER_TABLE_ENTRY {midi_initialize, \
midi_open, NULL, midi_read, NULL, NULL}
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* __MILKYMIST_MIDI_H_ */
bsps/lm32/include/bsp/milkymist_pfpu.h
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@@ -1,72 +0,0 @@
/**
* @file
* @ingroup lm32_milkymist_pfpu RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist PFPU driver
*/
/* milkymist_pfpu.h
*
* Milkymist PFPU driver for RTEMS
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
* COPYRIGHT (c) 2010 Sebastien Bourdeauducq
*/
/**
* @defgroup lm32_milkymist_pfpu Milkymist PFPU
* @ingroup RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist PFPU driver
* @{
*/
#ifndef __MILKYMIST_PFPU_H_
#define __MILKYMIST_PFPU_H_
#ifdef __cplusplus
extern "C" {
#endif
/* Ioctls */
#define PFPU_EXECUTE 0x4600
#define PFPU_PROGSIZE (2048)
#define PFPU_REG_COUNT (128)
struct pfpu_td {
unsigned int *output;
unsigned int hmeshlast;
unsigned int vmeshlast;
unsigned int *program;
unsigned int progsize;
float *registers;
/** @brief shall we update the "registers" array after completion */
bool update;
/** @brief shall we invalidate L1 data cache after completion */
bool invalidate;
};
rtems_device_driver pfpu_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver pfpu_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
#define PFPU_DRIVER_TABLE_ENTRY {pfpu_initialize, \
NULL, NULL, NULL, NULL, pfpu_control}
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* __MILKYMIST_PFPU_H_ */
bsps/lm32/include/bsp/milkymist_tmu.h
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@@ -1,98 +0,0 @@
/**
* @file
* @ingroup lm32_milkymist_tmu RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist TMU driver
*/
/* milkymist_tmu.h
*
* Milkymist TMU driver for RTEMS
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
* COPYRIGHT (c) 2010 Sebastien Bourdeauducq
*/
/**
* @defgroup lm32_milkymist_tmu Milkymist TMU
* @ingroup RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist TMU driver
* @{
*/
#ifndef __MILKYMIST_TMU_H_
#define __MILKYMIST_TMU_H_
#ifdef __cplusplus
extern "C" {
#endif
/* Ioctls */
#define TMU_EXECUTE 0x5400
#define TMU_EXECUTE_NONBLOCK 0x5401
#define TMU_EXECUTE_WAIT 0x5402
struct tmu_vertex {
int x;
int y;
} __attribute__((packed));
struct tmu_td {
unsigned int flags;
unsigned int hmeshlast;
unsigned int vmeshlast;
unsigned int brightness;
unsigned short chromakey;
struct tmu_vertex *vertices;
unsigned short *texfbuf;
unsigned int texhres;
unsigned int texvres;
unsigned int texhmask;
unsigned int texvmask;
unsigned short *dstfbuf;
unsigned int dsthres;
unsigned int dstvres;
int dsthoffset;
int dstvoffset;
unsigned int dstsquarew;
unsigned int dstsquareh;
unsigned int alpha;
bool invalidate_before;
bool invalidate_after;
};
#define TMU_BRIGHTNESS_MAX (63)
#define TMU_MASK_NOFILTER (0x3ffc0)
#define TMU_MASK_FULL (0x3ffff)
#define TMU_FIXEDPOINT_SHIFT (6)
#define TMU_ALPHA_MAX (63)
#define TMU_MESH_MAXSIZE (128)
#define TMU_FLAG_CHROMAKEY (2)
#define TMU_FLAG_ADDITIVE (4)
rtems_device_driver tmu_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver tmu_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
#define TMU_DRIVER_TABLE_ENTRY {tmu_initialize, \
NULL, NULL, NULL, NULL, tmu_control}
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* __MILKYMIST_TMU_H_ */
bsps/lm32/include/bsp/milkymist_usbinput.h
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@@ -1,71 +0,0 @@
/**
* @file
* @ingroup lm32_milkymist_usbinput RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist USB input devices driver
*/
/* milkymist_usbinput.h
*
* Milkymist USB input devices driver for RTEMS
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
* COPYRIGHT (c) 2010, 2012 Sebastien Bourdeauducq
*/
/**
* @defgroup lm32_milkymist_usbinput Milkymist USB input devices
* @ingroup RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist USB input devices driver
* @{
*/
#ifndef __MILKYMIST_USBINPUT_H_
#define __MILKYMIST_USBINPUT_H_
#ifdef __cplusplus
extern "C" {
#endif
/* Ioctls */
#define USBINPUT_LOAD_FIRMWARE 0x5500
struct usbinput_firmware_description {
const unsigned char *data;
int length;
};
rtems_device_driver usbinput_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver usbinput_open(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver usbinput_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver usbinput_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
#define USBINPUT_DRIVER_TABLE_ENTRY {usbinput_initialize, \
usbinput_open, NULL, usbinput_read, NULL, usbinput_control}
#ifdef __cplusplus
}
#endif
#endif /* __MILKYMIST_USBINPUT_H_ */
bsps/lm32/include/bsp/milkymist_versions.h
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@@ -1,53 +0,0 @@
/**
* @file
* @ingroup lm32_milkymist_versions RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist versioning driver
*/
/* milkymist_versions.h
*
* Milkymist versioning driver for RTEMS
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
* COPYRIGHT (c) 2010 Sebastien Bourdeauducq
*/
/**
* @defgroup lm32_milkymist_versions Milkymist versioning
* @ingroup RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist versioning driver
* @{
*/
#ifndef __MILKYMIST_VERSIONS_H_
#define __MILKYMIST_VERSIONS_H_
#ifdef __cplusplus
extern "C" {
#endif
rtems_device_driver versions_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver versions_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
#define VERSIONS_DRIVER_TABLE_ENTRY {versions_initialize, \
NULL, NULL, versions_read, NULL, NULL}
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* __MILKYMIST_VERSIONS_H_ */
bsps/lm32/include/bsp/milkymist_video.h
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@@ -1,90 +0,0 @@
/**
* @file
* @ingroup lm32_milkymist_video RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist video input driver
*/
/* milkymist_video.h
*
* Milkymist video input driver for RTEMS
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
* COPYRIGHT (c) 2010, 2011 Sebastien Bourdeauducq
*/
/**
* @defgroup lm32_milkymist_video Milkymist Video
* @ingroup RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist video input driver
* @{
*/
#ifndef __MILKYMIST_VIDEO_H_
#define __MILKYMIST_VIDEO_H_
#ifdef __cplusplus
extern "C" {
#endif
/* Ioctls */
#define VIDEO_BUFFER_LOCK 0x5600
#define VIDEO_BUFFER_UNLOCK 0x5601
#define VIDEO_SET_BRIGHTNESS 0x5602
#define VIDEO_GET_BRIGHTNESS 0x5603
#define VIDEO_SET_CONTRAST 0x5604
#define VIDEO_GET_CONTRAST 0x5605
#define VIDEO_SET_HUE 0x5606
#define VIDEO_GET_HUE 0x5607
#define VIDEO_GET_SIGNAL 0x5608
#define VIDEO_SET_REGISTER 0x5609
#define VIDEO_GET_REGISTER 0x560a
#define VIDEO_SET_FORMAT 0x560b
enum {
VIDEO_FORMAT_CVBS6 = 0,
VIDEO_FORMAT_CVBS5,
VIDEO_FORMAT_CVBS4,
VIDEO_FORMAT_SVIDEO,
VIDEO_FORMAT_COMPONENT,
};
rtems_device_driver video_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver video_open(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver video_close(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
rtems_device_driver video_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
);
#define VIDEO_DRIVER_TABLE_ENTRY {video_initialize, \
video_open, video_close, NULL, NULL, video_control}
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* __MILKYMIST_VIDEO_H_ */
bsps/lm32/lm32_evr/README.md
-59
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@@ -1,59 +0,0 @@
Lattice Mico32
==============
The Lattice Mico32 port uses the system_config.h generated by the Mico
System Builder to retrieve the properties of the peripherals.
Implemented (in shared/ subdirectory)
Polled console driver (uart)
Clock interrupt with 10 ms tick
Networking using Lattice tri-speed ethernet MAC
TODO
----
Support more peripherals:
* uart driver using interrupts
jukka.pietarinen@mrf.fi, 3.12.2008
```
BSP NAME: lm32_evr
BOARD: cRIO-EVR, Micro-Research Finland Oy
BUS: wishbone
CPU FAMILY: lm32 (Lattice Mico32)
CPU: small
COPROCESSORS: none
MODE: 32 bit mode
DEBUG MONITOR: none
```
PERIPHERALS
-----------
```
TIMERS: clock
RESOLUTION: 10 ms
SERIAL PORTS: uart
REAL-TIME CLOCK: none
DMA: none
VIDEO: none
SCSI: none
NETWORKING: tsmac
```
To on the simulator included in lm32-gdb use these commands:
```shell
tar sim --hw-device lm32cpu \
--hw-device "lm32uart/reg 0x80006000 0x100" \
--hw-device "/lm32uart > int int0 /lm32cpu" \
--hw-device "lm32timer/reg 0x80002000 0x80" \
--hw-device "/lm32timer > int int1 /lm32cpu" \
--memory-region 0x08000000,0x4000000
load
```
The simulator is VERY VERY slow when RTEMS is idle.
To speed this up, add SIMULATOR_FAST_IDLE=1 to the
configure command.
bsps/lm32/lm32_evr/config/lm32_evr.cfg
-29
View File
@@ -1,29 +0,0 @@
#
# Config file for the lm32_evr BSP
#
# Choices for CPU_MODEL:
# tiny (no cache)
# standard (instruction cache)
# fast (instruction and data cache)
RTEMS_CPU = lm32
include $(RTEMS_ROOT)/make/custom/default.cfg
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
CPU_CFLAGS =
# optimize flag: typically -O2
# ATM, doesn't work with optimization levels > 0
CFLAGS_OPTIMIZE_V = -O0 -g
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections
define bsp-post-link
$(OBJCOPY) -O binary --strip-all $(basename $@)$(EXEEXT) \
-R entry -R exceptions $(basename $@)$(DOWNEXT)
$(default-bsp-post-link)
endef
bsps/lm32/lm32_evr/config/lm32_evr_gdbsim-testsuite.tcfg
-6
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@@ -1,6 +0,0 @@
#
# The GDB LM32 simulator in GDB
#
include: testdata/disable-intrcritical-tests.tcfg
bsps/lm32/lm32_evr/config/lm32_evr_gdbsim.cfg
-5
View File
@@ -1,5 +0,0 @@
#
# BSP Variant for running on simulator in GDB
#
include $(RTEMS_ROOT)/make/custom/lm32_evr.cfg
bsps/lm32/lm32_evr/include/bsp.h
-107
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@@ -1,107 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsLM32EVR
*
* @brief Global BSP definitions.
*/
/*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008,
* Micro-Research Finland Oy
*/
#ifndef LIBBSP_LM32_LM32_EVR_BSP_H
#define LIBBSP_LM32_LM32_EVR_BSP_H
/**
* @defgroup RTEMSBSPsLM32EVR LM32 EVR
*
* @ingroup RTEMSBSPsLM32
*
* @brief LM32 EVR Board Support Package.
*
* @{
*/
#include <stdint.h>
#include <bspopts.h>
#include <bsp/default-initial-extension.h>
#include <rtems.h>
#ifdef __cplusplus
extern "C" {
#endif
/*
* lm32 requires certain aligment of mbuf because unaligned uint32_t
* accesses are not handled properly.
*/
#define CPU_U32_FIX
#if defined(RTEMS_NETWORKING)
struct rtems_bsdnet_ifconfig;
extern int rtems_tsmac_driver_attach(struct rtems_bsdnet_ifconfig *config,
int attaching);
#define RTEMS_BSP_NETWORK_DRIVER_NAME "TSMAC0"
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_tsmac_driver_attach
/*
* Due to a hardware design error (RJ45 connector with 10baseT magnetics)
* we are forced to use 10baseT mode.
*/
#define TSMAC_FORCE_10BASET
#endif
/* functions */
rtems_isr_entry set_vector( /* returns old vector */
rtems_isr_entry handler, /* isr routine */
rtems_vector_number vector, /* vector number */
int type /* RTEMS or RAW intr */
);
/*
* Prototypes for BSP methods that cross file boundaries
*/
void BSP_uart_polled_write(char ch);
int BSP_uart_polled_read( void );
char BSP_uart_is_character_ready(char *ch);
#ifdef __cplusplus
}
#endif
/** @} */
#endif
/* end of include file */
bsps/lm32/lm32_evr/include/system_conf.h
-180
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@@ -1,180 +0,0 @@
/**
* @file
*
* @ingroup lm32_evr
*
* @brief System configuration.
*/
#ifndef __SYSTEM_CONFIG_H_
#define __SYSTEM_CONFIG_H_
#define FPGA_DEVICE_FAMILY "ECP2M"
#define PLATFORM_NAME "platform1"
#define USE_PLL (0)
#define CPU_FREQUENCY (75000000)
/* FOUND 1 CPU UNIT(S) */
/*
* CPU Instance LM32 component configuration
*/
#define CPU_NAME "LM32"
#define CPU_EBA (0x04000000)
#define CPU_DIVIDE_ENABLED (1)
#define CPU_SIGN_EXTEND_ENABLED (1)
#define CPU_MULTIPLIER_ENABLED (1)
#define CPU_SHIFT_ENABLED (1)
#define CPU_DEBUG_ENABLED (1)
#define CPU_HW_BREAKPOINTS_ENABLED (0)
#define CPU_NUM_HW_BREAKPOINTS (0)
#define CPU_NUM_WATCHPOINTS (0)
#define CPU_ICACHE_ENABLED (1)
#define CPU_ICACHE_SETS (512)
#define CPU_ICACHE_ASSOC (1)
#define CPU_ICACHE_BYTES_PER_LINE (16)
#define CPU_DCACHE_ENABLED (1)
#define CPU_DCACHE_SETS (512)
#define CPU_DCACHE_ASSOC (1)
#define CPU_DCACHE_BYTES_PER_LINE (16)
#define CPU_DEBA (0x0C000000)
#define CPU_CHARIO_IN (1)
#define CPU_CHARIO_OUT (1)
#define CPU_CHARIO_TYPE "JTAG UART"
/*
* gpio component configuration
*/
#define GPIO_NAME "gpio"
#define GPIO_BASE_ADDRESS (0x80004000)
#define GPIO_SIZE (128)
#define GPIO_CHARIO_IN (0)
#define GPIO_CHARIO_OUT (0)
#define GPIO_ADDRESS_LOCK (1)
#define GPIO_DISABLE (0)
#define GPIO_OUTPUT_PORTS_ONLY (1)
#define GPIO_INPUT_PORTS_ONLY (0)
#define GPIO_TRISTATE_PORTS (0)
#define GPIO_BOTH_INPUT_AND_OUTPUT (0)
#define GPIO_DATA_WIDTH (4)
#define GPIO_INPUT_WIDTH (1)
#define GPIO_OUTPUT_WIDTH (1)
#define GPIO_IRQ_MODE (0)
#define GPIO_LEVEL (0)
#define GPIO_EDGE (0)
#define GPIO_EITHER_EDGE_IRQ (0)
#define GPIO_POSE_EDGE_IRQ (0)
#define GPIO_NEGE_EDGE_IRQ (0)
/*
* uart component configuration
*/
#define UART_NAME "uart"
#define UART_BASE_ADDRESS (0x80006000)
#define UART_SIZE (128)
#define UART_IRQ (0)
#define UART_CHARIO_IN (1)
#define UART_CHARIO_OUT (1)
#define UART_CHARIO_TYPE "RS-232"
#define UART_ADDRESS_LOCK (1)
#define UART_DISABLE (0)
#define UART_MODEM (0)
#define UART_ADDRWIDTH (5)
#define UART_DATAWIDTH (8)
#define UART_BAUD_RATE (115200)
#define UART_IB_SIZE (4)
#define UART_OB_SIZE (4)
#define UART_BLOCK_WRITE (1)
#define UART_BLOCK_READ (1)
#define UART_DATA_BITS (8)
#define UART_STOP_BITS (1)
#define UART_FIFO (0)
#define UART_INTERRUPT_DRIVEN (1)
/*
* ebr component configuration
*/
#define EBR_NAME "ebr"
#define EBR_BASE_ADDRESS (0x04000000)
#define EBR_SIZE (32768)
#define EBR_IS_READABLE (1)
#define EBR_IS_WRITABLE (1)
#define EBR_ADDRESS_LOCK (1)
#define EBR_DISABLE (0)
#define EBR_EBR_DATA_WIDTH (32)
#define EBR_INIT_FILE_NAME "none"
#define EBR_INIT_FILE_FORMAT "hex"
/*
* ts_mac_core component configuration
*/
#define TS_MAC_CORE_NAME "ts_mac_core"
#define TS_MAC_CORE_BASE_ADDRESS (0x80008000)
#define TS_MAC_CORE_SIZE (8192)
#define TS_MAC_CORE_IRQ (2)
#define TS_MAC_CORE_CHARIO_IN (0)
#define TS_MAC_CORE_CHARIO_OUT (0)
#define TS_MAC_CORE_ADDRESS_LOCK (1)
#define TS_MAC_CORE_DISABLE (0)
#define TS_MAC_CORE_STAT_REGS (1)
#define TS_MAC_CORE_TXRX_FIFO_DEPTH (512)
#define TS_MAC_CORE_MIIM_MODULE (1)
#define TS_MAC_CORE_NGO "l:/mrf/lattice/crio-lm32/platform1/components/ts_mac_top_v27/ipexpress/ts_mac_core/ts_mac_core.ngo"
#define TS_MAC_CORE_ISPLEVER_PRJ "l:/mrf/lattice/crio-lm32/criomico.syn"
/*
* timer0 component configuration
*/
#define TIMER0_NAME "timer0"
#define TIMER0_BASE_ADDRESS (0x80002000)
#define TIMER0_SIZE (128)
#define TIMER0_IRQ (1)
#define TIMER0_CHARIO_IN (0)
#define TIMER0_CHARIO_OUT (0)
#define TIMER0_ADDRESS_LOCK (1)
#define TIMER0_DISABLE (0)
#define TIMER0_PERIOD_NUM (20)
#define TIMER0_PERIOD_WIDTH (32)
#define TIMER0_WRITEABLE_PERIOD (1)
#define TIMER0_READABLE_SNAPSHOT (1)
#define TIMER0_START_STOP_CONTROL (1)
#define TIMER0_WATCHDOG (0)
/*
* timer1 component configuration
*/
#define TIMER1_NAME "timer1"
#define TIMER1_BASE_ADDRESS (0x8000A000)
#define TIMER1_SIZE (128)
#define TIMER1_IRQ (3)
#define TIMER1_CHARIO_IN (0)
#define TIMER1_CHARIO_OUT (0)
#define TIMER1_ADDRESS_LOCK (1)
#define TIMER1_DISABLE (0)
#define TIMER1_PERIOD_NUM (20)
#define TIMER1_PERIOD_WIDTH (32)
#define TIMER1_WRITEABLE_PERIOD (1)
#define TIMER1_READABLE_SNAPSHOT (1)
#define TIMER1_START_STOP_CONTROL (1)
#define TIMER1_WATCHDOG (0)
/*
* ddr2_sdram component configuration
*/
#define DDR2_SDRAM_NAME "ddr2_sdram"
#define DDR2_SDRAM_BASE_ADDRESS (0x08000000)
#define DDR2_SDRAM_SIZE (33554432)
#define DDR2_SDRAM_IS_READABLE (1)
#define DDR2_SDRAM_IS_WRITABLE (1)
#define DDR2_SDRAM_BST_CNT_READ (1)
#define DDR2_SDRAM_ADDRESS_LOCK (1)
#define DDR2_SDRAM_DISABLE (0)
#define DDR2_SDRAM_NGO "L:/mrf/lattice/cRIO-LM32/platform1/components/wb_ddr2_ctl_v65/ipexpress/ddr2_sdram/ddr2_sdram.ngo"
#define DDR2_SDRAM_ISPLEVER_PRJ "l:/mrf/lattice/crio-lm32/criomico.syn"
#define DDR2_SDRAM_PARAM_FILE "ddr_p_eval/$/src/params/ddr_sdram_mem_params.v"
#define DDR2_SDRAM_MEM_TOP "ddr_p_eval/$/src/rtl/top/@/ddr_sdram_mem_top.v"
#endif /* __SYSTEM_CONFIG_H_ */
bsps/lm32/lm32_evr/include/tm27.h
-40
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@@ -1,40 +0,0 @@
/**
* @file
*
* @ingroup lm32_evr
*
* @brief TM27 timing test routines.
*/
/*
* tm27.h
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef _RTEMS_TMTEST27
#error "This is an RTEMS internal file you must not include directly."
#endif
#ifndef __tm27_h
#define __tm27_h
/*
* Stuff for Time Test 27
*/
#define MUST_WAIT_FOR_INTERRUPT 0
#define TM27_USE_VECTOR_HANDLER
#define Install_tm27_vector( handler ) set_vector( (handler), 0, 1 )
#define Cause_tm27_intr() /* empty */
#define Clear_tm27_intr() /* empty */
#define Lower_tm27_intr() /* empty */
#endif
bsps/lm32/lm32_evr/start/linkcmds
-313
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@@ -1,313 +0,0 @@
OUTPUT_FORMAT("elf32-lm32", "elf32-lm32",
"elf32-lm32")
OUTPUT_ARCH(lm32)
ENTRY(start)
STARTUP(start.o)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
/*
* Declare some sizes. Heap is sized at whatever ram space is left.
*/
RamBase = DEFINED(RamBase) ? RamBase : 0x08000000;
RamSize = DEFINED(RamSize) ? RamSize : 32M;
RamEnd = RamBase + RamSize;
HeapSize = DEFINED(HeapSize) ? HeapSize : 2M;
MEMORY {
ebr : ORIGIN = 0x04000000 , LENGTH = 32k
sdram : ORIGIN = 0x08000000 , LENGTH = 32M
}
SECTIONS
{
.boot :
{
KEEP (*(.boot))
} > ebr
/* Read-only sections, merged into text segment: */
.interp : { *(.interp) } > sdram
.hash : { *(.hash) } > sdram
.dynsym : { *(.dynsym) } > sdram
.dynstr : { *(.dynstr) } > sdram
.gnu.version : { *(.gnu.version) } > sdram
.gnu.version_d : { *(.gnu.version_d) } > sdram
.gnu.version_r : { *(.gnu.version_r) } > sdram
.rela.text :
{ *(.rela.text) *(.rela.gnu.linkonce.t*) } > sdram
.rela.data :
{ *(.rela.data) *(.rela.gnu.linkonce.d*) } > sdram
.rela.rodata :
{ *(.rela.rodata*) *(.rela.gnu.linkonce.r*) } > sdram
.rela.got : { *(.rela.got) } > sdram
.rela.got1 : { *(.rela.got1) } > sdram
.rela.got2 : { *(.rela.got2) } > sdram
.rela.ctors : { *(.rela.ctors) } > sdram
.rela.dtors : { *(.rela.dtors) } > sdram
.rela.init : { *(.rela.init) } > sdram
.rela.fini : { *(.rela.fini) } > sdram
.rela.bss : { *(.rela.bss) } > sdram
.rela.plt : { *(.rela.plt) } > sdram
.rela.sdata : { *(.rela.sdata) } > sdram
.rela.sbss : { *(.rela.sbss) } > sdram
.rela.sdata2 : { *(.rela.sdata2) } > sdram
.rela.sbss2 : { *(.rela.sbss2) } > sdram
.rela.dyn : { *(.rela.dyn) } > sdram
.init : { KEEP(*(.init)) } > sdram
.text :
{
*(.text*)
/*
* Special FreeBSD sysctl sections.
*/
. = ALIGN (16);
__start_set_sysctl_set = .;
*(set_sysctl_*);
__stop_set_sysctl_set = ABSOLUTE(.);
*(set_domain_*);
*(set_pseudo_*);
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.gnu.linkonce.t*)
} > sdram
.fini : { _fini = .; KEEP(*(.fini)) } > sdram
.rodata : { *(.rodata*) KEEP (*(SORT(.rtemsroset.*))) *(.gnu.linkonce.r*) } > sdram
.rodata1 : { *(.rodata1) } > sdram
.tdata : {
_TLS_Data_begin = .;
*(.tdata .tdata.* .gnu.linkonce.td.*)
_TLS_Data_end = .;
} > sdram
.tbss : {
_TLS_BSS_begin = .;
*(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
_TLS_BSS_end = .;
} > sdram
_TLS_Data_size = _TLS_Data_end - _TLS_Data_begin;
_TLS_Data_begin = _TLS_Data_size != 0 ? _TLS_Data_begin : _TLS_BSS_begin;
_TLS_Data_end = _TLS_Data_size != 0 ? _TLS_Data_end : _TLS_BSS_begin;
_TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin;
_TLS_Size = _TLS_BSS_end - _TLS_Data_begin;
_TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss));
/* Adjust the address for the data segment. We want to adjust up to
the same address within the page on the next page up. */
. = ALIGN(0x10000) + (. & (0x10000 - 1));
/* Ensure the __preinit_array_start label is properly aligned. We
could instead move the label definition inside the section, but
the linker would then create the section even if it turns out to
be empty, which isn't pretty. */
. = ALIGN(32 / 8);
PROVIDE (__preinit_array_start = .);
.preinit_array : { *(.preinit_array) } >sdram
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
.init_array : { *(.init_array) } >sdram
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
.fini_array : { *(.fini_array) } >sdram
PROVIDE (__fini_array_end = .);
/* _SDA2_BASE_ = __SDATA2_START__ + 0x8000; */
.sdata2 : { *(.sdata2 .sdata2.* .gnu.linkonce.s2.*) } >sdram
.sbss2 : { *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*)
/* avoid empty sdata2/sbss2 area -- __eabi would not set up r2
* which may be important if run-time loading is used
*/
. += 1;
} >sdram
.eh_frame : { *.(eh_frame) } >sdram
/* NOTE: if the BSP uses page tables, the correctness of
* '_etext' (and __DATA_START__) is CRUCIAL - otherwise,
* an invalid mapping may result!!!
*/
_etext = .;
PROVIDE (etext = .);
/* Adjust the address for the data segment. We want to adjust up to
the same address within the page on the next page up. It would
be more correct to do this:
. = ALIGN(0x40000) + (ALIGN(8) & (0x40000 - 1));
The current expression does not correctly handle the case of a
text segment ending precisely at the end of a page; it causes the
data segment to skip a page. The above expression does not have
this problem, but it will currently (2/95) cause BFD to allocate
a single segment, combining both text and data, for this case.
This will prevent the text segment from being shared among
multiple executions of the program; I think that is more
important than losing a page of the virtual address space (note
that no actual memory is lost; the page which is skipped can not
be referenced). */
. = ALIGN(0x1000);
.data ALIGN(0x1000) :
{
/* NOTE: if the BSP uses page tables, the correctness of
* '__DATA_START__' (and _etext) is CRUCIAL - otherwise,
* an invalid mapping may result!!!
*/
PROVIDE(__DATA_START__ = ABSOLUTE(.) );
*(.data .data.* .gnu.linkonce.d*)
KEEP (*(SORT(.rtemsrwset.*)))
SORT(CONSTRUCTORS)
} > sdram
.data1 : { *(.data1) } > sdram
PROVIDE (__EXCEPT_START__ = .);
.gcc_except_table : {
*(.gcc_except_table)
*(.gcc_except_table.*)
} > sdram
PROVIDE (__EXCEPT_END__ = .);
.got1 : { *(.got1) } > sdram
/* Put .ctors and .dtors next to the .got2 section, so that the pointers
get relocated with -mrelocatable. Also put in the .fixup pointers.
The current compiler no longer needs this, but keep it around for 2.7.2 */
PROVIDE (_GOT2_START_ = .);
.got2 : { *(.got2) } > sdram
.dynamic : { *(.dynamic) } > sdram
.ctors :
{
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin.o(.ctors))
/* We don't want to include the .ctor section from
from the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
} > sdram
.dtors :
{
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} > sdram
PROVIDE (_FIXUP_START_ = .);
.fixup : { *(.fixup) } > sdram
PROVIDE (_FIXUP_END_ = .);
PROVIDE (_GOT2_END_ = .);
PROVIDE (_GOT_START_ = .);
.got : { *(.got) } > sdram
.got.plt : { *(.got.plt) } > sdram
PROVIDE (_GOT_END_ = .);
.jcr : { KEEP (*(.jcr)) } > sdram
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
/* _SDA_BASE_ = __SDATA_START__ + 0x8000; */
.sdata : { *(.sdata*) *(.gnu.linkonce.s.*) } >sdram
_edata = .;
_gp = .;
PROVIDE (edata = .);
.sbss :
{
_clear_start = .;
PROVIDE (__sbss_start = .);
*(.dynsbss)
*(.sbss* .gnu.linkonce.sb.*)
*(.scommon)
/* avoid empty sdata/sbss area -- __eabi would not set up r13
* which may be important if run-time loading is used
*/
. += 1;
. = ALIGN(16);
PROVIDE (__sbss_end = .);
} > sdram
.plt : { *(.plt) } > sdram
.bss :
{
PROVIDE (__bss_start = .);
*(.dynbss)
*(.bss .bss* .gnu.linkonce.b*)
*(COMMON)
. = ALIGN(16);
_end = . ;
__rtems_end = . ;
PROVIDE (end = .);
. = ALIGN (16);
_clear_end = .;
} > sdram
.noinit (NOLOAD) : {
*(SORT_BY_NAME (SORT_BY_ALIGNMENT (.noinit*)))
} > sdram
.rtemsstack (NOLOAD) : {
*(SORT(.rtemsstack.*))
WorkAreaBase = .;
} > sdram
/DISCARD/ :
{
*(.comment)
}
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* These must appear regardless of . */
/* Addition to let linker know about custom section for GDB pretty-printing support. */
.debug_gdb_scripts 0 : { *(.debug_gdb_scripts) }
}
bsps/lm32/milkymist/README.md
-56
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@@ -1,56 +0,0 @@
milkymist
=========
Full RTEMS port to the Milkymist One. Supports Milkymist SoC 1.0.x.
Includes drivers for:
- Multi-standard video input (PAL/SECAM/NTSC)
- Two DMX512 (RS485) ports
- MIDI IN and MIDI OUT ports
- VGA output
- AC'97 audio
- NOR flash
- 10/100 Ethernet
- Memory card (experimental and incomplete)
- USB host connectors (input devices only, using the softusb-input firmware)
- RC5 infrared receiver
- RS232 debug port
For more information: http://www.milkymist.org/
UART
----
Initialization:
set the CSR_UART_DIVISOR to the correct VALUE,
depending on the internal frequency of the LatticeMico32 softcore.
for the ML401 board, this value is calculated using this formula : clk_frequency/230400/16
clk_frequency = 100000000 Hz
=> we must set CSR_UART_DIVISOR to 27
How to send a byte to uart :
```c
void writechar(char c)
{
CSR_UART_RXTX = c;
while(!(irq_pending() & IRQ_UARTTX));
irq_ack(IRQ_UARTTX);
}
```
How to receive a byte from uart :
```c
char readchar()
{
char c;
while(!(irq_pending() & IRQ_UARTRX));
irq_ack(IRQ_UARTRX);
c = CSR_UART_RXTX;
return c;
}
```
bsps/lm32/milkymist/config/milkymist.cfg
-29
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@@ -1,29 +0,0 @@
#
# Config file for the milkymist BSP
#
# Choices for CPU_MODEL:
# tiny (no cache)
# standard (instruction cache)
# fast (instruction and data cache)
RTEMS_CPU = lm32
include $(RTEMS_ROOT)/make/custom/default.cfg
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
CPU_CFLAGS = -mbarrel-shift-enabled -mmultiply-enabled \
-mdivide-enabled -msign-extend-enabled
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g
CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
LDFLAGS = -Wl,--gc-sections
define bsp-post-link
$(OBJCOPY) -O binary --strip-all $(basename $@)$(EXEEXT) \
-R entry -R exceptions $(basename $@)$(DOWNEXT)
$(default-bsp-post-link)
endef
bsps/lm32/milkymist/include/bsp.h
-66
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@@ -1,66 +0,0 @@
/**
* @file
*
* @ingroup RTEMSBSPsLM32Milkymist
*
* @brief Global BSP definitions.
*/
/* bsp.h
*
* This include file contains all board IO definitions.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
* COPYRIGHT (c) 2011 Sebastien Bourdeauducq
*/
#ifndef LIBBSP_LM32_MILKYMIST_BSP_H
#define LIBBSP_LM32_MILKYMIST_BSP_H
#include <stdint.h>
#include <bspopts.h>
#include <bsp/default-initial-extension.h>
#include <rtems.h>
/**
* @defgroup RTEMSBSPsLM32Milkymist Milkymist
*
* @ingroup RTEMSBSPsLM32
*
* @brief Milkymist Board Support Package.
*
* @{
*/
#ifdef __cplusplus
extern "C" {
#endif
#define BSP_HAS_FRAME_BUFFER 1
/*
* lm32 requires certain aligment of mbuf because unaligned uint32_t
* accesses are not handled properly.
*/
#define CPU_U32_FIX
#if defined(RTEMS_NETWORKING)
struct rtems_bsdnet_ifconfig;
extern int rtems_minimac_driver_attach (struct rtems_bsdnet_ifconfig *config,
int attaching);
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_minimac_driver_attach
#define RTEMS_BSP_NETWORK_DRIVER_NAME "minimac0"
#endif
#ifdef __cplusplus
}
#endif
/** @} */
#endif
bsps/lm32/milkymist/include/system_conf.h
-329
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@@ -1,329 +0,0 @@
/**
* @file
*
* @ingroup lm32_milkymist
*
* @brief System configuration.
*/
/* system_conf.h
* Global System conf
*
* Milkymist port of RTEMS
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
* COPYRIGHT (c) 2010, 2011 Sebastien Bourdeauducq
*/
#ifndef __SYSTEM_CONFIG_H_
#define __SYSTEM_CONFIG_H_
#define UART_BAUD_RATE (115200)
/* Clock frequency */
#define MM_FREQUENCY (0xe0001074)
/* FML bridge */
#define FMLBRG_FLUSH_BASE (0xc8000000)
#define FMLBRG_LINE_LENGTH (32)
#define FMLBRG_LINE_COUNT (512)
/* UART */
#define MM_UART_RXTX (0xe0000000)
#define MM_UART_DIV (0xe0000004)
#define MM_UART_STAT (0xe0000008)
#define MM_UART_CTRL (0xe000000c)
#define UART_STAT_THRE (0x1)
#define UART_STAT_RX_EVT (0x2)
#define UART_STAT_TX_EVT (0x4)
#define UART_CTRL_RX_INT (0x1)
#define UART_CTRL_TX_INT (0x2)
#define UART_CTRL_THRU (0x4)
/* Timers */
#define MM_TIMER1_COMPARE (0xe0001024)
#define MM_TIMER1_COUNTER (0xe0001028)
#define MM_TIMER1_CONTROL (0xe0001020)
#define MM_TIMER0_COMPARE (0xe0001014)
#define MM_TIMER0_COUNTER (0xe0001018)
#define MM_TIMER0_CONTROL (0xe0001010)
#define TIMER_ENABLE (0x01)
#define TIMER_AUTORESTART (0x02)
/* GPIO */
#define MM_GPIO_IN (0xe0001000)
#define MM_GPIO_OUT (0xe0001004)
#define MM_GPIO_INTEN (0xe0001008)
#define GPIO_BTN1 (0x00000001)
#define GPIO_BTN2 (0x00000002)
#define GPIO_BTN3 (0x00000004)
#define GPIO_PCBREV0 (0x00000008)
#define GPIO_PCBREV1 (0x00000010)
#define GPIO_PCBREV2 (0x00000020)
#define GPIO_PCBREV3 (0x00000040)
#define GPIO_LED1 (0x00000001)
#define GPIO_LED2 (0x00000002)
/* System ID and reset */
#define MM_SYSTEM_ID (0xe000107c)
/* ICAP */
#define MM_ICAP (0xe0001040)
#define ICAP_READY (0x01)
#define ICAP_CE (0x10000)
#define ICAP_WRITE (0x20000)
/* VGA */
#define MM_VGA_RESET (0xe0003000)
#define MM_VGA_HRES (0xe0003004)
#define MM_VGA_HSYNC_START (0xe0003008)
#define MM_VGA_HSYNC_END (0xe000300C)
#define MM_VGA_HSCAN (0xe0003010)
#define MM_VGA_VRES (0xe0003014)
#define MM_VGA_VSYNC_START (0xe0003018)
#define MM_VGA_VSYNC_END (0xe000301C)
#define MM_VGA_VSCAN (0xe0003020)
#define MM_VGA_BASEADDRESS (0xe0003024)
#define MM_VGA_BASEADDRESS_ACT (0xe0003028)
#define MM_VGA_BURST_COUNT (0xe000302C)
#define MM_VGA_DDC (0xe0003030)
#define MM_VGA_CLKSEL (0xe0003034)
#define VGA_RESET (0x01)
#define VGA_DDC_SDAIN (0x1)
#define VGA_DDC_SDAOUT (0x2)
#define VGA_DDC_SDAOE (0x4)
#define VGA_DDC_SDC (0x8)
/* Ethernet */
#define MM_MINIMAC_SETUP (0xe0008000)
#define MM_MINIMAC_MDIO (0xe0008004)
#define MM_MINIMAC_STATE0 (0xe0008008)
#define MM_MINIMAC_COUNT0 (0xe000800C)
#define MM_MINIMAC_STATE1 (0xe0008010)
#define MM_MINIMAC_COUNT1 (0xe0008014)
#define MM_MINIMAC_TXCOUNT (0xe0008018)
#define MINIMAC_RX0_BASE (0xb0000000)
#define MINIMAC_RX1_BASE (0xb0000800)
#define MINIMAC_TX_BASE (0xb0001000)
#define MINIMAC_SETUP_PHYRST (0x1)
#define MINIMAC_STATE_EMPTY (0x0)
#define MINIMAC_STATE_LOADED (0x1)
#define MINIMAC_STATE_PENDING (0x2)
/* AC97 */
#define MM_AC97_CRCTL (0xe0005000)
#define AC97_CRCTL_RQEN (0x01)
#define AC97_CRCTL_WRITE (0x02)
#define MM_AC97_CRADDR (0xe0005004)
#define MM_AC97_CRDATAOUT (0xe0005008)
#define MM_AC97_CRDATAIN (0xe000500C)
#define MM_AC97_DCTL (0xe0005010)
#define MM_AC97_DADDRESS (0xe0005014)
#define MM_AC97_DREMAINING (0xe0005018)
#define MM_AC97_UCTL (0xe0005020)
#define MM_AC97_UADDRESS (0xe0005024)
#define MM_AC97_UREMAINING (0xe0005028)
#define AC97_SCTL_EN (0x01)
#define AC97_MAX_DMASIZE (0x3fffc)
/* SoftUSB */
#define MM_SOFTUSB_CONTROL (0xe000f000)
#define SOFTUSB_CONTROL_RESET (0x1)
#define MM_SOFTUSB_PMEM_BASE (0xa0000000)
#define MM_SOFTUSB_DMEM_BASE (0xa0020000)
#define SOFTUSB_PMEM_SIZE (1 << 13)
#define SOFTUSB_DMEM_SIZE (1 << 13)
/* PFPU */
#define MM_PFPU_CTL (0xe0006000)
#define PFPU_CTL_START (0x01)
#define PFPU_CTL_BUSY (0x01)
#define MM_PFPU_MESHBASE (0xe0006004)
#define MM_PFPU_HMESHLAST (0xe0006008)
#define MM_PFPU_VMESHLAST (0xe000600C)
#define MM_PFPU_CODEPAGE (0xe0006010)
#define MM_PFPU_DREGBASE (0xe0006400)
#define MM_PFPU_CODEBASE (0xe0006800)
#define PFPU_PAGESIZE (512)
#define PFPU_SPREG_COUNT (2)
#define PFPU_REG_X (0)
#define PFPU_REG_Y (1)
/* TMU */
#define MM_TMU_CTL (0xe0007000)
#define TMU_CTL_START (0x01)
#define TMU_CTL_BUSY (0x01)
#define TMU_CTL_CHROMAKEY (0x02)
#define MM_TMU_HMESHLAST (0xe0007004)
#define MM_TMU_VMESHLAST (0xe0007008)
#define MM_TMU_BRIGHTNESS (0xe000700C)
#define MM_TMU_CHROMAKEY (0xe0007010)
#define MM_TMU_VERTICESADR (0xe0007014)
#define MM_TMU_TEXFBUF (0xe0007018)
#define MM_TMU_TEXHRES (0xe000701C)
#define MM_TMU_TEXVRES (0xe0007020)
#define MM_TMU_TEXHMASK (0xe0007024)
#define MM_TMU_TEXVMASK (0xe0007028)
#define MM_TMU_DSTFBUF (0xe000702C)
#define MM_TMU_DSTHRES (0xe0007030)
#define MM_TMU_DSTVRES (0xe0007034)
#define MM_TMU_DSTHOFFSET (0xe0007038)
#define MM_TMU_DSTVOFFSET (0xe000703C)
#define MM_TMU_DSTSQUAREW (0xe0007040)
#define MM_TMU_DSTSQUAREH (0xe0007044)
#define MM_TMU_ALPHA (0xe0007048)
/* Memory card */
#define MM_MEMCARD_CLK2XDIV (0xe0004000)
#define MM_MEMCARD_ENABLE (0xe0004004)
#define MEMCARD_ENABLE_CMD_TX (0x1)
#define MEMCARD_ENABLE_CMD_RX (0x2)
#define MEMCARD_ENABLE_DAT_TX (0x4)
#define MEMCARD_ENABLE_DAT_RX (0x8)
#define MM_MEMCARD_PENDING (0xe0004008)
#define MEMCARD_PENDING_CMD_TX (0x1)
#define MEMCARD_PENDING_CMD_RX (0x2)
#define MEMCARD_PENDING_DAT_TX (0x4)
#define MEMCARD_PENDING_DAT_RX (0x8)
#define MM_MEMCARD_START (0xe000400c)
#define MEMCARD_START_CMD_RX (0x1)
#define MEMCARD_START_DAT_RX (0x2)
#define MM_MEMCARD_CMD (0xe0004010)
#define MM_MEMCARD_DAT (0xe0004014)
/* DMX */
#define MM_DMX_TX(x) (0xe000c000+4*(x))
#define MM_DMX_THRU (0xe000c800)
#define MM_DMX_RX(x) (0xe000d000+4*(x))
/* MIDI */
#define MM_MIDI_RXTX (0xe000b000)
#define MM_MIDI_DIV (0xe000b004)
#define MM_MIDI_STAT (0xe000b008)
#define MM_MIDI_CTRL (0xe000b00c)
#define MIDI_STAT_THRE (0x1)
#define MIDI_STAT_RX_EVT (0x2)
#define MIDI_STAT_TX_EVT (0x4)
#define MIDI_CTRL_RX_INT (0x1)
#define MIDI_CTRL_TX_INT (0x2)
#define MIDI_CTRL_THRU (0x4)
/* IR */
#define MM_IR_RX (0xe000e000)
/* Video input */
#define MM_BT656_I2C (0xe000a000)
#define MM_BT656_FILTERSTATUS (0xe000a004)
#define MM_BT656_BASE (0xe000a008)
#define MM_BT656_MAXBURSTS (0xe000a00c)
#define MM_BT656_DONEBURSTS (0xe000a010)
#define BT656_I2C_SDAIN (0x1)
#define BT656_I2C_SDAOUT (0x2)
#define BT656_I2C_SDAOE (0x4)
#define BT656_I2C_SDC (0x8)
#define BT656_FILTER_FIELD1 (0x1)
#define BT656_FILTER_FIELD2 (0x2)
#define BT656_FILTER_INFRAME (0x4)
/* Interrupts */
#define MM_IRQ_UART (0)
#define MM_IRQ_GPIO (1)
#define MM_IRQ_TIMER0 (2)
#define MM_IRQ_TIMER1 (3)
#define MM_IRQ_AC97CRREQUEST (4)
#define MM_IRQ_AC97CRREPLY (5)
#define MM_IRQ_AC97DMAR (6)
#define MM_IRQ_AC97DMAW (7)
#define MM_IRQ_PFPU (8)
#define MM_IRQ_TMU (9)
#define MM_IRQ_ETHRX (10)
#define MM_IRQ_ETHTX (11)
#define MM_IRQ_VIDEOIN (12)
#define MM_IRQ_MIDI (13)
#define MM_IRQ_IR (14)
#define MM_IRQ_USB (15)
/* Flash layout */
#define FLASH_BASE (0x80000000)
#define FLASH_OFFSET_STANDBY_BITSTREAM (0x80000000)
#define FLASH_OFFSET_RESCUE_BITSTREAM (0x800A0000)
#define FLASH_OFFSET_RESCUE_BIOS (0x80220000)
#define FLASH_OFFSET_MAC_ADDRESS (0x802200E0)
#define FLASH_OFFSET_RESCUE_SPLASH (0x80240000)
#define FLASH_OFFSET_RESCUE_APP (0x802E0000)
#define FLASH_OFFSET_REGULAR_BITSTREAM (0x806E0000)
#define FLASH_OFFSET_REGULAR_BIOS (0x80860000)
#define FLASH_OFFSET_REGULAR_SPLASH (0x80880000)
#define FLASH_OFFSET_REGULAR_APP (0x80920000)
/* MMIO */
#define MM_READ(reg) (*((volatile unsigned int *)(reg)))
#define MM_WRITE(reg, val) *((volatile unsigned int *)(reg)) = val
/* Flash partitions */
#define FLASH_SECTOR_SIZE (128*1024)
#define FLASH_PARTITION_COUNT (5)
#define FLASH_PARTITIONS { \
{ .start_address = 0x806E0000, .length = 0x0180000 }, \
{ .start_address = 0x80860000, .length = 0x0020000 }, \
{ .start_address = 0x80880000, .length = 0x00A0000 }, \
{ .start_address = 0x80920000, .length = 0x0400000 }, \
{ .start_address = 0x80D20000, .length = 0x12E0000 }, \
}
#endif /* __SYSTEM_CONFIG_H_ */
bsps/lm32/milkymist/include/tm27.h
-1
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@@ -1 +0,0 @@
#include <rtems/tm27-default.h>
bsps/lm32/milkymist/start/bspclean.c
-59
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@@ -1,59 +0,0 @@
/*
* Milkymist shutdown routine
*/
/*
* COPYRIGHT (c) 2010 Sebastien Bourdeauducq
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#include <bsp.h>
#include <bsp/bootcard.h>
#include "../include/system_conf.h"
static void reboot(void)
{
/* Writing to CSR_SYSTEM_ID causes a system reset */
MM_WRITE(MM_SYSTEM_ID, 1);
}
static void icap_write(int val, unsigned int w)
{
while (!(MM_READ(MM_ICAP) & ICAP_READY));
if (!val)
w |= ICAP_CE|ICAP_WRITE;
MM_WRITE(MM_ICAP, w);
}
static void reconf(void)
{
icap_write(0, 0xffff); /* dummy word */
icap_write(0, 0xffff); /* dummy word */
icap_write(0, 0xffff); /* dummy word */
icap_write(0, 0xffff); /* dummy word */
icap_write(1, 0xaa99); /* sync word part 1 */
icap_write(1, 0x5566); /* sync word part 2 */
icap_write(1, 0x30a1); /* write to command register */
icap_write(1, 0x0000); /* null command */
icap_write(1, 0x30a1); /* write to command register */
icap_write(1, 0x000e); /* reboot command */
icap_write(1, 0x2000); /* NOP */
icap_write(1, 0x2000); /* NOP */
icap_write(1, 0x2000); /* NOP */
icap_write(1, 0x2000); /* NOP */
icap_write(0, 0x1111); /* NULL */
icap_write(0, 0xffff); /* dummy word */
}
void bsp_reset( rtems_fatal_source source, rtems_fatal_code code )
{
if (source == RTEMS_FATAL_SOURCE_EXIT && code)
reconf();
else
reboot();
RTEMS_UNREACHABLE();
}
bsps/lm32/milkymist/start/linkcmds
-311
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@@ -1,311 +0,0 @@
OUTPUT_FORMAT("elf32-lm32", "elf32-lm32",
"elf32-lm32")
OUTPUT_ARCH(lm32)
ENTRY(start)
STARTUP(start.o)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
/*
* Declare some sizes. Heap is sized at whatever ram space is left.
*/
RamBase = DEFINED(RamBase) ? RamBase : 0x40000000;
RamSize = DEFINED(RamSize) ? RamSize : 128M;
RamEnd = RamBase + RamSize;
HeapSize = DEFINED(HeapSize) ? HeapSize : 92M;
MEMORY {
sdram : ORIGIN = 0x40000000 , LENGTH = 128M
}
SECTIONS
{
.boot :
{
KEEP (*(.boot))
} > sdram
/* Read-only sections, merged into text segment: */
.interp : { *(.interp) } > sdram
.hash : { *(.hash) } > sdram
.dynsym : { *(.dynsym) } > sdram
.dynstr : { *(.dynstr) } > sdram
.gnu.version : { *(.gnu.version) } > sdram
.gnu.version_d : { *(.gnu.version_d) } > sdram
.gnu.version_r : { *(.gnu.version_r) } > sdram
.rela.text :
{ *(.rela.text) *(.rela.gnu.linkonce.t*) } > sdram
.rela.data :
{ *(.rela.data) *(.rela.gnu.linkonce.d*) } > sdram
.rela.rodata :
{ *(.rela.rodata*) *(.rela.gnu.linkonce.r*) } > sdram
.rela.got : { *(.rela.got) } > sdram
.rela.got1 : { *(.rela.got1) } > sdram
.rela.got2 : { *(.rela.got2) } > sdram
.rela.ctors : { *(.rela.ctors) } > sdram
.rela.dtors : { *(.rela.dtors) } > sdram
.rela.init : { *(.rela.init) } > sdram
.rela.fini : { *(.rela.fini) } > sdram
.rela.bss : { *(.rela.bss) } > sdram
.rela.plt : { *(.rela.plt) } > sdram
.rela.sdata : { *(.rela.sdata) } > sdram
.rela.sbss : { *(.rela.sbss) } > sdram
.rela.sdata2 : { *(.rela.sdata2) } > sdram
.rela.sbss2 : { *(.rela.sbss2) } > sdram
.rela.dyn : { *(.rela.dyn) } > sdram
.init : { KEEP(*(.init)) } > sdram
.text :
{
*(.text*)
/*
* Special FreeBSD sysctl sections.
*/
. = ALIGN (16);
__start_set_sysctl_set = .;
*(set_sysctl_*);
__stop_set_sysctl_set = ABSOLUTE(.);
*(set_domain_*);
*(set_pseudo_*);
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.gnu.linkonce.t*)
} > sdram
.fini : { _fini = .; KEEP(*(.fini)) } > sdram
.rodata : { *(.rodata*) KEEP (*(SORT(.rtemsroset.*))) *(.gnu.linkonce.r*) } > sdram
.rodata1 : { *(.rodata1) } > sdram
.tdata : {
_TLS_Data_begin = .;
*(.tdata .tdata.* .gnu.linkonce.td.*)
_TLS_Data_end = .;
} > sdram
.tbss : {
_TLS_BSS_begin = .;
*(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
_TLS_BSS_end = .;
} > sdram
_TLS_Data_size = _TLS_Data_end - _TLS_Data_begin;
_TLS_Data_begin = _TLS_Data_size != 0 ? _TLS_Data_begin : _TLS_BSS_begin;
_TLS_Data_end = _TLS_Data_size != 0 ? _TLS_Data_end : _TLS_BSS_begin;
_TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin;
_TLS_Size = _TLS_BSS_end - _TLS_Data_begin;
_TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss));
/* Adjust the address for the data segment. We want to adjust up to
the same address within the page on the next page up. */
. = ALIGN(0x10000) + (. & (0x10000 - 1));
/* Ensure the __preinit_array_start label is properly aligned. We
could instead move the label definition inside the section, but
the linker would then create the section even if it turns out to
be empty, which isn't pretty. */
. = ALIGN(32 / 8);
PROVIDE (__preinit_array_start = .);
.preinit_array : { *(.preinit_array) } >sdram
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
.init_array : { *(.init_array) } >sdram
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
.fini_array : { *(.fini_array) } >sdram
PROVIDE (__fini_array_end = .);
/* _SDA2_BASE_ = __SDATA2_START__ + 0xe000; */
.sdata2 : { *(.sdata2 .sdata2.* .gnu.linkonce.s2.*) } >sdram
.sbss2 : { *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*)
/* avoid empty sdata2/sbss2 area -- __eabi would not set up r2
* which may be important if run-time loading is used
*/
. += 1;
} >sdram
.eh_frame : { *.(eh_frame) } >sdram
/* NOTE: if the BSP uses page tables, the correctness of
* '_etext' (and __DATA_START__) is CRUCIAL - otherwise,
* an invalid mapping may result!!!
*/
_etext = .;
PROVIDE (etext = .);
/* Adjust the address for the data segment. We want to adjust up to
the same address within the page on the next page up. It would
be more correct to do this:
. = ALIGN(0x40000) + (ALIGN(8) & (0x40000 - 1));
The current expression does not correctly handle the case of a
text segment ending precisely at the end of a page; it causes the
data segment to skip a page. The above expression does not have
this problem, but it will currently (2/95) cause BFD to allocate
a single segment, combining both text and data, for this case.
This will prevent the text segment from being shared among
multiple executions of the program; I think that is more
important than losing a page of the virtual address space (note
that no actual memory is lost; the page which is skipped can not
be referenced). */
. = ALIGN(0x1000);
.data ALIGN(0x1000) :
{
/* NOTE: if the BSP uses page tables, the correctness of
* '__DATA_START__' (and _etext) is CRUCIAL - otherwise,
* an invalid mapping may result!!!
*/
PROVIDE(__DATA_START__ = ABSOLUTE(.) );
*(.data .data.* .gnu.linkonce.d*)
KEEP (*(SORT(.rtemsrwset.*)))
SORT(CONSTRUCTORS)
} > sdram
.data1 : { *(.data1) } > sdram
PROVIDE (__EXCEPT_START__ = .);
.gcc_except_table : {
*(.gcc_except_table)
*(.gcc_except_table.*)
} > sdram
PROVIDE (__EXCEPT_END__ = .);
.got1 : { *(.got1) } > sdram
/* Put .ctors and .dtors next to the .got2 section, so that the pointers
get relocated with -mrelocatable. Also put in the .fixup pointers.
The current compiler no longer needs this, but keep it around for 2.7.2 */
PROVIDE (_GOT2_START_ = .);
.got2 : { *(.got2) } > sdram
.dynamic : { *(.dynamic) } > sdram
.ctors :
{
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin.o(.ctors))
/* We don't want to include the .ctor section from
from the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
} > sdram
.dtors :
{
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} > sdram
PROVIDE (_FIXUP_START_ = .);
.fixup : { *(.fixup) } > sdram
PROVIDE (_FIXUP_END_ = .);
PROVIDE (_GOT2_END_ = .);
PROVIDE (_GOT_START_ = .);
.got : { *(.got) } > sdram
.got.plt : { *(.got.plt) } > sdram
PROVIDE (_GOT_END_ = .);
.jcr : { KEEP (*(.jcr)) } > sdram
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
/* _SDA_BASE_ = __SDATA_START__ + 0xe000; */
.sdata : { *(.sdata*) *(.gnu.linkonce.s.*) } >sdram
_edata = .;
_gp = .;
PROVIDE (edata = .);
.sbss :
{
_clear_start = .;
PROVIDE (__sbss_start = .);
*(.dynsbss)
*(.sbss* .gnu.linkonce.sb.*)
*(.scommon)
/* avoid empty sdata/sbss area -- __eabi would not set up r13
* which may be important if run-time loading is used
*/
. += 1;
. = ALIGN(16);
PROVIDE (__sbss_end = .);
} > sdram
.plt : { *(.plt) } > sdram
.bss :
{
PROVIDE (__bss_start = .);
*(.dynbss)
*(.bss .bss* .gnu.linkonce.b*)
*(COMMON)
. = ALIGN(16);
_end = . ;
__rtems_end = . ;
PROVIDE (end = .);
. = ALIGN (16);
_clear_end = .;
} > sdram
.noinit (NOLOAD) : {
*(SORT_BY_NAME (SORT_BY_ALIGNMENT (.noinit*)))
} > sdram
.rtemsstack (NOLOAD) : {
*(SORT(.rtemsstack.*))
WorkAreaBase = .;
} > sdram
/DISCARD/ :
{
*(.comment)
}
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* These must appear regardless of . */
/* Addition to let linker know about custom section for GDB pretty-printing support. */
.debug_gdb_scripts 0 : { *(.debug_gdb_scripts) }
}
bsps/lm32/shared/btimer/btimer.c
-130
View File
@@ -1,130 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/* timer.c
*
* This file manages the benchmark timer used by the RTEMS Timing
* Test Suite. Each measured time period is demarcated by calls to
* benchmark_timer_initialize() and benchmark_timer_read().
* benchmark_timer_read() usually returns the number of microseconds
* since benchmark_timer_initialize() exitted.
*
* NOTE: It is important that the timer start/stop overhead be
* determined when porting or modifying this code.
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008,
* Micro-Research Finland Oy
*/
#include <rtems.h>
#include <bsp.h>
#include <rtems/btimer.h>
#include <rtems/bspIo.h>
#include "../include/system_conf.h"
#include "../../shared/clock/clock.h"
static inline int timerread(unsigned int reg)
{
#if ON_SIMULATOR && defined(TIMER0_BASE_ADDRESS)
return *((int*)(TIMER0_BASE_ADDRESS + reg));
#elif defined(TIMER1_BASE_ADDRESS)
return *((int*)(TIMER1_BASE_ADDRESS + reg));
#else
#warning "Benchmarking timer not available!"
return 0;
#endif
}
static inline void timerwrite(unsigned int reg, int value)
{
#if ON_SIMULATOR && defined(TIMER0_BASE_ADDRESS)
*((int*)(TIMER0_BASE_ADDRESS + reg)) = value;
#elif defined(TIMER1_BASE_ADDRESS)
*((int*)(TIMER1_BASE_ADDRESS + reg)) = value;
#endif
}
bool benchmark_timer_find_average_overhead;
void benchmark_timer_initialize( void )
{
/* Set timer period */
timerwrite(LM32_CLOCK_PERIOD, 0xffffffff);
/* Stop timer */
timerwrite(LM32_CLOCK_CR, LM32_CLOCK_CR_STOP);
/* Clear status register */
timerwrite(LM32_CLOCK_SR, 0);
/* Start timer */
timerwrite(LM32_CLOCK_CR, LM32_CLOCK_CR_START);
}
/*
* The following controls the behavior of benchmark_timer_read().
*
* AVG_OVEREHAD is the overhead for starting and stopping the timer. It
* is usually deducted from the number returned.
*
* LEAST_VALID is the lowest number this routine should trust. Numbers
* below this are "noise" and zero is returned.
*/
#define AVG_OVERHEAD 4 /* It typically takes X.X microseconds */
/* (Y countdowns) to start/stop the timer. */
/* This value is in microseconds. */
#define LEAST_VALID 4 /* Don't trust a clicks value lower than this */
benchmark_timer_t benchmark_timer_read( void )
{
uint32_t ticks;
uint32_t total;
uint32_t status;
ticks = 0xffffffff - timerread(LM32_CLOCK_SNAPSHOT);
status = timerread(LM32_CLOCK_SR);
if (status & LM32_CLOCK_SR_TO)
printk("Timer overflow!\n");
total = ticks / (CPU_FREQUENCY / 1000000);
if ( benchmark_timer_find_average_overhead == true )
return total; /* in XXX microsecond units */
else
{
if ( total < LEAST_VALID )
return 0; /* below timer resolution */
/*
* Somehow convert total into microseconds
*/
return (total - AVG_OVERHEAD);
}
}
void benchmark_timer_disable_subtracting_average_overhead(
bool find_flag
)
{
benchmark_timer_find_average_overhead = find_flag;
}
bsps/lm32/shared/clock/ckinit.c
-90
View File
@@ -1,90 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/*
* Clock device driver for Lattice Mico32 (lm32).
*/
/*
* COPYRIGHT (c) 1989-2009.
* On-Line Applications Research Corporation (OAR).
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008,
* Micro-Research Finland Oy
*/
#include <bsp.h>
#include "../include/system_conf.h"
#include "clock.h"
#include "bspopts.h"
#if LM32_ON_SIMULATOR
#define CLOCK_DRIVER_USE_FAST_IDLE 1
#endif
static inline int clockread(unsigned int reg)
{
return *((int*)(TIMER0_BASE_ADDRESS + reg));
}
static inline void clockwrite(unsigned int reg, int value)
{
*((int*)(TIMER0_BASE_ADDRESS + reg)) = value;
}
/*
* The interrupt vector number associated with the clock tick device
* driver.
*/
#define CLOCK_VECTOR ( TIMER0_IRQ )
#define CLOCK_IRQMASK ( 1 << CLOCK_VECTOR )
#define Clock_driver_support_at_tick(arg) \
do { \
/* Clear overflow flag */ \
clockwrite(LM32_CLOCK_SR, 0); \
lm32_interrupt_ack(CLOCK_IRQMASK); \
} while (0)
#define Clock_driver_support_install_isr(_new ) \
set_vector( _new, CLOCK_VECTOR, 1 )
static void Clock_driver_support_initialize_hardware(void)
{
/* Set clock period */
clockwrite(LM32_CLOCK_PERIOD,
(CPU_FREQUENCY /
(1000000 / rtems_configuration_get_microseconds_per_tick())));
/* Enable clock interrupts and start in continuous mode */
clockwrite(LM32_CLOCK_CR, LM32_CLOCK_CR_ITO |
LM32_CLOCK_CR_CONT |
LM32_CLOCK_CR_START);
lm32_interrupt_unmask(CLOCK_IRQMASK);
}
#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER
#include "../../../shared/dev/clock/clockimpl.h"
bsps/lm32/shared/clock/clock.h
-74
View File
@@ -1,74 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
* @ingroup lm32_clock
* @brief LatticeMico32 Timer (Clock) definitions
*/
/*
* This file contains definitions for LatticeMico32 Timer (Clock)
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008,
* Micro-Research Finland Oy
*/
/**
* @defgroup lm32_clock LM32 Clock
* @ingroup RTEMSBSPsLM32Shared
* @brief LatticeMico32 Timer (Clock) definitions.
* @{
*/
#ifndef _BSPCLOCK_H
#define _BSPCLOCK_H
/** @brief Status Register */
#define LM32_CLOCK_SR (0x0000)
#define LM32_CLOCK_SR_TO (0x0001)
#define LM32_CLOCK_SR_RUN (0x0002)
/** @brief Control Register */
#define LM32_CLOCK_CR (0x0004)
#define LM32_CLOCK_CR_ITO (0x0001)
#define LM32_CLOCK_CR_CONT (0x0002)
#define LM32_CLOCK_CR_START (0x0004)
#define LM32_CLOCK_CR_STOP (0x0008)
/** @brief Period Register */
#define LM32_CLOCK_PERIOD (0x0008)
/** @brief Snapshot Register */
#define LM32_CLOCK_SNAPSHOT (0x000C)
#endif /* _BSPCLOCK_H */
/** @} */
bsps/lm32/shared/console/console.c
-197
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@@ -1,197 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/*
* Console driver for Lattice Mico32 (lm32).
*/
/*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008,
* Micro-Research Finland Oy
*/
#define NO_BSP_INIT
#include <bsp.h>
#include <rtems/bspIo.h>
#include <rtems/libio.h>
#include <rtems/console.h>
/* console_initialize
*
* This routine initializes the console IO driver.
*/
rtems_device_driver console_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
rtems_status_code status;
printk("console_initialize\n");
status = rtems_io_register_name(
"/dev/console",
major,
(rtems_device_minor_number) 0
);
if (status != RTEMS_SUCCESSFUL)
rtems_fatal_error_occurred(status);
return RTEMS_SUCCESSFUL;
}
/* inbyte
*
* This routine reads a character from the SOURCE.
*/
static int inbyte( void )
{
/*
* If polling, wait until a character is available.
*/
return BSP_uart_polled_read();
}
/* outbyte
*
* This routine transmits a character out the SOURCE. It may support
* XON/XOFF flow control.
*/
static void outbyte(
char ch
)
{
/*
* If polling, wait for the transmitter to be ready.
* Check for flow control requests and process.
* Then output the character.
*/
BSP_uart_polled_write(ch);
}
/*
* Open entry point
*/
rtems_device_driver console_open(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return RTEMS_SUCCESSFUL;
}
/*
* Close entry point
*/
rtems_device_driver console_close(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return RTEMS_SUCCESSFUL;
}
/*
* read bytes from the serial port. We only have stdin.
*/
rtems_device_driver console_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
rtems_libio_rw_args_t *rw_args;
char *buffer;
int maximum;
int count = 0;
rw_args = (rtems_libio_rw_args_t *) arg;
buffer = rw_args->buffer;
maximum = rw_args->count;
for (count = 0; count < maximum; count++) {
buffer[ count ] = inbyte();
if (buffer[ count ] == '\n' || buffer[ count ] == '\r') {
buffer[ count++ ] = '\n';
break;
}
}
rw_args->bytes_moved = count;
return (count >= 0) ? RTEMS_SUCCESSFUL : RTEMS_UNSATISFIED;
}
/*
* write bytes to the serial port. Stdout and stderr are the same.
*/
rtems_device_driver console_write(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
int count;
int maximum;
rtems_libio_rw_args_t *rw_args;
char *buffer;
rw_args = (rtems_libio_rw_args_t *) arg;
buffer = rw_args->buffer;
maximum = rw_args->count;
for (count = 0; count < maximum; count++) {
if ( buffer[ count ] == '\n') {
outbyte('\r');
}
outbyte( buffer[ count ] );
}
rw_args->bytes_moved = maximum;
return 0;
}
/*
* IO Control entry point
*/
rtems_device_driver console_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return RTEMS_SUCCESSFUL;
}
BSP_output_char_function_type BSP_output_char = BSP_uart_polled_write;
BSP_polling_getchar_function_type BSP_poll_char = BSP_uart_polled_read;
bsps/lm32/shared/console/uart.c
-92
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@@ -1,92 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/*
* Uart driver for Lattice Mico32 (lm32) UART
*/
/*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008,
* Micro-Research Finland Oy
*/
#include "../include/system_conf.h"
#include "uart.h"
#include <bsp.h>
#include <rtems/libio.h>
static inline int uartread(unsigned int reg)
{
return *((int*)(UART_BASE_ADDRESS + reg));
}
static inline void uartwrite(unsigned int reg, int value)
{
*((int*)(UART_BASE_ADDRESS + reg)) = value;
}
void BSP_uart_init(int baud)
{
/* Disable UART interrupts */
uartwrite(LM32_UART_IER, 0);
/* Line control 8 bit, 1 stop, no parity */
uartwrite(LM32_UART_LCR, LM32_UART_LCR_8BIT);
/* Modem control, DTR = 1, RTS = 1 */
uartwrite(LM32_UART_MCR, LM32_UART_MCR_DTR | LM32_UART_MCR_RTS);
/* Set baud rate */
uartwrite(LM32_UART_DIV, CPU_FREQUENCY/baud);
}
void BSP_uart_polled_write(char ch)
{
/* Insert CR before LF */
if (ch == '\n')
BSP_uart_polled_write('\r');
/* Wait until THR is empty. */
while (!(uartread(LM32_UART_LSR) & LM32_UART_LSR_THRE));
uartwrite(LM32_UART_RBR, ch);
}
int BSP_uart_polled_read( void )
{
/* Wait until there is a byte in RBR */
while (!(uartread(LM32_UART_LSR) & LM32_UART_LSR_DR));
return (int) uartread(LM32_UART_RBR);
}
char BSP_uart_is_character_ready(char *ch)
{
if (uartread(LM32_UART_LSR) & LM32_UART_LSR_DR)
{
*ch = (char) uartread(LM32_UART_RBR);
return true;
}
*ch = '0';
return false;
}
bsps/lm32/shared/console/uart.h
-121
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@@ -1,121 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
* @ingroup RTEMSBSPsLM32Shared lm32_uart
* @brief LatticeMico32 UART definitions
*/
/*
* This file contains definitions for LatticeMico32 UART
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008,
* Micro-Research Finland Oy
*/
/**
* @defgroup lm32_uart LM32 UART
* @ingroup RTEMSBSPsLM32Shared
* @brief LatticeMico32 UART definitions
* @{
*/
#ifndef _BSPUART_H
#define _BSPUART_H
void BSP_uart_init(int baud);
/* Receive buffer register / transmit holding register */
#define LM32_UART_RBR (0x0000)
/* Interrupt enable register */
#define LM32_UART_IER (0x0004)
#define LM32_UART_IER_RBRI (0x0001)
#define LM32_UART_IER_THRI (0x0002)
#define LM32_UART_IER_RLSI (0x0004)
#define LM32_UART_IER_MSI (0x0008)
/* Interrupt identification register */
#define LM32_UART_IIR (0x0008)
#define LM32_UART_IIR_STAT (0x0001)
#define LM32_UART_IIR_ID0 (0x0002)
#define LM32_UART_IIR_ID1 (0x0004)
/* Line control register */
#define LM32_UART_LCR (0x000C)
#define LM32_UART_LCR_WLS0 (0x0001)
#define LM32_UART_LCR_WLS1 (0x0002)
#define LM32_UART_LCR_STB (0x0004)
#define LM32_UART_LCR_PEN (0x0008)
#define LM32_UART_LCR_EPS (0x0010)
#define LM32_UART_LCR_SP (0x0020)
#define LM32_UART_LCR_SB (0x0040)
#define LM32_UART_LCR_5BIT (0)
#define LM32_UART_LCR_6BIT (LM32_UART_LCR_WLS0)
#define LM32_UART_LCR_7BIT (LM32_UART_LCR_WLS1)
#define LM32_UART_LCR_8BIT (LM32_UART_LCR_WLS1 | LM32_UART_LCR_WLS0)
/* Modem control register */
#define LM32_UART_MCR (0x0010)
#define LM32_UART_MCR_DTR (0x0001)
#define LM32_UART_MCR_RTS (0x0002)
/* Line status register */
#define LM32_UART_LSR (0x0014)
#define LM32_UART_LSR_DR (0x0001)
#define LM32_UART_LSR_OE (0x0002)
#define LM32_UART_LSR_PE (0x0004)
#define LM32_UART_LSR_FE (0x0008)
#define LM32_UART_LSR_BI (0x0010)
#define LM32_UART_LSR_THRE (0x0020)
#define LM32_UART_LSR_TEMT (0x0040)
/* Modem status register */
#define LM32_UART_MSR (0x0018)
#define LM32_UART_MSR_DCTS (0x0001)
#define LM32_UART_MSR_DDSR (0x0002)
#define LM32_UART_MSR_TERI (0x0004)
#define LM32_UART_MSR_DDCD (0x0008)
#define LM32_UART_MSR_CTS (0x0010)
#define LM32_UART_MSR_DSR (0x0020)
#define LM32_UART_MSR_RI (0x0040)
#define LM32_UART_MSR_DCD (0x0000)
/* Baud-rate divisor register */
#define LM32_UART_DIV (0x001C)
#endif /* _BSPUART_H */
/** @} */
bsps/lm32/shared/doxygen.h
-31
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@@ -1,31 +0,0 @@
/**
* @file
*
* @ingroup RTEMSImplDoxygen
*
* @brief This header file defines lm32-specific groups.
*/
/**
* @defgroup RTEMSBSPsLM32 LatticeMicro32 (lm32)
*
* @ingroup RTEMSBSPs
*
* @brief LatticeMicro32 Board Support Packages.
*/
/**
* @defgroup RTEMSBSPsLM32Shared Shared
*
* @ingroup RTEMSBSPsLM32
*
* @brief Shared Support for LatticeMicro32 Board Support Packages.
*/
/**
* @defgroup RTEMSBSPsLM32SharedMilkymistOne Milkymist One
*
* @ingroup RTEMSBSPsLM32Shared
*
* @brief Shared Support for Milkymist One Board Support Packages.
*/
bsps/lm32/shared/gdbstub/README.md
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GDB Stub lm32
=============
This is a thread-aware gdb stub for the lm32 architecture. It has to be
linked with the application, which should be debugged. The application has
to call 'lm32_gdb_stub_install' to setup the stub.
The stub remaps _all_ h/w exceptions to an own code (lm32-debug.S), which
saves all the registers, calls the gdb stub and restores the registers again.
The interrupt exceptions gets handled in a special way. Because we remapped
this exception, we need to do
- the same as the original one (in cpu_asm.S),
- and, as we might use an ISR for breaking into a running application with
gdb, we need to save all registers as well. To be backward compatible
the missing callee saved registers gets appended to CPU_Interrupt_frame.
There is a mapping in 'gdb_handle_break' for that.
To use this gdb stub, your bsp has to provide the following functions:
- void gdb_put_debug_char(char c)
Puts the given charater c to the debug console output. The function can
block until the character can be written to the output buffer.
- char gdb_get_debug_char(void)
Returns the character in the input buffer of the debug console. If no one
is availabe, the function must block.
- void gdb_console_init()
This function can be used to initialize the debug console. Additionally,
it should set up the ISR for the debug console to call the function
'gdb_handle_break', which is provided by the gdb stub and enable the
interrupt for a break symbol on the debug serial port. If no ISR is
provided, you won't be able to interrupt a running application.
- void gdb_ack_irq()
If an ISR is used, this function is used to acknowledge the interrupt.
NOTE: the stub don't skip a hardcoded 'break' in the code. So you have to
set the PC an instruction further in the debugger (set $pc += 4).
NOTE2: make sure you have the following CFLAGS set:
-mbarrel-shift-enabled -mmultiply-enabled -mdivide-enabled
-msign-extend-enabled
Without the hardware support, it is done in software. Unfortunately, the
stub also uses some shifts and multiplies. If you step through your code,
there will be a chance that a breakpoint is set to one of that functions,
which then causes an endless loop.
EXAMPLES
```shell
char gdb_get_debug_char(void)
{
/* Wait until there is a byte in RXTX */
while (!(uartread(LM32_UART_LSR) & LM32_UART_LSR_DR));
return (char) uartread(LM32_UART_RBR);
}
void gdb_put_debug_char(char c)
{
/* Wait until RXTX is empty. */
while (!(uartread(LM32_UART_LSR) & LM32_UART_LSR_THRE));
uartwrite(LM32_UART_RBR, c);
}
extern void gdb_handle_break(
rtems_vector_number vector,
CPU_Interrupt_frame *frame
);
void gdb_console_init()
{
rtems_isr_entry old;
/* enable interrupts */
uartwrite(LM32_UART_IER, 1);
rtems_interrupt_catch((rtems_isr_entry) gdb_handle_break, DEBUG_UART_IRQ,
&old);
lm32_interrupt_unmask(1 << DEBUG_UART_IRQ);
}
void gdb_ack_irq()
{
lm32_interrupt_ack(1 << DEBUG_UART_IRQ);
}
```
bsps/lm32/shared/gdbstub/gdb_if.h
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/**
* @file
* @ingroup lm32_gdb
* @brief definition of the interface between the stub and gdb
*/
/*
* gdb_if.h - definition of the interface between the stub and gdb
*
* THIS SOFTWARE IS NOT COPYRIGHTED
*
* The following software is offered for use in the public domain.
* There is no warranty with regard to this software or its performance
* and the user must accept the software "AS IS" with all faults.
*
* THE CONTRIBUTORS DISCLAIM ANY WARRANTIES, EXPRESS OR IMPLIED, WITH
* REGARD TO THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*/
/**
* @defgroup lm32_gdb LM32 GDB Interface
* @ingroup RTEMSBSPsLM32Shared
* @brief Definition of the interface between the stub and gdb,
* @{
*/
#ifndef _GDB_IF_H
#define _GDB_IF_H
/** @brief Max number of threads in qM response */
#define QM_MAX_THREADS (20)
struct rtems_gdb_stub_thread_info {
char display[256];
char name[256];
char more_display[256];
};
/*
* Prototypes
*/
int parse_zbreak(const char *in, int *type, unsigned char **addr, int *len);
char* mem2hstr(char *buf, const unsigned char *mem, int count);
int hstr2mem(unsigned char *mem, const char *buf, int count);
void set_mem_err(void);
unsigned char get_byte(const unsigned char *ptr);
void set_byte(unsigned char *ptr, int val);
char* thread2vhstr(char *buf, int thread);
char* thread2fhstr(char *buf, int thread);
const char* fhstr2thread(const char *buf, int *thread);
const char* vhstr2thread(const char *buf, int *thread);
char* int2fhstr(char *buf, int val);
char* int2vhstr(char *buf, int vali);
const char* fhstr2int(const char *buf, int *ival);
const char* vhstr2int(const char *buf, int *ival);
int hstr2byte(const char *buf, int *bval);
int hstr2nibble(const char *buf, int *nibble);
Thread_Control *rtems_gdb_index_to_stub_id(int);
int rtems_gdb_stub_thread_support_ok(void);
int rtems_gdb_stub_get_current_thread(void);
int rtems_gdb_stub_get_next_thread(int);
int rtems_gdb_stub_get_offsets(
unsigned char **text_addr,
unsigned char **data_addr,
unsigned char **bss_addr
);
int rtems_gdb_stub_get_thread_regs(
int thread,
unsigned int *registers
);
int rtems_gdb_stub_set_thread_regs(
int thread,
unsigned int *registers
);
void rtems_gdb_process_query(
char *inbuffer,
char *outbuffer,
int do_threads,
int thread
);
/** @brief Exception IDs */
#define LM32_EXCEPTION_RESET 0x0
#define LM32_EXCEPTION_INST_BREAKPOINT 0x1
#define LM32_EXCEPTION_INST_BUS_ERROR 0x2
#define LM32_EXCEPTION_DATA_BREAKPOINT 0x3
#define LM32_EXCEPTION_DATA_BUS_ERROR 0x4
#define LM32_EXCEPTION_DIVIDE_BY_ZERO 0x5
#define LM32_EXCEPTION_INTERRUPT 0x6
#define LM32_EXCEPTION_SYSTEM_CALL 0x7
/** @brief Breakpoint instruction */
#define LM32_BREAK 0xac000002UL
/** @brief This numbering must be consistant with GDBs numbering in gdb/lm32-tdep.c */
enum lm32_regnames {
LM32_REG_R0, LM32_REG_R1, LM32_REG_R2, LM32_REG_R3, LM32_REG_R4, LM32_REG_R5,
LM32_REG_R6, LM32_REG_R7, LM32_REG_R8, LM32_REG_R9, LM32_REG_R10,
LM32_REG_R11, LM32_REG_R12, LM32_REG_R13, LM32_REG_R14, LM32_REG_R15,
LM32_REG_R16, LM32_REG_R17, LM32_REG_R18, LM32_REG_R19, LM32_REG_R20,
LM32_REG_R21, LM32_REG_R22, LM32_REG_R23, LM32_REG_R24, LM32_REG_R25,
LM32_REG_GP, LM32_REG_FP, LM32_REG_SP, LM32_REG_RA, LM32_REG_EA, LM32_REG_BA,
LM32_REG_PC, LM32_REG_EID, LM32_REG_EBA, LM32_REG_DEBA, LM32_REG_IE, NUM_REGS
};
/* keep this in sync with the debug isr handler in lm32-debug.S */
enum lm32_int_regnames {
LM32_INT_REG_R1, LM32_INT_REG_R2, LM32_INT_REG_R3, LM32_INT_REG_R4,
LM32_INT_REG_R5, LM32_INT_REG_R6, LM32_INT_REG_R7, LM32_INT_REG_R8,
LM32_INT_REG_R9, LM32_INT_REG_R10, LM32_INT_REG_RA, LM32_INT_REG_EA,
LM32_INT_REG_BA, LM32_INT_REG_R11, LM32_INT_REG_R12, LM32_INT_REG_R13,
LM32_INT_REG_R14, LM32_INT_REG_R15, LM32_INT_REG_R16, LM32_INT_REG_R17,
LM32_INT_REG_R18, LM32_INT_REG_R19, LM32_INT_REG_R20, LM32_INT_REG_R21,
LM32_INT_REG_R22, LM32_INT_REG_R23, LM32_INT_REG_R24, LM32_INT_REG_R25,
LM32_INT_REG_GP, LM32_INT_REG_FP, LM32_INT_REG_SP, LM32_INT_REG_PC,
LM32_INT_REG_EID, LM32_INT_REG_EBA, LM32_INT_REG_DEBA, LM32_INT_REG_IE,
};
#endif /* _GDB_IF_H */
/** @} */
bsps/lm32/shared/gdbstub/lm32-debug.S
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/*
* lm32 debug exception vectors
*
* Michael Walle <michael@walle.cc>, 2009
*
* If debugging is enabled the debug exception base address (deba) gets
* remapped to this file.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
*/
#include "bspopts.h"
.section .text
/* (D)EBA alignment */
.align 256
.globl _deba
_deba:
debug_reset_handler:
/* Clear r0 */
xor r0,r0,r0
/* Disable interrupts */
wcsr IE, r0
/* Mask all interrupts */
wcsr IM,r0
/* Jump to original crt0 */
.extern crt0
mvhi r1, hi(crt0)
ori r1, r1, lo(crt0)
b r1
nop
nop
debug_breakpoint_handler:
/* Clear r0 in case it was corrupted */
xor r0, r0, r0
mvhi r0, hi(registers)
ori r0, r0, lo(registers)
sw (r0+116), ra
sw (r0+128), ba
calli save_all
calli handle_exception
calli b_restore_and_return
debug_instruction_bus_error_handler:
/* Clear r0 in case it was corrupted */
xor r0, r0, r0
mvhi r0, hi(registers)
ori r0, r0, lo(registers)
sw (r0+116), ra
sw (r0+128), ea
calli save_all
calli handle_exception
calli e_restore_and_return
debug_watchpoint_handler:
/* Clear r0 in case it was corrupted */
xor r0, r0, r0
mvhi r0, hi(registers)
ori r0, r0, lo(registers)
sw (r0+116), ra
sw (r0+128), ba
calli save_all
calli handle_exception
calli b_restore_and_return
debug_data_bus_error_handler:
/* Clear r0 in case it was corrupted */
xor r0, r0, r0
mvhi r0, hi(registers)
ori r0, r0, lo(registers)
sw (r0+116), ra
sw (r0+128), ea
calli save_all
calli handle_exception
calli e_restore_and_return
debug_divide_by_zero_handler:
/* Clear r0 in case it was corrupted */
xor r0, r0, r0
mvhi r0, hi(registers)
ori r0, r0, lo(registers)
sw (r0+116), ra
sw (r0+128), ea
calli save_all
calli handle_exception
calli e_restore_and_return
debug_interrupt_handler:
bi debug_isr_handler
nop
nop
nop
nop
nop
nop
nop
debug_system_call_handler:
/* Clear r0 in case it was corrupted */
xor r0, r0, r0
mvhi r0, hi(registers)
ori r0, r0, lo(registers)
sw (r0+116), ra
sw (r0+128), ea
calli save_all
calli handle_exception
calli e_restore_and_return
debug_isr_handler:
addi sp, sp, -156
sw (sp+4), r1
sw (sp+8), r2
sw (sp+12), r3
sw (sp+16), r4
sw (sp+20), r5
sw (sp+24), r6
sw (sp+28), r7
sw (sp+32), r8
sw (sp+36), r9
sw (sp+40), r10
sw (sp+44), ra
sw (sp+48), ea
sw (sp+52), ba
sw (sp+56), r11
sw (sp+60), r12
sw (sp+64), r13
sw (sp+68), r14
sw (sp+72), r15
sw (sp+76), r16
sw (sp+80), r17
sw (sp+84), r18
sw (sp+88), r19
sw (sp+92), r20
sw (sp+96), r21
sw (sp+100), r22
sw (sp+104), r23
sw (sp+108), r24
sw (sp+112), r25
sw (sp+116), r26
sw (sp+120), r27
/* 124 - SP */
addi r1, sp, 156
sw (sp+124), r1
/* 128 - PC */
sw (sp+128), ea
/* 132 - EID */
mvi r1, 6
sw (sp+132), r1
rcsr r1, EBA
sw (sp+136), r1
rcsr r1, DEBA
sw (sp+140), r1
rcsr r1, IE
sw (sp+144), r1
/* This is the same code as in cpu_asm.S */
rcsr r2, IP
rcsr r3, IM
mv r1, r0
and r2, r2, r3
mvi r3, 1
be r2, r0, 3f
1:
and r4, r2, r3
bne r4, r0, 2f
sli r3, r3, 1
addi r1, r1, 1
bi 1b
2:
addi r2, sp, 4
.extern __ISR_Handler
mvhi r3, hi(__ISR_Handler)
ori r3, r3, lo(__ISR_Handler)
call r3
3:
lw r1, (sp+4)
lw r2, (sp+8)
lw r3, (sp+12)
lw r4, (sp+16)
lw r5, (sp+20)
lw r6, (sp+24)
lw r7, (sp+28)
lw r8, (sp+32)
lw r9, (sp+36)
lw r10, (sp+40)
lw ra, (sp+44)
lw ea, (sp+48)
lw ba, (sp+52)
lw r11, (sp+56)
lw r12, (sp+60)
lw r13, (sp+64)
lw r14, (sp+68)
lw r15, (sp+72)
lw r16, (sp+76)
lw r17, (sp+80)
lw r18, (sp+84)
lw r19, (sp+88)
lw r20, (sp+92)
lw r21, (sp+96)
lw r22, (sp+100)
lw r23, (sp+104)
lw r24, (sp+108)
lw r25, (sp+112)
lw r26, (sp+116)
lw r27, (sp+120)
lw ea, (sp+136)
wcsr EBA, ea
lw ea, (sp+140)
wcsr DEBA, ea
/* Restore EA from PC */
lw ea, (sp+128)
/* Stack pointer must be restored last, in case it has been updated */
lw sp, (sp+124)
eret
save_all:
sw (r0+4), r1
sw (r0+8), r2
sw (r0+12), r3
sw (r0+16), r4
sw (r0+20), r5
sw (r0+24), r6
sw (r0+28), r7
sw (r0+32), r8
sw (r0+36), r9
sw (r0+40), r10
sw (r0+44), r11
sw (r0+48), r12
sw (r0+52), r13
sw (r0+56), r14
sw (r0+60), r15
sw (r0+64), r16
sw (r0+68), r17
sw (r0+72), r18
sw (r0+76), r19
sw (r0+80), r20
sw (r0+84), r21
sw (r0+88), r22
sw (r0+92), r23
sw (r0+96), r24
sw (r0+100), r25
sw (r0+104), r26
sw (r0+108), r27
sw (r0+112), sp
/* 116 - RA - saved in handler code above */
sw (r0+120), ea
sw (r0+124), ba
/* 128 - PC - saved in handler code above */
/* 132 - EID - saved below */
rcsr r1, EBA
sw (r0+136), r1
rcsr r1, DEBA
sw (r0+140), r1
rcsr r1, IE
sw (r0+144), r1
/* Work out EID from exception entry point address */
andi r1, ra, 0xff
srui r1, r1, 5
sw (r0+132), r1
/* Save pointer to registers */
mv r1, r0
/* Restore r0 to 0 */
xor r0, r0, r0
/* Save r0 (hardcoded to 0) */
sw (r1+0), r0
ret
/* Restore gp registers */
restore_gp:
lw r1, (r0+4)
lw r2, (r0+8)
lw r3, (r0+12)
lw r4, (r0+16)
lw r5, (r0+20)
lw r6, (r0+24)
lw r7, (r0+28)
lw r8, (r0+32)
lw r9, (r0+36)
lw r10, (r0+40)
lw r11, (r0+44)
lw r12, (r0+48)
lw r13, (r0+52)
lw r14, (r0+56)
lw r15, (r0+60)
lw r16, (r0+64)
lw r17, (r0+68)
lw r18, (r0+72)
lw r19, (r0+76)
lw r20, (r0+80)
lw r21, (r0+84)
lw r22, (r0+88)
lw r23, (r0+92)
lw r24, (r0+96)
lw r25, (r0+100)
lw r26, (r0+104)
lw r27, (r0+108)
ret
/* Restore registers and return from exception */
e_restore_and_return:
/* first restore gp registers */
mvhi r0, hi(registers)
ori r0, r0, lo(registers)
calli restore_gp
lw sp, (r0+112)
lw ra, (r0+116)
lw ba, (r0+124)
lw ea, (r0+136)
wcsr EBA, ea
lw ea, (r0+140)
wcsr DEBA, ea
/* Restore EA from PC */
lw ea, (r0+128)
xor r0, r0, r0
eret
/* Restore registers and return from breakpoint */
b_restore_and_return:
/* first restore gp registers */
mvhi r0, hi(registers)
ori r0, r0, lo(registers)
calli restore_gp
lw sp, (r0+112)
lw ra, (r0+116)
lw ea, (r0+120)
lw ba, (r0+136)
wcsr EBA, ba
lw ba, (r0+140)
wcsr DEBA, ba
/* Restore BA from PC */
lw ba, (r0+128)
xor r0, r0, r0
bret
bsps/lm32/shared/gdbstub/lm32-stub.c
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bsps/lm32/shared/irq/irq.c
-93
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/* irq.c
*
* Copyright (c) 2010 Sebastien Bourdeauducq
*
* The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#include <bsp.h>
#include <rtems/score/cpu.h>
#include <bsp/irq.h>
#include <bsp/irq-generic.h>
void bsp_interrupt_facility_initialize(void)
{
/* Nothing to do */
}
rtems_status_code bsp_interrupt_get_attributes(
rtems_vector_number vector,
rtems_interrupt_attributes *attributes
)
{
return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_is_pending(
rtems_vector_number vector,
bool *pending
)
{
bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
bsp_interrupt_assert(pending != NULL);
*pending = false;
return RTEMS_UNSATISFIED;
}
rtems_status_code bsp_interrupt_raise(rtems_vector_number vector)
{
bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
return RTEMS_UNSATISFIED;
}
rtems_status_code bsp_interrupt_clear(rtems_vector_number vector)
{
bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
return RTEMS_UNSATISFIED;
}
rtems_status_code bsp_interrupt_vector_is_enabled(
rtems_vector_number vector,
bool *enabled
)
{
bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
bsp_interrupt_assert(enabled != NULL);
*enabled = false;
return RTEMS_UNSATISFIED;
}
rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
{
bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
lm32_interrupt_unmask(1 << vector);
return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
{
bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
lm32_interrupt_mask(1 << vector);
return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_set_priority(
rtems_vector_number vector,
uint32_t priority
)
{
bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
return RTEMS_UNSATISFIED;
}
rtems_status_code bsp_interrupt_get_priority(
rtems_vector_number vector,
uint32_t *priority
)
{
bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
bsp_interrupt_assert(priority != NULL);
return RTEMS_UNSATISFIED;
}
bsps/lm32/shared/milkymist_ac97/ac97.c
-436
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@@ -1,436 +0,0 @@
/* ac97.c
*
* Sound driver for Milkymist SoC
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
* COPYRIGHT (c) 2010, 2011 Sebastien Bourdeauducq
*/
#define RTEMS_STATUS_CHECKS_USE_PRINTK
#include <rtems.h>
#include <bsp.h>
#include <bsp/irq-generic.h>
#include <rtems/libio.h>
#include <rtems/status-checks.h>
#include "../include/system_conf.h"
#include <bsp/milkymist_ac97.h>
#define SND_DEVICE_NAME "/dev/snd"
#define MIXER_DEVICE_NAME "/dev/mixer"
static rtems_id cr_write_sem;
static rtems_id cr_read_sem;
static rtems_isr crrequest_handler(rtems_vector_number n)
{
rtems_semaphore_release(cr_write_sem);
lm32_interrupt_ack(1 << MM_IRQ_AC97CRREQUEST);
}
static rtems_isr crreply_handler(rtems_vector_number n)
{
rtems_semaphore_release(cr_read_sem);
lm32_interrupt_ack(1 << MM_IRQ_AC97CRREPLY);
}
/* queued playback buffers */
#define PLAY_Q_SIZE 8
#define PLAY_Q_MASK (PLAY_Q_SIZE-1)
static struct snd_buffer *play_q[PLAY_Q_SIZE];
static int play_produce;
static int play_consume;
static int play_level;
/* buffers played, for application to collect */
static rtems_id play_q_done;
static void play_start(struct snd_buffer *buf)
{
if (buf->nsamples > (AC97_MAX_DMASIZE/4))
buf->nsamples = AC97_MAX_DMASIZE/4;
MM_WRITE(MM_AC97_DADDRESS, (unsigned int)buf->samples);
MM_WRITE(MM_AC97_DREMAINING, buf->nsamples*4);
MM_WRITE(MM_AC97_DCTL, AC97_SCTL_EN);
}
static rtems_isr pcmplay_handler(rtems_vector_number n)
{
lm32_interrupt_ack(1 << MM_IRQ_AC97DMAR);
rtems_message_queue_send(play_q_done, &play_q[play_consume],
sizeof(void *));
play_consume = (play_consume + 1) & PLAY_Q_MASK;
play_level--;
if(play_level > 0)
play_start(play_q[play_consume]);
else
MM_WRITE(MM_AC97_DCTL, 0);
}
/* queued record buffers */
#define RECORD_Q_SIZE 8
#define RECORD_Q_MASK (RECORD_Q_SIZE-1)
static struct snd_buffer *record_q[RECORD_Q_SIZE];
static int record_produce;
static int record_consume;
static int record_level;
/* buffers recorded, for application to collect */
static rtems_id record_q_done;
static void record_start(struct snd_buffer *buf)
{
if (buf->nsamples > (AC97_MAX_DMASIZE/4))
buf->nsamples = AC97_MAX_DMASIZE/4;
MM_WRITE(MM_AC97_UADDRESS, (unsigned int)buf->samples);
MM_WRITE(MM_AC97_UREMAINING, buf->nsamples*4);
MM_WRITE(MM_AC97_UCTL, AC97_SCTL_EN);
}
static rtems_isr pcmrecord_handler(rtems_vector_number n)
{
lm32_interrupt_ack(1 << MM_IRQ_AC97DMAW);
__asm__ volatile( /* Invalidate Level-1 data cache */
"wcsr DCC, r0\n"
"nop\n"
);
rtems_message_queue_send(record_q_done, &record_q[record_consume],
sizeof(void *));
record_consume = (record_consume + 1) & RECORD_Q_MASK;
record_level--;
if(record_level > 0)
record_start(record_q[record_consume]);
else
MM_WRITE(MM_AC97_UCTL, 0);
}
rtems_device_driver ac97_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
rtems_status_code sc;
rtems_isr_entry dummy;
sc = rtems_io_register_name(SND_DEVICE_NAME, major, 0);
RTEMS_CHECK_SC(sc, "create snd device");
sc = rtems_io_register_name(MIXER_DEVICE_NAME, major, 1);
RTEMS_CHECK_SC(sc, "create mixer device");
sc = rtems_semaphore_create(
rtems_build_name('C', 'R', 'W', 'S'),
0,
RTEMS_SIMPLE_BINARY_SEMAPHORE,
0,
&cr_write_sem
);
RTEMS_CHECK_SC(sc, "create AC97 register write semaphore");
sc = rtems_semaphore_create(
rtems_build_name('C', 'R', 'R', 'S'),
0,
RTEMS_SIMPLE_BINARY_SEMAPHORE,
0,
&cr_read_sem
);
RTEMS_CHECK_SC(sc, "create AC97 register read semaphore");
sc = rtems_message_queue_create(
rtems_build_name('P', 'L', 'Y', 'Q'),
PLAY_Q_SIZE*2,
sizeof(void *),
0,
&play_q_done
);
RTEMS_CHECK_SC(sc, "create playback done queue");
sc = rtems_message_queue_create(
rtems_build_name('R', 'E', 'C', 'Q'),
RECORD_Q_SIZE*2,
sizeof(void *),
0,
&record_q_done
);
RTEMS_CHECK_SC(sc, "create record done queue");
rtems_interrupt_catch(crrequest_handler, MM_IRQ_AC97CRREQUEST, &dummy);
rtems_interrupt_catch(crreply_handler, MM_IRQ_AC97CRREPLY, &dummy);
rtems_interrupt_catch(pcmplay_handler, MM_IRQ_AC97DMAR, &dummy);
rtems_interrupt_catch(pcmrecord_handler, MM_IRQ_AC97DMAW, &dummy);
bsp_interrupt_vector_enable(MM_IRQ_AC97CRREQUEST);
bsp_interrupt_vector_enable(MM_IRQ_AC97CRREPLY);
bsp_interrupt_vector_enable(MM_IRQ_AC97DMAR);
bsp_interrupt_vector_enable(MM_IRQ_AC97DMAW);
play_produce = 0;
play_consume = 0;
play_level = 0;
record_produce = 0;
record_consume = 0;
record_level = 0;
return RTEMS_SUCCESSFUL;
}
static rtems_status_code submit_play(struct snd_buffer *buf)
{
bsp_interrupt_vector_disable(MM_IRQ_AC97DMAR);
if (play_level == PLAY_Q_SIZE) {
bsp_interrupt_vector_enable(MM_IRQ_AC97DMAR);
return RTEMS_UNSATISFIED;
}
play_q[play_produce] = buf;
play_produce = (play_produce + 1) & PLAY_Q_MASK;
play_level++;
if (play_level == 1)
play_start(buf);
bsp_interrupt_vector_enable(MM_IRQ_AC97DMAR);
return RTEMS_SUCCESSFUL;
}
static rtems_status_code collect_play(struct snd_buffer **buf)
{
size_t s;
return rtems_message_queue_receive(
play_q_done,
buf,
&s,
RTEMS_WAIT,
RTEMS_NO_TIMEOUT
);
}
static rtems_status_code submit_record(struct snd_buffer *buf)
{
bsp_interrupt_vector_disable(MM_IRQ_AC97DMAW);
if (record_level == RECORD_Q_SIZE) {
bsp_interrupt_vector_enable(MM_IRQ_AC97DMAW);
return RTEMS_UNSATISFIED;
}
record_q[record_produce] = buf;
record_produce = (record_produce + 1) & RECORD_Q_MASK;
record_level++;
if (record_level == 1)
record_start(buf);
bsp_interrupt_vector_enable(MM_IRQ_AC97DMAW);
return RTEMS_SUCCESSFUL;
}
static rtems_status_code collect_record(struct snd_buffer **buf)
{
size_t s;
return rtems_message_queue_receive(
record_q_done,
buf,
&s,
RTEMS_WAIT,
RTEMS_NO_TIMEOUT
);
}
#define CR_TIMEOUT 10
static int read_cr(unsigned int adr)
{
rtems_status_code sc;
MM_WRITE(MM_AC97_CRADDR, adr);
MM_WRITE(MM_AC97_CRCTL, AC97_CRCTL_RQEN);
sc = rtems_semaphore_obtain(cr_write_sem, RTEMS_WAIT, CR_TIMEOUT);
if (sc != RTEMS_SUCCESSFUL)
return -1;
sc = rtems_semaphore_obtain(cr_read_sem, RTEMS_WAIT, CR_TIMEOUT);
if (sc != RTEMS_SUCCESSFUL)
return -1;
return MM_READ(MM_AC97_CRDATAIN);
}
static int write_cr(unsigned int adr, unsigned int val)
{
rtems_status_code sc;
MM_WRITE(MM_AC97_CRADDR, adr);
MM_WRITE(MM_AC97_CRDATAOUT, val);
MM_WRITE(MM_AC97_CRCTL, AC97_CRCTL_RQEN|AC97_CRCTL_WRITE);
sc = rtems_semaphore_obtain(cr_write_sem, RTEMS_WAIT, CR_TIMEOUT);
if (sc != RTEMS_SUCCESSFUL)
return 0;
return 1;
}
rtems_device_driver ac97_open(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
int codec_id;
if (minor == 0) {
/* snd */
return RTEMS_SUCCESSFUL;
} else {
/* mixer */
codec_id = read_cr(0x00);
if ((codec_id != 0x0d50) && (codec_id != 0x6150)) {
printk("AC97 codec detection failed\n");
return RTEMS_UNSATISFIED;
}
write_cr(0x02, 0x0000); /* master volume */
write_cr(0x04, 0x0f0f); /* headphones volume */
write_cr(0x18, 0x0000); /* PCM out volume */
write_cr(0x1c, 0x0f0f); /* record gain */
write_cr(0x1a, 0x0505); /* record select: stereo mix */
return RTEMS_SUCCESSFUL;
}
}
static rtems_status_code ioctl_read_channel(void *buf,
unsigned int chan, int mono)
{
unsigned int *val = (unsigned int *)buf;
int mic_boost;
int codec;
int left, right;
codec = read_cr(chan);
if (codec < 0)
return RTEMS_UNSATISFIED;
if (codec & 0x8000) {
/* muted */
*val = 0;
return RTEMS_SUCCESSFUL;
}
if (mono) {
left = 100-(((codec & 0x1f) + 1)*100)/32;
mic_boost = (codec & (1 << 6)) >> 6;
*val = left | mic_boost << 8;
} else {
right = 100-(((codec & 0x1f) + 1)*100)/32;
left = 100-((((codec & 0x1f00) >> 8) + 1)*100)/32;
*val = left | (right << 8);
}
return RTEMS_SUCCESSFUL;
}
static rtems_status_code ioctl_write_channel(void *buf,
unsigned int chan, int mono)
{
unsigned int *val = (unsigned int *)buf;
int mic_boost;
int left, right;
int codec;
rtems_status_code sc;
left = *val & 0xff;
left = (left*32)/100 - 1;
if (left < 0)
left = 0;
if (mono) {
mic_boost = *val >> 8;
right = 31;
} else {
right = (*val >> 8) & 0xff;
right = (right*32)/100 - 1;
if (right < 0)
right = 0;
}
if ((left == 0) && (right == 0))
/* mute */
codec = 0x8000;
else
codec = (31-left) | ((31-right) << 8);
if (mono) {
if (mic_boost)
codec |= (1 << 6);
else
codec &= ~(1 << 6);
}
if (!write_cr(chan, codec))
sc = RTEMS_UNSATISFIED;
else
sc = RTEMS_SUCCESSFUL;
return sc;
}
rtems_device_driver ac97_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
rtems_libio_ioctl_args_t *args = arg;
rtems_status_code sc;
args->ioctl_return = -1;
if(minor == 0) {
/* dsp */
switch (args->command) {
case SOUND_SND_SUBMIT_PLAY:
return submit_play((struct snd_buffer *)args->buffer);
case SOUND_SND_COLLECT_PLAY:
return collect_play((struct snd_buffer **)args->buffer);
case SOUND_SND_SUBMIT_RECORD:
return submit_record((struct snd_buffer *)args->buffer);
case SOUND_SND_COLLECT_RECORD:
return collect_record((struct snd_buffer **)args->buffer);
default:
return RTEMS_UNSATISFIED;
}
} else {
/* mixer */
switch (args->command) {
case SOUND_MIXER_READ(SOUND_MIXER_MIC):
sc = ioctl_read_channel(args->buffer, 0x0e, 1);
if(sc == RTEMS_SUCCESSFUL)
args->ioctl_return = 0;
return sc;
case SOUND_MIXER_READ(SOUND_MIXER_LINE):
sc = ioctl_read_channel(args->buffer, 0x10, 0);
if(sc == RTEMS_SUCCESSFUL)
args->ioctl_return = 0;
return sc;
case SOUND_MIXER_WRITE(SOUND_MIXER_MIC):
sc = ioctl_write_channel(args->buffer, 0x0e, 1);
if(sc == RTEMS_SUCCESSFUL)
args->ioctl_return = 0;
return sc;
case SOUND_MIXER_WRITE(SOUND_MIXER_LINE):
sc = ioctl_write_channel(args->buffer, 0x10, 0);
if(sc == RTEMS_SUCCESSFUL)
args->ioctl_return = 0;
return sc;
default:
return RTEMS_UNSATISFIED;
}
}
}
bsps/lm32/shared/milkymist_buttons/buttons.c
-130
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@@ -1,130 +0,0 @@
/* buttons.c
*
* Buttons driver for the Milkymist One board
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
* COPYRIGHT (c) 2011 Sebastien Bourdeauducq
*/
#define RTEMS_STATUS_CHECKS_USE_PRINTK
#include <stdlib.h>
#include <stdio.h>
#include <errno.h>
#include <sys/types.h>
#include <rtems.h>
#include <rtems/status-checks.h>
#include <bsp.h>
#include <bsp/irq-generic.h>
#include <rtems/libio.h>
#include "../include/system_conf.h"
#include <bsp/milkymist_buttons.h>
#define DEVICE_NAME "/dev/buttons"
static rtems_id event_q;
static void send_byte(char b)
{
rtems_message_queue_send(event_q, &b, 1);
}
static rtems_isr interrupt_handler(rtems_vector_number n)
{
static unsigned int previous_keys;
unsigned int keys, pushed_keys, released_keys;
keys = MM_READ(MM_GPIO_IN) & (GPIO_BTN1|GPIO_BTN2|GPIO_BTN3);
pushed_keys = keys & ~previous_keys;
released_keys = previous_keys & ~keys;
previous_keys = keys;
if(pushed_keys & GPIO_BTN1)
send_byte('A');
if(pushed_keys & GPIO_BTN2)
send_byte('B');
if(pushed_keys & GPIO_BTN3)
send_byte('C');
if(released_keys & GPIO_BTN1)
send_byte('a');
if(released_keys & GPIO_BTN2)
send_byte('b');
if(released_keys & GPIO_BTN3)
send_byte('c');
lm32_interrupt_ack(1 << MM_IRQ_GPIO);
}
rtems_device_driver buttons_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
rtems_status_code sc;
rtems_isr_entry dummy;
sc = rtems_io_register_name(DEVICE_NAME, major, 0);
RTEMS_CHECK_SC(sc, "create buttons device");
sc = rtems_message_queue_create(
rtems_build_name('B', 'T', 'N', 'Q'),
24,
1,
0,
&event_q
);
RTEMS_CHECK_SC(sc, "create buttons event queue");
rtems_interrupt_catch(interrupt_handler, MM_IRQ_GPIO, &dummy);
bsp_interrupt_vector_enable(MM_IRQ_GPIO);
MM_WRITE(MM_GPIO_INTEN, GPIO_BTN1|GPIO_BTN2|GPIO_BTN3);
return RTEMS_SUCCESSFUL;
}
rtems_device_driver buttons_open(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
uint32_t count;
rtems_message_queue_flush(event_q, &count);
return RTEMS_SUCCESSFUL;
}
rtems_device_driver buttons_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
rtems_libio_rw_args_t *rw_args = (rtems_libio_rw_args_t *)arg;
rtems_status_code sc;
if(rw_args->count < 1) {
rw_args->bytes_moved = 0;
return RTEMS_UNSATISFIED;
}
sc = rtems_message_queue_receive(
event_q,
rw_args->buffer,
(size_t *)&rw_args->bytes_moved,
RTEMS_WAIT,
RTEMS_NO_TIMEOUT
);
if(sc == RTEMS_SUCCESSFUL)
return RTEMS_SUCCESSFUL;
else {
rw_args->bytes_moved = 0;
return RTEMS_UNSATISFIED;
}
}
bsps/lm32/shared/milkymist_clock/ckinit.c
-46
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@@ -1,46 +0,0 @@
/*
* Clock device driver for Lattice Mico32 (lm32).
*/
/*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
* COPYRIGHT (c) Yann Sionneau <yann.sionneau@telecom-sudparis.eu> (GSoC 2010)
* Telecom SudParis
*/
#include <bsp.h>
#include <bsp/irq-generic.h>
#include "../include/system_conf.h"
#include "clock.h"
#include "bspopts.h"
#if ON_SIMULATOR
#define CLOCK_DRIVER_USE_FAST_IDLE 1
#endif
#define Clock_driver_support_at_tick(arg) \
do { \
lm32_interrupt_ack(1 << MM_IRQ_TIMER0); \
} while (0)
#define Clock_driver_support_install_isr(_new ) \
do { \
rtems_isr_entry _old; \
rtems_interrupt_catch(_new, MM_IRQ_TIMER0, &_old); \
} while (0)
static void Clock_driver_support_initialize_hardware(void)
{
MM_WRITE(MM_TIMER0_COMPARE,
(MM_READ(MM_FREQUENCY)/(1000000/rtems_configuration_get_microseconds_per_tick())));
MM_WRITE(MM_TIMER0_COUNTER, 0);
MM_WRITE(MM_TIMER0_CONTROL, TIMER_ENABLE | TIMER_AUTORESTART);
bsp_interrupt_vector_enable(MM_IRQ_TIMER0);
}
#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER
#include "../../../shared/dev/clock/clockimpl.h"
bsps/lm32/shared/milkymist_clock/clock.h
-22
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@@ -1,22 +0,0 @@
/**
* @file
* @ingroup lm32_clock RTEMSBSPsLM32SharedMilkymistOne
* @brief LatticeMico32 Timer (Clock) definitions
*/
/*
* This file contains definitions for LatticeMico32 Timer (Clock)
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
* COPYRIGHT (c) Yann Sionneau <yann.sionneau@telecom-sudparis.eu> (GSoC 2010)
* Telecom SudParis
*/
#ifndef _BSPCLOCK_H
#define _BSPCLOCK_H
#endif /* _BSPCLOCK_H */
bsps/lm32/shared/milkymist_console/console.c
-216
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@@ -1,216 +0,0 @@
/*
* Console driver for Milkymist
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
* COPYRIGHT (c) 2010 Sebastien Bourdeauducq
*/
#include <unistd.h>
#include <termios.h>
#include <rtems.h>
#include <rtems/bspIo.h>
#include <rtems/libio.h>
#include <rtems/console.h>
#include <rtems/termiostypes.h>
#include <bsp/irq-generic.h>
#include "../include/system_conf.h"
#include "uart.h"
BSP_output_char_function_type BSP_output_char = BSP_uart_polled_write;
BSP_polling_getchar_function_type BSP_poll_char = BSP_uart_polled_read;
static struct rtems_termios_tty *tty;
static int mmconsole_first_open(int major, int minor, void *arg)
{
tty = ((rtems_libio_open_close_args_t *) arg)->iop->data1;
return rtems_termios_set_initial_baud(tty, UART_BAUD_RATE);
}
static int mmconsole_last_close(int major, int minor, void *arg)
{
return 0;
}
static int mmconsole_set_attributes(int minor, const struct termios *t)
{
int baud;
switch (t->c_ospeed) {
case B0:
baud = 0;
break;
case B50:
baud = 50;
break;
case B75:
baud = 75;
break;
case B110:
baud = 110;
break;
case B134:
baud = 134;
break;
case B150:
baud = 150;
break;
case B200:
baud = 200;
break;
case B300:
baud = 300;
break;
case B600:
baud = 600;
break;
case B1200:
baud = 1200;
break;
case B1800:
baud = 1800;
break;
case B2400:
baud = 2400;
break;
case B4800:
baud = 4800;
break;
case B9600:
baud = 9600;
break;
case B19200:
baud = 19200;
break;
case B38400:
baud = 38400;
break;
case B57600:
baud = 57600;
break;
case B115200:
baud = 115200;
break;
case B230400:
baud = 230400;
break;
case B460800:
baud = 460800;
break;
default:
baud = -1;
break;
}
if (baud > 0)
MM_WRITE(MM_UART_DIV, MM_READ(MM_FREQUENCY)/baud/16);
return 0;
}
static ssize_t mmconsole_write(int minor, const char *buf, size_t n)
{
if (n > 0) {
MM_WRITE(MM_UART_RXTX, *buf);
}
return 0;
}
static rtems_isr mmconsole_interrupt(rtems_vector_number n)
{
char c;
while (MM_READ(MM_UART_STAT) & UART_STAT_RX_EVT) {
c = MM_READ(MM_UART_RXTX);
MM_WRITE(MM_UART_STAT, UART_STAT_RX_EVT);
rtems_termios_enqueue_raw_characters(tty, &c, 1);
}
if (MM_READ(MM_UART_STAT) & UART_STAT_TX_EVT) {
MM_WRITE(MM_UART_STAT, UART_STAT_TX_EVT);
rtems_termios_dequeue_characters(tty, 1);
}
lm32_interrupt_ack(1 << MM_IRQ_UART);
}
static const rtems_termios_callbacks mmconsole_callbacks = {
.firstOpen = mmconsole_first_open,
.lastClose = mmconsole_last_close,
.pollRead = NULL,
.write = mmconsole_write,
.setAttributes = mmconsole_set_attributes,
.stopRemoteTx = NULL,
.startRemoteTx = NULL,
.outputUsesInterrupts = TERMIOS_IRQ_DRIVEN
};
rtems_device_driver console_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
rtems_status_code status;
rtems_isr_entry dummy;
rtems_termios_initialize();
status = rtems_io_register_name("/dev/console", major, 0);
if (status != RTEMS_SUCCESSFUL)
rtems_fatal_error_occurred(status);
rtems_interrupt_catch(mmconsole_interrupt, MM_IRQ_UART, &dummy);
bsp_interrupt_vector_enable(MM_IRQ_UART);
MM_WRITE(MM_UART_CTRL, UART_CTRL_RX_INT|UART_CTRL_TX_INT);
return RTEMS_SUCCESSFUL;
}
rtems_device_driver console_open(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
return rtems_termios_open(major, minor, arg, &mmconsole_callbacks);
}
rtems_device_driver console_close(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
return rtems_termios_close(arg);
}
rtems_device_driver console_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
return rtems_termios_read(arg);
}
rtems_device_driver console_write(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
return rtems_termios_write(arg);
}
rtems_device_driver console_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
return rtems_termios_ioctl(arg);
}
bsps/lm32/shared/milkymist_console/uart.c
-46
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@@ -1,46 +0,0 @@
/*
* Driver for Milkymist UART
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
* COPYRIGHT (c) 2010 Sebastien Bourdeauducq
* COPYRIGHT (c) Yann Sionneau <yann.sionneau@telecom-sudparis.eu> (GSoC 2010)
* Telecom SudParis
*/
#include <rtems.h>
#include <rtems/libio.h>
#include "../include/system_conf.h"
#include "uart.h"
void BSP_uart_init(int baud)
{
MM_WRITE(MM_UART_DIV, MM_READ(MM_FREQUENCY)/baud/16);
}
void BSP_uart_polled_write(char ch)
{
rtems_interrupt_level level;
rtems_interrupt_disable(level);
while(!(MM_READ(MM_UART_STAT) & UART_STAT_THRE));
MM_WRITE(MM_UART_RXTX, ch);
while(!(MM_READ(MM_UART_STAT) & UART_STAT_THRE));
rtems_interrupt_enable(level);
}
int BSP_uart_polled_read(void)
{
char r;
rtems_interrupt_level level;
rtems_interrupt_disable(level);
while(!(MM_READ(MM_UART_STAT) & UART_STAT_RX_EVT));
r = MM_READ(MM_UART_RXTX);
MM_WRITE(MM_UART_STAT, UART_STAT_RX_EVT);
rtems_interrupt_enable(level);
return r;
}
bsps/lm32/shared/milkymist_console/uart.h
-22
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@@ -1,22 +0,0 @@
/**
* @file
* @ingroup lm32_uart RTEMSBSPsLM32SharedMilkymistOne
* @brief Milkymist UART definitions
*/
/*
* This file contains definitions for the Milkymist UART
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef _BSPUART_H
#define _BSPUART_H
void BSP_uart_init(int baud);
void BSP_uart_polled_write(char ch);
int BSP_uart_polled_read(void);
#endif /* _BSPUART_H */
bsps/lm32/shared/milkymist_dmx/dmx.c
-128
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@@ -1,128 +0,0 @@
/* dmx.c
*
* Milkymist DMX512 driver for RTEMS
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
* COPYRIGHT (c) 2010, 2011 Sebastien Bourdeauducq
*/
#define RTEMS_STATUS_CHECKS_USE_PRINTK
#include <stdlib.h>
#include <sys/types.h>
#include <rtems.h>
#include <rtems/status-checks.h>
#include <bsp.h>
#include <rtems/libio.h>
#include "../include/system_conf.h"
#include <bsp/milkymist_dmx.h>
#define IN_DEVICE_NAME "/dev/dmx_in"
#define OUT_DEVICE_NAME "/dev/dmx_out"
rtems_device_driver dmx_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
rtems_status_code sc;
sc = rtems_io_register_name(IN_DEVICE_NAME, major, 0);
RTEMS_CHECK_SC(sc, "create DMX input device");
sc = rtems_io_register_name(OUT_DEVICE_NAME, major, 1);
RTEMS_CHECK_SC(sc, "create DMX output device");
return RTEMS_SUCCESSFUL;
}
rtems_device_driver dmx_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
rtems_libio_rw_args_t *rw_args = (rtems_libio_rw_args_t *)arg;
int len;
unsigned int i;
unsigned char *values = (unsigned char *)rw_args->buffer;
len = 512 - rw_args->offset;
if (len < 0) {
rw_args->bytes_moved = 0;
return RTEMS_SUCCESSFUL;
}
if (len > rw_args->count)
len = rw_args->count;
if (minor == 0) {
for (i=0;i<len;i++)
values[i] = MM_READ(MM_DMX_RX((unsigned int)rw_args->offset+i));
} else {
for (i=0;i<len;i++)
values[i] = MM_READ(MM_DMX_TX((unsigned int)rw_args->offset+i));
}
rw_args->bytes_moved = len;
return RTEMS_SUCCESSFUL;
}
rtems_device_driver dmx_write(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
rtems_libio_rw_args_t *rw_args = (rtems_libio_rw_args_t *)arg;
int len;
unsigned int i;
unsigned char *values = (unsigned char *)rw_args->buffer;
if (minor == 0) {
rw_args->bytes_moved = 0;
return RTEMS_UNSATISFIED;
}
len = 512 - rw_args->offset;
if (len < 0) {
rw_args->bytes_moved = 0;
return RTEMS_SUCCESSFUL;
}
if (len > rw_args->count)
len = rw_args->count;
for (i=0;i<len;i++)
MM_WRITE(MM_DMX_TX((unsigned int)rw_args->offset+i), values[i]);
rw_args->bytes_moved = len;
return RTEMS_SUCCESSFUL;
}
rtems_device_driver dmx_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
rtems_libio_ioctl_args_t *args = arg;
switch (args->command) {
case DMX_SET_THRU:
args->ioctl_return = 0;
MM_WRITE(MM_DMX_THRU, (unsigned int)args->buffer);
return RTEMS_SUCCESSFUL;
case DMX_GET_THRU:
args->ioctl_return = 0;
*((unsigned int *)args->buffer) = MM_READ(MM_DMX_THRU);
return RTEMS_SUCCESSFUL;
default:
args->ioctl_return = -1;
return RTEMS_UNSATISFIED;
}
}
bsps/lm32/shared/milkymist_flash/flash.c
-193
View File
@@ -1,193 +0,0 @@
/* flash.c
*
* Milkymist flash driver for RTEMS
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*
* COPYRIGHT (c) 2010, 2011 Sebastien Bourdeauducq
*/
#define RTEMS_STATUS_CHECKS_USE_PRINTK
#include <rtems.h>
#include <stdio.h>
#include <bsp.h>
#include <string.h>
#include <rtems/libio.h>
#include <rtems/status-checks.h>
#include "../include/system_conf.h"
#include <bsp/milkymist_flash.h>
static struct flash_partition partitions[FLASH_PARTITION_COUNT]
= FLASH_PARTITIONS;
static rtems_id flash_lock;
rtems_device_driver flash_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
rtems_status_code sc;
int i;
char devname[16];
for (i=0;i<FLASH_PARTITION_COUNT;i++) {
sprintf(devname, "/dev/flash%d", i+1);
sc = rtems_io_register_name(devname, major, i);
RTEMS_CHECK_SC(sc, "Create flash device");
}
sc = rtems_semaphore_create(
rtems_build_name('F', 'L', 'S', 'H'),
1,
RTEMS_SIMPLE_BINARY_SEMAPHORE,
0,
&flash_lock
);
RTEMS_CHECK_SC(sc, "create semaphore");
return RTEMS_SUCCESSFUL;
}
rtems_device_driver flash_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
rtems_libio_rw_args_t *rw_args = (rtems_libio_rw_args_t *)arg;
void *startaddr;
int len;
if (minor >= FLASH_PARTITION_COUNT)
return RTEMS_UNSATISFIED;
startaddr = (void *)(partitions[minor].start_address
+ (unsigned int)rw_args->offset);
len = partitions[minor].length - rw_args->offset;
if (len > rw_args->count)
len = rw_args->count;
if (len <= 0) {
rw_args->bytes_moved = 0;
return RTEMS_SUCCESSFUL;
}
rtems_semaphore_obtain(flash_lock, RTEMS_WAIT, RTEMS_NO_TIMEOUT);
memcpy(rw_args->buffer, startaddr, len);
rtems_semaphore_release(flash_lock);
rw_args->bytes_moved = len;
return RTEMS_SUCCESSFUL;
}
rtems_device_driver flash_write(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
rtems_libio_rw_args_t *rw_args = (rtems_libio_rw_args_t *)arg;
volatile unsigned short *startaddr;
unsigned short *srcdata;
int len;
int this_time;
int remaining;
int i;
if (minor >= FLASH_PARTITION_COUNT)
return RTEMS_UNSATISFIED;
startaddr = (unsigned short *)(partitions[minor].start_address
+ (unsigned int)rw_args->offset);
len = partitions[minor].length - rw_args->offset;
if (len > rw_args->count)
len = rw_args->count;
if (len <= 2) {
rw_args->bytes_moved = 0;
return RTEMS_SUCCESSFUL;
}
len /= 2;
srcdata = (unsigned short *)rw_args->buffer;
remaining = len;
rtems_semaphore_obtain(flash_lock, RTEMS_WAIT, RTEMS_NO_TIMEOUT);
while (remaining > 0) {
this_time = remaining;
if (this_time > 256)
this_time = 256;
/* Issue "Buffered Programming Setup" command
* and wait for buffer available.
*/
do {
*startaddr = 0x00e8;
} while (!(*startaddr & 0x0080));
/* Load word count */
*startaddr = this_time-1;
/* Fill buffer */
for(i=0;i<this_time;i++)
startaddr[i] = srcdata[i];
/* Issue "Buffer Programming Confirm" command */
*startaddr = 0x00d0;
while (!(*startaddr & 0x0080)); /* read status register, wait for ready */
*startaddr = 0x0050; /* clear status register */
/* update state */
startaddr += this_time;
srcdata += this_time;
remaining -= this_time;
}
*startaddr = 0x00ff; /* back to read array mode */
rtems_semaphore_release(flash_lock);
rw_args->bytes_moved = 2*len;
return RTEMS_SUCCESSFUL;
}
rtems_device_driver flash_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
rtems_libio_ioctl_args_t *args = arg;
unsigned int eraseaddr_i;
volatile unsigned short *eraseaddr;
if (minor >= FLASH_PARTITION_COUNT) {
args->ioctl_return = -1;
return RTEMS_UNSATISFIED;
}
switch (args->command) {
case FLASH_GET_SIZE:
*((unsigned int *)args->buffer) = partitions[minor].length;
break;
case FLASH_GET_BLOCKSIZE:
*((unsigned int *)args->buffer) = 128*1024;
break;
case FLASH_ERASE_BLOCK:
eraseaddr_i = (unsigned int)args->buffer;
if (eraseaddr_i >= partitions[minor].length) {
args->ioctl_return = -1;
return RTEMS_UNSATISFIED;
}
eraseaddr_i = eraseaddr_i + partitions[minor].start_address;
eraseaddr = (unsigned short *)eraseaddr_i;
rtems_semaphore_obtain(flash_lock, RTEMS_WAIT, RTEMS_NO_TIMEOUT);
*eraseaddr = 0x0020; /* erase */
*eraseaddr = 0x00d0;
while(!(*eraseaddr & 0x0080)); /* read status register, wait for ready */
*eraseaddr = 0x0050; /* clear status register */
*eraseaddr = 0x00ff; /* back to read array mode */
rtems_semaphore_release(flash_lock);
break;
default:
args->ioctl_return = -1;
return RTEMS_UNSATISFIED;
}
args->ioctl_return = 0;
return RTEMS_SUCCESSFUL;
}

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