mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
synced 2026-09-22 13:15:54 +08:00
Merged PowerPC port as submitted by Andy Bray of I-CUBED, Ltd
(andy@i-cubed.demon.co.uk). This initial submission is known to work on the IBM 403. It is thought to work on the Motorola 601, 603, and 604 although this remains to be tested. Another user -- Doug Currie (e@flavors.com) -- is interested in this work and will be testing it on the 604 using the Metrowerks C compiler and a different format assembly language.
This commit is contained in:
Joel Sherrill
@@ -47,6 +47,13 @@ The following persons/organizations have made contributions:
|
||||
+ Bryce Cogswell (cogswell@cs.uoregon.edu) submitted the support for MS-DOS
|
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as a development environment as well as djgpp/go32 as a target environment.
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+ Andy Bray (andy@i-cubed.demon.co.uk) of I-CUBED Ltd. in Cambridge U.K.
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for porting RTEMS to the PowerPC. This effort included support for the
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IBM 403 as well as the Motorola 601, 603, and 604 variants. A special
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thanks to Dom Latter (dom@i-cubed.demon.co.uk) for being an RTEMS
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||||
evangelist and promoting the use of RTEMS both at I-CUBED Ltd. as well
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as within the Internet community as a whole.
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Finally, the RTEMS project would like to thank those who have contributed
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to the other free software efforts which RTEMS utilizes. The primary RTEMS
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development environment is from the Free Software Foundation (the GNU
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||||
@@ -0,0 +1,77 @@
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There are various issues regarding this port:
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||||
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||||
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1) Legal
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This port is written by Andrew Bray <andy@i-cubed.demon.co.uk>, and
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is copyright 1995 i-cubed ltd.
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Due to the current lack of a formal release note, this is a limited
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release to OAR, and other specific parties designated by OAR who
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are involved in porting RTEMS to the PowerPC architecture.
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This set of release files SHOULD (IMHO) include a cpu specific
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alignment exception handler. Ours is derived from IBM sample
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code. I am seeking a release from IBM for this file. In the
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mean time this file is excluded (but still included in the Makefile
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||||
as a place-holder).
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2) CPU support.
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||||
This release fully supports the IBM PPC403GA and PPC403GB processors.
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||||
It has only been tested on the PPC403GA (using software floating
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point).
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||||
With the gratefully acknowledged assistance of IBM and Blue Micro,
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this release contains code to support the following processors
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PPC601, PPC603, PPC603e, PPC604, and PPC602.
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||||
|
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The support for these processors is incomplete, especially that for
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||||
the PPC602 for which only sketchy data is currently available.
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||||
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||||
|
||||
|
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3) Application Binary INterface
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||||
In the context of RTEMS, the ABI is of interest for the following
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aspects:
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a) Register usage. Which registers are used to provide static variable
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linkage, stack pointer etc.
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b) Function calling convention. How parameters are passed, how function
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variables should be invoked, how values are returned, etc.
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c) Stack frame layout.
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I am aware of a number of ABIs for the PowerPC:
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a) The PowerOpen ABI. This is the original Power ABI used on the RS/6000.
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This is the only ABI supported by versions of GCC before 2.7.0.
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b) The SVR4 ABI. This is the ABI defined by SunSoft for the Solaris port
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to the PowerPC.
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c) The Embedded ABI. This is an embedded ABI for PowerPC use, which has no
|
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operating system interface defined. It is promoted by SunSoft, Motorola,
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and Cygnus Support. Cygnus are porting the GNU toolchain to this ABI.
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d) GCC 2.7.0. This compiler is partway along the road to supporting the EABI,
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but is currently halfway in between.
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This port was built and tested using the PowerOpen ABI, with the following
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caveat: we used an ELF assembler and linker. So some attention may be required
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on the assembler files to get them through a traditional (XCOFF) PowerOpen
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assembler.
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This port contains support for the other ABIs, but this may prove to be incoplete
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as it is untested.
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In the long term, the RTEMS PowerPC port should move to the EABI as its primary
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or only port. This should wait on a true EABI version of GCC.
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Andrew Bray 18/8/1995
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@@ -0,0 +1,3 @@
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Todo list:
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Maybe decode external interrupts like the HPPA does.
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@@ -0,0 +1,233 @@
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/*
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* PowerPC CPU Dependent Source
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*
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* Author: Andrew Bray <andy@i-cubed.demon.co.uk>
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*
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* COPYRIGHT (c) 1995 by i-cubed ltd.
|
||||
*
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||||
* To anyone who acknowledges that this file is provided "AS IS"
|
||||
* without any express or implied warranty:
|
||||
* permission to use, copy, modify, and distribute this file
|
||||
* for any purpose is hereby granted without fee, provided that
|
||||
* the above copyright notice and this notice appears in all
|
||||
* copies, and that the name of i-cubed limited not be used in
|
||||
* advertising or publicity pertaining to distribution of the
|
||||
* software without specific, written prior permission.
|
||||
* i-cubed limited makes no representations about the suitability
|
||||
* of this software for any purpose.
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||||
*
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||||
* Derived from c/src/exec/cpu/no_cpu/cpu.c:
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*
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* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
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* On-Line Applications Research Corporation (OAR).
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* All rights assigned to U.S. Government, 1994.
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||||
*
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||||
* This material may be reproduced by or for the U.S. Government pursuant
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
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||||
* notice must appear in all copies of this file and its derivatives.
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*
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*/
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#include <rtems/system.h>
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#include <rtems/fatal.h>
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#include <rtems/isr.h>
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#include <rtems/context.h>
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#include <rtems/thread.h>
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#include <rtems/wkspace.h>
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/*
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* These are for testing purposes.
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*/
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#define Testing
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#ifdef Testing
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static unsigned32 msr;
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#ifdef ppc403
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static unsigned32 evpr;
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static unsigned32 exier;
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#endif
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#endif
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/*
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* ppc_interrupt_level_to_msr
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*
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* This routine converts a two bit interrupt level to an MSR bit map.
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*/
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const unsigned32 _CPU_msrs[4] =
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{ PPC_MSR_0, PPC_MSR_1, PPC_MSR_2, PPC_MSR_3 };
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/* _CPU_Initialize
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*
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* This routine performs processor dependent initialization.
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||||
*
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* INPUT PARAMETERS:
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* cpu_table - CPU table to initialize
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* thread_dispatch - address of disptaching routine
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*/
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static void ppc_spurious(int, CPU_Interrupt_frame *);
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void _CPU_Initialize(
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rtems_cpu_table *cpu_table,
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void (*thread_dispatch) /* ignored on this CPU */
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||||
)
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{
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proc_ptr handler = (proc_ptr)ppc_spurious;
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int i;
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#if (PPC_ABI != PPC_ABI_POWEROPEN)
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register unsigned32 r2;
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#if (PPC_ABI != PPC_ABI_GCC27)
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register unsigned32 r13;
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asm ("mr %0,13" : "=r" ((r13)) : "0" ((r13)));
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_CPU_IRQ_info.Default_r13 = r13;
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#endif
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asm ("mr %0,2" : "=r" ((r2)) : "0" ((r2)));
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_CPU_IRQ_info.Default_r2 = r2;
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#endif
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_CPU_IRQ_info.Nest_level = &_ISR_Nest_level;
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_CPU_IRQ_info.Disable_level = &_Thread_Dispatch_disable_level;
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_CPU_IRQ_info.Vector_table = _ISR_Vector_table;
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#if (PPC_ABI == PPC_ABI_POWEROPEN)
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_CPU_IRQ_info.Dispatch_r2 = ((unsigned32 *)_Thread_Dispatch)[1];
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#endif
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_CPU_IRQ_info.Switch_necessary = &_Context_Switch_necessary;
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_CPU_IRQ_info.Signal = &_ISR_Signals_to_thread_executing;
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i = (int)&_CPU_IRQ_info;
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asm volatile("mtsprg3 %0" : "=r" (i) : "0" (i));
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i = PPC_MSR_INITIAL & ~PPC_MSR_DISABLE_MASK;
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asm volatile("mtsprg2 %0" : "=r" (i) : "0" (i));
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#ifdef Testing
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{
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unsigned32 tmp;
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asm volatile ("mfmsr %0" : "=r" (tmp));
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msr = tmp;
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#ifdef ppc403
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asm volatile ("mfevpr %0" : "=r" (tmp));
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evpr = tmp;
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asm volatile ("mfexier %0" : "=r" (tmp));
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exier = tmp;
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asm volatile ("mtevpr %0" :: "r" (0));
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#endif
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}
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#endif
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|
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if ( cpu_table == NULL )
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rtems_fatal_error_occurred( RTEMS_NOT_CONFIGURED );
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|
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if ( cpu_table->spurious_handler )
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handler = (proc_ptr)cpu_table->spurious_handler;
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|
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for (i = 0; i < PPC_INTERRUPT_MAX; i++)
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_ISR_Vector_table[i] = handler;
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_CPU_Table = *cpu_table;
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||||
}
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|
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/* _CPU_ISR_install_vector
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||||
*
|
||||
* This kernel routine installs the RTEMS handler for the
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||||
* specified vector.
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||||
*
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||||
* Input parameters:
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||||
* vector - interrupt vector number
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||||
* old_handler - former ISR for this vector number
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* new_handler - replacement ISR for this vector number
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*
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* Output parameters: NONE
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*
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*/
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void _CPU_ISR_install_vector(
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unsigned32 vector,
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proc_ptr new_handler,
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||||
proc_ptr *old_handler
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||||
)
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||||
{
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*old_handler = _ISR_Vector_table[ vector ];
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||||
|
||||
/*
|
||||
* If the interrupt vector table is a table of pointer to isr entry
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||||
* points, then we need to install the appropriate RTEMS interrupt
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||||
* handler for this vector number.
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||||
*/
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|
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/*
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* We put the actual user ISR address in '_ISR_vector_table'. This will
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* be used by the _ISR_Handler so the user gets control.
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*/
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_ISR_Vector_table[ vector ] = new_handler ? (rtems_isr_entry)new_handler :
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_CPU_Table.spurious_handler ? (rtems_isr_entry)_CPU_Table.spurious_handler :
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(rtems_isr_entry)ppc_spurious;
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}
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|
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/*PAGE
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*
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* _CPU_Install_interrupt_stack
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||||
*/
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void _CPU_Install_interrupt_stack( void )
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||||
{
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||||
#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
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_CPU_IRQ_info.Stack = _CPU_Interrupt_stack_high - 56;
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#else
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_CPU_IRQ_info.Stack = _CPU_Interrupt_stack_high - 8;
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#endif
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||||
}
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/* Handle a spurious interrupt */
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static void ppc_spurious(int v, CPU_Interrupt_frame *i)
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{
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#if 0
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printf("Spurious interrupt on vector %d from %08.8x\n",
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v, i->pc);
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#endif
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#ifdef ppc403
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if (v == PPC_IRQ_EXTERNAL)
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||||
{
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register int r = 0;
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||||
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asm volatile("mtexier %0" : "=r" ((r)) : "0" ((r)));
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||||
}
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||||
else if (v == PPC_IRQ_PIT)
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||||
{
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||||
register int r = 0x08000000;
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|
||||
asm volatile("mttsr %0" : "=r" ((r)) : "0" ((r)));
|
||||
}
|
||||
else if (v == PPC_IRQ_FIT)
|
||||
{
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||||
register int r = 0x04000000;
|
||||
|
||||
asm volatile("mttsr %0" : "=r" ((r)) : "0" ((r)));
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void _CPU_Fatal_error(unsigned32 _error)
|
||||
{
|
||||
#ifdef Testing
|
||||
unsigned32 tmp;
|
||||
|
||||
tmp = msr;
|
||||
asm volatile ("mtmsr %0" :: "r" (tmp));
|
||||
#ifdef ppc403
|
||||
tmp = evpr;
|
||||
asm volatile ("mtevpr %0" :: "r" (tmp));
|
||||
tmp = exier;
|
||||
asm volatile ("mtexier %0" :: "r" (tmp));
|
||||
#endif
|
||||
#endif
|
||||
asm volatile ("mr 3, %0" : : "r" ((_error)));
|
||||
asm volatile ("tweq 5,5");
|
||||
asm volatile ("li 0,0; mtmsr 0");
|
||||
while (1) ;
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,215 @@
|
||||
/* irq_stub.s 1.0 - 95/08/08
|
||||
*
|
||||
* This file contains the interrupt handler assembly code for the PowerPC
|
||||
* implementation of RTEMS. It is #included from cpu_asm.s.
|
||||
*
|
||||
* Author: Andrew Bray <andy@i-cubed.demon.co.uk>
|
||||
*
|
||||
* COPYRIGHT (c) 1995 by i-cubed ltd.
|
||||
*
|
||||
* To anyone who acknowledges that this file is provided "AS IS"
|
||||
* without any express or implied warranty:
|
||||
* permission to use, copy, modify, and distribute this file
|
||||
* for any purpose is hereby granted without fee, provided that
|
||||
* the above copyright notice and this notice appears in all
|
||||
* copies, and that the name of i-cubed limited not be used in
|
||||
* advertising or publicity pertaining to distribution of the
|
||||
* software without specific, written prior permission.
|
||||
* i-cubed limited makes no representations about the suitability
|
||||
* of this software for any purpose.
|
||||
*/
|
||||
|
||||
/* void __ISR_Handler()
|
||||
*
|
||||
* This routine provides the RTEMS interrupt management.
|
||||
* The vector number is in r0. R0 has already been stacked.
|
||||
*
|
||||
*/
|
||||
/* Finish off the interrupt frame */
|
||||
stw r2, IP_2(r1)
|
||||
stw r3, IP_3(r1)
|
||||
stw r4, IP_4(r1)
|
||||
stw r5, IP_5(r1)
|
||||
stw r6, IP_6(r1)
|
||||
stw r7, IP_7(r1)
|
||||
stw r8, IP_8(r1)
|
||||
stw r9, IP_9(r1)
|
||||
stw r10, IP_10(r1)
|
||||
stw r11, IP_11(r1)
|
||||
stw r12, IP_12(r1)
|
||||
stw r13, IP_13(r1)
|
||||
stmw r28, IP_28(r1)
|
||||
mfcr r5
|
||||
mfctr r6
|
||||
mfxer r7
|
||||
mflr r8
|
||||
mfsrr0 r9
|
||||
mfsrr1 r10
|
||||
/* Establish addressing */
|
||||
mfsprg3 r11
|
||||
dcbt r0, r11
|
||||
stw r5, IP_CR(r1)
|
||||
stw r6, IP_CTR(r1)
|
||||
stw r7, IP_XER(r1)
|
||||
stw r8, IP_LR(r1)
|
||||
stw r9, IP_PC(r1)
|
||||
stw r10, IP_MSR(r1)
|
||||
|
||||
lwz r30, Vector_table(r11)
|
||||
slwi r4,r0,2
|
||||
lwz r28, Nest_level(r11)
|
||||
add r4, r4, r30
|
||||
|
||||
lwz r30, 0(r28)
|
||||
mr r3, r0
|
||||
lwz r31, Stack(r11)
|
||||
/*
|
||||
* #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
|
||||
* if ( _ISR_Nest_level == 0 )
|
||||
* switch to software interrupt stack
|
||||
* #endif
|
||||
*/
|
||||
/* Switch stacks, here we must prevent ALL interrupts */
|
||||
cmpwi r30, 0
|
||||
lwz r29, Disable_level(r11)
|
||||
subf r31,r1,r31
|
||||
bne LABEL (nested)
|
||||
stwux r1,r1,r31
|
||||
LABEL (nested):
|
||||
/*
|
||||
* _ISR_Nest_level++;
|
||||
*/
|
||||
lwz r31, 0(r29)
|
||||
addi r30,r30,1
|
||||
stw r30,0(r28)
|
||||
/* From here on out, interrupts can be re-enabled. RTEMS
|
||||
* convention says not.
|
||||
*/
|
||||
lwz r4,0(r4)
|
||||
/*
|
||||
* _Thread_Dispatch_disable_level++;
|
||||
*/
|
||||
addi r31,r31,1
|
||||
stw r31, 0(r29)
|
||||
/*
|
||||
* (*_ISR_Vector_table[ vector ])( vector );
|
||||
*/
|
||||
#if (PPC_ABI == PPC_ABI_POWEROPEN)
|
||||
lwz r6,0(r4)
|
||||
lwz r2,4(r4)
|
||||
mtlr r6
|
||||
lwz r11,8(r4)
|
||||
#endif
|
||||
#if (PPC_ABI == PPC_ABI_GCC27)
|
||||
lwz r2, Default_r2(r11)
|
||||
mtlr r4
|
||||
lwz r2, 0(r2)
|
||||
#endif
|
||||
#if (PPC_ABI == PPC_ABI_SVR4 || PPC_ABI == PPC_ABI_EABI)
|
||||
mtlr r4
|
||||
lwz r2, Default_r2(r11)
|
||||
lwz r13, Default_r13(r11)
|
||||
lwz r2, 0(r2)
|
||||
lwz r13, 0(r13)
|
||||
#endif
|
||||
mr r4,r1
|
||||
blrl
|
||||
/* NOP marker for debuggers */
|
||||
or r6,r6,r6
|
||||
|
||||
/* We must re-disable the interrupts */
|
||||
mfsprg3 r11
|
||||
mfsprg2 r0
|
||||
mtmsr r0
|
||||
|
||||
/*
|
||||
* if (--Thread_Dispatch_disable,--_ISR_Nest_level)
|
||||
* goto easy_exit;
|
||||
*/
|
||||
addi r30, r30, -1
|
||||
cmpwi r30, 0
|
||||
addi r31, r31, -1
|
||||
stw r30, 0(r28)
|
||||
stw r31, 0(r29)
|
||||
bne LABEL (easy_exit)
|
||||
|
||||
lwz r30, Switch_necessary(r11)
|
||||
|
||||
/*
|
||||
* #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
|
||||
* restore stack
|
||||
* #endif
|
||||
*/
|
||||
lwz r1,0(r1)
|
||||
lwz r30, 0(r30)
|
||||
lwz r31, Signal(r11)
|
||||
|
||||
/*
|
||||
* if ( _Context_Switch_necessary )
|
||||
* goto switch
|
||||
*/
|
||||
cmpwi r30, 0
|
||||
lwz r28, 0(r31)
|
||||
bne LABEL (switch)
|
||||
/*
|
||||
* if ( !_ISR_Signals_to_thread_executing )
|
||||
* goto easy_exit
|
||||
* _ISR_Signals_to_thread_executing = 0;
|
||||
*/
|
||||
cmpwi r28, 0
|
||||
li r6,0
|
||||
beq LABEL (easy_exit)
|
||||
stw r6, 0(r31)
|
||||
|
||||
/*
|
||||
* switch:
|
||||
* call _Thread_Dispatch() or prepare to return to _ISR_Dispatch
|
||||
*/
|
||||
LABEL (switch):
|
||||
#if (PPC_ABI == PPC_ABI_POWEROPEN)
|
||||
lwz r2, Dispatch_r2(r11)
|
||||
#else
|
||||
/* R2 and R13 still hold their values from the last call */
|
||||
#endif
|
||||
bl PROC (_Thread_Dispatch)
|
||||
/* NOP marker for debuggers */
|
||||
or r6,r6,r6
|
||||
/*
|
||||
* prepare to get out of interrupt
|
||||
*/
|
||||
/* Re-disable IRQs */
|
||||
mfsprg2 r0
|
||||
mtmsr r0
|
||||
/*
|
||||
* easy_exit:
|
||||
* prepare to get out of interrupt
|
||||
* return from interrupt
|
||||
*/
|
||||
LABEL (easy_exit):
|
||||
lwz r5, IP_CR(r1)
|
||||
lwz r6, IP_CTR(r1)
|
||||
lwz r7, IP_XER(r1)
|
||||
lwz r8, IP_LR(r1)
|
||||
lwz r9, IP_PC(r1)
|
||||
lwz r10, IP_MSR(r1)
|
||||
mtcrf 255,r5
|
||||
mtctr r6
|
||||
mtxer r7
|
||||
mtlr r8
|
||||
mtsrr0 r9
|
||||
mtsrr1 r10
|
||||
lwz r0, IP_0(r1)
|
||||
lwz r2, IP_2(r1)
|
||||
lwz r3, IP_3(r1)
|
||||
lwz r4, IP_4(r1)
|
||||
lwz r5, IP_5(r1)
|
||||
lwz r6, IP_6(r1)
|
||||
lwz r7, IP_7(r1)
|
||||
lwz r8, IP_8(r1)
|
||||
lwz r9, IP_9(r1)
|
||||
lwz r10, IP_10(r1)
|
||||
lwz r11, IP_11(r1)
|
||||
lwz r12, IP_12(r1)
|
||||
lwz r13, IP_13(r1)
|
||||
lmw r28, IP_28(r1)
|
||||
lwz r1, 0(r1)
|
||||
@@ -0,0 +1,317 @@
|
||||
/* ppc.h
|
||||
*
|
||||
* This file contains definitions for the IBM/Motorola PowerPC
|
||||
* family members.
|
||||
*
|
||||
* Author: Andrew Bray <andy@i-cubed.demon.co.uk>
|
||||
*
|
||||
* COPYRIGHT (c) 1995 by i-cubed ltd.
|
||||
*
|
||||
* To anyone who acknowledges that this file is provided "AS IS"
|
||||
* without any express or implied warranty:
|
||||
* permission to use, copy, modify, and distribute this file
|
||||
* for any purpose is hereby granted without fee, provided that
|
||||
* the above copyright notice and this notice appears in all
|
||||
* copies, and that the name of i-cubed limited not be used in
|
||||
* advertising or publicity pertaining to distribution of the
|
||||
* software without specific, written prior permission.
|
||||
* i-cubed limited makes no representations about the suitability
|
||||
* of this software for any purpose.
|
||||
*
|
||||
* Derived from c/src/exec/cpu/no_cpu/no_cpu.h:
|
||||
*
|
||||
* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* This material may be reproduced by or for the U.S. Government pursuant
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
*
|
||||
* Note:
|
||||
* This file is included by both C and assembler code ( -DASM )
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _INCLUDE_PPC_h
|
||||
#define _INCLUDE_PPC_h
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The following define the CPU Family and Model within the family
|
||||
*
|
||||
* NOTE: The string "REPLACE_THIS_WITH_THE_CPU_MODEL" is replaced
|
||||
* with the name of the appropriate macro for this target CPU.
|
||||
*/
|
||||
|
||||
#ifdef ppc
|
||||
#undef ppc
|
||||
#endif
|
||||
#define ppc
|
||||
|
||||
#ifdef REPLACE_THIS_WITH_THE_CPU_MODEL
|
||||
#undef REPLACE_THIS_WITH_THE_CPU_MODEL
|
||||
#endif
|
||||
#define REPLACE_THIS_WITH_THE_CPU_MODEL
|
||||
|
||||
#ifdef REPLACE_THIS_WITH_THE_BSP
|
||||
#undef REPLACE_THIS_WITH_THE_BSP
|
||||
#endif
|
||||
#define REPLACE_THIS_WITH_THE_BSP
|
||||
|
||||
/*
|
||||
* This file contains the information required to build
|
||||
* RTEMS for a particular member of the "no cpu"
|
||||
* family when executing in protected mode. It does
|
||||
* this by setting variables to indicate which implementation
|
||||
* dependent features are present in a particular member
|
||||
* of the family.
|
||||
*/
|
||||
|
||||
#if defined(ppc403)
|
||||
|
||||
#define RTEMS_MODEL_NAME "PowerPC 403"
|
||||
|
||||
#define PPC_ALIGNMENT 4
|
||||
#define PPC_CACHE_ALIGNMENT 16
|
||||
#define PPC_CACHE_ALIGN_POWER 4
|
||||
#define PPC_INTERRUPT_MAX 16
|
||||
#define PPC_HAS_FPU 0
|
||||
#define PPC_HAS_DOUBLE 0
|
||||
#define PPC_HAS_RFCI 1
|
||||
#define PPC_MSR_DISABLE_MASK 0x00029200
|
||||
#define PPC_MSR_INITIAL 0x00000000
|
||||
#define PPC_INIT_FPSCR 0x00000000
|
||||
#define PPC_USE_MULTIPLE 1
|
||||
#define PPC_I_CACHE 2048
|
||||
#define PPC_D_CACHE 1024
|
||||
|
||||
#define PPC_MSR_0 0x00029200
|
||||
#define PPC_MSR_1 0x00021200
|
||||
#define PPC_MSR_2 0x00001000
|
||||
#define PPC_MSR_3 0x00000000
|
||||
|
||||
#elif defined(ppc601)
|
||||
|
||||
#define RTEMS_MODEL_NAME "PowerPC 601"
|
||||
|
||||
#define PPC_ALIGNMENT 8
|
||||
#define PPC_CACHE_ALIGNMENT 32
|
||||
#define PPC_CACHE_ALIGN_POWER 5
|
||||
#define PPC_INTERRUPT_MAX 16
|
||||
#define PPC_HAS_FPU 1
|
||||
#define PPC_HAS_DOUBLE 1
|
||||
#define PPC_HAS_RFCI 0
|
||||
#define PPC_MSR_DISABLE_MASK 0x00009900
|
||||
#define PPC_MSR_INITIAL 0x00002000
|
||||
#define PPC_INIT_FPSCR 0x000000f8
|
||||
#define PPC_USE_MULTIPLE 1
|
||||
#define PPC_I_CACHE 0
|
||||
#define PPC_D_CACHE 32768
|
||||
|
||||
#define PPC_MSR_0 0x00009900
|
||||
#define PPC_MSR_1 0x00001000
|
||||
#define PPC_MSR_2 0x00001000
|
||||
#define PPC_MSR_3 0x00000000
|
||||
|
||||
#elif defined(ppc602)
|
||||
|
||||
#define RTEMS_MODEL_NAME "PowerPC 602"
|
||||
|
||||
#define PPC_ALIGNMENT 4
|
||||
#define PPC_CACHE_ALIGNMENT 32
|
||||
#define PPC_CACHE_ALIGN_POWER 5
|
||||
#define PPC_INTERRUPT_MAX 16
|
||||
#define PPC_HAS_FPU 1
|
||||
#define PPC_HAS_DOUBLE 0
|
||||
#define PPC_HAS_RFCI 0
|
||||
#define PPC_MSR_DISABLE_MASK
|
||||
#define PPC_MSR_INITIAL
|
||||
#define PPC_INIT_FPSCR
|
||||
#define PPC_USE_MULTIPLE 0
|
||||
#define PPC_I_CACHE 4096
|
||||
#define PPC_D_CACHE 4096
|
||||
|
||||
#elif defined(ppc603)
|
||||
|
||||
#define RTEMS_MODEL_NAME "PowerPC 603"
|
||||
|
||||
#define PPC_ALIGNMENT 8
|
||||
#define PPC_CACHE_ALIGNMENT 32
|
||||
#define PPC_CACHE_ALIGN_POWER 5
|
||||
#define PPC_INTERRUPT_MAX 16
|
||||
#define PPC_HAS_FPU 1
|
||||
#define PPC_HAS_DOUBLE 1
|
||||
#define PPC_HAS_RFCI 0
|
||||
#define PPC_MSR_DISABLE_MASK 0x00009900
|
||||
#define PPC_MSR_INITIAL 0x00002000
|
||||
#define PPC_INIT_FPSCR 0x000000f8
|
||||
#define PPC_USE_MULTIPLE 0
|
||||
#define PPC_I_CACHE 8192
|
||||
#define PPC_D_CACHE 8192
|
||||
|
||||
#define PPC_MSR_0 0x00009900
|
||||
#define PPC_MSR_1 0x00001000
|
||||
#define PPC_MSR_2 0x00001000
|
||||
#define PPC_MSR_3 0x00000000
|
||||
|
||||
#elif defined(ppc603e)
|
||||
|
||||
#define RTEMS_MODEL_NAME "PowerPC 603e"
|
||||
|
||||
#define PPC_ALIGNMENT 8
|
||||
#define PPC_CACHE_ALIGNMENT 32
|
||||
#define PPC_CACHE_ALIGN_POWER 5
|
||||
#define PPC_INTERRUPT_MAX 16
|
||||
#define PPC_HAS_FPU 1
|
||||
#define PPC_HAS_DOUBLE 1
|
||||
#define PPC_HAS_RFCI 0
|
||||
#define PPC_MSR_DISABLE_MASK 0x00009900
|
||||
#define PPC_MSR_INITIAL 0x00002000
|
||||
#define PPC_INIT_FPSCR 0x000000f8
|
||||
#define PPC_USE_MULTIPLE 0
|
||||
#define PPC_I_CACHE 16384
|
||||
#define PPC_D_CACHE 16384
|
||||
|
||||
#define PPC_MSR_0 0x00009900
|
||||
#define PPC_MSR_1 0x00001000
|
||||
#define PPC_MSR_2 0x00001000
|
||||
#define PPC_MSR_3 0x00000000
|
||||
|
||||
#elif defined(ppc604)
|
||||
|
||||
#define RTEMS_MODEL_NAME "PowerPC 604"
|
||||
|
||||
#define PPC_ALIGNMENT 8
|
||||
#define PPC_CACHE_ALIGNMENT 32
|
||||
#define PPC_CACHE_ALIGN_POWER 5
|
||||
#define PPC_INTERRUPT_MAX 16
|
||||
#define PPC_HAS_FPU 1
|
||||
#define PPC_HAS_DOUBLE 1
|
||||
#define PPC_HAS_RFCI 0
|
||||
#define PPC_MSR_DISABLE_MASK 0x00009900
|
||||
#define PPC_MSR_INITIAL 0x00002000
|
||||
#define PPC_INIT_FPSCR 0x000000f8
|
||||
#define PPC_USE_MULTIPLE 0
|
||||
#define PPC_I_CACHE 16384
|
||||
#define PPC_D_CACHE 16384
|
||||
|
||||
#define PPC_MSR_0 0x00009900
|
||||
#define PPC_MSR_1 0x00001000
|
||||
#define PPC_MSR_2 0x00001000
|
||||
#define PPC_MSR_3 0x00000000
|
||||
|
||||
#else
|
||||
|
||||
#error "Unsupported CPU Model"
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Application binary interfaces.
|
||||
* PPC_ABI MUST be defined as one of these.
|
||||
* Only PPC_ABI_POWEROPEN is currently fully supported.
|
||||
* Only EABI will be supported in the end when
|
||||
* the tools are there.
|
||||
* Only big endian is currently supported.
|
||||
*/
|
||||
/*
|
||||
* PowerOpen ABI. This is Andy's hack of the
|
||||
* PowerOpen ABI to ELF. ELF rather than a
|
||||
* XCOFF assembler is used. This may work
|
||||
* if PPC_ASM == PPC_ASM_XCOFF is defined.
|
||||
*/
|
||||
#define PPC_ABI_POWEROPEN 0
|
||||
/*
|
||||
* GCC 2.7.0 munched version of EABI, with
|
||||
* PowerOpen calling convention and stack frames,
|
||||
* but EABI style indirect function calls.
|
||||
*/
|
||||
#define PPC_ABI_GCC27 1
|
||||
/*
|
||||
* SVR4 ABI
|
||||
*/
|
||||
#define PPC_ABI_SVR4 2
|
||||
/*
|
||||
* Embedded ABI
|
||||
*/
|
||||
#define PPC_ABI_EABI 3
|
||||
|
||||
#if (PPC_ABI == PPC_ABI_POWEROPEN)
|
||||
#define PPC_STACK_ALIGNMENT 8
|
||||
#elif (PPC_ABI == PPC_ABI_GCC27)
|
||||
#define PPC_STACK_ALIGNMENT 8
|
||||
#elif (PPC_ABI == PPC_ABI_SVR4)
|
||||
#define PPC_STACK_ALIGNMENT 16
|
||||
#elif (PPC_ABI == PPC_ABI_EABI)
|
||||
#define PPC_STACK_ALIGNMENT 8
|
||||
#else
|
||||
#error "PPC_ABI is not properly defined"
|
||||
#endif
|
||||
#ifndef PPC_ABI
|
||||
#error "PPC_ABI is not properly defined"
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Assemblers.
|
||||
* PPC_ASM MUST be defined as one of these.
|
||||
* Only PPC_ABI_ELF is currently fully supported.
|
||||
*/
|
||||
/*
|
||||
* ELF assembler. Currently used for all ABIs.
|
||||
*/
|
||||
#define PPC_ASM_ELF 0
|
||||
/*
|
||||
* XCOFF assembler, may be needed for PowerOpen ABI.
|
||||
*/
|
||||
#define PPC_ASM_XCOFF 1
|
||||
|
||||
/*
|
||||
* Define the name of the CPU family.
|
||||
*/
|
||||
|
||||
#define CPU_NAME "PowerPC"
|
||||
|
||||
/*
|
||||
* Interrupt vectors.
|
||||
*/
|
||||
/* Machine check */
|
||||
#define PPC_IRQ_MCHECK 0
|
||||
/* Protection violation */
|
||||
#define PPC_IRQ_PROTECT 1
|
||||
/* External interrupt */
|
||||
#define PPC_IRQ_EXTERNAL 2
|
||||
/* Program exception */
|
||||
#define PPC_IRQ_PROGRAM 3
|
||||
/* System call */
|
||||
#define PPC_IRQ_SCALL 4
|
||||
/* Floating point unavailable */
|
||||
#define PPC_IRQ_NOFP 5
|
||||
/* Program interval timer */
|
||||
#define PPC_IRQ_PIT 6
|
||||
/* Fixed interval timer */
|
||||
#define PPC_IRQ_FIT 7
|
||||
/* Critical interrupt pin */
|
||||
#define PPC_IRQ_CRIT 8
|
||||
/* Watchdog timer */
|
||||
#define PPC_IRQ_WATCHDOG 9
|
||||
/* Debug exceptions */
|
||||
#define PPC_IRQ_DEBUG 10
|
||||
|
||||
/*
|
||||
* The following exceptions are not maskable, and are not
|
||||
* necessarily predictable, so cannot be offered to RTEMS:
|
||||
* Alignment exception - handled by the CPU module
|
||||
* Data exceptions.
|
||||
* Instruction exceptions.
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ! _INCLUDE_PPC_h */
|
||||
/* end of include file */
|
||||
@@ -0,0 +1,74 @@
|
||||
/* ppctypes.h
|
||||
*
|
||||
* This include file contains type definitions pertaining to the PowerPC
|
||||
* processor family.
|
||||
*
|
||||
* Author: Andrew Bray <andy@i-cubed.demon.co.uk>
|
||||
*
|
||||
* COPYRIGHT (c) 1995 by i-cubed ltd.
|
||||
*
|
||||
* To anyone who acknowledges that this file is provided "AS IS"
|
||||
* without any express or implied warranty:
|
||||
* permission to use, copy, modify, and distribute this file
|
||||
* for any purpose is hereby granted without fee, provided that
|
||||
* the above copyright notice and this notice appears in all
|
||||
* copies, and that the name of i-cubed limited not be used in
|
||||
* advertising or publicity pertaining to distribution of the
|
||||
* software without specific, written prior permission.
|
||||
* i-cubed limited makes no representations about the suitability
|
||||
* of this software for any purpose.
|
||||
*
|
||||
* Derived from c/src/exec/cpu/no_cpu/no_cputypes.h:
|
||||
*
|
||||
* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
* All rights assigned to U.S. Government, 1994.
|
||||
*
|
||||
* This material may be reproduced by or for the U.S. Government pursuant
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* ppctypes.h,v 1.3 1995/05/31 14:57:15 joel Exp
|
||||
*/
|
||||
|
||||
#ifndef __PPC_TYPES_h
|
||||
#define __PPC_TYPES_h
|
||||
|
||||
#ifndef ASM
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This section defines the basic types for this processor.
|
||||
*/
|
||||
|
||||
typedef unsigned char unsigned8; /* unsigned 8-bit integer */
|
||||
typedef unsigned short unsigned16; /* unsigned 16-bit integer */
|
||||
typedef unsigned int unsigned32; /* unsigned 32-bit integer */
|
||||
typedef unsigned long long unsigned64; /* unsigned 64-bit integer */
|
||||
|
||||
typedef unsigned32 Priority_Bit_map_control;
|
||||
|
||||
typedef signed char signed8; /* 8-bit signed integer */
|
||||
typedef signed short signed16; /* 16-bit signed integer */
|
||||
typedef signed int signed32; /* 32-bit signed integer */
|
||||
typedef signed long long signed64; /* 64 bit signed integer */
|
||||
|
||||
typedef unsigned32 boolean; /* Boolean value */
|
||||
|
||||
typedef float single_precision; /* single precision float */
|
||||
typedef double double_precision; /* double precision float */
|
||||
|
||||
typedef void ppc_isr;
|
||||
typedef void ( *ppc_isr_entry )( int, struct CPU_Interrupt_frame * );
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* !ASM */
|
||||
|
||||
#endif
|
||||
/* end of include file */
|
||||
@@ -0,0 +1,131 @@
|
||||
/* rtems.s
|
||||
*
|
||||
* This file contains the single entry point code for
|
||||
* the PowerPC implementation of RTEMS.
|
||||
*
|
||||
* Author: Andrew Bray <andy@i-cubed.demon.co.uk>
|
||||
*
|
||||
* COPYRIGHT (c) 1995 by i-cubed ltd.
|
||||
*
|
||||
* To anyone who acknowledges that this file is provided "AS IS"
|
||||
* without any express or implied warranty:
|
||||
* permission to use, copy, modify, and distribute this file
|
||||
* for any purpose is hereby granted without fee, provided that
|
||||
* the above copyright notice and this notice appears in all
|
||||
* copies, and that the name of i-cubed limited not be used in
|
||||
* advertising or publicity pertaining to distribution of the
|
||||
* software without specific, written prior permission.
|
||||
* i-cubed limited makes no representations about the suitability
|
||||
* of this software for any purpose.
|
||||
*
|
||||
* Derived from c/src/exec/cpu/no_cpu/rtems.c:
|
||||
*
|
||||
* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
* All rights assigned to U.S. Government, 1994.
|
||||
*
|
||||
* This material may be reproduced by or for the U.S. Government pursuant
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "asm.h"
|
||||
|
||||
BEGIN_CODE
|
||||
/*
|
||||
* RTEMS
|
||||
*
|
||||
* This routine jumps to the directive indicated in r11.
|
||||
* This routine is used when RTEMS is linked by itself and placed
|
||||
* in ROM. This routine is the first address in the ROM space for
|
||||
* RTEMS. The user "calls" this address with the directive arguments
|
||||
* in the normal place.
|
||||
* This routine then jumps indirectly to the correct directive
|
||||
* preserving the arguments. The directive should not realize
|
||||
* it has been "wrapped" in this way. The table "_Entry_points"
|
||||
* is used to look up the directive.
|
||||
*/
|
||||
|
||||
ALIGN (4, 2)
|
||||
PUBLIC_PROC (RTEMS)
|
||||
PROC (RTEMS):
|
||||
#if (PPC_ABI == PPC_ABI_POWEROPEN)
|
||||
mflr r0
|
||||
stw r0, 8(r1)
|
||||
stwu r1, -64(r1)
|
||||
|
||||
/* Establish addressing */
|
||||
bl base
|
||||
base:
|
||||
mflr r12
|
||||
addi r12, r12, tabaddr - base
|
||||
|
||||
lwz r12, Entry_points-abase(r12)
|
||||
slwi r11, r11, 2
|
||||
lwzx r12, r12, r11
|
||||
|
||||
stw r2, 56(r1)
|
||||
lwz r0, 0(r12)
|
||||
mtlr r0
|
||||
lwz r2, 4(r12)
|
||||
lwz r11, 8(r12)
|
||||
blrl
|
||||
lwz r2, 56(r1)
|
||||
addi r1, r1, 64
|
||||
lwz r0, 8(r1)
|
||||
mtlr r0
|
||||
#else
|
||||
mflr r0
|
||||
stw r0, 4(r1)
|
||||
stwu r1, -16(r1)
|
||||
|
||||
/* Establish addressing */
|
||||
bl base
|
||||
base:
|
||||
mflr r12
|
||||
addi r12, r12, tabaddr - base
|
||||
|
||||
lwz r12, Entry_points-abase(r12)
|
||||
slwi r11, r11, 2
|
||||
lwzx r11, r12, r11
|
||||
|
||||
stw r2, 8(r1)
|
||||
#if (PPC_ABI != PPC_ABI_GCC27)
|
||||
stw r13, 12(r1)
|
||||
#endif
|
||||
mtlr r11
|
||||
lwz r11, irqinfo-abase(r12)
|
||||
lwz r2, 0(r11)
|
||||
#if (PPC_ABI != PPC_ABI_GCC27)
|
||||
lwz r13, 4(r11)
|
||||
#endif
|
||||
blrl
|
||||
lwz r2, 8(r1)
|
||||
#if (PPC_ABI != PPC_ABI_GCC27)
|
||||
lwz r13, 12(r1)
|
||||
#endif
|
||||
addi r1, r1, 16
|
||||
lwz r0, 4(r1)
|
||||
mtlr r0
|
||||
#endif
|
||||
blr
|
||||
|
||||
|
||||
/* Addressability stuff */
|
||||
tabaddr:
|
||||
abase:
|
||||
EXTERN_VAR (_Entry_points)
|
||||
Entry_points:
|
||||
EXT_SYM_REF (_Entry_points)
|
||||
#if (PPC_ABI != PPC_ABI_POWEROPEN)
|
||||
EXTERN_VAR (_CPU_IRQ_info)
|
||||
irqinfo:
|
||||
EXT_SYM_REF (_CPU_IRQ_info)
|
||||
#endif
|
||||
|
||||
#if (PPC_ABI == PPC_ABI_POWEROPEN)
|
||||
DESCRIPTOR (RTEMS)
|
||||
#endif
|
||||
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* wkspace.inl,v 1.2 1995/05/31 16:48:49 joel Exp
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __WORKSPACE_inl
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* wkspace.inl,v 1.2 1995/05/31 16:48:49 joel Exp
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __WORKSPACE_inl
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* chain.inl,v 1.2 1995/05/31 16:48:59 joel Exp
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __MACROS_CHAIN_h
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* heap.inl,v 1.2 1995/05/31 16:49:10 joel Exp
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __HEAP_inl
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* object.inl,v 1.2 1995/05/31 16:49:20 joel Exp
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __OBJECTS_inl
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* priority.inl,v 1.2 1995/05/31 16:49:27 joel Exp
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __PRIORITY_inl
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* chain.inl,v 1.2 1995/05/31 16:48:59 joel Exp
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __MACROS_CHAIN_h
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* heap.inl,v 1.2 1995/05/31 16:49:10 joel Exp
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __HEAP_inl
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* object.inl,v 1.2 1995/05/31 16:49:20 joel Exp
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __OBJECTS_inl
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* priority.inl,v 1.2 1995/05/31 16:49:27 joel Exp
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __PRIORITY_inl
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* sysstate.inl,v 1.2 1995/05/31 16:49:39 joel Exp
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __SYSTEM_STATE_inl
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* wkspace.inl,v 1.2 1995/05/31 16:49:53 joel Exp
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __WORKSPACE_inl
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* sysstate.inl,v 1.2 1995/05/31 16:49:39 joel Exp
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __SYSTEM_STATE_inl
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* wkspace.inl,v 1.2 1995/05/31 16:49:53 joel Exp
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __WORKSPACE_inl
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* wkspace.inl,v 1.2 1995/05/31 16:48:49 joel Exp
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __WORKSPACE_inl
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* chain.inl,v 1.2 1995/05/31 16:48:59 joel Exp
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __MACROS_CHAIN_h
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* heap.inl,v 1.2 1995/05/31 16:49:10 joel Exp
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __HEAP_inl
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* object.inl,v 1.2 1995/05/31 16:49:20 joel Exp
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __OBJECTS_inl
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* priority.inl,v 1.2 1995/05/31 16:49:27 joel Exp
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __PRIORITY_inl
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* sysstate.inl,v 1.2 1995/05/31 16:49:39 joel Exp
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __SYSTEM_STATE_inl
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* to the copyright license under the clause at DFARS 252.227-7013. This
|
||||
* notice must appear in all copies of this file and its derivatives.
|
||||
*
|
||||
* wkspace.inl,v 1.2 1995/05/31 16:49:53 joel Exp
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __WORKSPACE_inl
|
||||
|
||||
Reference in New Issue
Block a user