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added variant to gen68360 BSP

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added genmcf548x BSP
This commit is contained in:
Thomas Doerfler committed 2008-07-11 10:00:41 +00:00
1 parent 1898d72d9c
commit 69effbb4e1
31 files changed
+6150 -1
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c/src/lib/libbsp/m68k/ChangeLog
+4
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@@ -1,3 +1,7 @@
2008-07-11 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
* genmcf548x: added BSP
2008-06-27 Joel Sherrill <joel.sherrill@OARcorp.com>
* acinclude.m4: Regenerated.
c/src/lib/libbsp/m68k/acinclude.m4
+2
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@@ -12,6 +12,8 @@ AC_DEFUN([RTEMS_CHECK_BSPDIR],
AC_CONFIG_SUBDIRS([gen68340]);;
gen68360 )
AC_CONFIG_SUBDIRS([gen68360]);;
genmcf548x )
AC_CONFIG_SUBDIRS([genmcf548x]);;
idp )
AC_CONFIG_SUBDIRS([idp]);;
mcf5206elite )
c/src/lib/libbsp/m68k/gen68360/ChangeLog
+10
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@@ -1,3 +1,13 @@
2008-07-09 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
* Makefile.am, spi/m360_spidrv.c, spi/m360_spidrv.h:
added SPI driver
2008-07-09 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
* README:
added pgh360 BSP variant
2008-05-23 Joel Sherrill <joel.sherrill@OARcorp.com>
* console/console.c: Eliminate copies of switches to convert termios
c/src/lib/libbsp/m68k/gen68360/Makefile.am
-1
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@@ -11,7 +11,6 @@ dist_project_lib_DATA = bsp_specs
include_HEADERS = include/bsp.h
include_HEADERS += include/tm27.h
nodist_include_HEADERS = include/bspopts.h
DISTCLEANFILES = include/bspopts.h
noinst_PROGRAMS =
c/src/lib/libbsp/m68k/gen68360/README
+11
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@@ -29,6 +29,8 @@
# can be used with the Arnewsh SBC360 card.
# - If the preprocessor symbol M68360_ATLAS_HSB is defined,
# the BSP is compiled for an Atlas HSB card.
# - If the preprocessor symbol M68360_IMD_PGH is defined,
# the BSP is compiled for an IMD PGH360 card.
# - Otherwise, the BSP is compiled for a generic 68360 system
# as described in Chapter 9 of the MC68360 User's Manual. This
# version works with the Atlas ACE360 card.
@@ -39,6 +41,7 @@ BOARD: Generic 68360 as described in Motorola MC68360 User's Manual
BOARD: Atlas Computer Equipment Inc. High Speed Bridge (HSB)
BOARD: Atlas Computer Equipment Inc. Advanced Communication Engine (ACE)
BOARD: Arnewsh SBC360 68040/68360 card
BOARD: IMD PGH Board (custom)
BUS: none
CPU FAMILY: Motorola CPU32+, Motorola 68040
COPROCESSORS: none
@@ -83,6 +86,13 @@ bus width: 8-bit PROM/FLASH, 32-bit DRAM
ROM: To 1 MByte, 180 nsec (3 wait states), chip select 0
RAM: 4 or 16 MBytes of 60 nsec parity DRAM (1Mx36) to RAS1*/CAS1*
Board description (IMD PGH)
---------------------------
clock rate: 25 MHz
bus width: 8-bit PROM/FLASH, 32-bit DRAM
ROM: 512KByte, 180 nsec (3 wait states), chip select 0
RAM: 16 MBytes of 60 nsec no-parity DRAM (1Mx32) to RAS1*/CAS1*
Host System
-----------
OPENSTEP 4.2 (Intel and Motorola), Solaris 2.5, Linux 2.0.29
@@ -292,3 +302,4 @@ The board support package has been tested with:
Arnewsh Inc.
P.O. Box 270352
Fort Collins, CO 80527-0352
A custom 68360 board (PGH360) produced by IMD
c/src/lib/libbsp/m68k/gen68360/include/bsp.h
+23
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@@ -90,6 +90,8 @@ void *M360AllocateBufferDescriptors( int count );
void *M360AllocateRiscTimers( int count );
extern char M360DefaultWatchdogFeeder;
extern int m360_clock_rate; /* BRG clock rate, defined in console.c */
m68k_isr_entry set_vector(
rtems_isr_entry handler,
rtems_vector_number vector,
@@ -102,6 +104,7 @@ m68k_isr_entry set_vector(
extern char _RamBase[];
extern char _HeapSize[];
/*
* Definitions for Atlas Computer Equipment Inc. High Speed Bridge (HSB)
*/
@@ -111,6 +114,26 @@ extern char _HeapSize[];
#define ATLASHSB_LED4 0x20010004L
#define ATLASHSB_ROM_U6 0xFF080000L /* U6 flash ROM socket */
/*
* definitions for PGH360 board
*/
#if defined(PGH360)
/*
* logical SPI addresses of SPI slaves available
*/
#define PGH360_SPI_ADDR_EEPROM 0
#define PGH360_SPI_ADDR_DISP4_DATA 1
#define PGH360_SPI_ADDR_DISP4_CTRL 2
/*
* Port B bit locations of SPI slave selects
*/
#define PGH360_PB_SPI_DISP4_RS_MSK (1<<15)
#define PGH360_PB_SPI_DISP4_CE_MSK (1<<14)
#define PGH360_PB_SPI_EEP_CE_MSK (1<< 0)
#endif /* defined(PGH360) */
#ifdef __cplusplus
}
#endif
c/src/lib/libbsp/m68k/gen68360/spi/m360_spi.c
+852
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c/src/lib/libbsp/m68k/gen68360/spi/m360_spi.h
+146
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@@ -0,0 +1,146 @@
/*===============================================================*\
| Project: RTEMS support for MC68360 |
+-----------------------------------------------------------------+
| Copyright (c) 2008 |
| Embedded Brains GmbH |
| Obere Lagerstr. 30 |
| D-82178 Puchheim |
| Germany |
| rtems@embedded-brains.de |
+-----------------------------------------------------------------+
| The license and distribution terms for this file may be |
| found in the file LICENSE in this distribution or at |
| |
| http://www.rtems.com/license/LICENSE. |
| |
+-----------------------------------------------------------------+
| this file contains the MC68360 SPI driver declarations |
\*===============================================================*/
#ifndef _M360_SPIDRV_H
#define _M360_SPIDRV_H
#include <rtems/m68k/m68360.h>
#include <rtems/libi2c.h>
#include <rtems/irq.h>
#ifdef __cplusplus
extern "C" {
#endif
typedef struct m360_spi_softc {
int initialized;
rtems_id irq_sema_id;
rtems_isr_entry old_handler;
m360BufferDescriptor_t *rx_bd;
m360BufferDescriptor_t *tx_bd;
} m360_spi_softc_t ;
typedef struct {
rtems_libi2c_bus_t bus_desc;
m360_spi_softc_t softc;
} m360_spi_desc_t;
/*=========================================================================*\
| Function: |
\*-------------------------------------------------------------------------*/
rtems_status_code m360_spi_init
(
/*-------------------------------------------------------------------------*\
| Purpose: |
| initialize the driver |
+---------------------------------------------------------------------------+
| Input Parameters: |
\*-------------------------------------------------------------------------*/
rtems_libi2c_bus_t *bh /* bus specifier structure */
);
/*-------------------------------------------------------------------------*\
| Return Value: |
| o = ok or error code |
\*=========================================================================*/
/*=========================================================================*\
| Function: |
\*-------------------------------------------------------------------------*/
int m360_spi_read_bytes
(
/*-------------------------------------------------------------------------*\
| Purpose: |
| receive some bytes from SPI device |
+---------------------------------------------------------------------------+
| Input Parameters: |
\*-------------------------------------------------------------------------*/
rtems_libi2c_bus_t *bh, /* bus specifier structure */
unsigned char *buf, /* buffer to store bytes */
int len /* number of bytes to receive */
);
/*-------------------------------------------------------------------------*\
| Return Value: |
| number of bytes received or (negative) error code |
\*=========================================================================*/
/*=========================================================================*\
| Function: |
\*-------------------------------------------------------------------------*/
int m360_spi_write_bytes
(
/*-------------------------------------------------------------------------*\
| Purpose: |
| send some bytes to SPI device |
+---------------------------------------------------------------------------+
| Input Parameters: |
\*-------------------------------------------------------------------------*/
rtems_libi2c_bus_t *bh, /* bus specifier structure */
unsigned char *buf, /* buffer to send */
int len /* number of bytes to send */
);
/*-------------------------------------------------------------------------*\
| Return Value: |
| number of bytes sent or (negative) error code |
\*=========================================================================*/
/*=========================================================================*\
| Function: |
\*-------------------------------------------------------------------------*/
rtems_status_code m360_spi_set_tfr_mode
(
/*-------------------------------------------------------------------------*\
| Purpose: |
| set SPI to desired baudrate/clock mode/character mode |
+---------------------------------------------------------------------------+
| Input Parameters: |
\*-------------------------------------------------------------------------*/
rtems_libi2c_bus_t *bh, /* bus specifier structure */
const rtems_libi2c_tfr_mode_t *tfr_mode /* transfer mode info */
);
/*-------------------------------------------------------------------------*\
| Return Value: |
| rtems_status_code |
\*=========================================================================*/
/*=========================================================================*\
| Function: |
\*-------------------------------------------------------------------------*/
int m360_spi_ioctl
(
/*-------------------------------------------------------------------------*\
| Purpose: |
| perform selected ioctl function for SPI |
+---------------------------------------------------------------------------+
| Input Parameters: |
\*-------------------------------------------------------------------------*/
rtems_libi2c_bus_t *bh, /* bus specifier structure */
int cmd, /* ioctl command code */
void *arg /* additional argument array */
);
/*-------------------------------------------------------------------------*\
| Return Value: |
| rtems_status_code |
\*=========================================================================*/
#ifdef __cplusplus
}
#endif
#endif /* _M360_SPIDRV_H */
c/src/lib/libbsp/m68k/gen68360/spi/mc68360_spidrv.c
+627
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c/src/lib/libbsp/m68k/gen68360/startup/init68360.c
+175
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@@ -14,6 +14,13 @@
#include <bsp.h>
#include <rtems/m68k/m68360.h>
/*
* Declare the m360 structure here for the benefit of the debugger
*/
volatile m360_t m360;
/*
* Send a command to the CPM RISC processer
*/
@@ -335,6 +342,174 @@ void _Init68360 (void)
* BCLRO* arbitration level 3
*/
#elif defined(PGH360)
/*
* Step 6: Is this a power-up reset?
* For now we just ignore this and do *all* the steps
* Someday we might want to:
* if (Hard, Loss of Clock, Power-up)
* Do all steps
* else if (Double bus fault, watchdog or soft reset)
* Skip to step 12
* else (must be a CPU32+ reset command)
* Skip to step 14
*/
/*
* Step 7: Deal with clock synthesizer
* HARDWARE:
* Change if you're not using an external 25 MHz oscillator.
*/
m360.clkocr = 0x8e; /* No more writes, CLKO1=1/3, CLKO2=off */
/*
* adjust crystal to average between 4.19 MHz and 4.00 MHz
* reprogram pll
*/
m360.pllcr = 0xA000+(24576000/((4000000+4194304)/2/128))-1;
/* LPSTOP slowdown, PLL /128*??? */
m360.cdvcr = 0x8000; /* No more writes, no clock division */
/*
* Step 8: Initialize system protection
* Enable watchdog
* Watchdog causes system reset
* 128 sec. watchdog timeout
* Enable double bus fault monitor
* Enable bus monitor external
* 128 clocks for external timeout
*/
m360.sypcr = 0xEF;
/*
* also initialize the SWP bit in PITR to 1
*/
m360.pitr |= 0x0200;
/*
* and trigger SWSR twice to ensure, that interval starts right now
*/
m360.swsr = 0x55;
m360.swsr = 0xAA;
m360.swsr = 0x55;
m360.swsr = 0xAA;
/*
* Step 9: Clear parameter RAM and reset communication processor module
*/
for (i = 0 ; i < 192 ; i += sizeof (long)) {
*((long *)((char *)&m360 + 0xC00 + i)) = 0;
*((long *)((char *)&m360 + 0xD00 + i)) = 0;
*((long *)((char *)&m360 + 0xE00 + i)) = 0;
*((long *)((char *)&m360 + 0xF00 + i)) = 0;
}
M360ExecuteRISC (M360_CR_RST);
/*
* Step 10: Write PEPAR
* SINTOUT not used (CPU32+ mode)
* CF1MODE=00 (CONFIG1 input)
* IPIPE1
* WE0-3
* OE* output
* CAS2* / CAS3*
* CAS0* / CAS1*
* CS7*
* AVEC*
* HARDWARE:
* Change if you are using a different memory configuration
* (static RAM, external address multiplexing, etc).
*/
m360.pepar = 0x0080;
/*
* Step 11: Remap Chip Select 0 (CS0*), set up GMR
* no DRAM support
* HARDWARE:
* Change if you are using a different memory configuration
*/
m360.gmr = M360_GMR_RCNT(23) | M360_GMR_RFEN | M360_GMR_RCYC(0) |
M360_GMR_PGS(6) | M360_GMR_DPS_32BIT | M360_GMR_DWQ |
M360_GMR_GAMX;
m360.memc[0].br = (unsigned long)&_RomBase | M360_MEMC_BR_WP |
M360_MEMC_BR_V;
m360.memc[0].or = M360_MEMC_OR_WAITS(3) | M360_MEMC_OR_512KB |
M360_MEMC_OR_8BIT;
/*
* Step 12: Initialize the system RAM
* Set up option/base registers
* 16 MB DRAM
* 1 wait state
* HARDWARE:
* Change if you are using a different memory configuration
* NOTE: no Page mode possible for EDO RAMs (?)
*/
ramSize = 16 * 1024 * 1024;
m360.memc[7].or = M360_MEMC_OR_TCYC(1) | M360_MEMC_OR_16MB |
M360_MEMC_OR_FCMC(0) | /* M360_MEMC_OR_PGME | */
M360_MEMC_OR_32BIT | M360_MEMC_OR_DRAM;
m360.memc[7].br = (unsigned long)&_RamBase | M360_MEMC_BR_V;
/*
* FIXME: here we should wait for 8 refresh cycles...
*/
/*
* Step 12a: test the ram, if wanted
* FIXME: when do we call this?
* -> only during firmware execution
* -> perform intesive test only on request
* -> ensure, that results are stored properly
*/
#if 0 /* FIXME: activate RAM tests again */
{
void *ram_base, *ram_end, *code_loc;
extern char ramtest_start,ramtest_end;
ram_base = &ramtest_start;
ram_end = &ramtest_end;
code_loc = (void *)ramtest_exec;
if ((ram_base < ram_end) &&
!((ram_base <= code_loc) && (code_loc < ram_end))) {
ramtest_exec(ram_base,ram_end);
}
}
#endif
/*
* Step 13: Copy the exception vector table to system RAM
*/
m68k_get_vbr (vbr);
for (i = 0; i < 256; ++i)
M68Kvec[i] = vbr[i];
m68k_set_vbr (M68Kvec);
/*
* Step 14: More system initialization
* SDCR (Serial DMA configuration register)
* Disable SDMA during FREEZE
* Give SDMA priority over all interrupt handlers
* Set DMA arbiration level to 4
* CICR (CPM interrupt configuration register):
* SCC1 requests at SCCa position
* SCC2 requests at SCCb position
* SCC3 requests at SCCc position
* SCC4 requests at SCCd position
* Interrupt request level 4
* Maintain original priority order
* Vector base 128
* SCCs priority grouped at top of table
*/
m360.sdcr = M360_SDMA_SISM_7 | M360_SDMA_SAID_4;
m360.cicr = (3 << 22) | (2 << 20) | (1 << 18) | (0 << 16) |
(4 << 13) | (0x1F << 8) | (128);
/*
* Step 15: Set module configuration register
* Disable timers during FREEZE
* Enable bus monitor during FREEZE
* BCLRO* arbitration level 3
* No show cycles
* User/supervisor access
* Bus clear interupt service level 7
* SIM60 interrupt sources higher priority than CPM
*/
m360.mcr = 0x4C7F;
#elif (defined (GEN68360_WITH_SRAM))
/*
***************************************************
c/src/lib/libbsp/m68k/genmcf548x/ChangeLog
+14
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@@ -0,0 +1,14 @@
2008-07-10 Peter Rasmussen <peter.rasmussen@embedded-brains.de>
* Makefile.am, preinstall.am,
bsp_specs, ChangeLog,
README,
clock/clock.c,
console/console.c,
include/bsp.h,
include/coverhd.h, include/tm27.h,
network/network.c,
start/start.S,
startup/bspclean.c,
startup/bspstart.c, startup/init548x.c,
startup/linkcmds, startup/linkcmds.m5484FireEngine.flash: New files.
c/src/lib/libbsp/m68k/genmcf548x/Makefile.am
+73
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@@ -0,0 +1,73 @@
##
## $Id$
##
ACLOCAL_AMFLAGS = -I ../../../../aclocal
include $(top_srcdir)/../../../../automake/compile.am
include $(top_srcdir)/../../bsp.am
dist_project_lib_DATA = bsp_specs
include_HEADERS = include/bsp.h
include_HEADERS += include/tm27.h
nodist_include_HEADERS = include/bspopts.h
DISTCLEANFILES = include/bspopts.h
noinst_PROGRAMS =
include_HEADERS += include/coverhd.h
EXTRA_DIST = start/start.S
start.$(OBJEXT): start/start.S
$(CPPASCOMPILE) -o $@ -c $<
project_lib_DATA = start.$(OBJEXT)
dist_project_lib_DATA += startup/linkcmds
noinst_PROGRAMS += startup.rel
startup_rel_SOURCES = startup/bspclean.c \
../../shared/bsplibc.c ../../shared/bsppost.c \
../../m68k/shared/m68kpretaskinghook.c \
startup/init548x.c startup/bspstart.c \
../../shared/bootcard.c \
../../shared/sbrk.c ../../m68k/shared/setvec.c \
../../shared/gnatinstallhandler.c
startup_rel_CPPFLAGS = $(AM_CPPFLAGS)
startup_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
noinst_PROGRAMS += clock.rel
clock_rel_SOURCES = clock/clock.c
clock_rel_CPPFLAGS = $(AM_CPPFLAGS)
clock_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
noinst_PROGRAMS += console.rel
console_rel_SOURCES = console/console.c
console_rel_CPPFLAGS = $(AM_CPPFLAGS)
console_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
noinst_PROGRAMS += timer.rel
timer_rel_SOURCES = timer/timer.c
timer_rel_CPPFLAGS = $(AM_CPPFLAGS)
timer_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
if HAS_NETWORKING
network_CPPFLAGS = -D__INSIDE_RTEMS_BSD_TCPIP_STACK__
noinst_PROGRAMS += network.rel
network_rel_SOURCES = network/network.c
network_rel_CPPFLAGS = $(AM_CPPFLAGS) \
$(network_CPPFLAGS)
network_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
endif
noinst_LIBRARIES = libbsp.a
libbsp_a_SOURCES =
libbsp_a_LIBADD = startup.rel clock.rel console.rel timer.rel
if HAS_NETWORKING
libbsp_a_LIBADD += network.rel
endif
libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/shared/misc.rel
include $(srcdir)/preinstall.am
include $(top_srcdir)/../../../../automake/local.am
c/src/lib/libbsp/m68k/genmcf548x/README
+180
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@@ -0,0 +1,180 @@
/*===============================================================*\
| Project: RTEMS generic mcf548x BSP |
+-----------------------------------------------------------------+
| File: README |
+-----------------------------------------------------------------+
| This is the README for the generic MCF548x BSP. |
+-----------------------------------------------------------------+
| Copyright (c) 2007 |
| Embedded Brains GmbH |
| Obere Lagerstr. 30 |
| D-82178 Puchheim |
| Germany |
| rtems@embedded-brains.de |
+-----------------------------------------------------------------+
| |
| Parts of the code has been derived from the "dBUG source code" |
| package Freescale is providing for M548X EVBs. The usage of |
| the modified or unmodified code and it's integration into the |
| generic mcf548x BSP has been done according to the Freescale |
| license terms. |
| |
| The Freescale license terms can be reviewed in the file |
| |
| Freescale_license.txt |
| |
+-----------------------------------------------------------------+
| |
| The generic mcf548x BSP has been developed on the basic |
| structures and modules of the av5282 BSP. |
| |
+-----------------------------------------------------------------+
| |
| The license and distribution terms for this file may be |
| found in the file LICENSE in this distribution or at |
| |
| http://www.rtems.com/license/LICENSE. |
| |
+-----------------------------------------------------------------+
| |
| date history ID |
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 12.11.07 1.0 ras |
| |
\*===============================================================*/
Description: Generic mcf548x BSP
============
CPU: MCF548x, 200MHz
XLB: 100 MHz, which is the main clock for all onchip peripherals
RAM: 64M (m5484FireEngine)
Boot-Flash: 2M (m5484FireEngine)
Code-Flash: 16M (m5484FireEngine)
Core-SRAM: 8K
Core-SysRAM: 32K
The genmcf548x supports the Fresscale m5484FireEngine EVB.
ACKNOWLEDGEMENTS:
=================
This BSP is based on the
av5282 BSP
and the work of
D. Peter Siddons
Brett Swimley
Jay Monkman
Eric Norum
Mike Bertosh
BSP INFO:
=========
BSP NAME: genmcf548x
BOARD: m5484FireEngine (freescale),
CPU FAMILY: ColdFire 548x
CPU: MCF5484
FPU: MCF548x FPU, context switch supported by RTEMS multitasking
EMAC: MCF548x EMAC context switch supported by RTEMS multitasking (handeld together with FPU context)
PERIPHERALS
===========
TIMERS: 2 slice timers, 4 general purpose timers (SLT0 is used for RTEMS clock, SLT1 is used for diagnostic pupose)
RESOLUTION: System tick 10 millieconds (via SLT0)
SERIAL PORTS: Internal PSC 0-3
NETWORKING: Internal 10/100MHz FEC (not supported yet)
DRIVER INFORMATION
==================
CLOCK DRIVER: SLT0
TIMER DRIVER: SLT1 (diagnostics)
TTY DRIVER: PSC0-3
STDIO
=====
PORT: PSC0 (UART mode) terminal
ELECTRICAL: RS-232
BAUD: 9600
BITS PER CHARACTER: 8
PARITY: None
STOP BITS: 1
MODES: Interrupt driven (polled mode alternatively)
Memory map as set up by BSP initialization
m5484FireEngine:
+--------------------------------------------------+
0000 0000 | 64 MByte SDRAM (external) | 03FF FFFF
. .
. .
. .
m5484FireEngine:
| | 0FFF FFFF
+--------------------------------------------------+
1000 0000 | internal per. registers via MBAR | 1003 FFFF
. .
. .
. .
| |
+--------------------------------------------------+
2000 0000 | 8K core SRAM (internal) | 2000 1FFF
. .
. .
. .
m5484FireEngine:
| |
+--------------------------------------------------+
E000 0000 | 16M code flash (external) | E0FF FFFF
. .
. .
. .
| |
+--------------------------------------------------+
FF80 0000 | External 8 MByte Flash memory | FF9F FFFF
. .
. .
. .
| | FFFF FFFF
+--------------------------------------------------+
============================================================================
Interrupt map
+-----+-----------------------------------------------------------------------+
| | PRIORITY |
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
|LEVEL| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
| 7 | | | | | | | | |
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
| 6 | | | | | | | | |
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
| 5 | | | | | | | | |
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
| 4 | | | | | | | | SLT0 |
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
| 3 | PSC 0 | PSC 1 | PSC 2 | PSC 3 | | | | |
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
| 2 | | | | | | | | |
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
| 1 | | | | | | | | |
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
============================================================================
TIMING TESTS
**************************
tbd.
c/src/lib/libbsp/m68k/genmcf548x/aclocal.m4
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c/src/lib/libbsp/m68k/genmcf548x/bsp_specs
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@@ -0,0 +1,13 @@
%rename endfile old_endfile
%rename startfile old_startfile
%rename link old_link
*startfile:
%{!qrtems: %(old_startfile)} \
%{!nostdlib: %{qrtems: start.o%s crti.o%s crtbegin.o%s}}
*link:
%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N -e start}
*endfile:
%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s crtn.o%s}
c/src/lib/libbsp/m68k/genmcf548x/clock/clock.c
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@@ -0,0 +1,104 @@
/*===============================================================*\
| Project: RTEMS generic mcf548x BSP |
+-----------------------------------------------------------------+
| File: clock.c |
+-----------------------------------------------------------------+
| The file contains the clock driver code of generic MCF548x BSP. |
+-----------------------------------------------------------------+
| Copyright (c) 2007 |
| Embedded Brains GmbH |
| Obere Lagerstr. 30 |
| D-82178 Puchheim |
| Germany |
| rtems@embedded-brains.de |
+-----------------------------------------------------------------+
| |
| Parts of the code has been derived from the "dBUG source code" |
| package Freescale is providing for M548X EVBs. The usage of |
| the modified or unmodified code and it's integration into the |
| generic mcf548x BSP has been done according to the Freescale |
| license terms. |
| |
| The Freescale license terms can be reviewed in the file |
| |
| Freescale_license.txt |
| |
+-----------------------------------------------------------------+
| |
| The generic mcf548x BSP has been developed on the basic |
| structures and modules of the av5282 BSP. |
| |
+-----------------------------------------------------------------+
| |
| The license and distribution terms for this file may be |
| found in the file LICENSE in this distribution or at |
| |
| http://www.rtems.com/license/LICENSE. |
| |
+-----------------------------------------------------------------+
| |
| date history ID |
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 12.11.07 1.0 ras |
| |
\*===============================================================*/
/*
* Use first slice timer (SLT0) as the system clock.
*
*/
#include <rtems.h>
#include <bsp.h>
#include <mcf548x/mcf548x.h>
/*
* Use SLT 0
*/
#define CLOCK_VECTOR (64+54)
/*
* Periodic interval timer interrupt handler
*/
#define Clock_driver_support_at_tick() \
do { \
MCF548X_SLT_SSR0 = MCF548X_SLT_SSR_ST; \
} while (0) \
/*
* Attach clock interrupt handler
*/
#define Clock_driver_support_install_isr( _new, _old ) \
do { \
_old = (rtems_isr_entry)set_vector(_new, CLOCK_VECTOR, 1); \
} while(0)
/*
* Turn off the clock
*/
#define Clock_driver_support_shutdown_hardware() \
do { \
MCF548X_SLT_SCR0 &= ~(MCF548X_SLT_SCR_TEN | MCF548X_SLT_SCR_RUN | MCF548X_SLT_SCR_IEN); \
} while(0)
/*
* Set up the clock hardware
*
* We need to have 1 interrupt every 10,000 microseconds
* XLB clock 100 MHz / MCF548X_SLT_SLTCNT0 = XLB clock/100
*/
#define Clock_driver_support_initialize_hardware() \
do { \
int level; \
MCF548X_INTC_ICR54 = MCF548X_INTC_ICRn_IL(SLT0_IRQ_LEVEL) | \
MCF548X_INTC_ICRn_IP(SLT0_IRQ_PRIORITY); \
rtems_interrupt_disable( level ); \
MCF548X_INTC_IMRH &= ~(MCF548X_INTC_IMRH_INT_MASK54 | \
MCF548X_INTC_IMRL_MASKALL); \
rtems_interrupt_enable( level ); \
MCF548X_SLT_SLTCNT0 = get_CPU_clock_speed()/100; \
MCF548X_SLT_SCR0 |= (MCF548X_SLT_SCR_TEN | MCF548X_SLT_SCR_RUN | MCF548X_SLT_SCR_IEN); \
} while (0)
#include "../../../shared/clockdrv_shell.c"
c/src/lib/libbsp/m68k/genmcf548x/configure.ac
+29
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@@ -0,0 +1,29 @@
## Process this file with autoconf to produce a configure script.
##
## $Id$
AC_PREREQ(2.60)
AC_INIT([rtems-c-src-lib-libbsp-m68k-genmcf548x],[_RTEMS_VERSION],[http://www.rtems.org/bugzilla])
AC_CONFIG_SRCDIR([bsp_specs])
RTEMS_TOP(../../../../../..)
RTEMS_CANONICAL_TARGET_CPU
AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.10])
RTEMS_BSP_CONFIGURE
RTEMS_PROG_CC_FOR_TARGET
RTEMS_CANONICALIZE_TOOLS
RTEMS_PROG_CCAS
RTEMS_CHECK_NETWORKING
AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
RTEMS_BSPOPTS_SET([BSP_CPU_CLOCK_SPEED],[m5484FireEngine],[100000000])
RTEMS_BSPOPTS_SET([BSP_CPU_CLOCK_SPEED],[*],[100000000])
RTEMS_BSPOPTS_HELP([BSP_CPU_CLOCK_SPEED],
[Use a clock speed of 100000000 for the m5484FireEngine board])
# Explicitly list all Makefiles here
AC_CONFIG_FILES([Makefile])
AC_OUTPUT
c/src/lib/libbsp/m68k/genmcf548x/console/console.c
+886
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File diff suppressed because it is too large. Load diff
c/src/lib/libbsp/m68k/genmcf548x/include/bsp.h
+136
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@@ -0,0 +1,136 @@
/*===============================================================*\
| Project: RTEMS generic mcf548x BSP |
+-----------------------------------------------------------------+
| File: bsp.h |
+-----------------------------------------------------------------+
| The file contains the BSP header of generic MCF548x BSP. |
+-----------------------------------------------------------------+
| Copyright (c) 2007 |
| Embedded Brains GmbH |
| Obere Lagerstr. 30 |
| D-82178 Puchheim |
| Germany |
| rtems@embedded-brains.de |
+-----------------------------------------------------------------+
| |
| Parts of the code has been derived from the "dBUG source code" |
| package Freescale is providing for M548X EVBs. The usage of |
| the modified or unmodified code and it's integration into the |
| generic mcf548x BSP has been done according to the Freescale |
| license terms. |
| |
| The Freescale license terms can be reviewed in the file |
| |
| Freescale_license.txt |
| |
+-----------------------------------------------------------------+
| |
| The generic mcf548x BSP has been developed on the basic |
| structures and modules of the av5282 BSP. |
| |
+-----------------------------------------------------------------+
| |
| The license and distribution terms for this file may be |
| found in the file LICENSE in this distribution or at |
| |
| http://www.rtems.com/license/LICENSE. |
| |
+-----------------------------------------------------------------+
| |
| date history ID |
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 12.11.07 1.0 ras |
| |
\*===============================================================*/
#ifndef __GENMCF548X_BSP_H
#define __GENMCF548X_BSP_H
#ifdef __cplusplus
extern "C" {
#endif
#include <bspopts.h>
#include <rtems.h>
#include <rtems/iosupp.h>
#include <rtems/console.h>
#include <rtems/clockdrv.h>
#include <rtems/iosupp.h>
#include <rtems/bspIo.h>
/***************************************************************************/
/** Hardware data structure headers **/
#include <mcf548x/mcf548x.h>
/***************************************************************************/
/** Network driver configuration **/
struct rtems_bsdnet_ifconfig;
extern int rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config, int attaching );
#define RTEMS_BSP_NETWORK_DRIVER_NAME "fs1"
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_fec_driver_attach
/***************************************************************************/
/** User Definable configuration **/
/* define which port the console should use - all other ports are then defined as general purpose */
#define CONSOLE_PORT 0
#define RAM_END 0x4000000 /* 64 MB */
/* externals */
/* constants */
/* miscellaneous stuff assumed to exist */
extern rtems_configuration_table BSP_Configuration;
/*
* Device Driver Table Entries
*/
/*
* NOTE: Use the standard Console driver entry
*/
/*
* NOTE: Use the standard Clock driver entry
*/
/* functions */
uint32_t get_CPU_clock_speed(void);
void bsp_cleanup(void);
m68k_isr_entry set_vector(
rtems_isr_entry handler,
rtems_vector_number vector,
int type
);
/*
* Interrupt assignments
* Highest-priority listed first
*/
#define FEC_IRQ_LEVEL 4
#define FEC_IRQ_RX_PRIORITY 7
#define FEC_IRQ_TX_PRIORITY 6
#define SLT0_IRQ_LEVEL 4
#define SLT0_IRQ_PRIORITY 0
#define PSC0_IRQ_LEVEL 3
#define PSC0_IRQ_PRIORITY 7
#define PSC1_IRQ_LEVEL 3
#define PSC1_IRQ_PRIORITY 6
#define PSC2_IRQ_LEVEL 3
#define PSC2_IRQ_PRIORITY 5
#define PSC3_IRQ_LEVEL 3
#define PSC3_IRQ_PRIORITY 4
#ifdef __cplusplus
}
#endif
#endif
c/src/lib/libbsp/m68k/genmcf548x/include/bspopts.h.in
+19
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@@ -0,0 +1,19 @@
/* include/bspopts.h.in. Generated from configure.ac by autoheader. */
/* Use a clock speed of 100000000 for the m5484FireEngine board */
#undef BSP_CPU_CLOCK_SPEED
/* Define to the address where bug reports for this package should be sent. */
#undef PACKAGE_BUGREPORT
/* Define to the full name of this package. */
#undef PACKAGE_NAME
/* Define to the full name and version of this package. */
#undef PACKAGE_STRING
/* Define to the one symbol short name of this package. */
#undef PACKAGE_TARNAME
/* Define to the version of this package. */
#undef PACKAGE_VERSION
c/src/lib/libbsp/m68k/genmcf548x/include/coverhd.h
+105
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@@ -0,0 +1,105 @@
/* coverhd.h
*
* This include file has defines to represent the overhead associated
* with calling a particular directive from C. These are used in the
* Timing Test Suite to ignore the overhead required to pass arguments
* to directives. On some CPUs and/or target boards, this overhead
* is significant and makes it difficult to distinguish internal
* RTEMS execution time from that used to call the directive.
* This file should be updated after running the C overhead timing
* test. Once this update has been performed, the RTEMS Time Test
* Suite should be rebuilt to account for these overhead times in the
* timing results.
*
* NOTE: If these are all zero, then the times reported include
* all calling overhead including passing of arguments.
*
* COPYRIGHT (c) 1989-1998.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
#ifndef __COVERHD_h
#define __COVERHD_h
#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE 0
#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE 0
#define CALLING_OVERHEAD_TASK_CREATE 0
#define CALLING_OVERHEAD_TASK_IDENT 0
#define CALLING_OVERHEAD_TASK_START 0
#define CALLING_OVERHEAD_TASK_RESTART 0
#define CALLING_OVERHEAD_TASK_DELETE 0
#define CALLING_OVERHEAD_TASK_SUSPEND 0
#define CALLING_OVERHEAD_TASK_RESUME 0
#define CALLING_OVERHEAD_TASK_SET_PRIORITY 0
#define CALLING_OVERHEAD_TASK_MODE 0
#define CALLING_OVERHEAD_TASK_GET_NOTE 0
#define CALLING_OVERHEAD_TASK_SET_NOTE 0
#define CALLING_OVERHEAD_TASK_WAKE_WHEN 1
#define CALLING_OVERHEAD_TASK_WAKE_AFTER 0
#define CALLING_OVERHEAD_INTERRUPT_CATCH 0
#define CALLING_OVERHEAD_CLOCK_GET 1
#define CALLING_OVERHEAD_CLOCK_SET 1
#define CALLING_OVERHEAD_CLOCK_TICK 0
#define CALLING_OVERHEAD_TIMER_CREATE 0
#define CALLING_OVERHEAD_TIMER_IDENT 0
#define CALLING_OVERHEAD_TIMER_DELETE 0
#define CALLING_OVERHEAD_TIMER_FIRE_AFTER 1
#define CALLING_OVERHEAD_TIMER_FIRE_WHEN 1
#define CALLING_OVERHEAD_TIMER_RESET 0
#define CALLING_OVERHEAD_TIMER_CANCEL 0
#define CALLING_OVERHEAD_SEMAPHORE_CREATE 0
#define CALLING_OVERHEAD_SEMAPHORE_IDENT 0
#define CALLING_OVERHEAD_SEMAPHORE_DELETE 0
#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN 0
#define CALLING_OVERHEAD_SEMAPHORE_RELEASE 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE 0
#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH 0
#define CALLING_OVERHEAD_EVENT_SEND 0
#define CALLING_OVERHEAD_EVENT_RECEIVE 0
#define CALLING_OVERHEAD_SIGNAL_CATCH 0
#define CALLING_OVERHEAD_SIGNAL_SEND 0
#define CALLING_OVERHEAD_PARTITION_CREATE 0
#define CALLING_OVERHEAD_PARTITION_IDENT 0
#define CALLING_OVERHEAD_PARTITION_DELETE 0
#define CALLING_OVERHEAD_PARTITION_GET_BUFFER 0
#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER 0
#define CALLING_OVERHEAD_REGION_CREATE 0
#define CALLING_OVERHEAD_REGION_IDENT 0
#define CALLING_OVERHEAD_REGION_DELETE 0
#define CALLING_OVERHEAD_REGION_GET_SEGMENT 0
#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT 0
#define CALLING_OVERHEAD_PORT_CREATE 0
#define CALLING_OVERHEAD_PORT_IDENT 0
#define CALLING_OVERHEAD_PORT_DELETE 0
#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 0
#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 0
#define CALLING_OVERHEAD_IO_INITIALIZE 0
#define CALLING_OVERHEAD_IO_OPEN 0
#define CALLING_OVERHEAD_IO_CLOSE 0
#define CALLING_OVERHEAD_IO_READ 0
#define CALLING_OVERHEAD_IO_WRITE 0
#define CALLING_OVERHEAD_IO_CONTROL 0
#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED 0
#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE 0
#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT 0
#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE 0
#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL 0
#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD 0
#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE 0
#endif
c/src/lib/libbsp/m68k/genmcf548x/include/tm27.h
+29
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@@ -0,0 +1,29 @@
/*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#ifndef _RTEMS_TMTEST27
#error "This is an RTEMS internal file you must not include directly."
#endif
#ifndef __tm27_h
#define __tm27_h
/*
* Stuff for Time Test 27
* Don't bother with hardware -- just use a software-interrupt
*/
#define MUST_WAIT_FOR_INTERRUPT 0
#define Install_tm27_vector( handler ) set_vector( (handler), 35, 1 )
#define Cause_tm27_intr() asm volatile ("trap #3");
#define Clear_tm27_intr() /* empty */
#define Lower_tm27_intr() /* empty */
#endif
c/src/lib/libbsp/m68k/genmcf548x/network/network.c
+20
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@@ -0,0 +1,20 @@
#include <bsp.h>
#include <stdio.h>
#include <errno.h>
#include <stdarg.h>
#include <string.h>
#include <rtems.h>
#include <rtems/error.h>
#include <rtems/rtems_bsdnet.h>
#include <sys/param.h>
#include <sys/mbuf.h>
#include <sys/socket.h>
#include <sys/sockio.h>
#include <net/ethernet.h>
#include <net/if.h>
#include <netinet/in.h>
#include <netinet/if_ether.h>
c/src/lib/libbsp/m68k/genmcf548x/preinstall.am
+58
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@@ -0,0 +1,58 @@
## Automatically generated by ampolish3 - Do not edit
if AMPOLISH3
$(srcdir)/preinstall.am: Makefile.am
$(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am
endif
PREINSTALL_DIRS =
DISTCLEANFILES += $(PREINSTALL_DIRS)
all-local: $(TMPINSTALL_FILES)
TMPINSTALL_FILES =
CLEANFILES = $(TMPINSTALL_FILES)
all-am: $(PREINSTALL_FILES)
PREINSTALL_FILES =
CLEANFILES += $(PREINSTALL_FILES)
$(PROJECT_LIB)/$(dirstamp):
@$(MKDIR_P) $(PROJECT_LIB)
@: > $(PROJECT_LIB)/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)
$(PROJECT_INCLUDE)/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)
@: > $(PROJECT_INCLUDE)/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs
$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
$(PROJECT_INCLUDE)/coverhd.h: include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds
c/src/lib/libbsp/m68k/genmcf548x/start/start.S
+436
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File diff suppressed because it is too large. Load diff
c/src/lib/libbsp/m68k/genmcf548x/startup/bspclean.c
+60
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@@ -0,0 +1,60 @@
/*===============================================================*\
| Project: RTEMS generic mcf548x BSP |
+-----------------------------------------------------------------+
| File: bspclean.c |
+-----------------------------------------------------------------+
| The file contains the BSP cleanup code of the generic MCF548x |
| BSP. |
+-----------------------------------------------------------------+
| Copyright (c) 2007 |
| Embedded Brains GmbH |
| Obere Lagerstr. 30 |
| D-82178 Puchheim |
| Germany |
| rtems@embedded-brains.de |
+-----------------------------------------------------------------+
| |
| Parts of the code has been derived from the "dBUG source code" |
| package Freescale is providing for M548X EVBs. The usage of |
| the modified or unmodified code and it's integration into the |
| generic mcf548x BSP has been done according to the Freescale |
| license terms. |
| |
| The Freescale license terms can be reviewed in the file |
| |
| Freescale_license.txt |
| |
+-----------------------------------------------------------------+
| |
| The generic mcf548x BSP has been developed on the basic |
| structures and modules of the av5282 BSP. |
| |
+-----------------------------------------------------------------+
| |
| The license and distribution terms for this file may be |
| found in the file LICENSE in this distribution or at |
| |
| http://www.rtems.com/license/LICENSE. |
| |
+-----------------------------------------------------------------+
| |
| date history ID |
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 12.11.07 1.0 ras |
| |
\*===============================================================*/
#include <rtems.h>
#include <bsp.h>
#include <rtems/bspIo.h>
void bsp_cleanup( void )
{
printk("\nRTEMS exited!\n");
for ( ;; )
{
asm volatile ( " nop " );
asm volatile ( " nop " );
}
}
c/src/lib/libbsp/m68k/genmcf548x/startup/bspstart.c
+323
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File diff suppressed because it is too large. Load diff
c/src/lib/libbsp/m68k/genmcf548x/startup/init548x.c
+317
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File diff suppressed because it is too large. Load diff
c/src/lib/libbsp/m68k/genmcf548x/startup/linkcmds
+232
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File diff suppressed because it is too large. Load diff
c/src/lib/libbsp/m68k/genmcf548x/startup/linkcmds.m5484FireEngine.flash
+232
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File diff suppressed because it is too large. Load diff
c/src/lib/libbsp/m68k/genmcf548x/timer/timer.c
+94
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@@ -0,0 +1,94 @@
/*===============================================================*\
| Project: RTEMS generic mcf548x BSP |
+-----------------------------------------------------------------+
| File: timer.c |
+-----------------------------------------------------------------+
| The file contains the diagnostic timer code of generic MCF548x |
| BSP. |
+-----------------------------------------------------------------+
| Copyright (c) 2007 |
| Embedded Brains GmbH |
| Obere Lagerstr. 30 |
| D-82178 Puchheim |
| Germany |
| rtems@embedded-brains.de |
+-----------------------------------------------------------------+
| |
| Parts of the code has been derived from the "dBUG source code" |
| package Freescale is providing for M548X EVBs. The usage of |
| the modified or unmodified code and it's integration into the |
| generic mcf548x BSP has been done according to the Freescale |
| license terms. |
| |
| The Freescale license terms can be reviewed in the file |
| |
| Freescale_license.txt |
| |
+-----------------------------------------------------------------+
| |
| The generic mcf548x BSP has been developed on the basic |
| structures and modules of the av5282 BSP. |
| |
+-----------------------------------------------------------------+
| |
| The license and distribution terms for this file may be |
| found in the file LICENSE in this distribution or at |
| |
| http://www.rtems.com/license/LICENSE. |
| |
+-----------------------------------------------------------------+
| |
| date history ID |
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 12.11.07 1.0 ras |
| |
\*===============================================================*/
/*
* Timer Init
*
* Use the second slice timer (SLT1) as the diagnostic timer.
*/
#include <rtems.h>
#include <bsp.h>
#include <mcf548x/mcf548x.h>
rtems_boolean Timer_driver_Find_average_overhead;
static uint32_t microsecond_timer_value = 0;
void Timer_initialize(void)
{
MCF548X_SLT_SLTCNT1 = 0xFFFFFFFF;
MCF548X_SLT_SCR1 |= (MCF548X_SLT_SCR_TEN | MCF548X_SLT_SCR_RUN);
}
/*
* Return timer value in microsecond units
* XLB clock 100 MHz / 1us is equal to 100 counts
*/
int
Read_timer(void)
{
microsecond_timer_value = (0xFFFFFFFF - MCF548X_SLT_SCNT1)/100;
return microsecond_timer_value;
}
/*
* Empty function call used in loops to measure basic cost of looping
* in Timing Test Suite.
*/
rtems_status_code
Empty_function(void)
{
return RTEMS_SUCCESSFUL;
}
void
Set_find_average_overhead(rtems_boolean find_flag)
{
Timer_driver_Find_average_overhead = find_flag;
}