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https://gitlab.rtems.org/rtems/rtos/rtems.git
synced 2026-09-20 18:45:30 +08:00
bsp/mpc55xx: Add .dsram section
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@@ -37,6 +37,8 @@
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#include <rtems/console.h>
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#include <rtems/clockdrv.h>
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#include <libcpu/powerpc-utility.h>
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#include <bsp/tictac.h>
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#include <bsp/default-initial-extension.h>
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@@ -77,6 +79,14 @@ void *bsp_idle_thread(uintptr_t arg);
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#define BSP_IDLE_TASK_BODY bsp_idle_thread
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LINKER_SYMBOL(bsp_section_dsram_begin)
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LINKER_SYMBOL(bsp_section_dsram_end)
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LINKER_SYMBOL(bsp_section_dsram_size)
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LINKER_SYMBOL(bsp_section_dsram_load_begin)
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LINKER_SYMBOL(bsp_section_dsram_load_end)
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#define BSP_DSRAM_SECTION __attribute__((section(".bsp_dsram")))
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typedef enum {
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MPC55XX_FATAL_FMPLL_LOCK
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} mpc55xx_fatal_code;
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@@ -1,7 +1,9 @@
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MEMORY {
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RAM : ORIGIN = 0x40000000, LENGTH = 256K - 16k
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RAM_EXT : ORIGIN = 0x20000000, LENGTH = 512K
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DSROM : ORIGIN = 0x00020000, LENGTH = 64k
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RAM : ORIGIN = 0x40000000, LENGTH = 240k
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NOCACHE : ORIGIN = 0x4003c000, LENGTH = 16k
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DSRAM : ORIGIN = 0x20000000, LENGTH = 64k
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RAM_EXT : ORIGIN = 0x20010000, LENGTH = 448k
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NVRAM : ORIGIN = 0x3ffa0000, LENGTH = 128k
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}
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@@ -24,4 +26,15 @@ REGION_ALIAS ("REGION_NOCACHE", NOCACHE);
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REGION_ALIAS ("REGION_NOCACHE_LOAD", ROM);
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REGION_ALIAS ("REGION_NVRAM", NVRAM);
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SECTIONS {
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.dsram (NOLOAD) : {
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bsp_section_dsram_begin = .;
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*(SORT(.bsp_dsram*))
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bsp_section_dsram_end = .;
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} > DSRAM AT > DSROM
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bsp_section_dsram_size = bsp_section_dsram_end - bsp_section_dsram_begin;
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bsp_section_dsram_load_begin = LOADADDR (.dsram);
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bsp_section_dsram_load_end = bsp_section_dsram_load_begin + bsp_section_dsram_size;
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}
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INCLUDE linkcmds.mpc55xx
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