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2007-08-02 Joel Sherrill <joel.sherrill@oarcorp.com>

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* Makefile.am: Add shared ShowBATS().
	* startup/cpuinit.c: Split out BAT initialization into subroutine
	that is defined based upon conditionals set.  More critically
	added code to detect and correct for a buggy U-Boot found on
	some Freescale LITE5200B boards which report Flash memory to
	be for 32MB at 0xFF000000 instead of 0xFE000000.  If we use
	the reported information, the system gives an exception just
	after the BAT is programmed.
	* vectors/vectors_init.c: Turn off message unless verbose is on.
This commit is contained in:
Joel Sherrill
2007-08-02 13:51:14 +00:00
parent 67ef0f1ea2
commit 65762c815c
4 changed files with 90 additions and 29 deletions
Download Patch File Download Diff File Expand all files Collapse all files
c/src/lib/libbsp/powerpc/gen5200/ChangeLog
+12
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@@ -1,3 +1,15 @@
2007-08-02 Joel Sherrill <joel.sherrill@oarcorp.com>
* Makefile.am: Add shared ShowBATS().
* startup/cpuinit.c: Split out BAT initialization into subroutine
that is defined based upon conditionals set. More critically
added code to detect and correct for a buggy U-Boot found on
some Freescale LITE5200B boards which report Flash memory to
be for 32MB at 0xFF000000 instead of 0xFE000000. If we use
the reported information, the system gives an exception just
after the BAT is programmed.
* vectors/vectors_init.c: Turn off message unless verbose is on.
2007-07-18 Joel Sherrill <joel.sherrill@oarcorp.com>
* Makefile.am, vectors/vectors_init.c: Print stack trace on exception.
c/src/lib/libbsp/powerpc/gen5200/Makefile.am
+2 -1
View File
@@ -118,7 +118,8 @@ noinst_PROGRAMS += startup.rel
startup_rel_SOURCES = startup/bspclean.c ../../shared/bsplibc.c \
../../shared/bsppost.c startup/bspstart.c ../../shared/bootcard.c \
../../shared/sbrk.c ../shared/uboot_dump_bdinfo.c \
../../shared/gnatinstallhandler.c startup/cpuinit.c
../../shared/gnatinstallhandler.c startup/cpuinit.c \
../shared/showbats.c
startup_rel_CPPFLAGS = $(AM_CPPFLAGS)
startup_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
c/src/lib/libbsp/powerpc/gen5200/startup/cpuinit.c
+71 -27
View File
@@ -91,6 +91,11 @@ void calc_dbat_regvals(BAT *bat_ptr,
uint32_t block_mask;
uint32_t end_addr;
/*
* clear dbat
*/
memset(bat_ptr, 0,sizeof(BAT));
/*
* determine block mask, that overlaps the whole block
*/
@@ -113,26 +118,11 @@ void calc_dbat_regvals(BAT *bat_ptr,
bat_ptr->batl.pp = flg_bpp;
}
void cpu_init(void)
{
register unsigned long reg;
#if defined (BRS5L)
void cpu_init_bsp(void)
{
BAT dbat;
/*
* clear dbat
*/
memset(&dbat, 0,sizeof(dbat));
/* enable instruction cache */
GET_HID0(reg);
reg |= HID0_ICE;
SET_HID0(reg);
/*
* set up DBAT registers in MMU
*/
#if defined (BRS5L)
calc_dbat_regvals(&dbat,RAM_START,RAM_SIZE,1,0,0,0,BPP_RW);
SET_DBAT(0,dbat.batu,dbat.batl);
@@ -144,23 +134,50 @@ void cpu_init(void)
calc_dbat_regvals(&dbat,DPRAM_START,128*1024,1,1,1,1,BPP_RW);
SET_DBAT(3,dbat.batu,dbat.batl);
#endif
#if defined (HAS_UBOOT)
}
#elif defined (HAS_UBOOT)
void cpu_init_bsp(void)
{
BAT dbat;
/*
* Program BAT0 for RAM
*/
calc_dbat_regvals(&dbat,
uboot_bdinfo_ptr->bi_memstart,
uboot_bdinfo_ptr->bi_memsize,
1,0,0,0,BPP_RW);
SET_DBAT(0,dbat.batu,dbat.batl);
calc_dbat_regvals(&dbat,
uboot_bdinfo_ptr->bi_flashstart,
uboot_bdinfo_ptr->bi_flashsize,
1,0,0,0,BPP_RX);
/*
* Program BAT1 for Flash
*
* WARNING!! Some Freescale LITE5200B boards ship with a version of
* U-Boot that lies about the starting address of Flash. This check
* corrects that.
*/
if ( (uboot_bdinfo_ptr->bi_flashstart + uboot_bdinfo_ptr->bi_flashsize) <
uboot_bdinfo_ptr->bi_flashstart ) {
uint32_t start = 0 - uboot_bdinfo_ptr->bi_flashsize;
calc_dbat_regvals(&dbat,
start, uboot_bdinfo_ptr->bi_flashsize, 1,0,0,0,BPP_RX);
} else {
calc_dbat_regvals(&dbat,
uboot_bdinfo_ptr->bi_flashstart,
uboot_bdinfo_ptr->bi_flashsize,
1,0,0,0,BPP_RX);
}
SET_DBAT(1,dbat.batu,dbat.batl);
/*
* Program BAT2 for the MBAR
*/
calc_dbat_regvals(&dbat,MBAR,128*1024,1,1,1,1,BPP_RW);
SET_DBAT(2,dbat.batu,dbat.batl);
/*
* If there is SRAM, program BAT3 for that memory
*/
if (uboot_bdinfo_ptr->bi_sramsize != 0) {
calc_dbat_regvals(&dbat,
uboot_bdinfo_ptr->bi_sramstart,
@@ -168,19 +185,46 @@ void cpu_init(void)
0,1,1,1,BPP_RW);
SET_DBAT(3,dbat.batu,dbat.batl);
}
}
#else
#warning "Using BAT register values set by environment"
#endif
void cpu_init(void)
{
register unsigned long reg;
/*
* Enable instruction cache
*/
GET_HID0(reg);
reg |= HID0_ICE;
SET_HID0(reg);
/*
* set up DBAT registers in MMU
*/
cpu_init_bsp();
#if defined(SHOW_MORE_INIT_SETTINGS)
{ extern void ShowBATS(void);
ShowBATS();
}
#endif
/*
* enable data MMU in MSR
*/
_write_MSR(_read_MSR() | MSR_DR);
#if 1 /* TRACE32 now supports data cache for MGT5x00 */
/*
* enable data cache
*
* NOTE: TRACE32 now supports data cache for MGT5x00
*/
GET_HID0(reg);
reg |= HID0_DCE;
SET_HID0(reg);
#endif
}
}
c/src/lib/libbsp/powerpc/gen5200/vectors/vectors_init.c
+5 -1
View File
@@ -81,6 +81,8 @@ static rtems_raw_except_connect_data exception_table[LAST_VALID_EXC + 1];
exception_handler_t globalExceptHdl;
extern void CPU_print_stack(void);
void C_exception_handler(BSP_Exception_frame* excPtr)
{
int recoverable = 0;
@@ -200,6 +202,8 @@ void initialize_exceptions()
if (!ppc_init_exceptions(&exception_config))
BSP_panic("Exception handling initialization failed\n");
else
#if defined(SHOW_MORE_INIT_SETTINGS)
printk("Exception handling initialization done\n");
#endif
}