bsps/microblaze: Remove GPIO build system options

The number of GPIO devices along with each of their particular
configurations is application-specific. Encoding this information as
build options also introduced a lot of clutter.

bsps/microblaze/microblaze_fpga/gpio/microblaze-gpio.c

@@ -42,38 +42,6 @@
 extern "C" {
 #endif /* __cplusplus */
 
-Microblaze_GPIO_context gpio1_context = {
-  .regs = (Microblaze_GPIO_registers *) BSP_MICROBLAZE_FPGA_GPIO1_BASE,
-#ifdef BSP_MICROBLAZE_FPGA_GPIO1_DUAL_CHANNEL
-  .is_dual = true,
-#else
-  .is_dual = false,
-#endif
-  .irq = BSP_MICROBLAZE_FPGA_GPIO1_IRQ,
-#ifdef BSP_MICROBLAZE_FPGA_GPIO1_INTERRUPT
-  .has_interrupts = true
-#else
-  .has_interrupts = false
-#endif
-};
-
-#if BSP_MICROBLAZE_FPGA_GPIO2_ENABLED
-Microblaze_GPIO_context gpio2_context = {
-  .regs = (Microblaze_GPIO_registers *) BSP_MICROBLAZE_FPGA_GPIO2_BASE,
-#ifdef BSP_MICROBLAZE_FPGA_GPIO2_DUAL_CHANNEL
-  .is_dual = true,
-#else
-  .is_dual = false,
-#endif
-  .irq = BSP_MICROBLAZE_FPGA_GPIO2_IRQ,
-#ifdef BSP_MICROBLAZE_FPGA_GPIO2_INTERRUPT
-  .has_interrupts = true
-#else
-  .has_interrupts = false
-#endif
-};
-#endif
-
 void microblaze_gpio_set_data_direction(
   Microblaze_GPIO_context *ctx,
   uint32_t                 channel,

bsps/microblaze/microblaze_fpga/include/bsp/microblaze-gpio.h

@@ -129,16 +129,6 @@ typedef struct {
   bool                       has_interrupts;
 } Microblaze_GPIO_context;
 
-extern Microblaze_GPIO_context gpio1_context;
-#ifdef BSP_MICROBLAZE_FPGA_GPIO2_ENABLED
-extern Microblaze_GPIO_context gpio2_context;
-#endif
-
-#define gpio1 ((Microblaze_GPIO_context * const) &gpio1_context)
-#ifdef BSP_MICROBLAZE_FPGA_GPIO2_ENABLED
-#define gpio2 ((Microblaze_GPIO_context * const) &gpio2_context)
-#endif
-
 /**
  * @brief Set pin configuration for the specified GPIO channel.
  *

spec/build/bsps/microblaze/microblaze_fpga/grp.yml

@@ -28,24 +28,6 @@ links:
   uid: optdcachesize
 - role: build-dependency
   uid: optdtbheaderpath
-- role: build-dependency
-  uid: optgpio2enable
-- role: build-dependency
-  uid: optgpio1baseaddress
-- role: build-dependency
-  uid: optgpio2baseaddress
-- role: build-dependency
-  uid: optgpio1dualchannel
-- role: build-dependency
-  uid: optgpio2dualchannel
-- role: build-dependency
-  uid: optgpio1irq
-- role: build-dependency
-  uid: optgpio2irq
-- role: build-dependency
-  uid: optgpio1interrupt
-- role: build-dependency
-  uid: optgpio2interrupt
 - role: build-dependency
   uid: opticachebaseaddress
 - role: build-dependency

spec/build/bsps/microblaze/microblaze_fpga/optgpio1baseaddress.yml

@@ -1,19 +0,0 @@
-SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
-actions:
-- get-integer: null
-- assert-uint32: null
-- env-assign: null
-- format-and-define: null
-build-type: option
-copyrights:
-- Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
-default:
-- enabled-by: true
-  value: 0x40000000
-description: |
-  base address of GPIO 1
-enabled-by: true
-format: '{:#010x}'
-links: []
-name: BSP_MICROBLAZE_FPGA_GPIO1_BASE
-type: build

spec/build/bsps/microblaze/microblaze_fpga/optgpio1dualchannel.yml

@@ -1,16 +0,0 @@
-SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
-actions:
-- get-boolean: null
-- define-condition: null
-build-type: option
-copyrights:
-- Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
-default:
-- enabled-by: true
-  value: true
-description: |
-  GPIO 1 is dual channel
-enabled-by: true
-links: []
-name: BSP_MICROBLAZE_FPGA_GPIO1_DUAL_CHANNEL
-type: build

spec/build/bsps/microblaze/microblaze_fpga/optgpio1interrupt.yml

@@ -1,16 +0,0 @@
-SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
-actions:
-- get-boolean: null
-- define-condition: null
-build-type: option
-copyrights:
-- Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
-default:
-- enabled-by: true
-  value: true
-description: |
-  GPIO 1 has interrupt
-enabled-by: true
-links: []
-name: BSP_MICROBLAZE_FPGA_GPIO1_INTERRUPT
-type: build

spec/build/bsps/microblaze/microblaze_fpga/optgpio1irq.yml

@@ -1,18 +0,0 @@
-SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
-actions:
-- get-integer: null
-- assert-uint32: null
-- define: null
-build-type: option
-copyrights:
-- Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
-default:
-- enabled-by: true
-  value: 8
-description: |
-  the IRQ number of GPIO 1
-enabled-by: true
-format: '{}'
-links: []
-name: BSP_MICROBLAZE_FPGA_GPIO1_IRQ
-type: build

spec/build/bsps/microblaze/microblaze_fpga/optgpio2baseaddress.yml

@@ -1,19 +0,0 @@
-SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
-actions:
-- get-integer: null
-- assert-uint32: null
-- env-assign: null
-- format-and-define: null
-build-type: option
-copyrights:
-- Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
-default:
-- enabled-by: true
-  value: 0x40010000
-description: |
-  base address of GPIO 2
-enabled-by: BSP_MICROBLAZE_FPGA_GPIO2_ENABLED
-format: '{:#010x}'
-links: []
-name: BSP_MICROBLAZE_FPGA_GPIO2_BASE
-type: build

spec/build/bsps/microblaze/microblaze_fpga/optgpio2dualchannel.yml

@@ -1,16 +0,0 @@
-SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
-actions:
-- get-boolean: null
-- define-condition: null
-build-type: option
-copyrights:
-- Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
-default:
-- enabled-by: true
-  value: false
-description: |
-  GPIO 2 is dual channel
-enabled-by: BSP_MICROBLAZE_FPGA_GPIO2_ENABLED
-links: []
-name: BSP_MICROBLAZE_FPGA_GPIO2_DUAL_CHANNEL
-type: build

spec/build/bsps/microblaze/microblaze_fpga/optgpio2enable.yml

@@ -1,17 +0,0 @@
-SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
-actions:
-- get-boolean: null
-- env-enable: null
-- define-condition: null
-build-type: option
-copyrights:
-- Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
-default:
-- enabled-by: true
-  value: false
-description: |
-  GPIO 2 is enabled
-enabled-by: true
-links: []
-name: BSP_MICROBLAZE_FPGA_GPIO2_ENABLED
-type: build

spec/build/bsps/microblaze/microblaze_fpga/optgpio2interrupt.yml

@@ -1,16 +0,0 @@
-SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
-actions:
-- get-boolean: null
-- define-condition: null
-build-type: option
-copyrights:
-- Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
-default:
-- enabled-by: true
-  value: true
-description: |
-  GPIO 2 has interrupt
-enabled-by: BSP_MICROBLAZE_FPGA_GPIO2_ENABLED
-links: []
-name: BSP_MICROBLAZE_FPGA_GPIO2_INTERRUPT
-type: build

spec/build/bsps/microblaze/microblaze_fpga/optgpio2irq.yml

@@ -1,18 +0,0 @@
-SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
-actions:
-- get-integer: null
-- assert-uint32: null
-- define: null
-build-type: option
-copyrights:
-- Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
-default:
-- enabled-by: true
-  value: 9
-description: |
-  the IRQ number of GPIO 2
-enabled-by: BSP_MICROBLAZE_FPGA_GPIO2_ENABLED
-format: '{}'
-links: []
-name: BSP_MICROBLAZE_FPGA_GPIO2_IRQ
-type: build