bsp/xilinx-zynq: Move devcfg DMA alignment size to the install header

Fix the dev path spelling mistake.

Updates #5142

bsps/arm/xilinx-zynq/include/dev/devcfg/zynq-devcfg-regs.h

@@ -62,8 +62,6 @@ extern "C" {
 #define ZYNQ_DEVCFG_BASE_ADDR 0xF8007000UL
 /* For use with the PCAP DMA */
 #define ZYNQ_DEVCFG_BITSTREAM_ADDR 0xFFFFFFFFUL
-/* PCAP DMA transfers must be 64-byte aligned */
-#define ZYNQ_DEVCFG_PCAP_DMA_ALIGN 64
 #define ZYNQ_DEVCFG_INTERRUPT_VECTOR 40
 
 typedef struct {

bsps/arm/xilinx-zynq/include/dev/devcfg/zynq-devcfg.h

@@ -63,7 +63,7 @@
 extern "C" {
 #endif /* __cplusplus */
 
-#define ZYNQ_DEVCFG_NAME "/dev/fgpa"
+#define ZYNQ_DEVCFG_NAME "/dev/fpga"
 /*
  * Add to CONFIGURE_APPLICATION_PREREQUISITE_DRIVERS
  */
@@ -71,6 +71,11 @@ extern "C" {
   { zynq_devcfg_init, zynq_devcfg_open, zynq_devcfg_close, zynq_devcfg_read, \
     zynq_devcfg_write, zynq_devcfg_control }
 
+/* PCAP DMA transfers must be 64-byte aligned.
+   Use this to read or write an aligned buffer avoiding the
+   use of the heap in the driver. */
+#define ZYNQ_DEVCFG_PCAP_DMA_ALIGN 64
+
 /* Configuration command words. */
 #define ZYNQ_DEVCFG_CFG_DUMMY ( 0xffffffff )
 #define ZYNQ_DEVCFG_CFG_BUS_WIDTH_SYNC ( 0x000000bb )