dev/serial: Add Zynq UART kernel I/O support

Replace the BSP_CONSOLE_MINOR BSP option for the Xilinx Zynq BSPs with the new
BSP option ZYNQ_UART_KERNEL_IO_BASE_ADDR.  Move the kernel I/O support to a
shared file.
This commit is contained in:
Sebastian Huber
2024-04-04 12:53:53 +02:00
parent 8ad3f92b9a
commit 53d092471f
16 changed files with 92 additions and 223 deletions
+4 -37
View File
@@ -35,7 +35,6 @@
*/
#include <rtems/console.h>
#include <rtems/bspIo.h>
#include <rtems/endian.h>
#include <rtems/sysinit.h>
#include <rtems/termiostypes.h>
@@ -208,6 +207,7 @@ rtems_status_code console_initialize(
rtems_termios_initialize();
for (i = 0; i < RTEMS_ARRAY_SIZE(zynqmp_uart_instances); ++i) {
zynq_uart_context *ctx = &zynqmp_uart_instances[i];
char uart[] = "/dev/ttySX";
uart[sizeof(uart) - 2] = (char) ('0' + i);
@@ -215,10 +215,10 @@ rtems_status_code console_initialize(
&uart[0],
&zynq_uart_handler,
NULL,
&zynqmp_uart_instances[i].base
&ctx->base
);
if (i == BSP_CONSOLE_MINOR) {
if (ctx->regs == (zynq_uart *) ZYNQ_UART_KERNEL_IO_BASE_ADDR) {
link(&uart[0], CONSOLE_DEVICE_NAME);
}
}
@@ -237,38 +237,5 @@ rtems_status_code console_initialize(
void zynqmp_debug_console_flush(void)
{
zynq_uart_reset_tx_flush(zynqmp_uart_instances[BSP_CONSOLE_MINOR].regs);
zynq_uart_reset_tx_flush((zynq_uart *) ZYNQ_UART_KERNEL_IO_BASE_ADDR);
}
static void zynqmp_debug_console_out(char c)
{
zynq_uart_write_char_polled(zynqmp_uart_instances[BSP_CONSOLE_MINOR].regs, c);
}
static void zynqmp_debug_console_init(void)
{
zynq_uart_initialize(zynqmp_uart_instances[BSP_CONSOLE_MINOR].regs);
BSP_output_char = zynqmp_debug_console_out;
}
static void zynqmp_debug_console_early_init(char c)
{
zynq_uart_initialize(zynqmp_uart_instances[BSP_CONSOLE_MINOR].regs);
BSP_output_char = zynqmp_debug_console_out;
zynqmp_debug_console_out(c);
}
static int zynqmp_debug_console_in(void)
{
return zynq_uart_read_char_polled(zynqmp_uart_instances[BSP_CONSOLE_MINOR].regs);
}
BSP_output_char_function_type BSP_output_char = zynqmp_debug_console_early_init;
BSP_polling_getchar_function_type BSP_poll_char = zynqmp_debug_console_in;
RTEMS_SYSINIT_ITEM(
zynqmp_debug_console_init,
RTEMS_SYSINIT_BSP_START,
RTEMS_SYSINIT_ORDER_LAST_BUT_5
);
@@ -1,50 +0,0 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsARMZynq
*
* @brief This source file contains the definition of ::zynq_uart_instances.
*/
/*
* Copyright (C) 2013, 2017 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp/irq.h>
#include <dev/serial/zynq-uart.h>
#include <dev/serial/zynq-uart-regs.h>
zynq_uart_context zynq_uart_instances[2] = {
{
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 0" ),
.regs = (volatile zynq_uart *) ZYNQ_UART_0_BASE_ADDR,
.irq = ZYNQ_IRQ_UART_0
}, {
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 1" ),
.regs = (volatile zynq_uart *) ZYNQ_UART_1_BASE_ADDR,
.irq = ZYNQ_IRQ_UART_1
}
};
+18 -2
View File
@@ -29,7 +29,22 @@
#include <rtems/termiostypes.h>
#include <bsp.h>
#include <bsp/bootcard.h>
#include <bsp/irq.h>
#include <dev/serial/zynq-uart.h>
#include <dev/serial/zynq-uart-regs.h>
static zynq_uart_context zynq_uart_instances[2] = {
{
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 0" ),
.regs = (volatile zynq_uart *) ZYNQ_UART_0_BASE_ADDR,
.irq = ZYNQ_IRQ_UART_0
}, {
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 1" ),
.regs = (volatile zynq_uart *) ZYNQ_UART_1_BASE_ADDR,
.irq = ZYNQ_IRQ_UART_1
}
};
rtems_status_code console_initialize(
rtems_device_major_number major,
@@ -42,6 +57,7 @@ rtems_status_code console_initialize(
rtems_termios_initialize();
for (i = 0; i < RTEMS_ARRAY_SIZE(zynq_uart_instances); ++i) {
zynq_uart_context *ctx = &zynq_uart_instances[i];
char uart[] = "/dev/ttySX";
uart[sizeof(uart) - 2] = (char) ('0' + i);
@@ -49,10 +65,10 @@ rtems_status_code console_initialize(
&uart[0],
&zynq_uart_handler,
NULL,
&zynq_uart_instances[i].base
&ctx->base
);
if (i == BSP_CONSOLE_MINOR) {
if (ctx->regs == (zynq_uart *) ZYNQ_UART_KERNEL_IO_BASE_ADDR) {
link(&uart[0], CONSOLE_DEVICE_NAME);
}
}
-3
View File
@@ -54,7 +54,6 @@
#include <bsp/default-initial-extension.h>
#include <bsp/start.h>
#include <dev/serial/zynq-uart.h>
#include <dev/serial/zynq-uart-zynq.h>
#ifdef __cplusplus
@@ -75,8 +74,6 @@ extern "C" {
#define BSP_ARM_L2C_310_ID 0x410000c8
extern zynq_uart_context zynq_uart_instances[2];
/**
* @brief Zynq specific set up of the MMU.
*
+4 -2
View File
@@ -35,14 +35,16 @@
#include <bsp.h>
#include <bsp/bootcard.h>
#include <dev/serial/zynq-uart.h>
#include <dev/serial/zynq-uart-regs.h>
void bsp_reset(void)
{
volatile zynq_uart *regs =
(volatile zynq_uart *) ZYNQ_UART_KERNEL_IO_BASE_ADDR;
volatile uint32_t *slcr_unlock = (volatile uint32_t *) 0xf8000008;
volatile uint32_t *pss_rst_ctrl = (volatile uint32_t *) 0xf8000200;
zynq_uart_reset_tx_flush(&zynq_uart_instances[BSP_CONSOLE_MINOR]);
zynq_uart_reset_tx_flush(regs);
while (true) {
*slcr_unlock = 0xdf0d;
@@ -32,7 +32,6 @@
#include <rtems/console.h>
#include <rtems/bspIo.h>
#include <rtems/sysinit.h>
#include <rtems/termiostypes.h>
#include <bsp/irq.h>
@@ -62,6 +61,7 @@ rtems_status_code console_initialize(
size_t i;
for (i = 0; i < RTEMS_ARRAY_SIZE(zynqmp_uart_instances); ++i) {
zynq_uart_context *ctx = &zynqmp_uart_instances[i];
char uart[] = "/dev/ttySX";
uart[sizeof(uart) - 2] = (char) ('0' + i);
@@ -69,10 +69,10 @@ rtems_status_code console_initialize(
&uart[0],
&zynq_uart_handler,
NULL,
&zynqmp_uart_instances[i].base
&ctx->base
);
if (i == BSP_CONSOLE_MINOR) {
if (ctx->regs == (zynq_uart *) ZYNQ_UART_KERNEL_IO_BASE_ADDR) {
link(&uart[0], CONSOLE_DEVICE_NAME);
}
}
@@ -82,37 +82,5 @@ rtems_status_code console_initialize(
void zynqmp_debug_console_flush(void)
{
zynq_uart_reset_tx_flush(zynqmp_uart_instances[BSP_CONSOLE_MINOR].regs);
zynq_uart_reset_tx_flush((zynq_uart *) ZYNQ_UART_KERNEL_IO_BASE_ADDR);
}
static void zynqmp_debug_console_out(char c)
{
zynq_uart_write_char_polled(zynqmp_uart_instances[BSP_CONSOLE_MINOR].regs, c);
}
static void zynqmp_debug_console_init(void)
{
zynq_uart_initialize(zynqmp_uart_instances[BSP_CONSOLE_MINOR].regs);
BSP_output_char = zynqmp_debug_console_out;
}
static void zynqmp_debug_console_early_init(char c)
{
zynq_uart_initialize(zynqmp_uart_instances[BSP_CONSOLE_MINOR].regs);
zynqmp_debug_console_out(c);
}
static int zynqmp_debug_console_in(void)
{
return zynq_uart_read_char_polled(zynqmp_uart_instances[BSP_CONSOLE_MINOR].regs);
}
BSP_output_char_function_type BSP_output_char = zynqmp_debug_console_early_init;
BSP_polling_getchar_function_type BSP_poll_char = zynqmp_debug_console_in;
RTEMS_SYSINIT_ITEM(
zynqmp_debug_console_init,
RTEMS_SYSINIT_BSP_START,
RTEMS_SYSINIT_ORDER_LAST_BUT_5
);
@@ -32,7 +32,6 @@
#include <rtems/console.h>
#include <rtems/bspIo.h>
#include <rtems/sysinit.h>
#include <rtems/termiostypes.h>
#include <bsp/irq.h>
@@ -64,6 +63,7 @@ rtems_status_code console_initialize(
rtems_termios_initialize();
for (i = 0; i < RTEMS_ARRAY_SIZE(zynqmp_uart_instances); ++i) {
zynq_uart_context *ctx = &zynqmp_uart_instances[i];
char uart[] = "/dev/ttySX";
uart[sizeof(uart) - 2] = (char) ('0' + i);
@@ -71,10 +71,10 @@ rtems_status_code console_initialize(
&uart[0],
&zynq_uart_handler,
NULL,
&zynqmp_uart_instances[i].base
&ctx->base
);
if (i == BSP_CONSOLE_MINOR) {
if (ctx->regs == (zynq_uart *) ZYNQ_UART_KERNEL_IO_BASE_ADDR) {
link(&uart[0], CONSOLE_DEVICE_NAME);
}
}
@@ -84,37 +84,5 @@ rtems_status_code console_initialize(
void zynqmp_debug_console_flush(void)
{
zynq_uart_reset_tx_flush(zynqmp_uart_instances[BSP_CONSOLE_MINOR].regs);
zynq_uart_reset_tx_flush((zynq_uart *) ZYNQ_UART_KERNEL_IO_BASE_ADDR);
}
static void zynqmp_debug_console_out(char c)
{
zynq_uart_write_char_polled(zynqmp_uart_instances[BSP_CONSOLE_MINOR].regs, c);
}
static void zynqmp_debug_console_init(void)
{
zynq_uart_initialize(zynqmp_uart_instances[BSP_CONSOLE_MINOR].regs);
BSP_output_char = zynqmp_debug_console_out;
}
static void zynqmp_debug_console_early_init(char c)
{
zynq_uart_initialize(zynqmp_uart_instances[BSP_CONSOLE_MINOR].regs);
zynqmp_debug_console_out(c);
}
static int zynqmp_debug_console_in(void)
{
return zynq_uart_read_char_polled(zynqmp_uart_instances[BSP_CONSOLE_MINOR].regs);
}
BSP_output_char_function_type BSP_output_char = zynqmp_debug_console_early_init;
BSP_polling_getchar_function_type BSP_poll_char = zynqmp_debug_console_in;
RTEMS_SYSINIT_ITEM(
zynqmp_debug_console_init,
RTEMS_SYSINIT_BSP_START,
RTEMS_SYSINIT_ORDER_LAST_BUT_5
);
@@ -3,14 +3,14 @@
/**
* @file
*
* @ingroup RTEMSBSPsARMZynq
* @ingroup zynq_uart
*
* @brief This source file contains the definition of ::BSP_output_char and
* ::BSP_poll_char.
*/
/*
* Copyright (C) 2013, 2017 embedded brains GmbH & Co. KG
* Copyright (C) 2013, 2024 embedded brains GmbH & Co. KG
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -35,47 +35,54 @@
*/
#include <rtems/bspIo.h>
#include <rtems/sysinit.h>
#include <bsp.h>
#include <dev/serial/zynq-uart.h>
#include <dev/serial/zynq-uart-regs.h>
#include <rtems/sysinit.h>
#include <bspopts.h>
static void zynq_debug_console_out(char c)
static void zynq_uart_kernel_output_char(char c)
{
zynq_uart_write_char_polled(zynq_uart_instances[BSP_CONSOLE_MINOR].regs, c);
volatile zynq_uart *regs =
(volatile zynq_uart *) ZYNQ_UART_KERNEL_IO_BASE_ADDR;
zynq_uart_write_char_polled(regs, c);
}
static void zynq_debug_console_early_init(char c);
static void zynq_debug_console_init(void)
static int zynq_uart_kernel_poll_char(void)
{
if (BSP_output_char != zynq_debug_console_early_init) {
volatile zynq_uart *regs =
(volatile zynq_uart *) ZYNQ_UART_KERNEL_IO_BASE_ADDR;
return zynq_uart_read_char_polled(regs);
}
static void zynq_uart_kernel_early_init(char c);
static void zynq_uart_kernel_init(void)
{
volatile zynq_uart *regs =
(volatile zynq_uart *) ZYNQ_UART_KERNEL_IO_BASE_ADDR;
if (BSP_output_char != zynq_uart_kernel_early_init) {
return;
}
zynq_uart_initialize(zynq_uart_instances[BSP_CONSOLE_MINOR].regs);
BSP_output_char = zynq_debug_console_out;
zynq_uart_initialize(regs);
BSP_output_char = zynq_uart_kernel_output_char;
}
static void zynq_debug_console_early_init(char c)
static void zynq_uart_kernel_early_init(char c)
{
zynq_debug_console_init();
zynq_debug_console_out(c);
zynq_uart_kernel_init();
zynq_uart_kernel_output_char(c);
}
static int zynq_debug_console_in(void)
{
return zynq_uart_read_char_polled(zynq_uart_instances[BSP_CONSOLE_MINOR].regs);
}
BSP_output_char_function_type BSP_output_char = zynq_uart_kernel_early_init;
BSP_output_char_function_type BSP_output_char = zynq_debug_console_early_init;
BSP_polling_getchar_function_type BSP_poll_char = zynq_debug_console_in;
BSP_polling_getchar_function_type BSP_poll_char = zynq_uart_kernel_poll_char;
RTEMS_SYSINIT_ITEM(
zynq_debug_console_init,
zynq_uart_kernel_init,
RTEMS_SYSINIT_BSP_START,
RTEMS_SYSINIT_ORDER_LAST_BUT_5
);
@@ -38,8 +38,6 @@ links:
uid: optclki2c1
- role: build-dependency
uid: optclkuart
- role: build-dependency
uid: ../../optconminor
- role: build-dependency
uid: ../../obj
- role: build-dependency
-2
View File
@@ -34,8 +34,6 @@ links:
uid: optclkuart
- role: build-dependency
uid: optconirq
- role: build-dependency
uid: ../../optconminor
- role: build-dependency
uid: optint0len
- role: build-dependency
-2
View File
@@ -26,9 +26,7 @@ source:
- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c
- bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c
- bsps/arm/shared/start/bsp-start-memcpy.S
- bsps/arm/xilinx-zynq/console/console-config.c
- bsps/arm/xilinx-zynq/console/console-init.c
- bsps/arm/xilinx-zynq/console/debug-console.c
- bsps/shared/dev/i2c/cadence-i2c.c
- bsps/arm/xilinx-zynq/start/bspreset.c
- bsps/arm/xilinx-zynq/start/bspstart.c
@@ -24,8 +24,6 @@ links:
uid: optclkuart
- role: build-dependency
uid: optconirq
- role: build-dependency
uid: ../../optconminor
- role: build-dependency
uid: optint0len
- role: build-dependency
@@ -42,8 +42,6 @@ links:
uid: optclkuart
- role: build-dependency
uid: optconirq
- role: build-dependency
uid: ../../optconminor
- role: build-dependency
uid: optint0len
- role: build-dependency
+4 -1
View File
@@ -14,8 +14,11 @@ install:
- bsps/include/dev/serial/zynq-uart.h
- bsps/include/dev/serial/zynq-uart-zynq.h
- bsps/include/dev/serial/zynq-uart-zynqmp.h
links: []
links:
- role: build-dependency
uid: optzynquartkernbase
source:
- bsps/shared/dev/serial/zynq-uart-kernel-io.c
- bsps/shared/dev/serial/zynq-uart-polled.c
- bsps/shared/dev/serial/zynq-uart.c
type: build
-21
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@@ -1,21 +0,0 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-integer: null
- define: null
build-type: option
copyrights:
- Copyright (C) 2020 embedded brains GmbH & Co. KG
default:
- enabled-by:
- bsps/aarch64/xilinx-zynqmp
- arm/xilinx_zynq_microzed
value: 0
- enabled-by: true
value: 1
description: |
minor number of console device
enabled-by: true
format: '{}'
links: []
name: BSP_CONSOLE_MINOR
type: build
+22
View File
@@ -0,0 +1,22 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-string: null
- define-unquoted: null
build-type: option
copyrights:
- Copyright (C) 2024 embedded brains GmbH & Co. KG
default:
- enabled-by:
- bsps/aarch64/xilinx-zynqmp
- arm/xilinx_zynq_microzed
value: ZYNQ_UART_0_BASE_ADDR
- enabled-by: true
value: ZYNQ_UART_1_BASE_ADDR
description: |
This option defines the Xilinx Zynq UART base address used by the kernel I/O
device.
enabled-by: true
format: '{}'
links: []
name: ZYNQ_UART_KERNEL_IO_BASE_ADDR
type: build