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sparc: Document register g7 usage

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Sebastian Huber
2014-04-28 09:26:19 +02:00
parent b2ec2d1597
commit 3fe1e4308a
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doc/cpu_supplement/sparc.t
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@@ -401,6 +401,9 @@ The registers g2 through g4 are reserved for applications. GCC uses them as
volatile registers by default. So they are treated like volatile registers in
RTEMS as well.
The register g7 is reserved for the operating system and contains the thread
pointer used for thread-local storage (TLS) as mandated by the SPARC ABI.
@subsubsection Floating Point Registers
The SPARC V7 architecture includes thirty-two,