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2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org>

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* startup/bspstart.c, startup/init5282.c:
	Use "__asm__" instead of "asm" for improved c99-compliance.
This commit is contained in:
Ralf Corsepius
2011-02-11 12:30:00 +00:00
parent d6d3eb7d71
commit 3bb06c0671
3 changed files with 12 additions and 7 deletions
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c/src/lib/libbsp/m68k/av5282/ChangeLog
+5
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@@ -1,3 +1,8 @@
2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org>
* startup/bspstart.c, startup/init5282.c:
Use "__asm__" instead of "asm" for improved c99-compliance.
2011-02-09 Ralf Corsépius <ralf.corsepius@rtems.org>
* timer/timer.c: Include <rtems/btimer.h>.
c/src/lib/libbsp/m68k/av5282/startup/bspstart.c
+4 -4
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@@ -35,8 +35,8 @@
/*
* CPU-space access
*/
#define m68k_set_acr0(_acr0) asm volatile ("movec %0,%%acr0" : : "d" (_acr0))
#define m68k_set_acr1(_acr1) asm volatile ("movec %0,%%acr1" : : "d" (_acr1))
#define m68k_set_acr0(_acr0) __asm__ volatile ("movec %0,%%acr0" : : "d" (_acr0))
#define m68k_set_acr1(_acr1) __asm__ volatile ("movec %0,%%acr1" : : "d" (_acr1))
/*
* Read/write copy of common cache
@@ -94,7 +94,7 @@ void _CPU_cache_invalidate_1_instruction_line(const void *addr)
* Top half of cache is I-space
*/
addr = (void *)((int)addr | 0x400);
asm volatile ("cpushl %%bc,(%0)" :: "a" (addr));
__asm__ volatile ("cpushl %%bc,(%0)" :: "a" (addr));
}
void _CPU_cache_enable_data(void)
@@ -129,7 +129,7 @@ void _CPU_cache_invalidate_1_data_line(const void *addr)
* Bottom half of cache is D-space
*/
addr = (void *)((int)addr & ~0x400);
asm volatile ("cpushl %%bc,(%0)" :: "a" (addr));
__asm__ volatile ("cpushl %%bc,(%0)" :: "a" (addr));
}
/*
c/src/lib/libbsp/m68k/av5282/startup/init5282.c
+3 -3
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@@ -9,9 +9,9 @@
#include <rtems.h>
#include <bsp.h>
#define m68k_set_cacr(_cacr) asm volatile ("movec %0,%%cacr" : : "d" (_cacr))
#define m68k_set_acr0(_acr0) asm volatile ("movec %0,%%acr0" : : "d" (_acr0))
#define m68k_set_acr1(_acr1) asm volatile ("movec %0,%%acr1" : : "d" (_acr1))
#define m68k_set_cacr(_cacr) __asm__ volatile ("movec %0,%%cacr" : : "d" (_cacr))
#define m68k_set_acr0(_acr0) __asm__ volatile ("movec %0,%%acr0" : : "d" (_acr0))
#define m68k_set_acr1(_acr1) __asm__ volatile ("movec %0,%%acr1" : : "d" (_acr1))
#define MM_SDRAM_BASE (0x00000000)
/*