mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
synced 2026-10-06 10:59:48 +08:00
@@ -114,17 +114,6 @@ extern "C" {
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*/
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/* fundamental addresses for BSP (CHRPxxx and PREPxxx are from libcpu/io.h) */
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#if defined(mot_ppc_mvme2100)
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#define _IO_BASE CHRP_ISA_IO_BASE
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#define _ISA_MEM_BASE CHRP_ISA_MEM_BASE
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/* address of our ram on the PCI bus */
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#define PCI_DRAM_OFFSET CHRP_PCI_DRAM_OFFSET
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/* offset of pci memory as seen from the CPU */
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#define PCI_MEM_BASE 0
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/* where (in CPU addr. space) does the PCI window start */
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#define PCI_MEM_WIN0 0x80000000
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#else
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#define _IO_BASE PREP_ISA_IO_BASE
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#define _ISA_MEM_BASE PREP_ISA_MEM_BASE
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#ifndef qemu
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@@ -139,7 +128,6 @@ extern "C" {
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#define PCI_MEM_BASE 0
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#define PCI_MEM_WIN0 PREP_ISA_MEM_BASE
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#endif
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#endif
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#define BSP_REG_OFF(val) (val)
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@@ -183,13 +171,6 @@ extern "C" {
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* find out what it is which is VERY different from other Motorola boards.
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*/
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#if defined(mot_ppc_mvme2100)
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#define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x01e10000)
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/* #define BSP_UART_IOBASE_COM1 (0xffe10000) */
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#define BSP_OPEN_PIC_BASE_OFFSET 0x40000
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#define MVME_HAS_DEC21140
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#else
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#define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x3f8)
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#define BSP_UART_IOBASE_COM2 ((_IO_BASE)+0x2f8)
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@@ -201,7 +182,6 @@ extern "C" {
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#if defined(mvme2300) || defined(mot_ppc_mvme2307) || defined(mot_ppc_mvme2700)
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#define MVME_HAS_DEC21140
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#endif
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#endif
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#define BSP_CONSOLE_PORT BSP_UART_COM1
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#define BSP_UART_BAUD_BASE 115200
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@@ -60,17 +60,10 @@
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* available and unused!
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*/
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#if defined(mot_ppc_mvme2100)
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#define _VME_A32_WIN0_ON_PCI 0x90000000
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#define _VME_A24_ON_PCI 0x9f000000
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#define _VME_A16_ON_PCI 0x9fff0000
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#define BSP_VME_BAT_IDX 1
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#else
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#define _VME_A32_WIN0_ON_PCI 0x10000000
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#define _VME_A24_ON_PCI 0x1f000000
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#define _VME_A16_ON_PCI 0x1fff0000
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#define BSP_VME_BAT_IDX 0
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#endif
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/* start of the A32 window on the VME bus
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* TODO: this should perhaps be a run-time configuration option
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@@ -159,23 +159,8 @@ extern "C" {
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#define BSP_PCI_ISA_BRIDGE_IRQ (BSP_PCI_IRQ0)
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#endif
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#if defined(mot_ppc_mvme2100)
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#define BSP_DEC21143_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 1)
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#define BSP_PMC_PCMIP_TYPE1_SLOT0_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 2)
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#define BSP_PCMIP_TYPE1_SLOT1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 3)
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#define BSP_PCMIP_TYPE2_SLOT0_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 4)
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#define BSP_PCMIP_TYPE2_SLOT1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 5)
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#define BSP_PCI_INTA_UNIVERSE_LINT0_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 7)
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#define BSP_PCI_INTB_UNIVERSE_LINT1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 8)
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#define BSP_PCI_INTC_UNIVERSE_LINT2_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 9)
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#define BSP_PCI_INTD_UNIVERSE_LINT3_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 10)
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#define BSP_UART_COM1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 13)
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#define BSP_FRONT_PANEL_ABORT_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 14)
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#define BSP_RTC_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 15)
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#else
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#define BSP_UART_COM1_IRQ BSP_ISA_UART_COM1_IRQ
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#define BSP_UART_COM2_IRQ BSP_ISA_UART_COM2_IRQ
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#endif
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/*
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* Some Processor execption handled as RTEMS IRQ symbolic name definition
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@@ -60,14 +60,10 @@ void bsp_reset( rtems_fatal_source source, rtems_fatal_code code )
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CPU_print_stack();
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/* shutdown and reboot */
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#if defined(mot_ppc_mvme2100)
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out_8((volatile uint8_t *)0xffe00000, 0x80);
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#else
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/* Memory-mapped Port 92 PIB device access
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*(unsigned char*)0x80000092 |= 0x01;
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*/
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outb(1, 0x92);
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#endif
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RTEMS_UNREACHABLE();
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} /* bsp_reset */
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@@ -142,20 +142,6 @@ char *save_boot_params(
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return loaderParam;
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}
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#if defined(mot_ppc_mvme2100)
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unsigned int EUMBBAR;
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/*
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* Return the current value of the Embedded Utilities Memory Block Base Address
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* Register (EUMBBAR) as read from the processor configuration register using
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* Processor Address Map B (CHRP).
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*/
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static unsigned int get_eumbbar(void) {
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out_le32( (volatile uint32_t *)0xfec00000, 0x80000078 );
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return in_le32( (volatile uint32_t *)0xfee00000 );
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}
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#endif
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uint32_t _CPU_Counter_frequency(void)
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{
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return BSP_bus_frequency / (BSP_time_base_divisor / 1000);
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@@ -163,9 +149,7 @@ uint32_t _CPU_Counter_frequency(void)
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static void bsp_early( void )
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{
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#if !defined(mot_ppc_mvme2100)
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unsigned l2cr;
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#endif
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prep_t boardManufacturer;
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motorolaBoard myBoard;
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Triv121PgTbl pt=0;
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@@ -199,12 +183,10 @@ static void bsp_early( void )
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setdbat(3, 0xf0000000, 0xf0000000, 0x10000000, IO_PAGE);
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#endif
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#ifndef mot_ppc_mvme2100
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/*
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* PC legacy IO space used for inb/outb and all PC compatible hardware
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*/
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setdbat(1, _IO_BASE, _IO_BASE, 0x10000000, IO_PAGE);
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#endif
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/*
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@@ -216,11 +198,6 @@ static void bsp_early( void )
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setdbat(2, PCI_MEM_BASE+PCI_MEM_WIN0,
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PCI_MEM_BASE+PCI_MEM_WIN0, 0x10000000, IO_PAGE);
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#if defined(mot_ppc_mvme2100)
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/* Need 0xfec00000 mapped for this */
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EUMBBAR = get_eumbbar();
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#endif
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/*
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* enables L1 Cache. Note that the L1_caches_enables() codes checks for
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* relevant CPU type so that the reason why there is no use of myCpu...
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@@ -243,7 +220,6 @@ static void bsp_early( void )
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#endif
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#if !defined(mot_ppc_mvme2100)
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/*
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* Enable L2 Cache. Note that the set_L2CR(L2CR) codes checks for
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* relevant CPU type (mpc750)...
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@@ -254,7 +230,6 @@ static void bsp_early( void )
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#endif
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if ( (! (l2cr & 0x80000000)) && ((int) l2cr == -1))
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set_L2CR(0xb9A14000);
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#endif
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ppc_exc_initialize();
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@@ -264,38 +264,6 @@ static struct _int_map mvme27xx_intmap[] = {
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NULL_PINMAP}},
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NULL_INTMAP };
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static struct _int_map mvme2100_intmap[] = {
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{0, 0, 0, {{1, {16,-1,-1,-1}}, /* something shows up in slot 0 and OpenPIC */
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/* 0 is unused. This hushes the init code. */
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NULL_PINMAP}},
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{0, 13, 0, {{1, {23,-1,-1,-1}}, /* Universe Lint[0-3]; not quite legal */
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{2, {24,-1,-1,-1}}, /* since the universe is a single-function */
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{3, {25,-1,-1,-1}}, /* device. We leave it for info purposes */
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{4, {26,-1,-1,-1}},
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NULL_PINMAP}},
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{0, 14, 0, {{1, {17,-1,-1,-1}}, /* onboard ethernet */
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NULL_PINMAP}},
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{0, 16, PCI_FIXUP_OPT_OVERRIDE_NAME,
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{{1, {18,-1,-1,-1}}, /* PMC slot; all pins are routed to 18 */
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{2, {18,-1,-1,-1}}, /* I give the OVERRIDE option since I had */
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{3, {18,-1,-1,-1}}, /* problems with devices behind a bridge */
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{4, {18,-1,-1,-1}}, /* on a PMC card reading irq line 0... */
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NULL_PINMAP}},
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/* FIXME: I don't know how MIP works or what it is; these probably won't work */
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{0, -1, PCI_FIXUP_OPT_OVERRIDE_NAME,
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{{1, {23,-1,-1,-1}}, /* PCI INT[A-D] expansion */
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{2, {24,-1,-1,-1}},
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{3, {25,-1,-1,-1}},
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{4, {26,-1,-1,-1}},
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NULL_PINMAP}},
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NULL_INTMAP };
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/*
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* This table represents the standard PCI swizzle defined in the
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* PCI bus specification. Table taken from Linux 2.4.18, prep_pci.c,
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@@ -359,7 +327,6 @@ static const mot_info_t mot_boards[] = {
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{0x1E0, 0xFE, PPC_UNKNOWN, "MVME 3600 with MVME761", NULL, NULL},
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{0x1E0, 0xFF, PPC_UNKNOWN, "MVME 1600-001 or 1600-011", NULL, NULL},
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{0x000, 0x00, PPC_UNKNOWN, "", NULL, NULL}, /* end of probeable values for automatic scan */
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{0x000, 0x00, PPC_UNKNOWN, "MVME 2100", mvme2100_intmap, prep_pci_swizzle},
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};
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prep_t currentPrepType;
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@@ -394,9 +361,6 @@ motorolaBoard getMotorolaBoard(void)
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*
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* NOTE: Every path must set currentBoard.
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*/
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#if defined(mot_ppc_mvme2100)
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currentBoard = (motorolaBoard) MVME_2100;
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#else
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unsigned char cpu_type;
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unsigned char base_mod;
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ppc_cpu_id_t proc_type;
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@@ -434,7 +398,6 @@ motorolaBoard getMotorolaBoard(void)
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return currentBoard;
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}
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currentBoard = (motorolaBoard) mot_entry;
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#endif
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return currentBoard;
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}
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@@ -17,10 +17,6 @@ default:
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- -mcpu=powerpc
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- -mmultiple
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- -mstrict-align
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- enabled-by: [powerpc/mvme2100]
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value:
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- -mcpu=603e
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- -mstrict-align
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- enabled-by: [powerpc/mvme2307, powerpc/mvme2700]
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value:
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- -mcpu=604
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@@ -1,19 +0,0 @@
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SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
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arch: powerpc
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bsp: mvme2100
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build-type: bsp
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cflags: []
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copyrights:
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- Copyright (C) 2020 embedded brains GmbH & Co. KG
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cppflags: []
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enabled-by: true
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family: motorola_powerpc
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includes: []
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install: []
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links:
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- role: build-dependency
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uid: ../../opto2
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- role: build-dependency
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uid: grp
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source: []
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type: build
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@@ -28,10 +28,6 @@ links:
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uid: optmpc603e
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- role: build-dependency
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uid: optmpc750
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- role: build-dependency
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uid: optmpc8240
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- role: build-dependency
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uid: optmvme2100
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- role: build-dependency
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uid: optmvme2307
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- role: build-dependency
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@@ -6,9 +6,7 @@ build-type: option
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copyrights:
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- Copyright (C) 2020 embedded brains GmbH & Co. KG
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default:
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- enabled-by:
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- powerpc/mtx603e
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- powerpc/mvme2100
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- enabled-by: powerpc/mtx603e
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value: true
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- enabled-by: true
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value: false
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@@ -1,18 +0,0 @@
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SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
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actions:
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- get-boolean: null
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- define-condition: null
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build-type: option
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copyrights:
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- Copyright (C) 2020 embedded brains GmbH & Co. KG
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default:
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- enabled-by: powerpc/mvme2100
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value: true
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- enabled-by: true
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value: false
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description: |
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Defined for boards with MPC8240 -- undefined for others
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enabled-by: true
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links: []
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name: mpc8240
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type: build
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@@ -1,18 +0,0 @@
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SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
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actions:
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- get-boolean: null
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- define-condition: null
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build-type: option
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copyrights:
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- Copyright (C) 2020 embedded brains GmbH & Co. KG
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default:
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- enabled-by: powerpc/mvme2100
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value: true
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- enabled-by: true
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value: false
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description: |
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Defined for MVME2100 -- undefined for others
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enabled-by: true
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links: []
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name: mot_ppc_mvme2100
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type: build
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