powerpc/motorola_powerpc: Remove MVME2100 code

Updates #5731
This commit is contained in:
Vijay Banerjee
2026-09-16 14:48:13 +00:00
parent 9667b49837
commit 361454ceac
12 changed files with 1 additions and 174 deletions
@@ -114,17 +114,6 @@ extern "C" {
*/
/* fundamental addresses for BSP (CHRPxxx and PREPxxx are from libcpu/io.h) */
#if defined(mot_ppc_mvme2100)
#define _IO_BASE CHRP_ISA_IO_BASE
#define _ISA_MEM_BASE CHRP_ISA_MEM_BASE
/* address of our ram on the PCI bus */
#define PCI_DRAM_OFFSET CHRP_PCI_DRAM_OFFSET
/* offset of pci memory as seen from the CPU */
#define PCI_MEM_BASE 0
/* where (in CPU addr. space) does the PCI window start */
#define PCI_MEM_WIN0 0x80000000
#else
#define _IO_BASE PREP_ISA_IO_BASE
#define _ISA_MEM_BASE PREP_ISA_MEM_BASE
#ifndef qemu
@@ -139,7 +128,6 @@ extern "C" {
#define PCI_MEM_BASE 0
#define PCI_MEM_WIN0 PREP_ISA_MEM_BASE
#endif
#endif
#define BSP_REG_OFF(val) (val)
@@ -183,13 +171,6 @@ extern "C" {
* find out what it is which is VERY different from other Motorola boards.
*/
#if defined(mot_ppc_mvme2100)
#define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x01e10000)
/* #define BSP_UART_IOBASE_COM1 (0xffe10000) */
#define BSP_OPEN_PIC_BASE_OFFSET 0x40000
#define MVME_HAS_DEC21140
#else
#define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x3f8)
#define BSP_UART_IOBASE_COM2 ((_IO_BASE)+0x2f8)
@@ -201,7 +182,6 @@ extern "C" {
#if defined(mvme2300) || defined(mot_ppc_mvme2307) || defined(mot_ppc_mvme2700)
#define MVME_HAS_DEC21140
#endif
#endif
#define BSP_CONSOLE_PORT BSP_UART_COM1
#define BSP_UART_BAUD_BASE 115200
@@ -60,17 +60,10 @@
* available and unused!
*/
#if defined(mot_ppc_mvme2100)
#define _VME_A32_WIN0_ON_PCI 0x90000000
#define _VME_A24_ON_PCI 0x9f000000
#define _VME_A16_ON_PCI 0x9fff0000
#define BSP_VME_BAT_IDX 1
#else
#define _VME_A32_WIN0_ON_PCI 0x10000000
#define _VME_A24_ON_PCI 0x1f000000
#define _VME_A16_ON_PCI 0x1fff0000
#define BSP_VME_BAT_IDX 0
#endif
/* start of the A32 window on the VME bus
* TODO: this should perhaps be a run-time configuration option
@@ -159,23 +159,8 @@ extern "C" {
#define BSP_PCI_ISA_BRIDGE_IRQ (BSP_PCI_IRQ0)
#endif
#if defined(mot_ppc_mvme2100)
#define BSP_DEC21143_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 1)
#define BSP_PMC_PCMIP_TYPE1_SLOT0_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 2)
#define BSP_PCMIP_TYPE1_SLOT1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 3)
#define BSP_PCMIP_TYPE2_SLOT0_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 4)
#define BSP_PCMIP_TYPE2_SLOT1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 5)
#define BSP_PCI_INTA_UNIVERSE_LINT0_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 7)
#define BSP_PCI_INTB_UNIVERSE_LINT1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 8)
#define BSP_PCI_INTC_UNIVERSE_LINT2_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 9)
#define BSP_PCI_INTD_UNIVERSE_LINT3_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 10)
#define BSP_UART_COM1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 13)
#define BSP_FRONT_PANEL_ABORT_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 14)
#define BSP_RTC_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 15)
#else
#define BSP_UART_COM1_IRQ BSP_ISA_UART_COM1_IRQ
#define BSP_UART_COM2_IRQ BSP_ISA_UART_COM2_IRQ
#endif
/*
* Some Processor execption handled as RTEMS IRQ symbolic name definition
@@ -60,14 +60,10 @@ void bsp_reset( rtems_fatal_source source, rtems_fatal_code code )
CPU_print_stack();
/* shutdown and reboot */
#if defined(mot_ppc_mvme2100)
out_8((volatile uint8_t *)0xffe00000, 0x80);
#else
/* Memory-mapped Port 92 PIB device access
*(unsigned char*)0x80000092 |= 0x01;
*/
outb(1, 0x92);
#endif
RTEMS_UNREACHABLE();
} /* bsp_reset */
@@ -142,20 +142,6 @@ char *save_boot_params(
return loaderParam;
}
#if defined(mot_ppc_mvme2100)
unsigned int EUMBBAR;
/*
* Return the current value of the Embedded Utilities Memory Block Base Address
* Register (EUMBBAR) as read from the processor configuration register using
* Processor Address Map B (CHRP).
*/
static unsigned int get_eumbbar(void) {
out_le32( (volatile uint32_t *)0xfec00000, 0x80000078 );
return in_le32( (volatile uint32_t *)0xfee00000 );
}
#endif
uint32_t _CPU_Counter_frequency(void)
{
return BSP_bus_frequency / (BSP_time_base_divisor / 1000);
@@ -163,9 +149,7 @@ uint32_t _CPU_Counter_frequency(void)
static void bsp_early( void )
{
#if !defined(mot_ppc_mvme2100)
unsigned l2cr;
#endif
prep_t boardManufacturer;
motorolaBoard myBoard;
Triv121PgTbl pt=0;
@@ -199,12 +183,10 @@ static void bsp_early( void )
setdbat(3, 0xf0000000, 0xf0000000, 0x10000000, IO_PAGE);
#endif
#ifndef mot_ppc_mvme2100
/*
* PC legacy IO space used for inb/outb and all PC compatible hardware
*/
setdbat(1, _IO_BASE, _IO_BASE, 0x10000000, IO_PAGE);
#endif
/*
@@ -216,11 +198,6 @@ static void bsp_early( void )
setdbat(2, PCI_MEM_BASE+PCI_MEM_WIN0,
PCI_MEM_BASE+PCI_MEM_WIN0, 0x10000000, IO_PAGE);
#if defined(mot_ppc_mvme2100)
/* Need 0xfec00000 mapped for this */
EUMBBAR = get_eumbbar();
#endif
/*
* enables L1 Cache. Note that the L1_caches_enables() codes checks for
* relevant CPU type so that the reason why there is no use of myCpu...
@@ -243,7 +220,6 @@ static void bsp_early( void )
#endif
#if !defined(mot_ppc_mvme2100)
/*
* Enable L2 Cache. Note that the set_L2CR(L2CR) codes checks for
* relevant CPU type (mpc750)...
@@ -254,7 +230,6 @@ static void bsp_early( void )
#endif
if ( (! (l2cr & 0x80000000)) && ((int) l2cr == -1))
set_L2CR(0xb9A14000);
#endif
ppc_exc_initialize();
@@ -264,38 +264,6 @@ static struct _int_map mvme27xx_intmap[] = {
NULL_PINMAP}},
NULL_INTMAP };
static struct _int_map mvme2100_intmap[] = {
{0, 0, 0, {{1, {16,-1,-1,-1}}, /* something shows up in slot 0 and OpenPIC */
/* 0 is unused. This hushes the init code. */
NULL_PINMAP}},
{0, 13, 0, {{1, {23,-1,-1,-1}}, /* Universe Lint[0-3]; not quite legal */
{2, {24,-1,-1,-1}}, /* since the universe is a single-function */
{3, {25,-1,-1,-1}}, /* device. We leave it for info purposes */
{4, {26,-1,-1,-1}},
NULL_PINMAP}},
{0, 14, 0, {{1, {17,-1,-1,-1}}, /* onboard ethernet */
NULL_PINMAP}},
{0, 16, PCI_FIXUP_OPT_OVERRIDE_NAME,
{{1, {18,-1,-1,-1}}, /* PMC slot; all pins are routed to 18 */
{2, {18,-1,-1,-1}}, /* I give the OVERRIDE option since I had */
{3, {18,-1,-1,-1}}, /* problems with devices behind a bridge */
{4, {18,-1,-1,-1}}, /* on a PMC card reading irq line 0... */
NULL_PINMAP}},
/* FIXME: I don't know how MIP works or what it is; these probably won't work */
{0, -1, PCI_FIXUP_OPT_OVERRIDE_NAME,
{{1, {23,-1,-1,-1}}, /* PCI INT[A-D] expansion */
{2, {24,-1,-1,-1}},
{3, {25,-1,-1,-1}},
{4, {26,-1,-1,-1}},
NULL_PINMAP}},
NULL_INTMAP };
/*
* This table represents the standard PCI swizzle defined in the
* PCI bus specification. Table taken from Linux 2.4.18, prep_pci.c,
@@ -359,7 +327,6 @@ static const mot_info_t mot_boards[] = {
{0x1E0, 0xFE, PPC_UNKNOWN, "MVME 3600 with MVME761", NULL, NULL},
{0x1E0, 0xFF, PPC_UNKNOWN, "MVME 1600-001 or 1600-011", NULL, NULL},
{0x000, 0x00, PPC_UNKNOWN, "", NULL, NULL}, /* end of probeable values for automatic scan */
{0x000, 0x00, PPC_UNKNOWN, "MVME 2100", mvme2100_intmap, prep_pci_swizzle},
};
prep_t currentPrepType;
@@ -394,9 +361,6 @@ motorolaBoard getMotorolaBoard(void)
*
* NOTE: Every path must set currentBoard.
*/
#if defined(mot_ppc_mvme2100)
currentBoard = (motorolaBoard) MVME_2100;
#else
unsigned char cpu_type;
unsigned char base_mod;
ppc_cpu_id_t proc_type;
@@ -434,7 +398,6 @@ motorolaBoard getMotorolaBoard(void)
return currentBoard;
}
currentBoard = (motorolaBoard) mot_entry;
#endif
return currentBoard;
}
@@ -17,10 +17,6 @@ default:
- -mcpu=powerpc
- -mmultiple
- -mstrict-align
- enabled-by: [powerpc/mvme2100]
value:
- -mcpu=603e
- -mstrict-align
- enabled-by: [powerpc/mvme2307, powerpc/mvme2700]
value:
- -mcpu=604
@@ -1,19 +0,0 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
arch: powerpc
bsp: mvme2100
build-type: bsp
cflags: []
copyrights:
- Copyright (C) 2020 embedded brains GmbH & Co. KG
cppflags: []
enabled-by: true
family: motorola_powerpc
includes: []
install: []
links:
- role: build-dependency
uid: ../../opto2
- role: build-dependency
uid: grp
source: []
type: build
@@ -28,10 +28,6 @@ links:
uid: optmpc603e
- role: build-dependency
uid: optmpc750
- role: build-dependency
uid: optmpc8240
- role: build-dependency
uid: optmvme2100
- role: build-dependency
uid: optmvme2307
- role: build-dependency
@@ -6,9 +6,7 @@ build-type: option
copyrights:
- Copyright (C) 2020 embedded brains GmbH & Co. KG
default:
- enabled-by:
- powerpc/mtx603e
- powerpc/mvme2100
- enabled-by: powerpc/mtx603e
value: true
- enabled-by: true
value: false
@@ -1,18 +0,0 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-boolean: null
- define-condition: null
build-type: option
copyrights:
- Copyright (C) 2020 embedded brains GmbH & Co. KG
default:
- enabled-by: powerpc/mvme2100
value: true
- enabled-by: true
value: false
description: |
Defined for boards with MPC8240 -- undefined for others
enabled-by: true
links: []
name: mpc8240
type: build
@@ -1,18 +0,0 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-boolean: null
- define-condition: null
build-type: option
copyrights:
- Copyright (C) 2020 embedded brains GmbH & Co. KG
default:
- enabled-by: powerpc/mvme2100
value: true
- enabled-by: true
value: false
description: |
Defined for MVME2100 -- undefined for others
enabled-by: true
links: []
name: mot_ppc_mvme2100
type: build