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Whitespace removal.

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This commit is contained in:
Ralf Corsepius
2009-11-29 14:53:02 +00:00
parent 28352faecf
commit 32b8506b24
191 changed files with 4068 additions and 2182 deletions
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c/src/lib/libbsp/arm/csb336/console/uart.c
+31 -31
View File
@@ -37,7 +37,7 @@ static void imx_uart_init(int minor);
static void imx_uart_set_baud(int, int);
static int imx_uart_poll_write(int, const char *, int);
#if defined(USE_INTERRUPTS)
#if defined(USE_INTERRUPTS)
static void imx_uart_tx_isr(rtems_irq_hdl_param);
static void imx_uart_rx_isr(rtems_irq_hdl_param);
static void imx_uart_isr_on(const rtems_irq_connect_data *irq);
@@ -49,7 +49,7 @@ static int imx_uart_intr_write(int, const char *, int);
/* TERMIOS callbacks */
#if defined(USE_INTERRUPTS)
#if defined(USE_INTERRUPTS)
rtems_termios_callbacks imx_uart_cbacks = {
.firstOpen = imx_uart_first_open,
.lastClose = imx_uart_last_close,
@@ -60,7 +60,7 @@ rtems_termios_callbacks imx_uart_cbacks = {
.startRemoteTx = NULL,
.outputUsesInterrupts = 1,
};
#else
#else
rtems_termios_callbacks imx_uart_cbacks = {
.firstOpen = imx_uart_first_open,
.lastClose = imx_uart_last_close,
@@ -73,7 +73,7 @@ rtems_termios_callbacks imx_uart_cbacks = {
};
#endif
#if defined(USE_INTERRUPTS)
#if defined(USE_INTERRUPTS)
static rtems_irq_connect_data imx_uart_tx_isr_data[NUM_DEVS];
static rtems_irq_connect_data imx_uart_rx_isr_data[NUM_DEVS];
#endif
@@ -141,7 +141,7 @@ rtems_device_driver console_open(
return rc;
}
rtems_device_driver console_close(
rtems_device_major_number major,
rtems_device_minor_number minor,
@@ -150,7 +150,7 @@ rtems_device_driver console_close(
{
return rtems_termios_close(arg);
}
rtems_device_driver console_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
@@ -159,7 +159,7 @@ rtems_device_driver console_read(
{
return rtems_termios_read(arg);
}
rtems_device_driver console_write(
rtems_device_major_number major,
rtems_device_minor_number minor,
@@ -168,7 +168,7 @@ rtems_device_driver console_write(
{
return rtems_termios_write(arg);
}
rtems_device_driver console_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
@@ -186,25 +186,25 @@ static void imx_uart_init(int minor)
imx_uart_data[minor].idx = 0;
if (minor == 0) {
#if defined(USE_INTERRUPTS)
#if defined(USE_INTERRUPTS)
imx_uart_tx_isr_data[minor].name = BSP_INT_UART1_TX;
imx_uart_rx_isr_data[minor].name = BSP_INT_UART1_RX;
#endif
imx_uart_data[minor].regs =
imx_uart_data[minor].regs =
(mc9328mxl_uart_regs_t *) MC9328MXL_UART1_BASE;
} else if (minor == 1) {
#if defined(USE_INTERRUPTS)
#if defined(USE_INTERRUPTS)
imx_uart_tx_isr_data[minor].name = BSP_INT_UART2_TX;
imx_uart_rx_isr_data[minor].name = BSP_INT_UART2_RX;
#endif
imx_uart_data[minor].regs =
imx_uart_data[minor].regs =
(mc9328mxl_uart_regs_t *) MC9328MXL_UART2_BASE;
} else {
rtems_panic("%s:%d Unknown UART minor number %d\n",
__FUNCTION__, __LINE__, minor);
rtems_panic("%s:%d Unknown UART minor number %d\n",
__FUNCTION__, __LINE__, minor);
}
#if defined(USE_INTERRUPTS)
#if defined(USE_INTERRUPTS)
imx_uart_tx_isr_data[minor].hdl = imx_uart_tx_isr;
imx_uart_tx_isr_data[minor].handle = &imx_uart_data[minor];
imx_uart_tx_isr_data[minor].on = imx_uart_isr_on;
@@ -234,8 +234,8 @@ static void imx_uart_init(int minor)
imx_uart_data[minor].regs->cr4 = 0;
imx_uart_data[minor].regs->fcr = (
MC9328MXL_UART_FCR_TXTL(32) |
MC9328MXL_UART_FCR_RFDIV_1 |
MC9328MXL_UART_FCR_TXTL(32) |
MC9328MXL_UART_FCR_RFDIV_1 |
MC9328MXL_UART_FCR_RXTL(1));
imx_uart_set_baud(minor, 38400);
@@ -247,8 +247,8 @@ static int imx_uart_first_open(int major, int minor, void *arg)
rtems_libio_open_close_args_t *args = arg;
imx_uart_data[minor].tty = args->iop->data1;
#if defined(USE_INTERRUPTS)
#if defined(USE_INTERRUPTS)
BSP_install_rtems_irq_handler(&imx_uart_tx_isr_data[minor]);
BSP_install_rtems_irq_handler(&imx_uart_rx_isr_data[minor]);
@@ -260,7 +260,7 @@ static int imx_uart_first_open(int major, int minor, void *arg)
static int imx_uart_last_close(int major, int minor, void *arg)
{
#if defined(USE_INTERRUPTS)
#if defined(USE_INTERRUPTS)
BSP_remove_rtems_irq_handler(&imx_uart_tx_isr_data[minor]);
BSP_remove_rtems_irq_handler(&imx_uart_rx_isr_data[minor]);
#endif
@@ -268,7 +268,7 @@ static int imx_uart_last_close(int major, int minor, void *arg)
return 0;
}
static int imx_uart_poll_read(int minor)
static int imx_uart_poll_read(int minor)
{
if (imx_uart_data[minor].regs->sr2 & MC9328MXL_UART_SR2_RDR) {
return imx_uart_data[minor].regs->rxd & 0xff;
@@ -278,7 +278,7 @@ static int imx_uart_poll_read(int minor)
}
static int imx_uart_poll_write(int minor, const char *buf, int len)
static int imx_uart_poll_write(int minor, const char *buf, int len)
{
int i;
for (i = 0; i < len; i++) {
@@ -293,22 +293,22 @@ static int imx_uart_poll_write(int minor, const char *buf, int len)
}
#if defined(USE_INTERRUPTS)
#if defined(USE_INTERRUPTS)
static int imx_uart_intr_write(int minor, const char *buf, int len)
{
imx_uart_data[minor].buf = buf;
imx_uart_data[minor].len = len;
imx_uart_data[minor].idx = 0;
imx_uart_data[minor].regs->cr1 |= MC9328MXL_UART_CR1_TXMPTYEN;
return 1;
}
#endif
/* This is for setting baud rate, bits, etc. */
static int imx_uart_set_attrs(int minor, const struct termios *t)
static int imx_uart_set_attrs(int minor, const struct termios *t)
{
int baud;
@@ -318,7 +318,7 @@ static int imx_uart_set_attrs(int minor, const struct termios *t)
return 0;
}
#if defined(USE_INTERRUPTS)
#if defined(USE_INTERRUPTS)
static void imx_uart_isr_on(const rtems_irq_connect_data *irq)
{
MC9328MXL_AITC_INTENNUM = irq->name;
@@ -403,12 +403,12 @@ static void imx_uart_set_baud(int minor, int baud)
case MC9328MXL_UART_FCR_RFDIV_6: ref_freq = perclk1/6; break;
case MC9328MXL_UART_FCR_RFDIV_7: ref_freq = perclk1/7; break;
default:
rtems_panic("%s:%d Unknown RFDIV: 0x%x",
rtems_panic("%s:%d Unknown RFDIV: 0x%x",
__FUNCTION__, __LINE__,
fcr & MC9328MXL_UART_FCR_RFDIV_MASK);
break;
}
denom = ref_freq / baud;
imx_uart_data[minor].regs->bir = 0xf;
@@ -416,7 +416,7 @@ static void imx_uart_set_baud(int minor, int baud)
}
/*
/*
* Polled, non-blocking read from UART
*/
int imx_uart_poll_read_char(int minor)
@@ -424,7 +424,7 @@ int imx_uart_poll_read_char(int minor)
return imx_uart_poll_read(minor);
}
/*
/*
* Polled, blocking write from UART
*/
void imx_uart_poll_write_char(int minor, char c)
c/src/lib/libbsp/arm/csb336/include/bsp.h
+1 -1
View File
@@ -39,7 +39,7 @@ int get_perclk1_freq(void);
extern struct rtems_bsdnet_ifconfig *config;
/* Change these to match your board */
int rtems_mc9328mxl_enet_attach(struct rtems_bsdnet_ifconfig *config,
int rtems_mc9328mxl_enet_attach(struct rtems_bsdnet_ifconfig *config,
void *chip);
#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0"
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_mc9328mxl_enet_attach
c/src/lib/libbsp/arm/csb336/network/lan91c11x.c
+35 -35
View File
@@ -82,29 +82,29 @@ uint16_t lan91c11x_read_phy_reg(int reg)
{
int i;
uint16_t mask;
uint16_t bits[64];
uint16_t bits[64];
int clk_idx = 0;
int input_idx = 0;
uint16_t phydata;
/* 32 consecutive ones on MDO to establish sync */
for (i = 0; i < 32; ++i) {
bits[clk_idx++] = LAN91C11X_MGMT_MDOE | LAN91C11X_MGMT_MDO;
}
/* Start code <01> */
bits[clk_idx++] = LAN91C11X_MGMT_MDOE;
bits[clk_idx++] = LAN91C11X_MGMT_MDOE | LAN91C11X_MGMT_MDO;
/* Read command <10> */
bits[clk_idx++] = LAN91C11X_MGMT_MDOE | LAN91C11X_MGMT_MDO;
bits[clk_idx++] = LAN91C11X_MGMT_MDOE;
/* Output the PHY address, msb first - Internal PHY is address 0 */
for (i = 0; i < 5; ++i) {
bits[clk_idx++] = LAN91C11X_MGMT_MDOE;
}
/* Output the phy register number, msb first */
mask = 0x10;
for (i = 0; i < 5; ++i) {
@@ -113,57 +113,57 @@ uint16_t lan91c11x_read_phy_reg(int reg)
} else {
bits[clk_idx++] = LAN91C11X_MGMT_MDOE;
}
/* Shift to next lowest bit */
mask >>= 1;
}
/* 1 bit time for turnaround */
bits[clk_idx++] = 0;
/* Input starts at this bit time */
input_idx = clk_idx;
/* Will input 16 bits */
for (i = 0; i < 16; ++i) {
bits[clk_idx++] = 0;
}
/* Final clock bit */
bits[clk_idx++] = 0;
/* Turn off all MII Interface bits */
lan91c11x_write_reg(LAN91C11X_MGMT,
lan91c11x_write_reg(LAN91C11X_MGMT,
lan91c11x_read_reg(LAN91C11X_MGMT) & 0xfff0);
/* Clock all 64 cycles */
for (i = 0; i < sizeof bits; ++i) {
/* Clock Low - output data */
lan91c11x_write_reg(LAN91C11X_MGMT, bits[i]);
rtems_task_wake_after(1);
/* Clock Hi - input data */
lan91c11x_write_reg(LAN91C11X_MGMT, bits[i] | LAN91C11X_MGMT_MCLK);
rtems_task_wake_after(1);
bits[i] |= lan91c11x_read_reg(LAN91C11X_MGMT) & LAN91C11X_MGMT_MDI;
}
/* Return to idle state */
/* Set clock to low, data to low, and output tristated */
lan91c11x_write_reg(LAN91C11X_MGMT, lan91c11x_read_reg(LAN91C11X_MGMT) & 0xfff0);
rtems_task_wake_after(1);
/* Recover input data */
phydata = 0;
for (i = 0; i < 16; ++i) {
phydata <<= 1;
if (bits[input_idx++] & LAN91C11X_MGMT_MDI) {
phydata |= 0x0001;
}
}
return phydata;
}
@@ -173,27 +173,27 @@ void lan91c11x_write_phy_reg(int reg, uint16_t phydata)
{
int i;
ushort mask;
ushort bits[64];
ushort bits[64];
int clk_idx = 0;
/* 32 consecutive ones on MDO to establish sync */
for (i = 0; i < 32; ++i) {
bits[clk_idx++] = LAN91C11X_MGMT_MDOE | LAN91C11X_MGMT_MDO;
}
/* Start code <01> */
bits[clk_idx++] = LAN91C11X_MGMT_MDOE;
bits[clk_idx++] = LAN91C11X_MGMT_MDOE | LAN91C11X_MGMT_MDO;
/* Write command <01> */
bits[clk_idx++] = LAN91C11X_MGMT_MDOE;
bits[clk_idx++] = LAN91C11X_MGMT_MDOE | LAN91C11X_MGMT_MDO;
/* Output the PHY address, msb first - Internal PHY is address 0 */
for (i = 0; i < 5; ++i) {
bits[clk_idx++] = LAN91C11X_MGMT_MDOE;
}
/* Output the phy register number, msb first */
mask = 0x10;
for (i = 0; i < 5; ++i) {
@@ -202,15 +202,15 @@ void lan91c11x_write_phy_reg(int reg, uint16_t phydata)
} else {
bits[clk_idx++] = LAN91C11X_MGMT_MDOE;
}
/* Shift to next lowest bit */
mask >>= 1;
}
/* 2 extra bit times for turnaround */
bits[clk_idx++] = 0;
bits[clk_idx++] = 0;
/* Write out 16 bits of data, msb first */
mask = 0x8000;
for (i = 0; i < 16; ++i) {
@@ -225,27 +225,27 @@ void lan91c11x_write_phy_reg(int reg, uint16_t phydata)
}
/* Turn off all MII Interface bits */
lan91c11x_write_reg(LAN91C11X_MGMT,
lan91c11x_write_reg(LAN91C11X_MGMT,
lan91c11x_read_reg(LAN91C11X_MGMT) & 0xfff0);
/* Clock all 64 cycles */
for (i = 0; i < sizeof bits; ++i) {
/* Clock Low - output data */
lan91c11x_write_reg(LAN91C11X_MGMT, bits[i]);
rtems_task_wake_after(1);
/* Clock Hi - input data */
lan91c11x_write_reg(LAN91C11X_MGMT, bits[i] | LAN91C11X_MGMT_MCLK);
rtems_task_wake_after(1);
bits[i] |= lan91c11x_read_reg(LAN91C11X_MGMT) & LAN91C11X_MGMT_MDI;
}
/* Return to idle state */
/* Set clock to low, data to low, and output tristated */
lan91c11x_write_reg(LAN91C11X_MGMT,
lan91c11x_write_reg(LAN91C11X_MGMT,
lan91c11x_read_reg(LAN91C11X_MGMT) & 0xfff0);
rtems_task_wake_after(1);
}
c/src/lib/libbsp/arm/csb336/network/lan91c11x.h
+1 -1
View File
@@ -29,7 +29,7 @@ void lan91c11x_lock(void);
#define LAN91C11X_BASE_ADDR 0x12000000
#define LAN91C11X_REG(_b_, _r_) ((((_b_) & 0xf) << 4) | ((_r_) & 0xf))
#define LAN91C11X_TCR (LAN91C11X_REG(0, 0x0))
#define LAN91C11X_EPHSTAT (LAN91C11X_REG(0, 0x2))
c/src/lib/libbsp/arm/csb336/network/network.c
+84 -84
View File
@@ -77,13 +77,13 @@ typedef struct
* This entry *must* be the first in the sonic_softc structure.
*/
struct arpcom arpcom;
int accept_bcast;
/* Tasks waiting for interrupts */
rtems_id rx_task;
rtems_id tx_task;
eth_stats_t stats;
} mc9328mxl_enet_softc_t;
@@ -92,7 +92,7 @@ static mc9328mxl_enet_softc_t softc;
/* function prototypes */
int rtems_mc9328mxl_enet_attach(struct rtems_bsdnet_ifconfig *config,
int rtems_mc9328mxl_enet_attach(struct rtems_bsdnet_ifconfig *config,
void *chip);
void mc9328mxl_enet_init(void *arg);
void mc9328mxl_enet_init_hw(mc9328mxl_enet_softc_t *sc);
@@ -102,7 +102,7 @@ void mc9328mxl_enet_tx_task (void *arg);
void mc9328mxl_enet_sendpacket (struct ifnet *ifp, struct mbuf *m);
void mc9328mxl_enet_rx_task(void *arg);
void mc9328mxl_enet_stats(mc9328mxl_enet_softc_t *sc);
static int mc9328mxl_enet_ioctl(struct ifnet *ifp,
static int mc9328mxl_enet_ioctl(struct ifnet *ifp,
ioctl_command_t command, caddr_t data);
@@ -116,7 +116,7 @@ int rtems_mc9328mxl_enet_attach (
int unitnumber;
char *unitname;
int tmp;
/*
* Parse driver name
*/
@@ -124,7 +124,7 @@ int rtems_mc9328mxl_enet_attach (
if (unitnumber < 0) {
return 0;
}
/*
* Is driver free?
*/
@@ -138,11 +138,11 @@ int rtems_mc9328mxl_enet_attach (
printf ("Driver already in use.\n");
return 0;
}
/* zero out the control structure */
memset( &softc, 0, sizeof(softc) );
/* set the MAC address */
tmp = lan91c11x_read_reg(LAN91C11X_IA0);
softc.arpcom.ac_enaddr[0] = tmp & 0xff;
@@ -163,7 +163,7 @@ int rtems_mc9328mxl_enet_attach (
}
softc.accept_bcast = !config->ignore_broadcast;
/*
* Set up network interface values
*/
@@ -179,7 +179,7 @@ int rtems_mc9328mxl_enet_attach (
if (ifp->if_snd.ifq_maxlen == 0) {
ifp->if_snd.ifq_maxlen = ifqmaxlen;
}
/* Attach the interface */
if_attach (ifp);
ether_ifattach (ifp);
@@ -188,52 +188,52 @@ int rtems_mc9328mxl_enet_attach (
void mc9328mxl_enet_init(void *arg)
{
mc9328mxl_enet_softc_t *sc = arg;
mc9328mxl_enet_softc_t *sc = arg;
struct ifnet *ifp = &sc->arpcom.ac_if;
/*
*This is for stuff that only gets done once (mc9328mxl_enet_init()
* gets called multiple times
/*
*This is for stuff that only gets done once (mc9328mxl_enet_init()
* gets called multiple times
*/
if (sc->tx_task == 0)
{
/* Set up ENET hardware */
mc9328mxl_enet_init_hw(sc);
/* Start driver tasks */
sc->rx_task = rtems_bsdnet_newproc("ENrx",
4096,
mc9328mxl_enet_rx_task,
sc->rx_task = rtems_bsdnet_newproc("ENrx",
4096,
mc9328mxl_enet_rx_task,
sc);
sc->tx_task = rtems_bsdnet_newproc("ENtx",
4096,
mc9328mxl_enet_tx_task,
sc->tx_task = rtems_bsdnet_newproc("ENtx",
4096,
mc9328mxl_enet_tx_task,
sc);
} /* if tx_task */
/* Configure for promiscuous if needed */
if (ifp->if_flags & IFF_PROMISC) {
lan91c11x_write_reg(LAN91C11X_RCR,
lan91c11x_write_reg(LAN91C11X_RCR,
(lan91c11x_read_reg(LAN91C11X_RCR) |
LAN91C11X_RCR_PRMS));
}
/*
* Tell the world that we're running.
*/
ifp->if_flags |= IFF_RUNNING;
/* Enable TX/RX */
lan91c11x_write_reg(LAN91C11X_TCR,
lan91c11x_write_reg(LAN91C11X_TCR,
(lan91c11x_read_reg(LAN91C11X_TCR) |
LAN91C11X_TCR_TXENA));
lan91c11x_write_reg(LAN91C11X_RCR,
lan91c11x_write_reg(LAN91C11X_RCR,
(lan91c11x_read_reg(LAN91C11X_RCR) |
LAN91C11X_RCR_RXEN));
} /* mc9328mxl_enet_init() */
@@ -254,7 +254,7 @@ void mc9328mxl_enet_init_hw(mc9328mxl_enet_softc_t *sc)
stat = lan91c11x_read_phy_reg(PHY_STAT);
if(stat & PHY_STAT_CAPT4) {
my |= PHY_ADV_T4;
}
@@ -274,22 +274,22 @@ void mc9328mxl_enet_init_hw(mc9328mxl_enet_softc_t *sc)
if(stat & PHY_STAT_CAPTH) {
my |= PHY_ADV_10HDX;
}
my |= PHY_ADV_CSMA;
lan91c11x_write_phy_reg(PHY_AD, my);
/* Enable Autonegotiation */
#if 0
lan91c11x_write_phy_reg(PHY_CTRL,
lan91c11x_write_phy_reg(PHY_CTRL,
(PHY_CTRL_ANEGEN | PHY_CTRL_ANEGRST));
#endif
/* Enable full duplex, let MAC take care
* of padding and CRC.
*/
lan91c11x_write_reg(LAN91C11X_TCR,
lan91c11x_write_reg(LAN91C11X_TCR,
(LAN91C11X_TCR_PADEN |
LAN91C11X_TCR_SWFDUP));
@@ -297,7 +297,7 @@ void mc9328mxl_enet_init_hw(mc9328mxl_enet_softc_t *sc)
lan91c11x_write_reg(LAN91C11X_RCR, 0);
/* Enable auto-negotiation, LEDA is link, LEDB is traffic */
lan91c11x_write_reg(LAN91C11X_RPCR,
lan91c11x_write_reg(LAN91C11X_RPCR,
(LAN91C11X_RPCR_ANEG |
LAN91C11X_RPCR_LS2B));
@@ -308,9 +308,9 @@ void mc9328mxl_enet_init_hw(mc9328mxl_enet_softc_t *sc)
/* Disable error interrupts, enable auto release */
lan91c11x_write_reg(LAN91C11X_CTRL, LAN91C11X_CTRL_AUTO);
/* Reset MMU */
lan91c11x_write_reg(LAN91C11X_MMUCMD,
lan91c11x_write_reg(LAN91C11X_MMUCMD,
LAN91C11X_MMUCMD_RESETMMU );
@@ -324,7 +324,7 @@ void mc9328mxl_enet_init_hw(mc9328mxl_enet_softc_t *sc)
/* Enable interrupts on GPIO Port A3 */
/* Make pin 3 an input */
MC9328MXL_GPIOA_DDIR &= ~bit(3);
MC9328MXL_GPIOA_DDIR &= ~bit(3);
/* Use GPIO function for pin 3 */
MC9328MXL_GPIOA_GIUS |= bit(3);
@@ -338,13 +338,13 @@ void mc9328mxl_enet_init_hw(mc9328mxl_enet_softc_t *sc)
/* Install the interrupt handler */
BSP_install_rtems_irq_handler(&mc9328mxl_enet_isr_data);
} /* mc9328mxl_enet_init_hw() */
void mc9328mxl_enet_start(struct ifnet *ifp)
{
mc9328mxl_enet_softc_t *sc = ifp->if_softc;
rtems_event_send(sc->tx_task, START_TRANSMIT_EVENT);
ifp->if_flags |= IFF_OACTIVE;
}
@@ -352,19 +352,19 @@ void mc9328mxl_enet_start(struct ifnet *ifp)
void mc9328mxl_enet_stop (mc9328mxl_enet_softc_t *sc)
{
struct ifnet *ifp = &sc->arpcom.ac_if;
ifp->if_flags &= ~IFF_RUNNING;
/* Stop the transmitter and receiver. */
lan91c11x_write_reg(LAN91C11X_TCR,
(lan91c11x_read_reg(LAN91C11X_TCR) &
lan91c11x_write_reg(LAN91C11X_TCR,
(lan91c11x_read_reg(LAN91C11X_TCR) &
~LAN91C11X_TCR_TXENA));
lan91c11x_write_reg(LAN91C11X_RCR,
(lan91c11x_read_reg(LAN91C11X_RCR) &
lan91c11x_write_reg(LAN91C11X_RCR,
(lan91c11x_read_reg(LAN91C11X_RCR) &
~LAN91C11X_RCR_RXEN));
}
/*
@@ -376,7 +376,7 @@ void mc9328mxl_enet_tx_task(void *arg)
struct ifnet *ifp = &sc->arpcom.ac_if;
struct mbuf *m;
rtems_event_set events;
for (;;)
{
rtems_bsdnet_event_receive(
@@ -384,7 +384,7 @@ void mc9328mxl_enet_tx_task(void *arg)
RTEMS_EVENT_ANY | RTEMS_WAIT,
RTEMS_NO_TIMEOUT,
&events);
/* Send packets till queue is empty */
for (;;)
{
@@ -395,7 +395,7 @@ void mc9328mxl_enet_tx_task(void *arg)
}
mc9328mxl_enet_sendpacket (ifp, m);
softc.stats.tx_packets++;
}
ifp->if_flags &= ~IFF_OACTIVE;
}
@@ -419,7 +419,7 @@ void mc9328mxl_enet_sendpacket (struct ifnet *ifp, struct mbuf *m)
} while (l != NULL);
/* Allocate a TX buffer */
lan91c11x_write_reg(LAN91C11X_MMUCMD,
lan91c11x_write_reg(LAN91C11X_MMUCMD,
(LAN91C11X_MMUCMD_ALLOCTX |
(size >> 8)));
@@ -446,18 +446,18 @@ void mc9328mxl_enet_sendpacket (struct ifnet *ifp, struct mbuf *m)
if (size & 1) {
size++;
}
lan91c11x_write_reg(LAN91C11X_DATA, size + 6);
lan91c11x_write_reg(LAN91C11X_DATA, size + 6);
lan91c11x_lock();
/* Copy the mbuf */
l = m;
l = m;
start = 0;
d = 0;
while (l != NULL)
{
uint8_t *data;
data = mtod(l, uint8_t *);
for (i = start; i < l->m_len; i++) {
@@ -474,10 +474,10 @@ void mc9328mxl_enet_sendpacket (struct ifnet *ifp, struct mbuf *m)
l = l->m_next;
}
/* write control byte */
if (i & 1) {
lan91c11x_write_reg_fast(LAN91C11X_DATA,
lan91c11x_write_reg_fast(LAN91C11X_DATA,
htons(LAN91C11X_PKT_CTRL_ODD | d));
} else {
lan91c11x_write_reg_fast(LAN91C11X_DATA, 0);
@@ -486,18 +486,18 @@ void mc9328mxl_enet_sendpacket (struct ifnet *ifp, struct mbuf *m)
lan91c11x_unlock();
/* Enable TX interrupts */
lan91c11x_write_reg(LAN91C11X_INT,
lan91c11x_write_reg(LAN91C11X_INT,
(lan91c11x_read_reg(LAN91C11X_INT) |
LAN91C11X_INT_TXMASK |
LAN91C11X_INT_TXEMASK));
/* Enqueue it */
lan91c11x_write_reg(LAN91C11X_MMUCMD,
lan91c11x_write_reg(LAN91C11X_MMUCMD,
LAN91C11X_MMUCMD_ENQUEUE);
/* free the mbuf chain we just copied */
m_freem(m);
} /* mc9328mxl_enet_sendpacket () */
@@ -525,7 +525,7 @@ void mc9328mxl_enet_rx_task(void *arg)
&events);
/* Configure for reads from RX data area */
lan91c11x_write_reg(LAN91C11X_PTR,
lan91c11x_write_reg(LAN91C11X_PTR,
(LAN91C11X_PTR_AUTOINC |
LAN91C11X_PTR_RCV |
LAN91C11X_PTR_READ));
@@ -540,16 +540,16 @@ void mc9328mxl_enet_rx_task(void *arg)
/* get an mbuf for this packet */
MGETHDR(m, M_WAIT, MT_DATA);
/* now get a cluster pointed to by the mbuf */
/* since an mbuf by itself is too small */
MCLGET(m, M_WAIT);
lan91c11x_lock();
/* Copy the received packet into an mbuf */
for (i = 0; i < (pktlen / 2); i++) {
((uint16_t*)m->m_ext.ext_buf)[i] =
((uint16_t*)m->m_ext.ext_buf)[i] =
lan91c11x_read_reg_fast(LAN91C11X_DATA);
}
@@ -561,23 +561,23 @@ void mc9328mxl_enet_rx_task(void *arg)
lan91c11x_unlock();
/* Release the packets memory */
lan91c11x_write_reg(LAN91C11X_MMUCMD,
lan91c11x_write_reg(LAN91C11X_MMUCMD,
LAN91C11X_MMUCMD_REMTOP);
/* set the receiving interface */
m->m_pkthdr.rcvif = ifp;
m->m_nextpkt = 0;
/* set the length of the mbuf */
m->m_len = pktlen - (sizeof(struct ether_header));
m->m_pkthdr.len = m->m_len;
/* strip off the ethernet header from the mbuf */
/* but save the pointer to it */
eh = mtod (m, struct ether_header *);
m->m_data += sizeof(struct ether_header);
softc.stats.rx_packets++;
/* give all this stuff to the stack */
@@ -589,7 +589,7 @@ void mc9328mxl_enet_rx_task(void *arg)
lan91c11x_write_reg(LAN91C11X_INT, int_reg);
}
} /* mc9328mxl_enet_rx_task */
} /* mc9328mxl_enet_rx_task */
/* Show interface statistics */
@@ -609,7 +609,7 @@ static void enet_isr_on(const rtems_irq_connect_data *unused)
{
/* Enable interrupts */
MC9328MXL_AITC_INTENNUM = MC9328MXL_INT_GPIO_PORTA;
return;
}
@@ -636,38 +636,38 @@ mc9328mxl_enet_ioctl (struct ifnet *ifp, ioctl_command_t command, caddr_t data)
{
mc9328mxl_enet_softc_t *sc = ifp->if_softc;
int error = 0;
switch (command) {
case SIOCGIFADDR:
case SIOCSIFADDR:
ether_ioctl (ifp, command, data);
break;
case SIOCSIFFLAGS:
switch (ifp->if_flags & (IFF_UP | IFF_RUNNING))
{
case IFF_RUNNING:
mc9328mxl_enet_stop (sc);
break;
case IFF_UP:
mc9328mxl_enet_init (sc);
break;
case IFF_UP | IFF_RUNNING:
mc9328mxl_enet_stop (sc);
mc9328mxl_enet_init (sc);
break;
default:
break;
} /* switch (if_flags) */
break;
case SIO_RTEMS_SHOW_STATS:
mc9328mxl_enet_stats (sc);
break;
/*
* FIXME: All sorts of multicast commands need to be added here!
*/
@@ -686,14 +686,14 @@ static void enet_isr(rtems_irq_hdl_param unused)
softc.stats.interrupts++;
/* get the ISR status and determine RX or TX */
int_reg = lan91c11x_read_reg(LAN91C11X_INT);
/* Handle RX interrupts */
if ((int_reg & LAN91C11X_INT_RX) && (int_reg & LAN91C11X_INT_RXMASK)) {
softc.stats.rx_interrupts++;
/* Disable the interrupt */
int_reg &= ~LAN91C11X_INT_RXMASK;
rtems_event_send (softc.rx_task, START_RECEIVE_EVENT);
}
@@ -716,7 +716,7 @@ static void enet_isr(rtems_irq_hdl_param unused)
softc.stats.txerr_interrupts++;
printk("Caught TX interrupt - error on transmission\n");
}
/* Update the interrupt register on the 91c11x */
lan91c11x_write_reg(LAN91C11X_INT, int_reg);
c/src/lib/libbsp/arm/csb336/start/start.S
+19 -19
View File
@@ -2,7 +2,7 @@
* Cogent CSB336 startup code
*
* Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
*
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
*
@@ -16,7 +16,7 @@
#warning The call is "void boot_card(const char* cmdline);"
#warning You need to pass a NULL.
#warning Please check and remove these warnings.
/* Some standard definitions...*/
.equ PSR_MODE_USR, 0x10
.equ PSR_MODE_FIQ, 0x11
@@ -33,25 +33,25 @@
.text
.globl _start
_start:
/*
/*
* Since I don't plan to return to the bootloader,
* I don't have to save the registers.
*
* I'll just set the CPSR for SVC mode, interrupts
* I'll just set the CPSR for SVC mode, interrupts
* off, and ARM instructions.
*/
mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F)
msr cpsr, r0
/* zero the bss */
ldr r1, =_bss_end_
ldr r0, =_bss_start_
_bss_init:
_bss_init:
mov r2, #0
cmp r0, r1
strlot r2, [r0], #4
blo _bss_init /* loop while r0 < r1 */
blo _bss_init /* loop while r0 < r1 */
/* --- Initialize stack pointer registers */
@@ -75,33 +75,33 @@ _bss_init:
ldr r1, =_abt_stack_size
ldr sp, =_abt_stack
add sp, sp, r1
/* Enter UNDEF mode and set up the UNDEF stack pointer */
mov r0, #(PSR_MODE_UNDEF | PSR_I | PSR_F) /* No interrupts */
msr cpsr, r0
ldr r1, =_undef_stack_size
ldr sp, =_undef_stack
add sp, sp, r1
/* Set up the SVC stack pointer last and stay in SVC mode */
mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F) /* No interrupts */
msr cpsr, r0
ldr r1, =_svc_stack_size
ldr sp, =_svc_stack
add sp, sp, r1
sub sp, sp, #0x64
sub sp, sp, #0x64
/*
/*
* Initialize the MMU. After we return, the MMU is enabled,
* and memory may be remapped. I hope we don't remap this
* memory away.
*/
ldr r0, =mem_map
bl mmu_init
bl mmu_init
/*
/*
* Initialize the exception vectors. This includes the
* exceptions vectors (0x00000000-0x0000001c), and the
* exceptions vectors (0x00000000-0x0000001c), and the
* pointers to the exception handlers (0x00000020-0x0000003c).
*/
mov r0, #0
@@ -114,7 +114,7 @@ _bss_init:
/* Now we are prepared to start the BSP's C code */
bl boot_card
/*
/*
* Theoretically, we could return to what started us up,
* but we'd have to have saved the registers and stacks.
* Instead, we'll just reset.
@@ -124,13 +124,13 @@ _bss_init:
/* We shouldn't get here. If we do, hang */
_hang: b _hang
/*
/*
* This is the exception vector table and the pointers to
* the functions that handle the exceptions. It's a total
* of 16 words (64 bytes)
*/
vector_block:
vector_block:
ldr pc, Reset_Handler
ldr pc, Undefined_Handler
ldr pc, SWI_Handler
@@ -142,7 +142,7 @@ vector_block:
Reset_Handler: b bsp_reset
Undefined_Handler: b Undefined_Handler
SWI_Handler: b SWI_Handler
SWI_Handler: b SWI_Handler
Prefetch_Handler: b Prefetch_Handler
Abort_Handler: b Abort_Handler
nop
c/src/lib/libbsp/arm/csb337/console/fbcons.c
+15 -15
View File
@@ -30,8 +30,8 @@ static void fbcons_write_polled(int minor, char c);
static int fbcons_set_attributes(int minor, const struct termios *t);
/* Pointers to functions for handling the UART. */
console_fns fbcons_fns =
{
console_fns fbcons_fns =
{
libchip_serial_default_probe,
fbcons_first_open,
fbcons_last_close,
@@ -46,24 +46,24 @@ console_fns fbcons_fns =
/* Functions called via callbacks (i.e. the ones in uart_fns */
/*********************************************************************/
/*
/*
* This is called the first time each device is opened. Since
* the driver is polled, we don't have to do anything. If the driver
* were interrupt driven, we'd enable interrupts here.
* the driver is polled, we don't have to do anything. If the driver
* were interrupt driven, we'd enable interrupts here.
*/
static int fbcons_first_open(int major, int minor, void *arg)
static int fbcons_first_open(int major, int minor, void *arg)
{
/* printk( "Frame buffer -- first open\n" ); */
return 0;
}
/*
/*
* This is called the last time each device is closed. Since
* the driver is polled, we don't have to do anything. If the driver
* were interrupt driven, we'd disable interrupts here.
* the driver is polled, we don't have to do anything. If the driver
* were interrupt driven, we'd disable interrupts here.
*/
static int fbcons_last_close(int major, int minor, void *arg)
static int fbcons_last_close(int major, int minor, void *arg)
{
/* printk( "Frame buffer -- last close\n" ); */
return 0;
@@ -76,15 +76,15 @@ static int fbcons_last_close(int major, int minor, void *arg)
* return -1 if there's no data, otherwise return
* the character in lowest 8 bits of returned int.
*/
static int fbcons_read(int minor)
static int fbcons_read(int minor)
{
/* printk( "Frame buffer -- read\n" ); */
return -1;
}
/*
* Write buffer to LCD
/*
* Write buffer to LCD
*
* return 1 on success, -1 on error
*/
@@ -115,7 +115,7 @@ static void fbcons_write_polled(int minor, char c)
}
/* This is for setting baud rate, bits, etc. */
static int fbcons_set_attributes(int minor, const struct termios *t)
static int fbcons_set_attributes(int minor, const struct termios *t)
{
/* printk( "frame buffer -- set attributes\n" ); */
return 0;
@@ -127,7 +127,7 @@ static int fbcons_set_attributes(int minor, const struct termios *t)
* functions use them instead.
*/
/***********************************************************************/
/*
/*
* Read from UART. This is used in the exit code, and can't
* rely on interrupts.
*/
c/src/lib/libbsp/arm/csb337/console/font8x16.h
+2 -2
View File
@@ -1,7 +1,7 @@
/*
* font8x16.h
*
* Simple 8 x 16 font printable characters only. To lookoup, subtract
* Simple 8 x 16 font printable characters only. To lookoup, subtract
* FIRST_CHAR from the character, multiply x FONT_HEIGHT and get the next
* FONT_WIDTH bytes.
*
@@ -38,7 +38,7 @@
#define FONT_WIDTH 8
#define FONT_HEIGHT 16
#define FIRST_CHAR 0x20
#define LAST_CHAR 0x7f
#define LAST_CHAR 0x7f
#define CURSOR_ON 0x7F
#define CURSOR_OFF 0x20
c/src/lib/libbsp/arm/csb337/console/sed1356.c
+7 -7
View File
@@ -83,7 +83,7 @@ void sed_scroll(void);
#define SED1356_REG_LCD_DISP_START_LO_and_MID SED_REG16(0x42)
#define SED1356_REG_LCD_DISP_START_HI SED_REG16(0x44)
#define SED1356_REG_LCD_ADD_OFFSET_LO_and_HI SED_REG16(0x46)
#define SED1356_REG_LCD_PIXEL_PAN SED_REG16(0x48)
#define SED1356_REG_LCD_PIXEL_PAN SED_REG16(0x48)
#define SED1356_REG_LCD_FIFO_THRESH_LO_and_HI SED_REG16(0x4a)
#endif
@@ -242,7 +242,7 @@ void sed_putchar(char c)
sed_scroll();
}
break;
}
}
} /* sed_putchar() */
@@ -259,7 +259,7 @@ void sed_writechar(uint8_t c)
uint8_t font_data8;
uint16_t wr16;
/* Convert the current row,col and color depth values
/* Convert the current row,col and color depth values
* into an address
*/
sed_mem_add = SED_GET_ADD(sed_row, sed_col, sed_color_depth);
@@ -277,8 +277,8 @@ void sed_writechar(uint8_t c)
for (font_row = 0; font_row < FONT_HEIGHT; font_row++) {
/* get the font row of data */
font_data8 = font8x16[(c * FONT_HEIGHT) + font_row];
for (font_col = 0; font_col < 8; font_col += 4)
{
/* get a words worth of pixels */
@@ -363,7 +363,7 @@ void sed_update_fb_offset(void)
{
/* write the new sed_fb_offset value */
if (sed_disp_mode_crt) {
/* before we change the address offset, wait for the display to
/* before we change the address offset, wait for the display to
* go from active to non-active, unless the display is not enabled
*/
if (SED1356_REG_DISP_MODE & H2SED(SED1356_DISP_MODE_CRT)) { /* CRT is on */
@@ -453,7 +453,7 @@ void sed_clearscreen(void)
/* 16-bits bypasses the lookup table */
default: wr16 = vga_lookup[bg]; break;
}
for (i = 0; i < fbsize; i += 2){
for (i = 0; i < fbsize; i += 2){
sed_write_frame_buffer(i, wr16);
}
}
c/src/lib/libbsp/arm/csb337/console/sed1356_16bit.h
+88 -88
View File
@@ -37,9 +37,9 @@
#include "bits.h"
/*------------------------------------------------------------------------
* cpu specific code must define the following board specific macros.
* in cpuio.h. These examples assume the SED135x has been placed in
* in cpuio.h. These examples assume the SED135x has been placed in
* the correct endian mode via hardware.
* #define SED_MEM_BASE 0xf0600000 <-- just example addresses,
* #define SED_MEM_BASE 0xf0600000 <-- just example addresses,
* #define SED_REG_BASE 0xf0400000 <-- define for each board
* #define SED_STEP 1 <-- 1 = device is on 16-bit boundry, 2 = 32-bit boundry, 4 = 64-bit boundry
* #define SED_REG16(_x_) *(vushortr *)(SED_REG_BASE + (_x_ * SED_STEP)) // Control/Status Registers
@@ -80,7 +80,7 @@
#define SED1356_REG_LCD_DISP_START_LO_and_MID SED_REG16(0x42)
#define SED1356_REG_LCD_DISP_START_HI SED_REG16(0x44)
#define SED1356_REG_LCD_ADD_OFFSET_LO_and_HI SED_REG16(0x46)
#define SED1356_REG_LCD_PIXEL_PAN SED_REG16(0x48)
#define SED1356_REG_LCD_PIXEL_PAN SED_REG16(0x48)
#define SED1356_REG_LCD_FIFO_THRESH_LO_and_HI SED_REG16(0x4a)
/* CRT/TV Control registers */
#define SED1356_REG_CRT_HOR_DISP SED_REG16(0x50)
@@ -100,7 +100,7 @@
#define SED1356_REG_LCD_CURSOR_X_POS_LO_and_HI SED_REG16(0x72)
#define SED1356_REG_LCD_CURSOR_Y_POS_LO_and_HI SED_REG16(0x74)
#define SED1356_REG_LCD_CURSOR_BLUE_and_GREEN_CLR_0 SED_REG16(0x76)
#define SED1356_REG_LCD_CURSOR_RED_CLR_0 SED_REG16(0x78)
#define SED1356_REG_LCD_CURSOR_RED_CLR_0 SED_REG16(0x78)
#define SED1356_REG_LCD_CURSOR_BLUE_and_GREEN_CLR_1 SED_REG16(0x7a)
#define SED1356_REG_LCD_CURSOR_RED_CLR_1 SED_REG16(0x7c)
#define SED1356_REG_LCD_CURSOR_FIFO_THRESH SED_REG16(0x7e)
@@ -152,8 +152,8 @@
#define SED1356_GPIO_GPIO1 BIT1
/* SED1356_REG_MCLK_CFG */
#define SED1356_MCLK_DIV2 BIT4
#define SED1356_MCLK_SRC_BCLK BIT0
#define SED1356_MCLK_DIV2 BIT4
#define SED1356_MCLK_SRC_BCLK BIT0
#define SED1356_MCLK_SRC_CLKI 0x00
/* SED1356_REG_LCD_PCLK_CFG, SED1356_REG_CRT_PCLK_CFG
@@ -170,11 +170,11 @@
#define SED1356_PCLK_SRC_MCLK 0x03
/* SED1356_REG_MEM_CFG_and_REF_RATE - even */
#define SED1356_MEM_CFG_2CAS_EDO 0x00
#define SED1356_MEM_CFG_2CAS_FPM 0x01
#define SED1356_MEM_CFG_2WE_EDO 0x02
#define SED1356_MEM_CFG_2WE_FPM 0x03
#define SED1356_MEM_CFG_MASK 0x03
#define SED1356_MEM_CFG_2CAS_EDO 0x00
#define SED1356_MEM_CFG_2CAS_FPM 0x01
#define SED1356_MEM_CFG_2WE_EDO 0x02
#define SED1356_MEM_CFG_2WE_FPM 0x03
#define SED1356_MEM_CFG_MASK 0x03
/* SED1356_REG_MEM_CFG_and_REF_RATE - odd */
#define SED1356_REF_TYPE_CBR 0x00 << 6 << 8
@@ -236,7 +236,7 @@
#define SED1356_MEM_TMG1_FPM80_MCLK20 0x01 << 8
/* Bit definitions
/* Bit definitions
*
* SED1356_REG_PANEL_TYPE_AND_MOD_RATE - even
*/
@@ -425,87 +425,87 @@ LU_BRT_WHITE /* 15 */
/* Vertical and Horizontal Pulse, Start and Non-Display values vary depending
* upon the mode. The following section gives some insight into how the
* values are arrived at.
* ms = milliseconds, us = microseconds, ns = nanoseconds
* Mhz = Megaherz, Khz = Kiloherz, Hz = Herz
* ms = milliseconds, us = microseconds, ns = nanoseconds
* Mhz = Megaherz, Khz = Kiloherz, Hz = Herz
*
* ***************************************************************************************************
* ***************************************************************************************************
* CRT Mode is 640x480 @ 72Hz VESA compatible timing. PCLK = 31.5Mhz (31.75ns)
* ***************************************************************************************************
* ***************************************************************************************************
*
* CRT MODE HORIZONTAL TIMING PARAMETERS
* CRT MODE HORIZONTAL TIMING PARAMETERS
*
* |<-------Tha------->|
* |___________________| ______
* Display Enable _____________________| |____________________|
* | |
* Horizontal Pulse __ ________|___________________|________ __________
* |_________| | | |________|
* |<- Thp ->| | | |
* | |<-Thbp->| | |
* | |<-Thfp->|
* |<----------------------Tht-------------------->|
* |<-------Tha------->|
* |___________________| ______
* Display Enable _____________________| |____________________|
* | |
* Horizontal Pulse __ ________|___________________|________ __________
* |_________| | | |________|
* |<- Thp ->| | | |
* | |<-Thbp->| | |
* | |<-Thfp->|
* |<----------------------Tht-------------------->|
*
* Tha - Active Display Time = 640 pixels
* Thp - Horizontal Pulse = 1.27us/31.75ns = 40 pixels
* Thbp - Horizontal Front Porch = 1.016us/31.75ns = 32 pixels
* Thfp - Horizontal Back Porch = 3.8us/31.75ns = 120 pixels
* Tht - Total Horizontal Time = 832 pixels x 32.75ns/pixel = 26.416us or 38.785Khz
* Tha - Active Display Time = 640 pixels
* Thp - Horizontal Pulse = 1.27us/31.75ns = 40 pixels
* Thbp - Horizontal Front Porch = 1.016us/31.75ns = 32 pixels
* Thfp - Horizontal Back Porch = 3.8us/31.75ns = 120 pixels
* Tht - Total Horizontal Time = 832 pixels x 32.75ns/pixel = 26.416us or 38.785Khz
*
* Correlation between horizontal timing parameters and SED registers
* Correlation between horizontal timing parameters and SED registers
*/
#define SED_HOR_PULSE_WIDTH_CRT 0x07 /* Horizontal Pulse Width Register = (Thp/8) - 1 */
#define SED_HOR_PULSE_START_CRT 0x02 /* Horizontal Pulse Start Position Register = ((Thfp + 2)/8) - 1 */
#define SED_HOR_NONDISP_CRT 0x17 /* Horizontal Non-Display Period Register = ((Thp + Thfp + Thbp)/8) - 1 */
/*
* CRT MODE VERTICAL TIMING PARAMTERS
* CRT MODE VERTICAL TIMING PARAMTERS
*
* |<-------Tva------->|
* |___________________| ______
* Display Enable _____________________| |_____________________|
* | |
* Vertical Pulse __ ________|___________________|________ __________
* |_________| | | |________|
* |<- Tvp ->| | | |
* | |<-Tvbp->| | |
* | |<-Tvfp->|
* |<----------------------Tvt-------------------->|
* |<-------Tva------->|
* |___________________| ______
* Display Enable _____________________| |_____________________|
* | |
* Vertical Pulse __ ________|___________________|________ __________
* |_________| | | |________|
* |<- Tvp ->| | | |
* | |<-Tvbp->| | |
* | |<-Tvfp->|
* |<----------------------Tvt-------------------->|
*
* Tva - Active Display Time = 480 lines
* Tvp - Vertical Pulse = 3 lines
* Tvfp - Vertical Front Porch = 9 lines
* Tvbp - Vertical Back Porch = 28 lines
* Tvt - Total Horizontal Time = 520 lines x 26.416us/line = 13.73632ms or 72.8Hz
* Tva - Active Display Time = 480 lines
* Tvp - Vertical Pulse = 3 lines
* Tvfp - Vertical Front Porch = 9 lines
* Tvbp - Vertical Back Porch = 28 lines
* Tvt - Total Horizontal Time = 520 lines x 26.416us/line = 13.73632ms or 72.8Hz
*
* Correlation between vertical timing parameters and SED registers
* Correlation between vertical timing parameters and SED registers
*/
#define SED_VER_PULSE_WIDTH_CRT 0x02 // VRTC/FPFRAME Pulse Width Register = Tvp - 1
#define SED_VER_PULSE_START_CRT 0x08 // VRTC/FPFRAME Start Position Register = Tvfp - 1
#define SED_VER_PULSE_START_CRT 0x08 // VRTC/FPFRAME Start Position Register = Tvfp - 1
#define SED_VER_NONDISP_CRT 0x27 // Vertical Non-Display Period Register = (Tvp + Tvfp + Tvbp) - 1
/*
*****************************************************************************************************
*****************************************************************************************************
* DUAL LCD Mode is 640x480 @ 60Hz VGA compatible timing. PCLK = 25.175Mhz (39.722ns)
*****************************************************************************************************
*****************************************************************************************************
*
* LCD MODE HORIZONTAL TIMING PARAMTERS
* LCD MODE HORIZONTAL TIMING PARAMTERS
*
* |<-------Tha------->|
* |___________________| ______
* Display Enable _____________________| |____________________|
* | |
* Horizontal Pulse __ ________|___________________|________ __________
* |_________| | | |________|
* |<- Thp ->| | | |
* | |<-Thbp->| | |
* | |<-Thfp->|
* |<----------------------Tht-------------------->|
* |<-------Tha------->|
* |___________________| ______
* Display Enable _____________________| |____________________|
* | |
* Horizontal Pulse __ ________|___________________|________ __________
* |_________| | | |________|
* |<- Thp ->| | | |
* | |<-Thbp->| | |
* | |<-Thfp->|
* |<----------------------Tht-------------------->|
*
* Tha - Active Display Time = 640 pixels
* Thp - Horizontal Pulse = 3.8us/39.72ns = 96 pixels
* Thfp - Horizontal Front Porch = .595us/39.72ns = 16 pixels
* Thbp - Horizontal Backporch = 1.9us/39.72ns = 48 pixels
* Tht - Total Horizontal Time = = 800 pixels @ 39.72ns/pixel = 31.776us or 31.47Khz
* Tha - Active Display Time = 640 pixels
* Thp - Horizontal Pulse = 3.8us/39.72ns = 96 pixels
* Thfp - Horizontal Front Porch = .595us/39.72ns = 16 pixels
* Thbp - Horizontal Backporch = 1.9us/39.72ns = 48 pixels
* Tht - Total Horizontal Time = = 800 pixels @ 39.72ns/pixel = 31.776us or 31.47Khz
*
* Correlation between horizontal timing parameters and SED registers
* Correlation between horizontal timing parameters and SED registers
*#define SED_HOR_PULSE_WIDTH_LCD 0x0b // HRTC/FPLINE Pulse Width Register = (Thp/8) - 1
*#define SED_HOR_PULSE_START_LCD 0x02 // HRTC/FPLINE Start Position Register = (Thfp/8) - 2
*#define SED_HOR_NONDISP_LCD 0x13 // Horizontal Non-Display Period Register = ((Thp + Thfp + Thbp)/8) - 1
@@ -516,28 +516,28 @@ extern long SED_HOR_NONDISP_LCD;
/*
*
* LCD MODE VERTICAL TIMING PARAMTERS
* LCD MODE VERTICAL TIMING PARAMTERS
*
* |<-------Tva------->|
* |___________________| ______
* Display Enable _____________________| |_____________________|
* | |
* Vertical Pulse __ ________|___________________|________ __________
* |_________| | | |________|
* |<- Tvp ->| | | |
* | |<-Tvbp->| | |
* | |<-Tvfp->|
* |<----------------------Tvt-------------------->|
* |<-------Tva------->|
* |___________________| ______
* Display Enable _____________________| |_____________________|
* | |
* Vertical Pulse __ ________|___________________|________ __________
* |_________| | | |________|
* |<- Tvp ->| | | |
* | |<-Tvbp->| | |
* | |<-Tvfp->|
* |<----------------------Tvt-------------------->|
*
* Tva - Active Display Time = 480 lines
* Tvp - Vertical Pulse = 2 lines
* Tvfp - Vertical Front Porch = 10 lines
* Tvbp - Vertical Backporch = 33 lines
* Tvt - Total Horizontal Time = 525 lines @ 31.776us/line = 16.682ms or 60Hz
* Tva - Active Display Time = 480 lines
* Tvp - Vertical Pulse = 2 lines
* Tvfp - Vertical Front Porch = 10 lines
* Tvbp - Vertical Backporch = 33 lines
* Tvt - Total Horizontal Time = 525 lines @ 31.776us/line = 16.682ms or 60Hz
*
* Correlation between vertical timing parameters and SED registers
* Correlation between vertical timing parameters and SED registers
*#define SED_VER_PULSE_WIDTH_LCD 0x01 // VRTC/FPFRAME Pulse Width Register = Tvp - 1
*#define SED_VER_PULSE_START_LCD 0x09 // VRTC/FPFRAME Start Position Register = Tvfp - 1
*#define SED_VER_PULSE_START_LCD 0x09 // VRTC/FPFRAME Start Position Register = Tvfp - 1
*#define SED_VER_NONDISP_LCD 0x2c // Vertical Non-Display Period Register = (Tvp + Tvfp + Tvbp) - 1
*/
extern long SED_VER_PULSE_WIDTH_LCD;
c/src/lib/libbsp/arm/csb337/console/uarts.c
+11 -11
View File
@@ -1,11 +1,11 @@
/*
* Console driver for for KIT637_V6 (CSB637)
*
* This driver uses the shared console driver in
* This driver uses the shared console driver in
* ...../libbsp/shared/console.c
*
* Copyright (c) 2003 by Cogent Computer Systems
* Written by Jay Monkman <jtm@lopingdog.com>
* Written by Jay Monkman <jtm@lopingdog.com>
*
* Modified by Fernando Nicodemos <fgnicodemos@terra.com.br>
* from NCB - Sistemas Embarcados Ltda. (Brazil)
@@ -14,7 +14,7 @@
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* Modified and FrameBuffer Console Device Support added by
* Modified and FrameBuffer Console Device Support added by
* Joel Sherrill, 2009.
*
* $Id$
@@ -46,35 +46,35 @@ extern console_fns dbgu_fns;
extern console_fns umoncons_fns;
#define UMON_CONS_DEV 1
#else
#define UMON_CONS_DEV 0
#define UMON_CONS_DEV 0
#endif
#if ENABLE_USART0 || ENABLE_USART1 || ENABLE_USART2 || ENABLE_USART3
extern console_fns usart_polling_fns;
#endif
#if ENABLE_USART0
#if ENABLE_USART0
#define USART0_DEV 1
#else
#define USART0_DEV 0
#define USART0_DEV 0
#endif
#if ENABLE_USART1
#if ENABLE_USART1
#define USART1_DEV 1
#else
#define USART1_DEV 0
#define USART1_DEV 0
#endif
#if ENABLE_USART2
#define USART2_DEV 1
#else
#define USART2_DEV 0
#define USART2_DEV 0
#endif
#if ENABLE_USART3
#define USART3_DEV 1
#else
#define USART3_DEV 0
#define USART3_DEV 0
#endif
#define NUM_DEVS \
@@ -85,7 +85,7 @@ extern console_fns dbgu_fns;
unsigned long Console_Port_Count = NUM_DEVS;
console_data Console_Port_Data[NUM_DEVS];
/*
/*
* There's one item in array for each UART.
*
* Some of these fields are marked "NOT USED". They are not used
c/src/lib/libbsp/arm/csb337/include/bsp.h
+1 -1
View File
@@ -38,7 +38,7 @@ console_tbl *BSP_get_uart_from_minor(int minor);
static inline int32_t BSP_get_baud(void) {return 38400;}
#define ST_PIMR_PIV 33 /* 33 ticks of the 32.768Khz clock ~= 1msec */
/*
* Network driver configuration
*/
c/src/lib/libbsp/arm/csb337/network/network.c
+3 -3
View File
@@ -523,8 +523,8 @@ void at91rm9200_emac_init_hw(at91rm9200_emac_softc_t *sc)
#if defined(PHY_DBG)
printk("10MBIT, ");
#endif
}
}
if (emac_link_status & (PHY_STAT_100BASE_X_FDX | PHY_STAT_10BASE_FDX)) {
EMAC_REG(EMAC_CFG) |= EMAC_CFG_FD;
#if defined(PHY_DBG)
@@ -535,7 +535,7 @@ void at91rm9200_emac_init_hw(at91rm9200_emac_softc_t *sc)
#if defined(PHY_DBG)
printk("Half Duplex.\n");
#endif
}
}
/* Set PHY LED modes. Traffic Meter Mode for ACTLED
* Set Bit 6 - Traffic Mode on
c/src/lib/libbsp/arm/csb337/start/start.S
+17 -17
View File
@@ -2,7 +2,7 @@
* Cogent CSB337 startup code
*
* Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
*
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
*
@@ -28,25 +28,25 @@
.text
.globl _start
_start:
/*
/*
* Since I don't plan to return to the bootloader,
* I don't have to save the registers.
*
* I'll just set the CPSR for SVC mode, interrupts
* I'll just set the CPSR for SVC mode, interrupts
* off, and ARM instructions.
*/
mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F)
msr cpsr, r0
/* zero the bss */
ldr r1, =_bss_end_
ldr r0, =_bss_start_
_bss_init:
_bss_init:
mov r2, #0
cmp r0, r1
strlot r2, [r0], #4
blo _bss_init /* loop while r0 < r1 */
blo _bss_init /* loop while r0 < r1 */
/* --- Initialize stack pointer registers */
@@ -70,26 +70,26 @@ _bss_init:
ldr r1, =_abt_stack_size
ldr sp, =_abt_stack
add sp, sp, r1
/* Set up the SVC stack pointer last and stay in SVC mode */
mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F) /* No interrupts */
msr cpsr, r0
ldr r1, =_svc_stack_size
ldr sp, =_svc_stack
add sp, sp, r1
sub sp, sp, #0x64
sub sp, sp, #0x64
/*
/*
* Initialize the MMU. After we return, the MMU is enabled,
* and memory may be remapped. I hope we don't remap this
* memory away.
*/
ldr r0, =mem_map
bl mmu_init
bl mmu_init
/*
/*
* Initialize the exception vectors. This includes the
* exceptions vectors (0x00000000-0x0000001c), and the
* exceptions vectors (0x00000000-0x0000001c), and the
* pointers to the exception handlers (0x00000020-0x0000003c).
*/
mov r0, #0
@@ -103,7 +103,7 @@ _bss_init:
mov r0, #0
bl boot_card
/*
/*
* Theoretically, we could return to what started us up,
* but we'd have to have saved the registers and stacks.
* Instead, we'll just reset.
@@ -113,13 +113,13 @@ _bss_init:
/* We shouldn't get here. If we do, hang */
_hang: b _hang
/*
/*
* This is the exception vector table and the pointers to
* the functions that handle the exceptions. It's a total
* of 16 words (64 bytes)
*/
vector_block:
vector_block:
ldr pc, Reset_Handler
ldr pc, Undefined_Handler
ldr pc, SWI_Handler
@@ -131,7 +131,7 @@ vector_block:
Reset_Handler: b bsp_reset
Undefined_Handler: b Undefined_Handler
SWI_Handler: b SWI_Handler
SWI_Handler: b SWI_Handler
Prefetch_Handler: b Prefetch_Handler
Abort_Handler: b Abort_Handler
nop
c/src/lib/libbsp/arm/csb337/startup/bspreset.c
+1 -1
View File
@@ -3,7 +3,7 @@
*
* Copyright (c) 2004 by Cogent Computer Systems
* Written by Jay Monkman <jtm@lopingdog.com>
*
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
c/src/lib/libbsp/arm/csb337/startup/bspstart.c
+5 -5
View File
@@ -3,7 +3,7 @@
*
* Copyright (c) 2004 by Cogent Computer Systems
* Written by Jay Monkman <jtm@lopingdog.com>
*
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
*
@@ -38,7 +38,7 @@ void bsp_start_default( void )
/* disable interrupts */
AIC_CTL_REG(AIC_IDCR) = 0xffffffff;
/*
/*
* Some versions of the bootloader have the MAC address
* reversed. This fixes it, if necessary.
*/
@@ -48,15 +48,15 @@ void bsp_start_default( void )
* Init rtems exceptions management
*/
rtems_exception_init_mngt();
/*
* Init rtems interrupt management
*/
rtems_irq_mngt_init();
} /* bsp_start */
/*
/*
* Some versions of the bootloader shipped with the CSB337
* reverse the MAC address. This function tests for that,
* and fixes the MAC address.
c/src/lib/libbsp/arm/edb7312/irq/irq.h
+3 -3
View File
@@ -60,11 +60,11 @@ typedef unsigned int rtems_irq_number;
#define BSP_KBDINT 16
#define BSP_SS2RX 17
#define BSP_SS2TX 18
#define BSP_UTXINT2 19
#define BSP_URXINT2 20
#define BSP_UTXINT2 19
#define BSP_URXINT2 20
/* int interrupt status/mask register 3 */
#define BSP_DAIINT 21
#define BSP_MAX_INT 22
#define BSP_MAX_INT 22
/*
* Type definition for RTEMS managed interrupts
c/src/lib/libbsp/arm/edb7312/start/start.S
+1 -1
View File
@@ -18,7 +18,7 @@
#warning The call is "void boot_card(const char* cmdline);"
#warning You need to pass a NULL.
#warning Please check and remove these warnings.
/* Some standard definitions...*/
.equ Mode_USR, 0x10
c/src/lib/libbsp/arm/gba/irq/bsp_irq_init.c
+1 -1
View File
@@ -33,7 +33,7 @@ void BSP_rtems_irq_mngt_init(void)
int i;
vectorTable = (long *) VECTOR_TABLE;
/* Initialize the vector table contents with default handler */
for (i=0; i<BSP_MAX_INT; i++) {
*(vectorTable + i) = (long)(default_int_handler);
c/src/lib/libbsp/arm/gba/start/start.S
+1 -1
View File
@@ -54,7 +54,7 @@
#warning The call is "void boot_card(const char* cmdline);"
#warning You need to pass a NULL.
#warning Please check and remove these warnings.
#define __asm__
#include <rtems/asm.h>
#include <asm_macros.h>
c/src/lib/libbsp/arm/gdbarmsim/start/start.S
+28 -28
View File
@@ -80,7 +80,7 @@
- Allow linker script to provide stack via __stack symbol - see
defintion of .Lstack
- Provide "hooks" that may be used by the application to add
custom init code - see .Lhwinit and .Lswinit
custom init code - see .Lhwinit and .Lswinit
- Go through all execution modes and set up stack for each of them.
Loosely based on init.s from ARM/Motorola example code.
Note: Mode switch via CPSR is not allowed once in non-privileged
@@ -91,10 +91,10 @@
cmp r3, #0
#ifdef __thumb2__
it eq
#endif
#endif
ldreq r3, .LC0
/* Note: This 'mov' is essential when starting in User, and ensures we
always get *some* sp value for the initial mode, even if we
always get *some* sp value for the initial mode, even if we
have somehow missed it below (in which case it gets the same
value as FIQ - not ideal, but better than nothing.) */
mov sp, r3
@@ -107,8 +107,8 @@
msr CPSR_c, #0xD1 /* FIRQ mode, interrupts disabled */
mov sp, r3
sub sl, sp, #0x1000 /* This mode also has its own sl (see below) */
mov r3, sl
mov r3, sl
msr CPSR_c, #0xD7 /* Abort mode, interrupts disabled */
mov sp, r3
sub r3, r3, #0x1000
@@ -120,7 +120,7 @@
msr CPSR_c, #0xD2 /* IRQ mode, interrupts disabled */
mov sp, r3
sub r3, r3, #0x2000
msr CPSR_c, #0xD3 /* Supervisory mode, interrupts disabled */
mov sp, r3
@@ -128,11 +128,11 @@
bic r3, r3, #0x00FF /* Align with current 64k block */
bic r3, r3, #0xFF00
str r3, [r3, #-4] /* Move value into user mode sp without */
ldmdb r3, {sp}^ /* changing modes, via '^' form of ldm */
str r3, [r3, #-4] /* Move value into user mode sp without */
ldmdb r3, {sp}^ /* changing modes, via '^' form of ldm */
orr r2, r2, #0xC0 /* Back to original mode, presumably SVC, */
msr CPSR_c, r2 /* with FIQ/IRQ disable bits forced to 1 */
#endif
#endif
.LC23:
/* Setup a default stack-limit in-case the code has been
compiled with "-mapcs-stack-check". Hard-wiring this value
@@ -148,11 +148,11 @@
mov a2, #0 /* Second arg: fill value */
mov fp, a2 /* Null frame pointer */
mov r7, a2 /* Null frame pointer for Thumb */
ldr a1, .LC1 /* First arg: start of memory block */
ldr a3, .LC2
ldr a3, .LC2
sub a3, a3, a1 /* Third arg: length of block */
#if defined(__thumb__) && !defined(__thumb2__)
/* Enter Thumb mode.... */
@@ -162,9 +162,9 @@
.code 16
.global __change_mode
.thumb_func
__change_mode:
__change_mode:
#endif
bl FUNCTION (memset)
#if !defined (ARM_RDP_MONITOR) && !defined (ARM_RDI_MONITOR)
/* Changes by toralf: Taken from libgloss/m68k/crt0.S
@@ -180,7 +180,7 @@ __change_mode:
mov lr, pc
mov pc, r3
#endif
.LC24:
.LC24:
ldr r3, .Lswinit
cmp r3, #0
beq .LC25
@@ -191,13 +191,13 @@ __change_mode:
mov pc, r3
#endif
.LC25:
.LC25:
mov r0, #0 /* no arguments */
mov r1, #0 /* no argv either */
#else
/* Need to set up standard file handles */
bl FUNCTION (initialise_monitor_handles)
#ifdef ARM_RDP_MONITOR
swi SWI_GetEnv /* sets r0 to point to the command line */
mov r1, r0
@@ -289,7 +289,7 @@ __change_mode:
str r4, [r3]
add r3, #4
b .LC15
.LC14:
.LC14:
/* Ensure doubleword stack alignment. */
mov r4, sp
mov r5, #7
@@ -328,10 +328,10 @@ change_back:
With an Angel debug monitor, this will report 'Unknown SWI'. */
swi SWI_Exit
#endif
/* For Thumb, constants must be after the code since only
/* For Thumb, constants must be after the code since only
positive offsets are supported for PC relative addresses. */
.align 0
.LC0:
#ifdef ARM_RDI_MONITOR
@@ -342,15 +342,15 @@ change_back:
may be defined externally; .Lstack will be used instead of .LC0 if
it points to a non-0 value. Also set up references to "hooks" that
may be used by the application to provide additional init code. */
#ifdef __pe__
.word 0x800000
#else
.word 0x80000 /* Top of RAM on the PIE board. */
#endif
.Lstack:
.Lstack:
.word __stack
.Lhwinit:
.Lhwinit:
.word FUNCTION (hardware_init_hook)
.Lswinit:
.word FUNCTION (software_init_hook)
@@ -360,13 +360,13 @@ change_back:
runtime (meaning "ignore setting") for the variables, when the user
does not provide the symbols. (The linker uses a weak symbol if,
and only if, a normal version of the same symbol isn't provided
e.g. by a linker script or another object file.) */
e.g. by a linker script or another object file.) */
.weak __stack
.weak FUNCTION (hardware_init_hook)
.weak FUNCTION (hardware_init_hook)
.weak FUNCTION (software_init_hook)
#endif
#endif
#if defined(__ELF__) && !defined(__USING_SJLJ_EXCEPTIONS__)
/* Protect against unhandled exceptions. */
@@ -396,7 +396,7 @@ __stack_base__: .word 0
StackLimit: .word 0
CommandLine: .space 256,0 /* Maximum length of 255 chars handled. */
#endif
#ifdef __pe__
.section .idata$3
.long 0,0,0,0,0,0,0,0
c/src/lib/libbsp/arm/gdbarmsim/startup/syscalls.c
+44 -44
View File
@@ -64,11 +64,11 @@ struct fdent
#define MAX_OPEN_FILES 20
/* User file descriptors (fd) are integer indexes into
/* User file descriptors (fd) are integer indexes into
the openfiles[] array. Error checking is done by using
findslot().
findslot().
This openfiles array is manipulated directly by only
This openfiles array is manipulated directly by only
these 5 functions:
findslot() - Translate entry.
@@ -103,7 +103,7 @@ static int monitor_stdout;
static int monitor_stderr;
/* Return a pointer to the structure associated with
the user file descriptor fd. */
the user file descriptor fd. */
static struct fdent*
findslot (int fd)
{
@@ -121,8 +121,8 @@ findslot (int fd)
return &openfiles[fd];
}
/* Return the next lowest numbered free file
structure, or -1 if we can't find one. */
/* Return the next lowest numbered free file
structure, or -1 if we can't find one. */
static int
newslot (void)
{
@@ -142,7 +142,7 @@ void
initialise_monitor_handles (void)
{
int i;
/* Open the standard file descriptors by opening the special
* teletype device, ":tt", read-only to obtain a descritpor for
* standard input and write-only to obtain a descriptor for standard
@@ -155,7 +155,7 @@ initialise_monitor_handles (void)
#ifdef ARM_RDI_MONITOR
int volatile block[3];
block[0] = (int) ":tt";
block[2] = 3; /* length of filename */
block[1] = 0; /* mode "r" */
@@ -242,7 +242,7 @@ checkerror (int result)
/* fh, is a valid internal file handle.
ptr, is a null terminated string.
len, is the length in bytes to read.
len, is the length in bytes to read.
Returns the number of bytes *not* written. */
int
_swiread (int fh,
@@ -251,11 +251,11 @@ _swiread (int fh,
{
#ifdef ARM_RDI_MONITOR
int block[3];
block[0] = fh;
block[1] = (int) ptr;
block[2] = len;
return checkerror (do_AngelSWI (AngelSWI_Reason_Read, block));
#else
register int r0 asm("r0");
@@ -271,7 +271,7 @@ _swiread (int fh,
#endif
}
/* fd, is a valid user file handle.
/* fd, is a valid user file handle.
Translates the return of _swiread into
bytes read. */
int
@@ -296,7 +296,7 @@ _read (int fd,
pfd->pos += len - res;
/* res == len is not an error,
/* res == len is not an error,
at least if we want feof() to work. */
return len - res;
}
@@ -341,7 +341,7 @@ _swilseek (int fd,
}
dir = SEEK_SET;
}
#ifdef ARM_RDI_MONITOR
int block[2];
if (dir == SEEK_END)
@@ -352,7 +352,7 @@ _swilseek (int fd,
return -1;
ptr += res;
}
/* This code only does absolute seeks. */
block[0] = pfd->handle;
block[1] = ptr;
@@ -405,11 +405,11 @@ _swiwrite (
{
#ifdef ARM_RDI_MONITOR
int block[3];
block[0] = fh;
block[1] = (int) ptr;
block[2] = len;
return checkerror (do_AngelSWI (AngelSWI_Reason_Write, block));
#else
register int r0 asm("r0");
@@ -449,11 +449,11 @@ _write (int fd,
pfd->pos += len - res;
/* We wrote 0 bytes?
/* We wrote 0 bytes?
Retrieve errno just in case. */
if ((len - res) == 0)
return error (0);
return (len - res);
}
@@ -464,7 +464,7 @@ _swiopen (const char * path, int flags)
#ifdef ARM_RDI_MONITOR
int block[3];
#endif
int fd = newslot ();
if (fd == -1)
@@ -472,9 +472,9 @@ _swiopen (const char * path, int flags)
errno = EMFILE;
return -1;
}
/* It is an error to open a file that already exists. */
if ((flags & O_CREAT)
if ((flags & O_CREAT)
&& (flags & O_EXCL))
{
struct stat st;
@@ -487,15 +487,15 @@ _swiopen (const char * path, int flags)
}
}
/* The flags are Unix-style, so we need to convert them. */
/* The flags are Unix-style, so we need to convert them. */
#ifdef O_BINARY
if (flags & O_BINARY)
aflags |= 1;
#endif
/* In O_RDONLY we expect aflags == 0. */
if (flags & O_RDWR)
if (flags & O_RDWR)
aflags |= 2;
if ((flags & O_CREAT)
@@ -509,21 +509,21 @@ _swiopen (const char * path, int flags)
aflags &= ~4;
aflags |= 8;
}
#ifdef ARM_RDI_MONITOR
block[0] = (int) path;
block[2] = strlen (path);
block[1] = aflags;
fh = do_AngelSWI (AngelSWI_Reason_Open, block);
#else
asm ("mov r0,%2; mov r1, %3; swi %a1; mov %0, r0"
: "=r"(fh)
: "i" (SWI_Open),"r"(path),"r"(aflags)
: "r0","r1");
#endif
/* Return a user file descriptor or an error. */
if (fh >= 0)
{
@@ -550,8 +550,8 @@ _swiclose (int fh)
#else
register int r0 asm("r0");
r0 = fh;
asm ("swi %a2"
: "=r"(r0)
asm ("swi %a2"
: "=r"(r0)
: "0"(r0), "i" (SWI_Close));
return checkerror (r0);
#endif
@@ -605,9 +605,9 @@ _sbrk (int incr)
if (heap_end == NULL)
heap_end = & end;
prev_heap_end = heap_end;
if (heap_end + incr > stack_ptr)
{
/* Some of the libstdc++-v3 tests rely upon detecting
@@ -616,21 +616,21 @@ _sbrk (int incr)
extern void abort (void);
_write (1, "_sbrk: Heap and stack collision\n", 32);
abort ();
#else
errno = ENOMEM;
return (caddr_t) -1;
#endif
}
heap_end += incr;
return (caddr_t) prev_heap_end;
}
#endif
int
int
_swistat (int fd, struct stat * st)
{
struct fdent *pfd;
@@ -675,14 +675,14 @@ _stat (const char *fname, struct stat *st)
{
int fd, res;
memset (st, 0, sizeof (* st));
/* The best we can do is try to open the file readonly.
/* The best we can do is try to open the file readonly.
If it exists, then we can guess a few things about it. */
if ((fd = _open (fname, O_RDONLY)) == -1)
return -1;
st->st_mode |= S_IFREG | S_IREAD;
res = _swistat (fd, st);
/* Not interested in the error. */
_close (fd);
_close (fd);
return res;
}
@@ -705,12 +705,12 @@ _unlink (const char *path)
#else
register int r0 asm("r0");
r0 = (int)path;
asm ("swi %a2"
asm ("swi %a2"
: "=r"(r0)
: "0"(r0), "i" (SWI_Remove));
res = r0;
#endif
if (res == -1)
if (res == -1)
return error (res);
return 0;
}
@@ -747,7 +747,7 @@ _gettimeofday (struct timeval * tp, void * tzvp)
#endif
/* Return a clock that ticks at 100Hz. */
clock_t
clock_t
_clock (void)
{
clock_t timeval;
@@ -773,7 +773,7 @@ _times (struct tms * tp)
tp->tms_cutime = 0; /* user time, children */
tp->tms_cstime = 0; /* system time, children */
}
return timeval;
};
@@ -831,7 +831,7 @@ _system (const char *s)
#else
register int r0 asm("r0");
r0 = (int)s;
asm ("swi %a2"
asm ("swi %a2"
: "=r" (r0)
: "0"(r0), "i" (SWI_CLI));
return checkerror (r0);
@@ -853,7 +853,7 @@ _rename (const char * oldpath, const char * newpath)
register int r1 asm("r1");
r0 = (int)oldpath;
r1 = (int)newpath;
asm ("swi %a3"
asm ("swi %a3"
: "=r" (r0)
: "0" (r0), "r" (r1), "i" (SWI_Rename));
return checkerror (r0);
c/src/lib/libbsp/arm/gp32/console/uart.c
+24 -24
View File
@@ -1,10 +1,10 @@
/*
* console driver for S3C2400 UARTs
*
* This driver uses the shared console driver in
* This driver uses the shared console driver in
* ...../libbsp/shared/console.c
*
* If you want the driver to be interrupt driven, you
* If you want the driver to be interrupt driven, you
* need to write the ISR, and in the ISR insert the
* chars into termios's queue.
*
@@ -53,8 +53,8 @@ console_data Console_Port_Data[NUM_DEVS];
rtems_device_minor_number Console_Port_Minor = 0;
/* Pointers to functions for handling the UART. */
console_fns uart_fns =
{
console_fns uart_fns =
{
libchip_serial_default_probe,
uart_first_open,
uart_last_close,
@@ -66,7 +66,7 @@ console_fns uart_fns =
FALSE /* TRUE if interrupt driven, FALSE if not. */
};
/*
/*
* There's one item in array for each UART.
*
* Some of these fields are marked "NOT USED". They are not used
@@ -99,25 +99,25 @@ console_tbl Console_Port_Tbl[] = {
/* Functions called via termios callbacks (i.e. the ones in uart_fns */
/*********************************************************************/
/*
* This is called the first time each device is opened. If the driver
* is interrupt driven, you should enable interrupts here. Otherwise,
/*
* This is called the first time each device is opened. If the driver
* is interrupt driven, you should enable interrupts here. Otherwise,
* it's probably safe to do nothing.
*
* Since micromonitor already set up the UART, we do nothing.
*/
static int uart_first_open(int major, int minor, void *arg)
static int uart_first_open(int major, int minor, void *arg)
{
return 0;
}
/*
* This is called the last time each device is closed. If the driver
* is interrupt driven, you should disable interrupts here. Otherwise,
/*
* This is called the last time each device is closed. If the driver
* is interrupt driven, you should disable interrupts here. Otherwise,
* it's probably safe to do nothing.
*/
static int uart_last_close(int major, int minor, void *arg)
static int uart_last_close(int major, int minor, void *arg)
{
return 0;
}
@@ -129,7 +129,7 @@ static int uart_last_close(int major, int minor, void *arg)
* Return -1 if there's no data, otherwise return
* the character in lowest 8 bits of returned int.
*/
static int uart_read(int minor)
static int uart_read(int minor)
{
char c;
@@ -148,8 +148,8 @@ static int uart_read(int minor)
}
/*
* Write buffer to UART
/*
* Write buffer to UART
*
* return 1 on success, -1 on error
*/
@@ -163,14 +163,14 @@ static int uart_write(int minor, const char *buf, int len)
while(!(rUTRSTAT0 & 0x2)) {
continue;
}
rUTXH0 = (char) buf[i];
}
} else {
printk("Unknown console minor number: %d\n", minor);
return -1;
}
return 1;
}
@@ -180,13 +180,13 @@ static void uart_init(int minor)
{
int i;
unsigned int reg = 0;
/* enable UART0 */
rCLKCON|=0x100;
/* value is calculated so : (int)(PCLK/16./baudrate) -1 */
reg = get_PCLK() / (16 * 115200) - 1;
/* FIFO enable, Tx/Rx FIFO clear */
rUFCON0 = 0x07;
rUMCON0 = 0x0;
@@ -200,7 +200,7 @@ static void uart_init(int minor)
rUBRDIV0 = reg;
for (i = 0; i < 100; i++);
}
/* I'm not sure this is needed for the shared console driver. */
@@ -210,7 +210,7 @@ static void uart_write_polled(int minor, char c)
}
/* This is for setting baud rate, bits, etc. */
static int uart_set_attributes(int minor, const struct termios *t)
static int uart_set_attributes(int minor, const struct termios *t)
{
return 0;
}
@@ -221,7 +221,7 @@ static int uart_set_attributes(int minor, const struct termios *t)
* functions use them instead.
*/
/***********************************************************************/
/*
/*
* Read from UART. This is used in the exit code, and can't
* rely on interrupts.
*/
@@ -232,7 +232,7 @@ int uart_poll_read(int minor)
/*
* Write a character to the console. This is used by printk() and
* Write a character to the console. This is used by printk() and
* maybe other low level functions. It should not use interrupts or any
* RTEMS system calls. It needs to be very simple
*/
c/src/lib/libbsp/arm/gp32/include/bsp.h
+2 -2
View File
@@ -1,5 +1,5 @@
/*-------------------------------------------------------------------------+
| bsp.h - ARM BSP
| bsp.h - ARM BSP
+--------------------------------------------------------------------------+
| This include file contains definitions related to the ARM BSP.
+--------------------------------------------------------------------------+
@@ -10,7 +10,7 @@
| The license and distribution terms for this file may be
| found in found in the file LICENSE in this distribution or at
| http://www.rtems.com/license/LICENSE.
|
|
| $Id$
+--------------------------------------------------------------------------*/
c/src/lib/libbsp/arm/gp32/smc/smc.c
+39 -39
View File
@@ -1,7 +1,7 @@
/* smc.c -- s3c2400 smc disk block device implementation
Squidge's SMC Low-level access routines.
Inspired and derived from routines provided by Samsung Electronics M/M R&D Center & FireFly.
Squidge's SMC Low-level access routines.
Inspired and derived from routines provided by Samsung Electronics M/M R&D Center & FireFly.
*/
@@ -96,7 +96,7 @@ static void sm_write( uint8_t data)
static uint8_t sm_read(void)
{
uint8_t data;
rPDDAT &= (~0x100);
data = rPBDAT & 0xFF;
rPDDAT |= 0x100;
@@ -135,7 +135,7 @@ static uint8_t sm_status()
void smc_read_id( uint8_t* buf, uint32_t length)
{
uint32_t i;
sm_chip_en();
@@ -163,8 +163,8 @@ void smc_read_id( uint8_t* buf, uint32_t length)
uint8_t smc_read_page (uint32_t lpage, uint8_t* buf)
{
uint32_t block, page, i;
/* convert logical block to physical block
/* convert logical block to physical block
and then convert into page suitable for read1 command...
*/
block = lpage >> 5;
@@ -174,9 +174,9 @@ uint8_t smc_read_page (uint32_t lpage, uint8_t* buf)
}
else
return 0;
sm_chip_en();
sm_cle_en();
sm_write_en();
sm_write(READ1_CMD);
@@ -191,20 +191,20 @@ uint8_t smc_read_page (uint32_t lpage, uint8_t* buf)
if (smc_info.mb >= 64) sm_write( (uint8_t)(page >> 16));
sm_write_dis();
sm_ale_dis();
sm_busy();
sm_read_en();
for (i = 0; i < 512; i++)
{
{
*buf = sm_read();
buf++;
}
sm_read_dis();
sm_chip_dis();
sm_busy();
return 1;
return 1;
}
void smc_read_spare( uint32_t page, uint8_t* buf, uint8_t length)
@@ -257,7 +257,7 @@ void smc_make_l2p(void)
{
/* read physical block - first page */
smc_read_spare( pblock*smc_info.pages_per_block, (uint8_t*)&data, 16);
zone = pblock >> 10; /* divide by 1024 to get zone */
if ((data[5] == 0xFF) && ((data[6]&0xF8) == 0x10))
{
@@ -282,7 +282,7 @@ void smc_make_l2p(void)
{
smc_p2l[pblock] = BLOCK_RESERVED;
cnt3++;
}
}
}
}
}
@@ -327,7 +327,7 @@ void smc_init( void)
{
unsigned char buf[32];
int i;
/* reset smc */
sm_chip_en();
sm_cle_en();
@@ -335,16 +335,16 @@ void smc_init( void)
sm_write(0xFF);
sm_write_dis();
sm_cle_dis();
for(i=0;i<10;i++);
for(i=0;i<10;i++);
sm_busy();
sm_chip_dis();
smc_read_id (buf, 4);
smc_detect (buf[0], buf[1], buf[2]);
printk ("SMC: [%02X-%02X-%02X-%02X]\n", buf[0], buf[1], buf[2], buf[3]);
printk ("SMC size: %dMB detected\n",smc_info.mb);
smc_make_l2p();
}
}
/**********
* Function: sm_ECCEncode (completely ripped, unaltered, from the samsung routines)
@@ -352,7 +352,7 @@ void smc_init( void)
* - adopted from "ECC Algorithm for SmartMedia V3.0"
* by Memory Product & Technology, Samsung Electronics Co. (ecc30.pdf)
**********/
int sm_ECCEncode(const uint8_t * p_buf, uint8_t * p_ecc)
int sm_ECCEncode(const uint8_t * p_buf, uint8_t * p_ecc)
{
uint32_t i, j;
uint8_t paritr[256], tmp = 0, tmp2 = 0;
@@ -368,13 +368,13 @@ int sm_ECCEncode(const uint8_t * p_buf, uint8_t * p_ecc)
uint8_t* paritr_ptr;
paritr_ptr = paritr;
for (i = 0; i < 256; ++i, ++paritr_ptr, ++p_buf)
for (i = 0; i < 256; ++i, ++paritr_ptr, ++p_buf)
{
paritc ^= *p_buf;
tmp = (*p_buf & 0xf0) >> 4;
tmp2 = *p_buf & 0x0f;
switch (tmp)
switch (tmp)
{
case 0:
case 3:
@@ -416,79 +416,79 @@ int sm_ECCEncode(const uint8_t * p_buf, uint8_t * p_ecc)
parit4_1 = parit7c ^ parit6c ^ parit5c ^ parit4c;
paritr_ptr = paritr;
for (i = 0; i < 256; ++i, ++paritr_ptr)
for (i = 0; i < 256; ++i, ++paritr_ptr)
{
sum ^= *paritr_ptr;
}
paritr_ptr = paritr;
for (i = 0; i < 256; i += 2, paritr_ptr += 2)
for (i = 0; i < 256; i += 2, paritr_ptr += 2)
{
parit8_2 ^= *paritr_ptr;
}
paritr_ptr = paritr;
for (i = 0; i < 256; i += 4, paritr_ptr += 4)
for (i = 0; i < 256; i += 4, paritr_ptr += 4)
{
parit16_2 ^= *paritr_ptr;
parit16_2 ^= *(paritr_ptr + 1);
}
paritr_ptr = paritr;
for (i = 0; i < 256; i += 8, paritr_ptr += 8)
for (i = 0; i < 256; i += 8, paritr_ptr += 8)
{
for (j = 0; j <= 3; ++j)
for (j = 0; j <= 3; ++j)
{
parit32_2 ^= *(paritr_ptr + j);
}
}
paritr_ptr = paritr;
for (i = 0; i < 256; i += 16, paritr_ptr += 16)
for (i = 0; i < 256; i += 16, paritr_ptr += 16)
{
for (j = 0; j <= 7; ++j)
for (j = 0; j <= 7; ++j)
{
parit64_2 ^= *(paritr_ptr + j);
}
}
paritr_ptr = paritr;
for (i = 0; i < 256; i += 32, paritr_ptr += 32)
for (i = 0; i < 256; i += 32, paritr_ptr += 32)
{
for (j = 0; j <= 15; ++j)
for (j = 0; j <= 15; ++j)
{
parit128_2 ^= *(paritr_ptr + j);
}
}
paritr_ptr = paritr;
for (i = 0; i < 256; i += 64, paritr_ptr += 64)
for (i = 0; i < 256; i += 64, paritr_ptr += 64)
{
for (j = 0; j <= 31; ++j)
for (j = 0; j <= 31; ++j)
{
parit256_2 ^= *(paritr_ptr + j);
}
}
paritr_ptr = paritr;
for (i = 0; i < 256; i += 128, paritr_ptr += 128)
for (i = 0; i < 256; i += 128, paritr_ptr += 128)
{
for (j = 0; j <= 63; ++j)
for (j = 0; j <= 63; ++j)
{
parit512_2 ^= *(paritr_ptr + j);
}
}
paritr_ptr = paritr;
for (i = 0; i < 256; i += 256, paritr_ptr += 256)
for (i = 0; i < 256; i += 256, paritr_ptr += 256)
{
for (j = 0; j <= 127; ++j)
for (j = 0; j <= 127; ++j)
{
parit1024_2 ^= *(paritr_ptr + j);
}
}
if (sum==0)
if (sum==0)
{
parit1024_1 = parit1024_2;
parit512_1 = parit512_2;
@@ -499,7 +499,7 @@ int sm_ECCEncode(const uint8_t * p_buf, uint8_t * p_ecc)
parit16_1 = parit16_2;
parit8_1 = parit8_2;
}
else
else
{
parit1024_1 = parit1024_2 ? 0 : 1;
parit512_1 = parit512_2 ? 0 : 1;
c/src/lib/libbsp/arm/gp32/start/start.S
+19 -19
View File
@@ -1,7 +1,7 @@
/*
* GP32 startup code
*
*
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
*
@@ -15,7 +15,7 @@
#warning The call is "void boot_card(const char* cmdline);"
#warning You need to pass a NULL.
#warning Please check and remove these warnings.
/* Some standard definitions...*/
.equ PSR_MODE_USR, 0x10
.equ PSR_MODE_FIQ, 0x11
@@ -68,16 +68,16 @@ _start:
_start2:
@---------------------------------------------------------------------------------
/*
/*
* Since I don't plan to return to the bootloader,
* I don't have to save the registers.
*
* I'll just set the CPSR for SVC mode, interrupts
* I'll just set the CPSR for SVC mode, interrupts
* off, and ARM instructions.
*/
mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F)
msr cpsr, r0
/* --- Initialize stack pointer registers */
/* Enter IRQ mode and set up the IRQ stack pointer */
mov r0, #(PSR_MODE_IRQ | PSR_I | PSR_F) /* No interrupts */
@@ -99,7 +99,7 @@ _start2:
ldr r1, =_abt_stack_size
ldr sp, =_abt_stack
add sp, sp, r1
/* Set up the SVC stack pointer last and stay in SVC mode */
mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F) /* No interrupts */
msr cpsr, r0
@@ -107,7 +107,7 @@ _start2:
ldr sp, =_svc_stack
add sp, sp, r1
sub sp, sp, #0x64
/* disable mmu, I and D caches*/
nop
@@ -124,7 +124,7 @@ _start2:
mov r1,#0x00
Loop1:
mov r2,#0x00
Loop2:
Loop2:
mov r3, r2, lsl#26
orr r3, r3, r1, lsl#5
mcr p15, 0, r3, c7, c14, 2
@@ -134,19 +134,19 @@ Loop2:
add r1, r1, #0x01
cmp r1, #8
bne Loop1
/*
/*
* Initialize the MMU. After we return, the MMU is enabled,
* and memory may be remapped. I hope we don't remap this
* memory away.
*/
ldr r0, =mem_map
bl mmu_init
bl mmu_init
/*
/*
* Initialize the exception vectors. This includes the
* exceptions vectors (0x00000000-0x0000001c), and the
* exceptions vectors (0x00000000-0x0000001c), and the
* pointers to the exception handlers (0x00000020-0x0000003c).
*/
mov r0, #0
@@ -155,11 +155,11 @@ Loop2:
stmia r0!, {r2-r9}
ldmia r1!, {r2-r9}
stmia r0!, {r2-r9}
/* Now we are prepared to start the BSP's C code */
bl boot_card
/*
/*
* Theoretically, we could return to what started us up,
* but we'd have to have saved the registers and stacks.
* Instead, we'll just reset.
@@ -169,13 +169,13 @@ Loop2:
/* We shouldn't get here. If we do, hang */
_hang: b _hang
/*
/*
* This is the exception vector table and the pointers to
* the functions that handle the exceptions. It's a total
* of 16 words (64 bytes)
*/
vector_block:
vector_block:
ldr pc, Reset_Handler
ldr pc, Undefined_Handler
ldr pc, SWI_Handler
@@ -187,7 +187,7 @@ vector_block:
Reset_Handler: b bsp_reset
Undefined_Handler: b Undefined_Handler
SWI_Handler: b SWI_Handler
SWI_Handler: b SWI_Handler
Prefetch_Handler: b Prefetch_Handler
Abort_Handler: b Abort_Handler
nop
c/src/lib/libbsp/arm/gp32/startup/bspreset.c
+1 -1
View File
@@ -4,7 +4,7 @@
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
*/
#include <bsp.h>
c/src/lib/libbsp/arm/gp32/startup/bspstart.c
+3 -3
View File
@@ -1,7 +1,7 @@
/*
* This file contains the ARM BSP startup package. It includes application,
* board, and monitor specific initialization and configuration. The generic CPU
* dependent initialization has been performed before this routine is invoked.
* dependent initialization has been performed before this routine is invoked.
*
*
* Copyright (c) 2000 Canon Research Centre France SA.
@@ -12,7 +12,7 @@
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
*/
#include <bsp.h>
#include <rtems/bspIo.h>
@@ -32,7 +32,7 @@ Thread bsp_idle_task(uint32_t ignored)
asm volatile ("MCR p15,0,r0,c7,c0,4 \n");
}
}
/*
* BSP Specific Initialization in C
*/
c/src/lib/libbsp/arm/gumstix/console/uarts.c
+3 -3
View File
@@ -1,11 +1,11 @@
/*
* Console driver for GUMSTIX by Yang Xi <hiyangxi@gmail.com>
*
* This driver uses the shared console driver in
* This driver uses the shared console driver in
* ...../libbsp/shared/console.c
*
* Copyright (c) 2003 by Cogent Computer Systems
* Written by Jay Monkman <jtm@lopingdog.com>
* Written by Jay Monkman <jtm@lopingdog.com>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
@@ -34,7 +34,7 @@ console_data Console_Port_Data[NUM_DEVS];
rtems_device_minor_number Console_Port_Minor = 0;
extern console_fns ffuart_fns;
/*
/*
* There's one item in array for each UART.
*
* Some of these fields are marked "NOT USED". They are not used
c/src/lib/libbsp/arm/gumstix/fb/fb.c
+9 -9
View File
@@ -33,16 +33,16 @@ pthread_mutex_t mutex = PTHREAD_MUTEX_INITIALIZER;
static struct fb_var_screeninfo fb_var =
{
.xres = SCREEN_WIDTH,
.yres = SCREEN_HEIGHT,
.xres = SCREEN_WIDTH,
.yres = SCREEN_HEIGHT,
.bits_per_pixel = BPP
};
static struct fb_fix_screeninfo fb_fix =
{
.smem_start = (volatile char *)LCD_DMA_POINTER,
.smem_len = LCD_BUFFER_SIZE,
.type = FB_TYPE_PACKED_PIXELS,
.smem_start = (volatile char *)LCD_DMA_POINTER,
.smem_len = LCD_BUFFER_SIZE,
.type = FB_TYPE_PACKED_PIXELS,
.visual = FB_VISUAL_TRUECOLOR,
.line_length = SCREEN_WIDTH * (BPP/8)
};
@@ -70,7 +70,7 @@ static void enable_fbskyeye(void)
LCCR3 |= 4<<24;
FDADR0 = LCD_DMA_POINTER - 0x1000;
LCCR0 |= LCCR0_ENB;
}
}
static void disable_fbskyeye(void)
@@ -119,8 +119,8 @@ frame_buffer_open( rtems_device_major_number major,
if (pthread_mutex_trylock(&mutex)== 0){
/* restore previous state. for VGA this means return to text mode.
* leave out if graphics hardware has been initialized in
* frame_buffer_initialize()
*/
* frame_buffer_initialize()
*/
printk( "FBSKYEYE open called.\n" );
enable_fbskyeye();
return RTEMS_SUCCESSFUL;
@@ -166,7 +166,7 @@ frame_buffer_write( rtems_device_major_number major,
rtems_libio_rw_args_t *rw_args = (rtems_libio_rw_args_t *)arg;
rw_args->bytes_moved = ((rw_args->offset + rw_args->count) > fb_fix.smem_len ) ? (fb_fix.smem_len - rw_args->offset) : rw_args->count;
memcpy( (void *) (fb_fix.smem_start + rw_args->offset), rw_args->buffer, rw_args->bytes_moved);
return RTEMS_SUCCESSFUL;
return RTEMS_SUCCESSFUL;
}
static int get_palette( struct fb_cmap *cmap )
c/src/lib/libbsp/arm/gumstix/rtl8019/rtl8019.c
+9 -9
View File
@@ -239,8 +239,8 @@ ne_read_data (struct ne_softc *sc, int addr, int len, unsigned char *p)
{
unsigned char d;
while (len > 0)
{
inport_byte(dport, d);
{
inport_byte(dport, d);
*p++ = d;
len--;
}
@@ -309,7 +309,7 @@ ne_check_status (struct ne_softc *sc, int from_irq_handler)
if (from_irq_handler)
outport_byte(port + IMR, NE_INTERRUPTS);
return;
}
}
/* Check for transmitted packet. The transmit daemon may now be
able to send another packet to the device. */
@@ -346,7 +346,7 @@ ne_check_status (struct ne_softc *sc, int from_irq_handler)
}
outport_byte (port + CMDR, MSK_PG0 | MSK_STA | MSK_RD2);
}
/* Handle an NE2000 interrupt. */
@@ -399,7 +399,7 @@ ne_interrupt_off (const rtems_irq_connect_data *irq)
outport_byte (sc->port + IMR, 0);
}
/*
/*
*Return whether NE2000 interrupts are on.
*If it is eanbled, return 1
*/
@@ -581,7 +581,7 @@ ne_rx_daemon (void *arg)
reset = 0;
/* Read the buffer header */
startaddr = startpage * NE_PAGE_SIZE;
startaddr = startpage * NE_PAGE_SIZE;
ne_read_data(sc, startaddr, sizeof(hdr), (unsigned char *)&hdr);
next = hdr.next;
@@ -657,7 +657,7 @@ ne_rx_daemon (void *arg)
m->m_pkthdr.rcvif = ifp;
m->m_nextpkt = 0;
p = mtod (m, unsigned char *);
p = mtod (m, unsigned char *);
m->m_len = m->m_pkthdr.len = len - (sizeof(struct ether_header) + 2);
toend = NE_STOP_PAGE * NE_PAGE_SIZE - startaddr;
@@ -671,7 +671,7 @@ ne_rx_daemon (void *arg)
if (len > 0)
ne_read_data (sc, startaddr, len, p);
m->m_data +=2;
eh = mtod(m, struct ether_header *);
m->m_data += sizeof (struct ether_header);
@@ -1185,7 +1185,7 @@ rtems_ne_driver_attach (struct rtems_bsdnet_ifconfig *config, int attach)
/* We use 16 as the default IRQ. */
sc->irno = XSCALE_IRQ_NETWORK;
/*IO prts are mapped to 0X40000600 */
c/src/lib/libbsp/arm/gumstix/start/start.S
+15 -15
View File
@@ -9,7 +9,7 @@
* $Id$
*/
/* Some standard definitions...*/
.equ PSR_MODE_USR, 0x10
.equ PSR_MODE_FIQ, 0x11
@@ -26,11 +26,11 @@
.text
.globl _start
_start:
/*
/*
* Since I don't plan to return to the bootloader,
* I don't have to save the registers.
*
* I'll just set the CPSR for SVC mode, interrupts
* I'll just set the CPSR for SVC mode, interrupts
* off, and ARM instructions.
*/
mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F)
@@ -41,11 +41,11 @@ _start:
ldr r1, =_bss_end_
ldr r0, =_bss_start_
_bss_init:
_bss_init:
mov r2, #0
cmp r0, r1
strlot r2, [r0], #4
blo _bss_init /* loop while r0 < r1 */
blo _bss_init /* loop while r0 < r1 */
/* --- Initialize stack pointer registers */
/* Enter IRQ mode and set up the IRQ stack pointer */
@@ -68,16 +68,16 @@ _bss_init:
ldr r1, =_abt_stack_size
ldr sp, =_abt_stack
add sp, sp, r1
/* Set up the SVC stack pointer last and stay in SVC mode */
mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F) /* No interrupts */
msr cpsr, r0
ldr r1, =_svc_stack_size
ldr sp, =_svc_stack
add sp, sp, r1
sub sp, sp, #0x64
sub sp, sp, #0x64
/*
/*
* Initialize the MMU. After we return, the MMU is enabled,
* and memory may be remapped. I hope we don't remap this
* memory away.
@@ -88,9 +88,9 @@ _bss_init:
/*
/*
* Initialize the exception vectors. This includes the
* exceptions vectors (0x00000000-0x0000001c), and the
* exceptions vectors (0x00000000-0x0000001c), and the
* pointers to the exception handlers (0x00000020-0x0000003c).
*/
mov r0, #0
@@ -105,7 +105,7 @@ _bss_init:
/* Now we are prepared to start the BSP's C code */
bl boot_card
/*
/*
* Theoretically, we could return to what started us up,
* but we'd have to have saved the registers and stacks.
* Instead, we'll just reset.
@@ -115,13 +115,13 @@ _bss_init:
/* We shouldn't get here. If we do, hang */
_hang: b _hang
/*
/*
* This is the exception vector table and the pointers to
* the functions that handle the exceptions. It's a total
* of 16 words (64 bytes)
*/
vector_block:
vector_block:
ldr pc, Reset_Handler
ldr pc, Undefined_Handler
ldr pc, SWI_Handler
@@ -133,7 +133,7 @@ vector_block:
Reset_Handler: b bsp_reset
Undefined_Handler: b Undefined_Handler
SWI_Handler: b SWI_Handler
SWI_Handler: b SWI_Handler
Prefetch_Handler: b Prefetch_Handler
Abort_Handler: b Abort_Handler
nop
c/src/lib/libbsp/arm/gumstix/startup/memmap.c
+1 -1
View File
@@ -14,6 +14,6 @@ mmu_sect_map_t mem_map[] = {
/* <phys addr> <virt addr> <size> <flags> */
{0x40000000, 0x40000000, 1216, MMU_CACHE_NONE}, /*Map I/O*/
{0xA0000000, 0x00000000, 1, MMU_CACHE_NONE}, /*sram*/
{0xA0000000, 0xA0000000, 64, MMU_CACHE_WBACK}, /* SDRAM */
{0xA0000000, 0xA0000000, 64, MMU_CACHE_WBACK}, /* SDRAM */
{0x00000000, 0x00000000, 0, 0} /* The end */
};
c/src/lib/libbsp/arm/lpc24xx/clock/clock-config.c
+3 -3
View File
@@ -107,16 +107,16 @@ static uint32_t lpc24xx_clock_nanoseconds_since_last_tick( void)
uint64_t clock = LPC24XX_CCLK;
uint32_t clicks = T0TC;
uint64_t ns = ((uint64_t) clicks * 1000000000) / clock;
return (uint32_t) ns;
}
#define Clock_driver_support_initialize_hardware() lpc24xx_clock_initialize()
#define Clock_driver_support_install_isr( isr, old_isr) lpc24xx_clock_handler_install()
#define Clock_driver_support_shutdown_hardware() lpc24xx_clock_cleanup()
#define Clock_driver_nanoseconds_since_last_tick lpc24xx_clock_nanoseconds_since_last_tick
/* Include shared source clock driver code */
c/src/lib/libbsp/arm/lpc24xx/console/console-config.c
+1 -1
View File
@@ -36,7 +36,7 @@ static void lpc24xx_uart_set_register( uint32_t addr, uint8_t i, uint8_t val)
{
volatile uint32_t *reg = (volatile uint32_t *) addr;
reg [i] = val;
reg [i] = val;
}
rtems_device_minor_number Console_Port_Minor = 0;
c/src/lib/libbsp/arm/lpc24xx/include/bsp.h
+1 -1
View File
@@ -77,7 +77,7 @@ int lpc24xx_eth_attach_detach(
*
* @code
* #include <bsp.h>
*
*
* #define CONFIGURE_INIT
*
* #define CONFIGURE_IDLE_TASK_BODY lpc24xx_idle
c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h
+209 -209
View File
File diff suppressed because it is too large Load Diff
c/src/lib/libbsp/arm/lpc24xx/misc/dma.c
+3 -3
View File
@@ -82,17 +82,17 @@ void lpc24xx_dma_channel_disable(unsigned channel, bool force)
if (channel < GPDMA_CH_NUMBER) {
volatile lpc24xx_dma_channel *ch = GPDMA_CH_BASE_ADDR(channel);
uint32_t cfg = ch->cfg;
if (!force) {
/* Halt */
ch->cfg = SET_FLAG(cfg, GPDMA_CH_CFG_HALT);
/* Wait for inactive */
do {
cfg = ch->cfg;
} while (IS_FLAG_SET(cfg, GPDMA_CH_CFG_ACTIVE));
}
/* Disable */
ch->cfg = CLEAR_FLAG(cfg, GPDMA_CH_CFG_EN);
}
c/src/lib/libbsp/arm/lpc24xx/misc/io.c
+1 -1
View File
@@ -223,7 +223,7 @@ rtems_status_code lpc24xx_gpio_config(
/* Resistor */
LPC24XX_PINMODE [select] =
(LPC24XX_PINMODE [select] & ~(LPC24XX_IO_SELECT_MASK << shift))
| ((resistor & LPC24XX_IO_SELECT_MASK) << shift);
| ((resistor & LPC24XX_IO_SELECT_MASK) << shift);
rtems_interrupt_flash(level);
c/src/lib/libbsp/arm/lpc24xx/network/network.c
+7 -7
View File
@@ -398,7 +398,7 @@ static void lpc24xx_eth_receive_task(void *arg)
volatile lpc24xx_eth_transfer_descriptor *const desc =
(volatile lpc24xx_eth_transfer_descriptor *)
LPC24XX_ETH_RECEIVE_DESC_START;
volatile lpc24xx_eth_receive_info *const info =
volatile lpc24xx_eth_receive_info *const info =
(volatile lpc24xx_eth_receive_info *)
LPC24XX_ETH_RECEIVE_INFO_START;
struct mbuf **const mbuf_table =
@@ -416,7 +416,7 @@ static void lpc24xx_eth_receive_task(void *arg)
/* Wait for events */
sc = rtems_bsdnet_event_receive(
LPC24XX_ETH_EVENT_INITIALIZE | LPC24XX_ETH_EVENT_INTERRUPT,
LPC24XX_ETH_EVENT_INITIALIZE | LPC24XX_ETH_EVENT_INTERRUPT,
RTEMS_EVENT_ANY | RTEMS_WAIT,
RTEMS_NO_TIMEOUT,
&events
@@ -695,7 +695,7 @@ static void lpc24xx_eth_transmit_task(void *arg)
/* Wait for events */
sc = rtems_bsdnet_event_receive(
LPC24XX_ETH_EVENT_INITIALIZE
| LPC24XX_ETH_EVENT_START
| LPC24XX_ETH_EVENT_START
| LPC24XX_ETH_EVENT_INTERRUPT,
RTEMS_EVENT_ANY | RTEMS_WAIT,
RTEMS_NO_TIMEOUT,
@@ -950,8 +950,8 @@ static void lpc24xx_eth_interface_init(void *arg)
/* Start receive task */
if (e->receive_task == RTEMS_ID_NONE) {
e->receive_task = rtems_bsdnet_newproc(
"ntrx",
4096,
"ntrx",
4096,
lpc24xx_eth_receive_task,
e
);
@@ -962,8 +962,8 @@ static void lpc24xx_eth_interface_init(void *arg)
/* Start transmit task */
if (e->transmit_task == RTEMS_ID_NONE) {
e->transmit_task = rtems_bsdnet_newproc(
"nttx",
4096,
"nttx",
4096,
lpc24xx_eth_transmit_task,
e
);
c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c
+28 -28
View File
@@ -145,89 +145,89 @@ static void __attribute__((section(".bsp_start"))) lpc24xx_init_emc_1(void)
*/
/* Global dynamic settings */
/* FIXME */
EMC_DYN_APR = 2;
/* Data-in to active command period tWR + tRP */
EMC_DYN_DAL = 4;
/* Load mode register to active or refresh command period 2 tCK */
EMC_DYN_MRD = 1;
/* Active to precharge command period 44 ns */
EMC_DYN_RAS = 3;
/* Active to active command period 66 ns */
EMC_DYN_RC = 4;
/* Use command delayed strategy */
EMC_DYN_RD_CFG = 1;
/* Auto refresh period 66 ns */
EMC_DYN_RFC = 4;
/* Precharge command period 20 ns */
EMC_DYN_RP = 1;
/* Active bank a to active bank b command period 15 ns */
EMC_DYN_RRD = 1;
/* FIXME */
EMC_DYN_SREX = 5;
/* Write recovery time 15 ns */
EMC_DYN_WR = 1;
/* Exit self refresh to active command period 75 ns */
EMC_DYN_XSR = 5;
/* Dynamic Memory 0: Micron M T48LC 4M16 A2 P 75 IT */
/*
* Use SDRAM, 0 0 001 01 address mapping, disabled buffer, unprotected writes
*/
EMC_DYN_CFG0 = 0x0280;
/* CAS and RAS latency */
EMC_DYN_RASCAS0 = 0x0202;
/* Wait 50 micro seconds */
lpc24xx_cpu_delay(3600);
/* Send command: NOP */
EMC_DYN_CTRL = EMC_DYN_CTRL_CE | EMC_DYN_CTRL_CS | EMC_DYN_CTRL_CMD_NOP;
/* Wait 50 micro seconds */
lpc24xx_cpu_delay(3600);
/* Send command: PRECHARGE ALL */
EMC_DYN_CTRL = EMC_DYN_CTRL_CE | EMC_DYN_CTRL_CS | EMC_DYN_CTRL_CMD_PALL;
/* Shortest possible refresh period */
EMC_DYN_RFSH = 0x01;
/* Wait at least 128 AHB clock cycles */
lpc24xx_cpu_delay(128);
/* Wait 1 micro second */
lpc24xx_cpu_delay(72);
/* Set refresh period */
EMC_DYN_RFSH = 0x46;
/* Send command: MODE */
EMC_DYN_CTRL = EMC_DYN_CTRL_CE | EMC_DYN_CTRL_CS | EMC_DYN_CTRL_CMD_MODE;
/* Set mode register in SDRAM */
*((volatile uint32_t *) (0xa0000000 | (0x23 << (1 + 2 + 8))));
/* Send command: NORMAL */
EMC_DYN_CTRL = 0;
/* Enable buffer */
EMC_DYN_CFG0 |= 0x00080000;
/* Test RAM */
lpc24xx_ram_test_32();
}
c/src/lib/libbsp/arm/nds/dswifi/arm7/source/wifi_arm7.c
+12 -12
View File
@@ -1,7 +1,7 @@
// DS Wifi interface code
// Copyright (C) 2005-2006 Stephen Stair - sgstair@akkit.org - http://www.akkit.org
// wifi_arm7.c - arm7 wifi interface code
/******************************************************************************
/******************************************************************************
DSWifi Lib and test materials are licenced under the MIT open source licence:
Copyright (c) 2005-2006 Stephen Stair
@@ -67,7 +67,7 @@ void InitFlashData() {
int ReadFlashByte(int address) {
if(address<0 || address>511) return 0;
return FlashData[address];
return FlashData[address];
}
int ReadFlashBytes(int address, int numbytes) {
@@ -546,7 +546,7 @@ void Wifi_Intr_RxEnd() {
WifiData->stats[WSTAT_RXBYTES]+=full_packetlen;
WifiData->stats[WSTAT_RXDATABYTES]+=full_packetlen-12;
// process packet here
temp=Wifi_ProcessReceivedFrame(base,full_packetlen); // returns packet type
if(temp&WifiData->reqPacketFlags || WifiData->reqReqFlags&WFLAG_REQ_PROMISC) { // if packet type is requested, forward it to the rx queue
@@ -635,7 +635,7 @@ void Wifi_Interrupt() {
if(wIF& 0x0020) { W_IF=0x0020; Wifi_Intr_CntOverflow(); } // 5) AckCount Overflow
if(wIF& 0x0040) { W_IF=0x0040; Wifi_Intr_DoNothing(); } // 6) Start Rx
if(wIF& 0x0080) { W_IF=0x0080; Wifi_Intr_StartTx(); } // 7) Start Tx
if(wIF& 0x0100) { W_IF=0x0100; Wifi_Intr_DoNothing(); } // 8)
if(wIF& 0x0100) { W_IF=0x0100; Wifi_Intr_DoNothing(); } // 8)
if(wIF& 0x0200) { W_IF=0x0200; Wifi_Intr_DoNothing(); } // 9)
if(wIF& 0x0400) { W_IF=0x0400; Wifi_Intr_DoNothing(); } //10)
if(wIF& 0x0800) { W_IF=0x0800; Wifi_Intr_DoNothing(); } //11) RF Wakeup
@@ -1055,9 +1055,9 @@ void Wifi_SetChannel(int channel) {
Wifi_RFWrite( (ReadFlashByte(n)<<8) | ReadFlashByte(n+channel+1) | 0x050000 );
n+=15;
}
swiDelay( 12583 ); // 1500 us delay
break;
default:
break;
@@ -1232,7 +1232,7 @@ int Wifi_SendAssocPacket() { // uses arm7 data in our struct
} else {
((u16 *)(data+i))[0]=0x0021; // CAPS info
}
((u16 *)(data+i))[1]=WIFI_REG(0x8E); // Listen interval
i+=4;
data[i++]=0; // SSID element
@@ -1247,7 +1247,7 @@ int Wifi_SendAssocPacket() { // uses arm7 data in our struct
for(j=2;j<16;j++) WifiData->baserates7[j]=WifiData->baserates7[j-1];
}
WifiData->baserates7[1]=0x04;
WifiData->baserates7[15]=0;
for(j=0;j<16;j++) if(WifiData->baserates7[j]==0) break;
numrates=j;
@@ -1500,9 +1500,9 @@ int Wifi_ProcessReceivedFrame(int macbase, int framelen) {
if(WifiData->authlevel==WIFI_AUTHLEVEL_AUTHENTICATED || WifiData->authlevel==WIFI_AUTHLEVEL_DEASSOCIATED) {
WifiData->authlevel=WIFI_AUTHLEVEL_ASSOCIATED;
WifiData->authctr=0;
}
} else { // status code = failure!
WifiData->curMode=WIFIMODE_CANNOTASSOCIATE;
@@ -1513,7 +1513,7 @@ int Wifi_ProcessReceivedFrame(int macbase, int framelen) {
return WFLAG_PACKET_MGT;
case 0x00: // 0000 00 Assoc Request
case 0x00: // 0000 00 Assoc Request
case 0x08: // 0010 00 Reassoc Request
case 0x10: // 0100 00 Probe Request
case 0x24: // 1001 00 ATIM
@@ -1547,7 +1547,7 @@ int Wifi_ProcessReceivedFrame(int macbase, int framelen) {
if(((u16 *)(data+24))[2]==0) { // status code: successful
// scrape challenge text and send challenge reply
if(data[24+6]==0x10) { // 16 = challenge text - this value must be 0x10 or else!
Wifi_SendSharedKeyAuthPacket2(data[24+7],data+24+8);
Wifi_SendSharedKeyAuthPacket2(data[24+7],data+24+8);
}
} else { // rejected, just give up.
WifiData->curMode=WIFIMODE_CANNOTASSOCIATE;
c/src/lib/libbsp/arm/nds/dswifi/arm7/source/wifi_arm7.h
+1 -1
View File
@@ -1,7 +1,7 @@
// DS Wifi interface code
// Copyright (C) 2005-2006 Stephen Stair - sgstair@akkit.org - http://www.akkit.org
// wifi_arm7.h - arm7 wifi interface header
/******************************************************************************
/******************************************************************************
DSWifi Lib and test materials are licenced under the MIT open source licence:
Copyright (c) 2005-2006 Stephen Stair
c/src/lib/libbsp/arm/nds/dswifi/arm9/source/sgIP.c
+1 -1
View File
@@ -1,6 +1,6 @@
// DSWifi Project - sgIP Internet Protocol Stack Implementation
// Copyright (C) 2005-2006 Stephen Stair - sgstair@akkit.org - http://www.akkit.org
/******************************************************************************
/******************************************************************************
DSWifi Lib and test materials are licenced under the MIT open source licence:
Copyright (c) 2005-2006 Stephen Stair
c/src/lib/libbsp/arm/nds/dswifi/arm9/source/sgIP.h
+1 -1
View File
@@ -1,6 +1,6 @@
// DSWifi Project - sgIP Internet Protocol Stack Implementation
// Copyright (C) 2005-2006 Stephen Stair - sgstair@akkit.org - http://www.akkit.org
/******************************************************************************
/******************************************************************************
DSWifi Lib and test materials are licenced under the MIT open source licence:
Copyright (c) 2005-2006 Stephen Stair
c/src/lib/libbsp/arm/nds/dswifi/arm9/source/sgIP_ARP.c
+3 -3
View File
@@ -1,6 +1,6 @@
// DSWifi Project - sgIP Internet Protocol Stack Implementation
// Copyright (C) 2005-2006 Stephen Stair - sgstair@akkit.org - http://www.akkit.org
/******************************************************************************
/******************************************************************************
DSWifi Lib and test materials are licenced under the MIT open source licence:
Copyright (c) 2005-2006 Stephen Stair
@@ -65,7 +65,7 @@ int sgIP_is_broadcast_address(sgIP_Hub_HWInterface * hw, unsigned long ipaddr) {
}
// this function will protect against malformed packets that could cause internal problems.
int sgIP_ARP_Check_isok(sgIP_Hub_HWInterface * hw, sgIP_memblock * mb, sgIP_Header_ARP * arp) {
int sgIP_ARP_Check_isok(sgIP_Hub_HWInterface * hw, sgIP_memblock * mb, sgIP_Header_ARP * arp) {
return 1; // doesn't do anything yet ;)
}
@@ -184,7 +184,7 @@ int sgIP_ARP_SendProtocolFrame(sgIP_Hub_HWInterface * hw, sgIP_memblock * mb, un
if(ArpRecords[i].queued_packet) { // if there is already a queued packet, reject the new one.
sgIP_memblock_free(mb);
return 0; // couldn't send.
} else {
} else {
sgIP_memblock_exposeheader(mb,-14); // re-hide ethernet header.
ArpRecords[i].queued_packet=mb; // queue packet.
ArpRecords[i].linked_protocol=protocol; // queue packet.
c/src/lib/libbsp/arm/nds/dswifi/arm9/source/sgIP_ARP.h
+3 -3
View File
@@ -1,6 +1,6 @@
// DSWifi Project - sgIP Internet Protocol Stack Implementation
// Copyright (C) 2005-2006 Stephen Stair - sgstair@akkit.org - http://www.akkit.org
/******************************************************************************
/******************************************************************************
DSWifi Lib and test materials are licenced under the MIT open source licence:
Copyright (c) 2005-2006 Stephen Stair
@@ -65,11 +65,11 @@ extern "C" {
extern int sgIP_ARP_ProcessIPFrame(sgIP_Hub_HWInterface * hw, sgIP_memblock * mb);
extern int sgIP_ARP_ProcessARPFrame(sgIP_Hub_HWInterface * hw, sgIP_memblock * mb);
extern int sgIP_ARP_SendProtocolFrame(sgIP_Hub_HWInterface * hw, sgIP_memblock * mb, unsigned short protocol, unsigned long destaddr);
extern int sgIP_ARP_SendARPResponse(sgIP_Hub_HWInterface * hw, sgIP_memblock * mb);
extern int sgIP_ARP_SendGratARP(sgIP_Hub_HWInterface * hw);
extern int sgIP_ARP_SendARPRequest(sgIP_Hub_HWInterface * hw, int protocol, unsigned long protocol_addr);
#ifdef __cplusplus
c/src/lib/libbsp/arm/nds/dswifi/arm9/source/sgIP_Config.h
+8 -8
View File
@@ -1,6 +1,6 @@
// DSWifi Project - sgIP Internet Protocol Stack Implementation
// Copyright (C) 2005-2006 Stephen Stair - sgstair@akkit.org - http://www.akkit.org
/******************************************************************************
/******************************************************************************
DSWifi Lib and test materials are licenced under the MIT open source licence:
Copyright (c) 2005-2006 Stephen Stair
@@ -33,14 +33,14 @@ SOFTWARE.
// General options - these control the core functionality of the stack.
// SGIP_USEDYNAMICMEMORY: Allows the stack to use memory as it needs it, via malloc()/free()
// This option is extremely useful in environments where it can be used, as it prevents the
// This option is extremely useful in environments where it can be used, as it prevents the
// overhead of allocating per-connection memory in advance, and allows an unlimited number
// of connections, provided the memory space. This option requires the implementation of
// two C functions, "void * sgIP_malloc(int)" and "void sgIP_free(void *)", which behave
// two C functions, "void * sgIP_malloc(int)" and "void sgIP_free(void *)", which behave
// similarly to the malloc and free functions commonly used in C.
#define SGIP_USEDYNAMICMEMORY
// SGIP_INTERRUPT_THREADING_MODEL: Provides memory protection in a system that can allow
// SGIP_INTERRUPT_THREADING_MODEL: Provides memory protection in a system that can allow
// multiple processing "threads" by way of interrupts. This is not required on single
// threaded systems, and not adequate on multithreaded systems, but provides a way to
// allow protection against contention on interrupt-driven systems. This option requires
@@ -52,7 +52,7 @@ SOFTWARE.
// SGIP_MULTITHREADED_THREADING_MODEL: Standard memory protection for large multithreaded
// systems, such as operating systems and the like. This kind of memory protection is
// useful for true multithreaded systems but useless in a single-threaded system and
// useful for true multithreaded systems but useless in a single-threaded system and
// harmful in an interrupt-based multiprocess system.
//#define SGIP_MULTITHREADED_THREADING_MODEL
@@ -66,7 +66,7 @@ SOFTWARE.
// received, however, in a memory-tight situation, much smaller values can be used.
#define SGIP_MEMBLOCK_DATASIZE 1600
// SGIP_MEMBLOCK_BASENUM: The starting number of memblocks that will be allocated. This is
// SGIP_MEMBLOCK_BASENUM: The starting number of memblocks that will be allocated. This is
// also the total number of memblocks that will be allocated if sgIP is not configured to use
// dynamic memory allocation.
#define SGIP_MEMBLOCK_BASENUM 12
@@ -127,7 +127,7 @@ SOFTWARE.
// (at least on most smaller systems)
#define SGIP_ARP_MAXENTRIES 32
// SGIP_HUB_MAXHWINTERFACES: The maximum number of hardware interfaces the sgIP hub will
// SGIP_HUB_MAXHWINTERFACES: The maximum number of hardware interfaces the sgIP hub will
// connect to. A hardware interface being some port (ethernet, wifi, etc) that will relay
// packets to the outside world.
#define SGIP_HUB_MAXHWINTERFACES 1
@@ -198,7 +198,7 @@ SOFTWARE.
#define SGIP_DEBUG_MESSAGE(param) sgIP_dbgprint param
#define SGIP_DEBUG_ERROR(param) sgIP_dbgprint param; while(1);
#else
#define SGIP_DEBUG_MESSAGE(param)
#define SGIP_DEBUG_MESSAGE(param)
#define SGIP_DEBUG_ERROR(param)
#endif
c/src/lib/libbsp/arm/nds/dswifi/arm9/source/sgIP_DHCP.c
+12 -12
View File
@@ -1,6 +1,6 @@
// DSWifi Project - sgIP Internet Protocol Stack Implementation
// Copyright (C) 2005-2006 Stephen Stair - sgstair@akkit.org - http://www.akkit.org
/******************************************************************************
/******************************************************************************
DSWifi Lib and test materials are licenced under the MIT open source licence:
Copyright (c) 2005-2006 Stephen Stair
@@ -82,7 +82,7 @@ void sgIP_DHCP_BeginDgram(int dgramtype) {
// ensure packet is zero'd.. seems to pacify some routers. malloc doesn't initialise the memory returned.
memset(dhcp_p,0,sizeof(sgIP_DHCP_Packet));
dhcp_p->op=1; // 1==BOOTREQUEST
dhcp_p->htype=1; // 1== ethernet address type
dhcp_p->hlen=6; // hardware address length
@@ -96,7 +96,7 @@ void sgIP_DHCP_BeginDgram(int dgramtype) {
dhcp_p->giaddr=0;
memcpy(dhcp_p->chaddr,dhcp_int->hwaddr,6);
dhcp_optionptr=0;
dhcp_p->options[dhcp_optionptr++]=0x63;
dhcp_p->options[dhcp_optionptr++]=0x82;
@@ -143,7 +143,7 @@ void sgIP_DHCP_BeginDgram(int dgramtype) {
dhcp_p->options[dhcp_optionptr++]=0x3C; // DHCP Vendor Class ID
dhcp_p->options[dhcp_optionptr++]=strlen(SGIP_DHCP_CLASSNAME);
for(i=0;i<strlen(SGIP_DHCP_CLASSNAME);i++) {
dhcp_p->options[dhcp_optionptr++]=(SGIP_DHCP_CLASSNAME)[i];
dhcp_p->options[dhcp_optionptr++]=(SGIP_DHCP_CLASSNAME)[i];
}
// reason we don't send it immediately is in case the calling code wants to modify some data or add some options.
@@ -177,7 +177,7 @@ void sgIP_DHCP_Start(sgIP_Hub_HWInterface * interface, int getDNS) { // begin dh
bind(dhcp_socket,(struct sockaddr *)&sain,sizeof(sain));
i=1;
ioctl(dhcp_socket,FIONBIO,&i);
sgIP_DHCP_BeginDgram(DHCP_TYPE_DISCOVER);
sgIP_DHCP_SendDgram();
}
@@ -337,9 +337,9 @@ int gethostname(char *name, size_t len)
if (name == NULL)
return SGIP_ERROR(EFAULT);
if ( len <= size )
if ( len <= size )
return SGIP_ERROR(EINVAL);
strncpy(name, dhcp_hostname, size);
name[size]=0;
return 0;
@@ -352,12 +352,12 @@ int sethostname(const char *name, size_t len)
int size = sizeof(dhcp_hostname);
if (name == NULL)
return SGIP_ERROR(EFAULT);
if ( len > size - 1)
if ( len > size - 1)
return SGIP_ERROR(EINVAL);
rec = sgIP_DNS_FindDNSRecord(dhcp_hostname);
rec = sgIP_DNS_FindDNSRecord(dhcp_hostname);
strncpy(dhcp_hostname, name, len);
dhcp_hostname[len]=0;
strncpy(rec->aliases[0], name, len);
c/src/lib/libbsp/arm/nds/dswifi/arm9/source/sgIP_DHCP.h
+1 -1
View File
@@ -1,6 +1,6 @@
// DSWifi Project - sgIP Internet Protocol Stack Implementation
// Copyright (C) 2005-2006 Stephen Stair - sgstair@akkit.org - http://www.akkit.org
/******************************************************************************
/******************************************************************************
DSWifi Lib and test materials are licenced under the MIT open source licence:
Copyright (c) 2005-2006 Stephen Stair

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