Update for exception support changes.

This commit is contained in:
Thomas Doerfler
2009-10-23 07:32:46 +00:00
parent cc1e864dfe
commit 2d2de4eba1
103 changed files with 1609 additions and 1588 deletions
+6
View File
@@ -1,3 +1,9 @@
2009-10-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* shared/clock/clock.c, shared/irq/irq_init.c,
shared/irq/openpic_i8259_irq.c: Changed exception header file
includes.
2009-10-20 Till Straumann <strauman@slac.stanford.edu>
* shared/startup/pgtbl_setup.c: Fixed compiler warnings
+7
View File
@@ -1,3 +1,10 @@
2009-10-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* Makefile.am, preinstall.am: Update for exception support changes.
* irq/irq_init.c, irq/openpic_xxx_irq.c: Changed exception header file
includes.
* startup/bspstart.c: Update for ppc_exc_initialize() changes.
2009-10-21 Ralf Corsépius <ralf.corsepius@rtems.org>
* make/custom/ep1a.cfg: Remove RTEMS_BSP_FAMILY.
+1 -3
View File
@@ -65,8 +65,6 @@ libbsp_a_SOURCES += pci/no_host_bridge.c ../../powerpc/shared/pci/pci.c \
../../powerpc/shared/pci/pcifinddevice.c
include_bsp_HEADERS += ../../powerpc/shared/irq/irq.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h
# irq
libbsp_a_SOURCES += irq/irq_init.c irq/openpic_xxx_irq.c ../../powerpc/shared/irq/i8259.c
@@ -87,11 +85,11 @@ libbsp_a_SOURCES += ../../shared/vmeUniverse/vmeUniverse.c \
../../shared/vmeUniverse/vme_am_defs.h
libbsp_a_LIBADD = \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
+1 -1
View File
@@ -27,7 +27,7 @@
#include <bsp/openpic.h>
#include <bsp/irq.h>
#include <bsp.h>
#include <libcpu/raw_exception.h>
#include <bsp/vectors.h>
#include <bsp/motorola.h>
#include <rtems/bspIo.h>
@@ -18,7 +18,6 @@
#include <bsp/irq_supp.h>
#include <bsp/VMEConfig.h>
#include <bsp/openpic.h>
#include <libcpu/raw_exception.h>
#include <libcpu/io.h>
#include <bsp/vectors.h>
#include <stdlib.h>
@@ -105,14 +105,6 @@ $(PROJECT_INCLUDE)/bsp/irq.h: ../../powerpc/shared/irq/irq.h $(PROJECT_INCLUDE)/
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
$(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h
@@ -277,8 +277,9 @@ void Read_ep1a_config_registers( ppc_cpu_id_t myCpu ) {
void bsp_start( void )
{
uint32_t intrStackStart;
uint32_t intrStackSize;
rtems_status_code sc = RTEMS_SUCCESSFUL;
uintptr_t intrStackStart;
uintptr_t intrStackSize;
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
Triv121PgTbl pt=0; /* R = e; */
@@ -315,17 +316,20 @@ ShowBATS();
/*
* Initialize the interrupt related settings.
*/
intrStackStart = (uint32_t) __rtems_end;
intrStackStart = (uintptr_t) __rtems_end;
intrStackSize = rtems_configuration_get_interrupt_stack_size();
/*
* Initialize default raw exception hanlders.
*/
ppc_exc_initialize(
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
intrStackStart,
intrStackSize
);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot initialize exceptions");
}
/*
* Init MMU block address translation to enable hardware
@@ -1,3 +1,10 @@
2009-10-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* Makefile.am, preinstall.am: Update for exception support changes.
* irq/irq.c: Changed exception header file includes.
* startup/bspstart.c: Changed exception header file includes. Update
for ppc_exc_initialize() changes.
2009-10-22 Ralf Corsépius <ralf.corsepius@rtems.org>
* clock/clock.c: Add missing prototypes.
+1 -4
View File
@@ -68,9 +68,7 @@ libbsp_a_SOURCES += i2c/i2c.c i2c/i2cdrv.c i2c/mpc5200mbus.c i2c/mpc5200mbus.h
# ide
libbsp_a_SOURCES += ide/idecfg.c ide/pcmcia_ide.c ide/pcmcia_ide.h
include_bsp_HEADERS = ../../../libcpu/@RTEMS_CPU@/new-exceptions/bspsupport/vectors.h \
../../../libcpu/@RTEMS_CPU@/new-exceptions/bspsupport/ppc_exc_bspsupp.h \
../../shared/include/irq-generic.h \
include_bsp_HEADERS = ../../shared/include/irq-generic.h \
include/irq-config.h \
include/irq.h \
include/i2cdrv.h \
@@ -134,7 +132,6 @@ libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel
+1 -3
View File
@@ -76,12 +76,10 @@
#include <rtems.h>
#include <libcpu/powerpc-utility.h>
#include <libcpu/raw_exception.h>
#include <bsp/vectors.h>
#include <bsp.h>
#include <bsp/irq.h>
#include <bsp/vectors.h>
#include <bsp/ppc_exc_bspsupp.h>
#include <bsp/irq-generic.h>
#include <bsp/mpc5200.h>
@@ -101,14 +101,6 @@ $(PROJECT_LIB)/linkcmds.pm520: startup/linkcmds.pm520 $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.pm520
PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.pm520
$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/new-exceptions/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/new-exceptions/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h
@@ -94,17 +94,15 @@
/* */
/***********************************************************************/
#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
#include <rtems.h>
#include <libcpu/powerpc-utility.h>
#include <libcpu/raw_exception.h>
#include <bsp.h>
#include <bsp/vectors.h>
#include <bsp/bootcard.h>
#include <bsp/ppc_exc_bspsupp.h>
#include <bsp/irq.h>
#include <bsp/irq-generic.h>
#if defined(HAS_UBOOT)
/* will be overwritten from startup code */
@@ -132,6 +130,7 @@ void _BSP_Fatal_error(unsigned int v)
void bsp_start(void)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
@@ -170,15 +169,19 @@ void bsp_start(void)
/* Initialize exception handler */
ppc_exc_cache_wb_check = 0;
ppc_exc_initialize(
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uint32_t) bsp_interrupt_stack_start,
(uint32_t) bsp_interrupt_stack_size
(uintptr_t) bsp_interrupt_stack_start,
(uintptr_t) bsp_interrupt_stack_size
);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot initialize exceptions");
}
/* Initalize interrupt support */
if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) {
BSP_panic( "Cannot intitialize interrupt support\n");
sc = bsp_interrupt_initialize();
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot intitialize interrupts");
}
/*
@@ -1,3 +1,10 @@
2009-10-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* Makefile.am, preinstall.am: Update for exception support changes.
* irq/irq.c, irq/irq_init.c: Changed exception header file includes.
* startup/bspstart.c: Changed exception header file includes. Update
for ppc_exc_initialize() changes.
2009-10-21 Ralf Corsépius <ralf.corsepius@rtems.org>
* make/custom/gen83xx.inc: Remove RTEMS_BSP_FAMILY.
+6 -5
View File
@@ -66,16 +66,18 @@ libbsp_a_SOURCES += ../shared/clock/clock.c
include_bsp_HEADERS = include/irq.h \
include/irq-config.h \
../../shared/include/irq-generic.h \
../../shared/include/irq-info.h \
include/hwreg_vals.h \
../shared/include/u-boot.h \
../shared/include/tictac.h
# irq
libbsp_a_SOURCES += include/irq.h \
include/irq-config.h \
irq/irq.c \
libbsp_a_SOURCES += irq/irq.c \
../../shared/src/irq-generic.c \
../../shared/src/irq-legacy.c
../../shared/src/irq-legacy.c \
../../shared/src/irq-info.c \
../../shared/src/irq-shell.c \
../../shared/src/irq-server.c
# console
libbsp_a_SOURCES += console/console.c console/ns16550cfg.c
@@ -95,7 +97,6 @@ endif
libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel \
@@ -24,9 +24,7 @@
#define TMTESTS_TM27_H
#include <libcpu/powerpc-utility.h>
#include <libcpu/raw_exception.h>
#include <bsp/ppc_exc_bspsupp.h>
#include <bsp/vectors.h>
#define MUST_WAIT_FOR_INTERRUPT 1
+1 -3
View File
@@ -22,12 +22,10 @@
#include <rtems.h>
#include <libcpu/powerpc-utility.h>
#include <libcpu/raw_exception.h>
#include <bsp/vectors.h>
#include <bsp.h>
#include <bsp/irq.h>
#include <bsp/vectors.h>
#include <bsp/ppc_exc_bspsupp.h>
#include <bsp/irq-generic.h>
#define MPC83XX_IPIC_VECTOR_NUMBER 92
@@ -101,6 +101,10 @@ $(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJE
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h
$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h
$(PROJECT_INCLUDE)/bsp/hwreg_vals.h: include/hwreg_vals.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/hwreg_vals.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/hwreg_vals.h
@@ -21,12 +21,11 @@
*/
#include <libcpu/powerpc-utility.h>
#include <libcpu/raw_exception.h>
#include <bsp.h>
#include <bsp/vectors.h>
#include <bsp/bootcard.h>
#include <bsp/irq-generic.h>
#include <bsp/ppc_exc_bspsupp.h>
#ifdef HAS_UBOOT
@@ -84,13 +83,12 @@ void _BSP_Fatal_error(unsigned n)
void bsp_start( void)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
int rv = 0;
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
uint32_t interrupt_stack_start = (uint32_t) bsp_interrupt_stack_start;
uint32_t interrupt_stack_size = (uint32_t) bsp_interrupt_stack_size;
uintptr_t interrupt_stack_start = (uintptr_t) bsp_interrupt_stack_start;
uintptr_t interrupt_stack_size = (uintptr_t) bsp_interrupt_stack_size;
/*
* Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
@@ -130,22 +128,25 @@ void bsp_start( void)
#endif /* HAS_UBOOT */
/* Initialize exception handler */
ppc_exc_initialize(
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
interrupt_stack_start,
interrupt_stack_size
);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot initialize exceptions");
}
/* Install default handler for the decrementer exception */
rv = ppc_exc_set_handler( ASM_DEC_VECTOR, mpc83xx_decrementer_exception_handler);
if (rv < 0) {
BSP_panic( "Cannot install decrementer exception handler!\n");
sc = ppc_exc_set_handler( ASM_DEC_VECTOR, mpc83xx_decrementer_exception_handler);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot install decrementer exception handler");
}
/* Initalize interrupt support */
sc = bsp_interrupt_initialize();
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic( "Cannot intitialize interrupt support\n");
BSP_panic("cannot intitialize interrupts\n");
}
#ifdef SHOW_MORE_INIT_SETTINGS
@@ -1,3 +1,10 @@
2009-10-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* Makefile.am, preinstall.am: Update for exception support changes.
* irq/irq.c, include/tm27.h: Changed exception header file includes.
* startup/bspstart.c: Changed exception header file includes. Update
for ppc_exc_initialize() changes.
2009-10-21 Ralf Corsépius <ralf.corsepius@rtems.org>
* make/custom/haleakala.cfg: Remove RTEMS_BSP_FAMILY.
@@ -46,17 +46,15 @@ libbsp_a_SOURCES += ../../powerpc/shared/console/uart.c \
../../powerpc/shared/console/console.c
include_bsp_HEADERS += irq/irq.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h
# irq
libbsp_a_SOURCES += irq/irq_init.c irq/irq.c
libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/ppc403/clock.rel \
../../../libcpu/@RTEMS_CPU@/ppc403/timer.rel
+2 -2
View File
@@ -14,7 +14,7 @@
#include <bsp.h>
#include <bsp/irq.h>
#include <bsp/irq_supp.h>
#include <libcpu/raw_exception.h>
#include <bsp/vectors.h>
#include <libcpu/powerpc-utility.h>
@@ -166,7 +166,7 @@ BSP_setup_the_pic(rtems_irq_global_settings* config)
*/
int
C_dispatch_irq_handler( struct _BSP_Exception_frame* frame, unsigned int excNum )
C_dispatch_irq_handler( BSP_Exception_frame* frame, unsigned int excNum )
{
if (excNum == ASM_EXT_VECTOR) {
uint32_t active[kUICWords];
+1 -1
View File
@@ -139,7 +139,7 @@ extern "C" {
#define BSP_UART_COM1_IRQ BSP_UIC_UART0 /* Required by shared/console/uart.c */
#define BSP_UART_COM2_IRQ BSP_UIC_UART1
/* Define processor IRQ numbers; IRQs that are handled by the raw_exception vectors */
/* Define processor IRQ numbers; IRQs that are handled by the exception vectors */
#define BSP_PIT BSP_PROCESSOR_IRQ_LOWEST_OFFSET /* Required by ppc403/clock.c */
#define BSP_FIT BSP_PROCESSOR_IRQ_LOWEST_OFFSET + 1
@@ -13,7 +13,7 @@
#include <libcpu/spr.h>
#include <bsp/irq.h>
#include <bsp.h>
#include <libcpu/raw_exception.h>
#include <bsp/vectors.h>
#include <rtems/bspIo.h>
#include <rtems/powerpc/powerpc.h>
@@ -77,15 +77,7 @@ $(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
$(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h
$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
@@ -64,10 +64,8 @@
#include <bsp.h>
#include <bsp/uart.h>
#include <bsp/irq.h>
#include <rtems/bspIo.h>
#include <libcpu/cpuIdent.h>
#include <rtems/powerpc/powerpc.h>
#include <bsp/ppc_exc_bspsupp.h>
#include <libcpu/powerpc-utility.h>
#include <bsp/vectors.h>
#include <ppc4xx/ppc405gp.h>
#include <ppc4xx/ppc405ex.h>
@@ -171,6 +169,7 @@ BSP_output_char_function_type BSP_output_char = DirectUARTWrite;
*/
void bsp_start( void )
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
LINKER_SYMBOL(intrStack_start);
LINKER_SYMBOL(intrStack_size);
ppc_cpu_id_t myCpu;
@@ -205,10 +204,14 @@ void bsp_start( void )
/*
* Initialize default raw exception handlers.
*/
ppc_exc_initialize(
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uint32_t) intrStack_start,
(uint32_t) intrStack_size);
(uintptr_t) intrStack_start,
(uintptr_t) intrStack_size
);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot initialize exceptions");
}
/*
* Install our own set of exception vectors
@@ -1,3 +1,12 @@
2009-10-23 Sebastian Huber <sebastian.huber@embedded-brains.de>
* include/irq-config.h: New file.
* Makefile.am, preinstall.am: Update for exception support changes.
Use generic interrupt support.
* make/custom/mbx8xx.inc, startup/linkcmds: Enable EABI.
* irq/irq.c, startup/bspstart.c: Converted to generic interrupt
support. Update for exception support changes.
2009-10-23 Ralf Corsépius <ralf.corsepius@rtems.org>
* irq/irq.h: Add BSP_irq_enabled_at_cpm.
+11 -6
View File
@@ -21,7 +21,10 @@ noinst_PROGRAMS =
include_HEADERS += include/coverhd.h
include_bsp_HEADERS = include/mbx.h include/commproc.h include/8xx_immap.h \
irq/irq.h vectors/vectors.h
irq/irq.h \
include/irq-config.h \
../../shared/include/irq-generic.h \
../../shared/include/irq-info.h
EXTRA_DIST = times-mbx821 times-mbx860
@@ -35,12 +38,14 @@ libbsp_a_SOURCES += clock/p_clock.c
# console
libbsp_a_SOURCES += console/console.c
# irq
libbsp_a_SOURCES += irq/irq.c irq/irq_asm.S irq/irq_init.c
libbsp_a_SOURCES += irq/irq.c \
../../shared/src/irq-generic.c \
../../shared/src/irq-legacy.c \
../../shared/src/irq-info.c \
../../shared/src/irq-shell.c \
../../shared/src/irq-server.c
# ide
libbsp_a_SOURCES += ide/idecfg.c ide/pcmcia_ide.c
# vectors
libbsp_a_SOURCES += vectors/vectors.h vectors/vectors_init.c \
vectors/vectors.S
# startup
libbsp_a_SOURCES += ../../shared/bspclean.c ../../shared/bsplibc.c \
../../shared/bsppost.c ../../shared/bsppredriverhook.c \
@@ -61,7 +66,7 @@ libbsp_a_LIBADD = \
../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/mpc8xx/clock.rel \
../../../libcpu/@RTEMS_CPU@/mpc8xx/console-generic.rel \
../../../libcpu/@RTEMS_CPU@/mpc8xx/cpm.rel \
+110 -281
View File
@@ -2,6 +2,8 @@
*
* This file contains the implementation of the function described in irq.h
*
* Copyright (c) 2009 embedded brains GmbH.
*
* Copyright (C) 1998, 1999 valette@crf.canon.fr
*
* The license and distribution terms for this file may be
@@ -14,25 +16,13 @@
#include <rtems/system.h>
#include <bsp.h>
#include <bsp/irq.h>
#include <rtems/score/thread.h>
#include <rtems/score/apiext.h>
#include <libcpu/raw_exception.h>
#include <bsp/irq-generic.h>
#include <bsp/vectors.h>
#include <bsp/8xx_immap.h>
#include <bsp/mbx.h>
#include <bsp/commproc.h>
/*
* default handler connected on each irq after bsp initialization
*/
static rtems_irq_connect_data default_rtems_entry;
/*
* location used to store initial tables used for interrupt
* management.
*/
static rtems_irq_global_settings* internal_config;
static rtems_irq_connect_data* rtems_hdl_tbl;
volatile unsigned int ppc_cached_irq_mask;
/*
* Check if symbolic IRQ name is an SIU IRQ
@@ -40,8 +30,8 @@ static rtems_irq_connect_data* rtems_hdl_tbl;
static inline int is_siu_irq(const rtems_irq_number irqLine)
{
return (((int) irqLine <= BSP_SIU_IRQ_MAX_OFFSET) &
((int) irqLine >= BSP_SIU_IRQ_LOWEST_OFFSET)
);
((int) irqLine >= BSP_SIU_IRQ_LOWEST_OFFSET)
);
}
/*
@@ -50,18 +40,8 @@ static inline int is_siu_irq(const rtems_irq_number irqLine)
static inline int is_cpm_irq(const rtems_irq_number irqLine)
{
return (((int) irqLine <= BSP_CPM_IRQ_MAX_OFFSET) &
((int) irqLine >= BSP_CPM_IRQ_LOWEST_OFFSET)
);
}
/*
* Check if symbolic IRQ name is a Processor IRQ
*/
static inline int is_processor_irq(const rtems_irq_number irqLine)
{
return (((int) irqLine <= BSP_PROCESSOR_IRQ_MAX_OFFSET) &
((int) irqLine >= BSP_PROCESSOR_IRQ_LOWEST_OFFSET)
);
((int) irqLine >= BSP_CPM_IRQ_LOWEST_OFFSET)
);
}
/*
@@ -85,36 +65,6 @@ const static unsigned int SIU_IvectMask[BSP_SIU_IRQ_NUMBER] =
0xFFF00000, 0xFFF80000, 0xFFFC0000, 0xFFFE0000
};
/*
* ------------------------ RTEMS Irq helper functions ----------------
*/
/*
* Caution : this function assumes the variable "internal_config"
* is already set and that the tables it contains are still valid
* and accessible.
*/
static void compute_SIU_IvectMask_from_prio (void)
{
/*
* In theory this is feasible. No time to code it yet. See i386/shared/irq.c
* for an example based on 8259 controller mask. The actual masks defined
* correspond to the priorities defined for the SIU in irq_init.c.
*/
}
/*
* This function check that the value given for the irq line
* is valid.
*/
static int isValidInterrupt(int irq)
{
if ( (irq < BSP_LOWEST_OFFSET) || (irq > BSP_MAX_OFFSET) || (irq == BSP_CPM_INTERRUPT) )
return 0;
return 1;
}
int BSP_irq_enable_at_cpm(const rtems_irq_number irqLine)
{
int cpm_irq_index;
@@ -180,7 +130,7 @@ int BSP_irq_disable_at_siu(const rtems_irq_number irqLine)
return 0;
}
int BSP_irq_enabled_at_siu (const rtems_irq_number irqLine)
int BSP_irq_enabled_at_siu (const rtems_irq_number irqLine)
{
int siu_irq_index;
@@ -191,210 +141,6 @@ int BSP_irq_enabled_at_siu (const rtems_irq_number irqLine)
return ppc_cached_irq_mask & (1 << (31-siu_irq_index));
}
/*
* ------------------------ RTEMS Single Irq Handler Mngt Routines ----------------
*/
int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
{
rtems_interrupt_level level;
if (!isValidInterrupt(irq->name)) {
return 0;
}
/*
* Check if default handler is actually connected. If not issue an error.
* You must first get the current handler via i386_get_current_idt_entry
* and then disconnect it using i386_delete_idt_entry.
* RATIONALE : to always have the same transition by forcing the user
* to get the previous handler before accepting to disconnect.
*/
if (rtems_hdl_tbl[irq->name].hdl != default_rtems_entry.hdl) {
return 0;
}
rtems_interrupt_disable(level);
/*
* store the data provided by user
*/
rtems_hdl_tbl[irq->name] = *irq;
if (is_cpm_irq(irq->name)) {
/*
* Enable interrupt at PIC level
*/
BSP_irq_enable_at_cpm (irq->name);
}
if (is_siu_irq(irq->name)) {
/*
* Enable interrupt at SIU level
*/
BSP_irq_enable_at_siu (irq->name);
}
if (is_processor_irq(irq->name)) {
/*
* Should Enable exception at processor level but not needed. Will restore
* EE flags at the end of the routine anyway.
*/
}
/*
* Enable interrupt on device
*/
if (irq->on)
irq->on(irq);
rtems_interrupt_enable(level);
return 1;
}
int BSP_get_current_rtems_irq_handler (rtems_irq_connect_data* irq)
{
if (!isValidInterrupt(irq->name)) {
return 0;
}
*irq = rtems_hdl_tbl[irq->name];
return 1;
}
int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq)
{
rtems_interrupt_level level;
if (!isValidInterrupt(irq->name)) {
return 0;
}
/*
* Check if default handler is actually connected. If not issue an error.
* You must first get the current handler via i386_get_current_idt_entry
* and then disconnect it using i386_delete_idt_entry.
* RATIONALE : to always have the same transition by forcing the user
* to get the previous handler before accepting to disconnect.
*/
if (rtems_hdl_tbl[irq->name].hdl != irq->hdl) {
return 0;
}
rtems_interrupt_disable(level);
if (is_cpm_irq(irq->name)) {
/*
* disable interrupt at PIC level
*/
BSP_irq_disable_at_cpm (irq->name);
}
if (is_siu_irq(irq->name)) {
/*
* disable interrupt at OPENPIC level
*/
BSP_irq_disable_at_siu (irq->name);
}
if (is_processor_irq(irq->name)) {
/*
* disable exception at processor level
*/
}
/*
* Disable interrupt on device
*/
if (irq->off)
irq->off(irq);
/*
* restore the default irq value
*/
rtems_hdl_tbl[irq->name] = default_rtems_entry;
rtems_interrupt_enable(level);
return 1;
}
/*
* ------------------------ RTEMS Global Irq Handler Mngt Routines ----------------
*/
int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config)
{
int i;
rtems_interrupt_level level;
/*
* Store various code accelerators
*/
internal_config = config;
default_rtems_entry = config->defaultEntry;
rtems_hdl_tbl = config->irqHdlTbl;
rtems_interrupt_disable(level);
/*
* start with CPM IRQ
*/
for (i=BSP_CPM_IRQ_LOWEST_OFFSET; i < BSP_CPM_IRQ_LOWEST_OFFSET + BSP_CPM_IRQ_NUMBER ; i++) {
if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
BSP_irq_enable_at_cpm (i);
if (rtems_hdl_tbl[i].on)
rtems_hdl_tbl[i].on(&rtems_hdl_tbl[i]);
}
else {
if (rtems_hdl_tbl[i].off)
rtems_hdl_tbl[i].off(&rtems_hdl_tbl[i]);
BSP_irq_disable_at_cpm (i);
}
}
/*
* continue with PCI IRQ
*/
/*
* set up internal tables used by rtems interrupt prologue
*/
compute_SIU_IvectMask_from_prio ();
for (i=BSP_SIU_IRQ_LOWEST_OFFSET; i < BSP_SIU_IRQ_LOWEST_OFFSET + BSP_SIU_IRQ_NUMBER ; i++) {
if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
BSP_irq_enable_at_siu (i);
if (rtems_hdl_tbl[i].on)
rtems_hdl_tbl[i].on(&rtems_hdl_tbl[i]);
}
else {
if (rtems_hdl_tbl[i].off)
rtems_hdl_tbl[i].off(&rtems_hdl_tbl[i]);
BSP_irq_disable_at_siu (i);
}
}
/*
* Must enable CPM interrupt on SIU. CPM on SIU Interrupt level has already been
* set up in BSP_CPM_irq_init.
*/
((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr |= CICR_IEN;
BSP_irq_enable_at_siu (BSP_CPM_INTERRUPT);
/*
* finish with Processor exceptions handled like IRQ
*/
for (i=BSP_PROCESSOR_IRQ_LOWEST_OFFSET; i < BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER; i++) {
if (rtems_hdl_tbl[i].hdl != default_rtems_entry.hdl) {
if (rtems_hdl_tbl[i].on)
rtems_hdl_tbl[i].on(&rtems_hdl_tbl[i]);
}
else {
if (rtems_hdl_tbl[i].off)
rtems_hdl_tbl[i].off(&rtems_hdl_tbl[i]);
}
}
rtems_interrupt_enable(level);
return 1;
}
int BSP_rtems_irq_mngt_get(rtems_irq_global_settings** config)
{
*config = internal_config;
return 0;
}
#ifdef DISPATCH_HANDLER_STAT
volatile unsigned int maxLoop = 0;
#endif
@@ -402,11 +148,11 @@ volatile unsigned int maxLoop = 0;
/*
* High level IRQ handler called from shared_raw_irq_code_entry
*/
int C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
int C_dispatch_irq_handler (BSP_Exception_frame *frame, unsigned int excNum)
{
register unsigned int irq;
register unsigned cpmIntr; /* boolean */
register unsigned oldMask; /* old siu pic masks */
register unsigned oldMask; /* old siu pic masks */
register unsigned msr;
register unsigned new_msr;
#ifdef DISPATCH_HANDLER_STAT
@@ -420,7 +166,7 @@ int C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
new_msr = msr | MSR_EE;
_CPU_MSR_SET(new_msr);
rtems_hdl_tbl[BSP_DECREMENTER].hdl(rtems_hdl_tbl[BSP_DECREMENTER].handle);
bsp_interrupt_handler_dispatch(BSP_DECREMENTER);
_CPU_MSR_SET(msr);
return 0;
@@ -482,7 +228,7 @@ int C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
new_msr = msr | MSR_EE;
_CPU_MSR_SET(new_msr);
rtems_hdl_tbl[irq].hdl(rtems_hdl_tbl[irq].handle);
bsp_interrupt_handler_dispatch(irq);
_CPU_MSR_SET(msr);
@@ -505,21 +251,104 @@ int C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum)
return 0;
}
void _ThreadProcessSignalsFromIrq (BSP_Exception_frame* ctx)
void BSP_SIU_irq_init(void)
{
/*
* Process pending signals that have not already been
* processed by _Thread_Displatch. This happens quite
* unfrequently : the ISR must have posted an action
* to the current running thread.
*/
if ( _Thread_Do_post_task_switch_extension ||
_Thread_Executing->do_post_task_switch_extension ) {
_Thread_Executing->do_post_task_switch_extension = false;
_API_extensions_Run_postswitch();
}
/*
* I plan to process other thread related events here.
* This will include DEBUG session requested from keyboard...
* In theory we should initialize two registers at least :
* SIMASK, SIEL. SIMASK is reset at 0 value meaning no interrupt. But
* we should take care that a monitor may have restoreed to another value.
* If someone find a reasonnable value for SIEL, AND THE NEED TO CHANGE IT
* please feel free to add it here.
*/
((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = 0;
((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend = 0xffff0000;
ppc_cached_irq_mask = 0;
((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel = ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel;
}
/*
* Initialize CPM interrupt management
*/
void
BSP_CPM_irq_init(void)
{
/*
* Initialize the CPM interrupt controller.
*/
((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr =
#ifdef mpc860
(CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) |
#else
(CICR_SCB_SCC2 | CICR_SCA_SCC1) |
#endif
((BSP_CPM_INTERRUPT/2) << 13) | CICR_HP_MASK;
((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr = 0;
((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr |= CICR_IEN;
}
rtems_status_code bsp_interrupt_vector_enable( rtems_vector_number irqnum)
{
if (is_cpm_irq(irqnum)) {
/*
* Enable interrupt at PIC level
*/
BSP_irq_enable_at_cpm (irqnum);
}
if (is_siu_irq(irqnum)) {
/*
* Enable interrupt at SIU level
*/
BSP_irq_enable_at_siu (irqnum);
}
return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_vector_disable( rtems_vector_number irqnum)
{
if (is_cpm_irq(irqnum)) {
/*
* disable interrupt at PIC level
*/
BSP_irq_disable_at_cpm (irqnum);
}
if (is_siu_irq(irqnum)) {
/*
* disable interrupt at OPENPIC level
*/
BSP_irq_disable_at_siu (irqnum);
}
return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_facility_initialize()
{
/* Install exception handler */
if (ppc_exc_set_handler( ASM_EXT_VECTOR, C_dispatch_irq_handler)) {
return RTEMS_IO_ERROR;
}
if (ppc_exc_set_handler( ASM_DEC_VECTOR, C_dispatch_irq_handler)) {
return RTEMS_IO_ERROR;
}
/* Initialize the interrupt controller */
BSP_SIU_irq_init();
BSP_CPM_irq_init();
/*
* Must enable CPM interrupt on SIU. CPM on SIU Interrupt level has already been
* set up in BSP_CPM_irq_init.
*/
((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr |= CICR_IEN;
BSP_irq_enable_at_siu (BSP_CPM_INTERRUPT);
return RTEMS_SUCCESSFUL;
}
void bsp_interrupt_handler_default( rtems_vector_number vector)
{
printk( "Spurious interrupt: 0x%08x\n", vector);
}
@@ -40,7 +40,8 @@ RTEMS_CPU_MODEL=mpc$(8XX_CPU_TYPE)
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
#
CPU_CFLAGS = -mcpu=$(8XX_CPU_TYPE) -Dmpc$(8XX_CPU_TYPE) -D$(RTEMS_MBX_MODEL)
CPU_CFLAGS = -mcpu=$(8XX_CPU_TYPE) -Dmpc$(8XX_CPU_TYPE) -D$(RTEMS_MBX_MODEL) \
-meabi -msdata -fno-common
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g -fno-keep-inline-functions
+11 -3
View File
@@ -68,9 +68,17 @@ $(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
$(PROJECT_INCLUDE)/bsp/vectors.h: vectors/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
$(PROJECT_INCLUDE)/bsp/irq-config.h: include/irq-config.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-config.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-config.h
$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h
$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h
$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
@@ -18,8 +18,6 @@
* $Id$
*/
#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
#include <bsp.h>
#include <bsp/irq.h>
#include <rtems/bspIo.h>
@@ -29,8 +27,6 @@
SPR_RW(SPRG1)
extern unsigned long intrStackPtr;
/*
* Driver configuration parameters
*/
@@ -45,6 +41,9 @@ uint32_t bsp_timer_average_overhead; /* Average overhead of timer in ticks */
uint32_t bsp_timer_least_valid; /* Least valid number from timer */
bool bsp_timer_internal_clock; /* TRUE, when timer runs with CPU clk */
extern char IntrStack_start [];
extern char intrStack [];
void BSP_panic(char *s)
{
printk("%s PANIC %s\n",_RTEMS_version, s);
@@ -83,9 +82,9 @@ void _BSP_Fatal_error(unsigned int v)
*/
void bsp_start(void)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
register unsigned char* intrStack;
/*
* Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
@@ -112,17 +111,22 @@ void bsp_start(void)
rtems_cache_enable_data();
#endif
#endif
/*
* Initialize some SPRG registers related to irq handling
*/
intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
_write_SPRG1((unsigned int)intrStack);
/* Initialize exception handler */
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uintptr_t) IntrStack_start,
(uintptr_t) intrStack - (uintptr_t) IntrStack_start
);
if ( sc != RTEMS_SUCCESSFUL ) {
BSP_panic( "cannot initialize exceptions" );
}
/*
* Install our own set of exception vectors
*/
initialize_exceptions();
/* Initalize interrupt support */
sc = bsp_interrupt_initialize();
if ( sc != RTEMS_SUCCESSFUL ) {
BSP_panic( "cannot initialize interrupts" );
}
/*
* initialize the device driver parameters
@@ -165,10 +169,7 @@ void bsp_start(void)
m8xx.scc2p.rbase=0;
m8xx.scc2p.tbase=0;
m8xx_cp_execute_cmd( M8xx_CR_OP_STOP_TX | M8xx_CR_CHAN_SCC2 );
/*
* Initalize RTEMS IRQ system
*/
BSP_rtems_irq_mng_init(0);
#ifdef SHOW_MORE_INIT_SETTINGS
printk("Exit from bspstart\n");
#endif
@@ -21,13 +21,13 @@ RamSize = DEFINED(RamSize) ? RamSize : 4M;
HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0;
MEMORY
{
ram : org = 0x0, l = 4M
nvram : org = 0xfa000000, l = 32K
dpram : org = 0xfa200000, l = 16K
flash : org = 0xfc000000, l = 2M
immr : org = 0xfa200000, l = 16K
}
{
ram : org = 0x0, l = 4M
nvram : org = 0xfa000000, l = 32K
dpram : org = 0xfa200000, l = 16K
flash : org = 0xfc000000, l = 2M
immr : org = 0xfa200000, l = 16K
}
SECTIONS
@@ -45,7 +45,7 @@ SECTIONS
* The stack will live in this area - between the vectors and
* the text section.
*/
.text 0x10000:
{
/* Read-only sections, merged into text segment: */
@@ -58,10 +58,10 @@ SECTIONS
/* Actual code */
*(.text*)
/* C++ constructors/destructors */
*(.gnu.linkonce.t*)
/* Initialization and finalization code.
*
* Various files can provide initialization and finalization functions.
@@ -91,14 +91,14 @@ SECTIONS
* end terminate with a NULL entry.
*/
PROVIDE (__CTOR_LIST__ = .);
PROVIDE (__CTOR_LIST__ = .);
/* LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2) */
*crtbegin.o(.ctors)
*(.ctors)
*crtend.o(.ctors)
LONG(0)
PROVIDE (__CTOR_END__ = .);
PROVIDE (__DTOR_LIST__ = .);
/* LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2) */
*crtbegin.o(.dtors)
@@ -106,7 +106,7 @@ SECTIONS
*crtend.o(.dtors)
LONG(0)
PROVIDE (__DTOR_END__ = .);
/*
* Special FreeBSD sysctl sections.
*/
@@ -192,12 +192,6 @@ SECTIONS
*(.data.*)
*(.data1)
PROVIDE (__SDATA_START__ = .);
*(.sdata*)
*(.gnu.linkonce.d*)
*(.gnu.linkonce.s.*)
PROVIDE (__SDATA_END__ = .);
PROVIDE (__EXCEPT_START__ = .);
*(.gcc_except_table*)
PROVIDE (__EXCEPT_END__ = .);
@@ -206,7 +200,7 @@ SECTIONS
*(.got.plt)
*(.got)
PROVIDE(__GOT_END__ = .);
*(.got1)
PROVIDE (__GOT2_START__ = .);
@@ -214,40 +208,46 @@ SECTIONS
*(.got2)
PROVIDE (__GOT2_END__ = .);
PROVIDE (_GOT2_END_ = .);
PROVIDE (__FIXUP_START__ = .);
PROVIDE (_FIXUP_START_ = .);
*(.fixup)
PROVIDE (_FIXUP_END_ = .);
PROVIDE (__FIXUP_END__ = .);
/* We want the small data sections together, so single-instruction offsets
* can access them all.
*/
PROVIDE (__SDATA2_START__ = .);
*(.sdata2)
*(.gnu.linkonce.s2.*)
*(.sbss2)
PROVIDE (__SDATA2_END__ = .);
} > ram
.sdata : {
PROVIDE (_SDA_BASE_ = 32768);
*(.sdata .sdata.* .gnu.linkonce.s.*)
} > ram
.sbss : {
__bss_start = .;
PROVIDE (__sbss_start = .); PROVIDE (___sbss_start = .);
*(.scommon)
*(.dynsbss)
*(.sbss .sbss.* .gnu.linkonce.sb.*)
PROVIDE (__sbss_end = .); PROVIDE (___sbss_end = .);
} > ram
.sdata2 : {
PROVIDE (_SDA2_BASE_ = 32768);
*(.sdata2 .sdata2.* .gnu.linkonce.s2.*)
} > ram =0
.sbss2 : {
*(.sbss2 .sbss2.* .gnu.linkonce.sb2.*)
} > ram =0
.bss :
{
PROVIDE (__SBSS_START__ = .);
PROVIDE (__SBSS2_START__ = .);
*(.sbss2)
PROVIDE (__SBSS2_END__ = .);
bss.start = .;
*(.bss .bss* .gnu.linkonce.b*)
*(.sbss*)
*(COMMON)
. = ALIGN(4);
bss.end = .;
PROVIDE (__SBSS_END__ = .);
} > ram
@@ -1,3 +1,7 @@
2009-10-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* Makefile.am, preinstall.am: Update for exception support changes.
2009-10-21 Ralf Corsépius <ralf.corsepius@rtems.org>
* make/custom/mcp750.cfg: Remove RTEMS_BSP_FAMILY.
@@ -80,9 +80,7 @@ libbsp_a_SOURCES += \
../../powerpc/shared/console/uart.h
include_bsp_HEADERS += ../../powerpc/shared/irq/irq.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h
# irq
libbsp_a_SOURCES += ../../powerpc/shared/irq/irq_init.c \
@@ -133,11 +131,11 @@ libbsp_a_SOURCES += ../../shared/vmeUniverse/vmeUniverse.c \
libbsp_a_LIBADD = \
polledIO.rel \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
@@ -97,14 +97,6 @@ $(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bsps
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h
$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
$(PROJECT_INCLUDE)/bsp/motorola.h: ../../powerpc/shared/motorola/motorola.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/motorola.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/motorola.h
@@ -1,3 +1,9 @@
2009-10-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* Makefile.am: Update for exception support changes.
* startup/bspstart.c: Changed exception header file includes. Update
for ppc_exc_initialize() changes.
2009-10-21 Sebastian Huber <sebastian.huber@embedded-brains.de>
* network/smsc9218i.c, tests/tests.c: Update for interrupt handler
@@ -83,7 +83,6 @@ libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/dspi.rel \
../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/esci.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel
if HAS_NETWORKING
@@ -25,12 +25,12 @@
#include <rtems.h>
#include <libcpu/powerpc-utility.h>
#include <bsp/vectors.h>
#include <bsp.h>
#include <bsp/bootcard.h>
#include <bsp/irq.h>
#include <bsp/irq-generic.h>
#include <bsp/ppc_exc_bspsupp.h>
#define RTEMS_STATUS_CHECKS_USE_PRINTK
@@ -188,6 +188,7 @@ static void mpc55xx_ebi_init()
*/
void bsp_start(void)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
@@ -224,16 +225,21 @@ void bsp_start(void)
/* Initialize exceptions */
RTEMS_DEBUG_PRINT( "Initialize exceptions ...\n");
ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
interrupt_stack_start,
interrupt_stack_size
);
DEBUG_DONE();
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
interrupt_stack_start,
interrupt_stack_size
);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic( "Cannot initialize exceptions");
} else {
DEBUG_DONE();
}
/* Initialize interrupts */
RTEMS_DEBUG_PRINT( "Initialize interrupts ...\n");
if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) {
sc = bsp_interrupt_initialize();
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic( "Cannot initialize interrupts");
} else {
DEBUG_DONE();
@@ -1,3 +1,12 @@
2009-10-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* include/irq-config.h: New file.
* Makefile.am, preinstall.am: Update for exception support changes.
Use generic interrupt support.
* make/custom/mpc8260ads.cfg, startup/linkcmds: Enable EABI.
* irq/irq.c, startup/bspstart.c: Converted to generic interrupt
support. Update for exception support changes.
2009-10-21 Ralf Corsépius <ralf.corsepius@rtems.org>
* make/custom/mpc8260ads.cfg: Remove RTEMS_BSP_FAMILY.
+14 -10
View File
@@ -35,11 +35,19 @@ libbsp_a_SOURCES += clock/p_clock.c
# console
libbsp_a_SOURCES += console/console.c
include_bsp_HEADERS = irq/irq.h
# irq
libbsp_a_SOURCES += irq/irq.c irq/irq_init.c irq/irq.h irq/irq_asm.S
include_bsp_HEADERS = irq/irq.h \
include/irq-config.h \
../../shared/include/irq-generic.h \
../../shared/include/irq-info.h
# irq
libbsp_a_SOURCES += irq/irq.c \
../../shared/src/irq-generic.c \
../../shared/src/irq-legacy.c \
../../shared/src/irq-info.c \
../../shared/src/irq-shell.c \
../../shared/src/irq-server.c
include_bsp_HEADERS += vectors/vectors.h
# startup
libbsp_a_SOURCES += ../../shared/bspclean.c ../../shared/bsplibc.c \
../../shared/bsppredriverhook.c ../../shared/bsppost.c \
@@ -47,10 +55,6 @@ libbsp_a_SOURCES += ../../shared/bspclean.c ../../shared/bsplibc.c \
../../shared/sbrk.c ../../shared/gnatinstallhandler.c startup/cpuinit.c \
../../shared/bspgetworkarea.c ../../shared/bsppretaskinghook.c
# vectors
libbsp_a_SOURCES += vectors/vectors_init.c vectors/vectors.h \
vectors/vectors.S
if HAS_NETWORKING
network_CPPFLAGS = -D__INSIDE_RTEMS_BSD_TCPIP_STACK__
network_CPPFLAGS += -D__BSD_VISIBLE
@@ -63,12 +67,12 @@ endif
libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/mpc8260/clock.rel \
../../../libcpu/@RTEMS_CPU@/mpc8260/console-generic.rel \
../../../libcpu/@RTEMS_CPU@/mpc8260/cpm.rel \
../../../libcpu/@RTEMS_CPU@/mpc8260/mmu.rel \
../../../libcpu/@RTEMS_CPU@/mpc8260/timer.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel
../../../libcpu/@RTEMS_CPU@/mpc8260/timer.rel
if HAS_NETWORKING
libbsp_a_LIBADD += network.rel
endif
File diff suppressed because it is too large Load Diff
@@ -14,7 +14,8 @@ RTEMS_CPU_MODEL=mpc8260
# and (hopefully) optimize for it.
#
# CPU_CFLAGS = -mcpu=$(8XX_CPU_TYPE) -mstrict-align
CPU_CFLAGS = -mcpu=603e -mstrict-align -Dmpc8260
CPU_CFLAGS = -mcpu=603e -mstrict-align -Dmpc8260 \
-meabi -msdata -fno-common
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g -fno-keep-inline-functions
@@ -69,7 +69,15 @@ $(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
$(PROJECT_INCLUDE)/bsp/vectors.h: vectors/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
$(PROJECT_INCLUDE)/bsp/irq-config.h: include/irq-config.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-config.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-config.h
$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h
$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h
@@ -35,8 +35,6 @@
* $Id$
*/
#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
#include <bsp.h>
/*
@@ -55,8 +53,6 @@
SPR_RW(SPRG1)
extern unsigned long intrStackPtr;
/*
* Driver configuration parameters
*/
@@ -74,7 +70,9 @@ bool bsp_timer_internal_clock; /* TRUE, when timer runs with CPU clk */
void _BSP_GPLED1_on(void);
void _BSP_GPLED0_on(void);
void cpu_init(void);
void initialize_exceptions(void);
extern char IntrStack_start [];
extern char intrStack [];
void BSP_panic(char *s)
{
@@ -150,10 +148,10 @@ void _BSP_Uart2_disable()
void bsp_start(void)
{
rtems_status_code sc = RTEMS_SUCCESSFUL;
extern void *_WorkspaceBase;
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
register unsigned char* intrStack;
/* Set MPC8260ADS board LEDS and Uart enable lines */
_BSP_GPLED0_off();
@@ -173,21 +171,24 @@ void bsp_start(void)
/*
mmu_init();
*/
/*
* Initialize some SPRG registers related to irq handling
*/
intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
_write_SPRG1((unsigned int)intrStack);
/* Initialize exception handler */
/* FIXME: Interrupt stack begin and size */
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uintptr_t) IntrStack_start,
(uintptr_t) intrStack - (uintptr_t) IntrStack_start
);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot intitialize exceptions");
}
/*
printk( "About to call initialize_exceptions\n" );
*/
/*
* Install our own set of exception vectors
*/
/* Initalize interrupt support */
sc = bsp_interrupt_initialize();
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot intitialize interrupts");
}
initialize_exceptions();
/*
mmu_init();
@@ -227,11 +228,6 @@ void bsp_start(void)
m8260.brgc1 = M8260_BRG_EN + (uint32_t)(((uint16_t)((40016384)/(32768)) - 1) << 1) + 0;
*/
/*
* Initalize RTEMS IRQ system
*/
BSP_rtems_irq_mng_init(0);
#ifdef SHOW_MORE_INIT_SETTINGS
printk("Exit from bspstart\n");
#endif
@@ -208,29 +208,39 @@ SECTIONS
.fixup : { *(.fixup) } >ram
PROVIDE (_FIXUP_END_ = .);
PROVIDE (__FIXUP_END__ = .);
.sdata : {
PROVIDE (_SDA_BASE_ = 32768);
*(.sdata .sdata.* .gnu.linkonce.s.*)
} > ram
.sbss : {
__bss_start = .;
PROVIDE (__sbss_start = .); PROVIDE (___sbss_start = .);
*(.scommon)
*(.dynsbss)
*(.sbss .sbss.* .gnu.linkonce.sb.*)
PROVIDE (__sbss_end = .); PROVIDE (___sbss_end = .);
} > ram
.sdata2 : {
PROVIDE (_SDA2_BASE_ = 32768);
*(.sdata2 .sdata2.* .gnu.linkonce.s2.*)
} > ram =0
.sbss2 : {
*(.sbss2 .sbss2.* .gnu.linkonce.sb2.*)
} > ram =0
PROVIDE (__SDATA2_START__ = .);
.sdata2 : { *(.sdata2) *(.gnu.linkonce.s2.*) } >ram
.sbss2 : { *(.sbss2) *(.gnu.linkonce.sb2.*) } >ram
PROVIDE (__SBSS2_END__ = .);
.sbss2 : { *(.sbss2) } >ram
PROVIDE (__SBSS2_END__ = .);
__SBSS_START__ = .;
.bss :
{
bss.start = .;
*(.bss .bss* .gnu.linkonce.b*)
*(.sbss*) *(COMMON)
. = ALIGN(4);
bss.end = .;
} > ram
__SBSS_END__ = .;
/* R/W Data */
.data ( . ) :
@@ -1,3 +1,9 @@
2009-10-22 Sebastian Huber <sebastian.huber@embedded-brains.de>
* Makefile.am, preinstall.am: Update for exception support changes.
* irq/irq_init.c: Changed exception header file includes.
* startup/bspstart.c: Update for ppc_exc_initialize() changes.
2009-10-21 Ralf Corsépius <ralf.corsepius@rtems.org>
* make/custom/mvme3100.cfg: Remove RTEMS_BSP_FAMILY.
@@ -97,8 +97,6 @@ libbsp_a_SOURCES += ../../powerpc/shared/pci/pci.c \
../../powerpc/shared/pci/pcifinddevice.c ../../powerpc/shared/pci/pci.h
include_bsp_HEADERS += \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h
include_bsp_HEADERS += vme/VMEConfig.h \
@@ -142,12 +140,12 @@ network_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
endif
libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
../../../libcpu/@RTEMS_CPU@/e500/clock.rel \
../../../libcpu/@RTEMS_CPU@/e500/timer.rel \
../../../libcpu/@RTEMS_CPU@/e500/mmu.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel
@@ -25,7 +25,7 @@
#include <bsp/openpic.h>
#include <bsp/irq.h>
#include <bsp.h>
#include <libcpu/raw_exception.h>
#include <bsp/vectors.h>
#include <rtems/bspIo.h>
static void nop_func(void *unused)
@@ -89,14 +89,6 @@ $(PROJECT_INCLUDE)/bsp/pci.h: ../../powerpc/shared/pci/pci.h $(PROJECT_INCLUDE)/
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/pci.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/pci.h
$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
$(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
$(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h
@@ -225,9 +225,10 @@ SPR_RW(HID1)
void bsp_start( void )
{
rtems_status_code sc;
unsigned char *stack;
uint32_t intrStackStart;
uint32_t intrStackSize;
uintptr_t intrStackStart;
uintptr_t intrStackSize;
char *chpt;
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
@@ -271,17 +272,20 @@ VpdBufRec vpdData [] = {
/*
* Initialize the interrupt related settings.
*/
intrStackStart = (uint32_t) __rtems_end;
intrStackStart = (uintptr_t) __rtems_end;
intrStackSize = rtems_configuration_get_interrupt_stack_size();
/*
* Initialize default raw exception handlers.
*/
ppc_exc_initialize(
sc = ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
intrStackStart,
intrStackSize
);
if (sc != RTEMS_SUCCESSFUL) {
BSP_panic("cannot initialize exceptions");
}
printk("CPU 0x%x - rev 0x%x\n", myCpu, myCpuRevision);

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