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Added instruction and data cache enable.

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This commit is contained in:
Joel Sherrill
1999-02-05 00:29:47 +00:00
parent ecec2ba7bd
commit 2caa006b35
1 changed files with 13 additions and 2 deletions
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make/custom/dmv177.cfg
+13 -2
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@@ -52,10 +52,19 @@ RTEMS_BSP_FAMILY=dmv177
# response time. The use of these registers can conflict with
# other tools like debuggers.
#
# PPC_USE_DATA_CACHE (RTEMS PowerPC port)
# PPC_USE_DATA_CACHE (RTEMS PowerPC port/BSP)
# If defined, then the PowerPC specific code in RTEMS will use
# data cache instructions to optimize the context switch code.
# This code can conflict with debuggers or emulators.
# This code can conflict with debuggers or emulators. It is known
# to break the Corelis PowerPC emulator with at least some combinations
# of PowerPC 603e revisions and emulator versions.
# The BSP actually contains the call that enables this.
#
# PPC_USE_INSTRUCTION_CACHE (RTEMS PowerPC port/BSP)
# If defined, then the PowerPC specific code in RTEMS will use
# data cache instructions to optimize the context switch code.
# This code can conflict with debuggers or emulators.
# The BSP actually contains the call that enables this.
define make-target-options
@echo "/* #define NDEBUG 1 */ " >>$@
@@ -68,12 +77,14 @@ define make-target-options
@echo "#define PPC_ASM PPC_ASM_ELF" >>$@
@echo "#define PPC_USE_SPRG 0" >>$@
@echo "#define PPC_USE_DATA_CACHE 0" >>$@
@echo "#define PPC_USE_INSTRUCTION_CACHE 1" >>$@
endef
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
#
CPU_CFLAGS = -mcpu=603
#CFLAGS_DEBUG_OPTIMIZE_V=
# optimize flag: typically -0, could use -O4 or -fast
# -O4 is ok for RTEMS