mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
synced 2026-09-24 08:17:12 +08:00
bsps: Convert README to MarkDown
This commit is contained in:
Amar Takhar
@@ -1,5 +1,9 @@
|
||||
Generic or1k
|
||||
============
|
||||
|
||||
This BSP can run on or1ksim, QEMU, jor1k [1] and OpenRISC supported FPGA boards.
|
||||
|
||||
```shell
|
||||
$ git clone git@github.com:openrisc/or1ksim.git
|
||||
$ cd or1ksim
|
||||
$ mkdir builddir_or1ksim
|
||||
@@ -8,6 +12,7 @@ $ ../configure --target=or1k-elf --prefix=/opt/or1ksim
|
||||
$ make all
|
||||
$ make install
|
||||
$ export PATH=/opt/or1ksim/bin:$PATH
|
||||
```
|
||||
|
||||
Configuration file "sim.cfg" should be provided for complex board
|
||||
configurations at the current directory (which you run or1ksim from) or at
|
||||
@@ -19,16 +24,21 @@ rtems-tools/sim-scripts.
|
||||
|
||||
From command line type:
|
||||
|
||||
```shell
|
||||
$ or1k-elf-sim -f sim.cfg $PATH_TO_RTEMS_EXE
|
||||
|
||||
```
|
||||
From QEMU:
|
||||
|
||||
```shell
|
||||
$ qemu-system-or32 -serial mon:stdio -serial /dev/null -net none -nographic \
|
||||
-m 128M -kernel $PATH_TO_RTEMS_EXE
|
||||
```
|
||||
|
||||
from sim-scripts:
|
||||
|
||||
```shell
|
||||
$ or1ksim $PATH_TO_RTEMS_EXE
|
||||
$ qemu-or1k $PATH_TO_RTEMS_EXE
|
||||
```
|
||||
|
||||
[1] http://s-macke.github.io/jor1k/demos/rtems.html
|
||||
@@ -1,9 +1,6 @@
|
||||
Some information about this BSP
|
||||
================================
|
||||
Beatnik
|
||||
=======
|
||||
|
||||
ACKNOWLEDGEMENTS
|
||||
----------------
|
||||
Acknowledgements:
|
||||
Valuable information was obtained from the following drivers
|
||||
netbsd: Allegro Networks Inc; Wasabi Systems Inc.
|
||||
linux: MontaVista, Software, Inc; Chris Zankel, Mark A. Greer.
|
||||
@@ -17,6 +14,7 @@ Acknowledgements:
|
||||
inspiring discussions and Dayle Kotturi (SLAC) for her contributions, support
|
||||
and extensive testing.
|
||||
|
||||
|
||||
LICENSE
|
||||
-------
|
||||
See ./LICENSE file.
|
||||
@@ -26,6 +24,7 @@ me (most notably, the ethernet drivers if_gfe [netbsd port] and
|
||||
if_em [freebsd port]). Consult individual file headers for copyright
|
||||
and authorship information.
|
||||
|
||||
|
||||
BUILD INFO
|
||||
----------
|
||||
(relevant only if you received this BSP unbundled from the RTEMS distribution)
|
||||
@@ -41,6 +40,7 @@ BUILD INFO
|
||||
- configure with your favorite options. BSP name is 'beatnik'
|
||||
I recommend passing RTEMS_CFLAGS=-g to 'configure'
|
||||
|
||||
|
||||
TARGET
|
||||
------
|
||||
Even though this BSP is binary compatible with the MVME5500 it's primary
|
||||
@@ -59,8 +59,9 @@ play with but we don't want to build and support an additional BSP for them.
|
||||
An important detail -- hardware cache snooping -- was borrowed from
|
||||
Shuchen Kate Feng's gfe driver port, though.
|
||||
|
||||
|
||||
HARDWARE SUPPORT
|
||||
===============
|
||||
---------------
|
||||
(some of the headers mentioned below contain more
|
||||
detailed information)
|
||||
|
||||
@@ -1,7 +1,6 @@
|
||||
#
|
||||
# README
|
||||
#
|
||||
|
||||
gen5200
|
||||
=======
|
||||
```
|
||||
BSP NAME: gen5200
|
||||
BOARD: various boards based on MPC5200 Controller:
|
||||
MicroSys PM520 with Carrier board CR825
|
||||
@@ -11,9 +10,11 @@ CPU: PowerPC MPC5200
|
||||
COPROCESSORS: Hardware FPU
|
||||
MODE: 32 bit mode, I and D cache enabled
|
||||
DEBUG MONITOR: None
|
||||
```
|
||||
|
||||
PERIPHERALS
|
||||
===========
|
||||
-----------
|
||||
```
|
||||
TIMERS: GPT
|
||||
SERIAL PORTS: 3 PSCs
|
||||
2 CAN IFs
|
||||
@@ -24,42 +25,47 @@ VIDEO: none
|
||||
SCSI: none
|
||||
IDE: 1 CompactFlash Slot supported
|
||||
NETWORKING: 1 FEC Fast Ethernet
|
||||
```
|
||||
|
||||
DRIVER INFORMATION
|
||||
==================
|
||||
------------------
|
||||
```
|
||||
CLOCK DRIVER: using one GPT
|
||||
IOSUPP DRIVER: none
|
||||
SHMSUPP: none
|
||||
TIMER DRIVER: Timebase register (lower 32 bits only)
|
||||
```
|
||||
|
||||
STDIO
|
||||
=====
|
||||
-----
|
||||
```
|
||||
PORT: PSC1
|
||||
ELECTRICAL: RS-232
|
||||
BAUD: 9600
|
||||
BITS PER CHARACTER: 8
|
||||
PARITY: None
|
||||
STOP BITS: 1
|
||||
```
|
||||
|
||||
NOTES
|
||||
=====
|
||||
-----
|
||||
```
|
||||
On-chip resources:
|
||||
PSC1 /dev/console /dev/tty00
|
||||
PSC2 /dev/tty01
|
||||
PSC3 /dev/tty02
|
||||
|
||||
```
|
||||
|
||||
Board description
|
||||
-----------------
|
||||
|
||||
```
|
||||
Clock rate: external clock: 33MHz
|
||||
Bus width: 32 bit Flash, 32 bit SDRAM
|
||||
FLASH: 8MByte
|
||||
RAM: 64MByte SDRAM
|
||||
|
||||
```
|
||||
|
||||
Debugging/ Code loading:
|
||||
------------------------
|
||||
|
||||
Tested using the Lauterbach TRACE32 ICD debugger.
|
||||
|
||||
@@ -1,3 +1,6 @@
|
||||
MCP750
|
||||
======
|
||||
```
|
||||
BSP NAME: MCP750
|
||||
BOARD: MCP750 from motorola
|
||||
BUS: PCI
|
||||
@@ -7,9 +10,11 @@ COPROCESSORS: N/A
|
||||
MODE: 32 bit mode
|
||||
|
||||
DEBUG MONITOR: PPCBUG mode
|
||||
```
|
||||
|
||||
PERIPHERALS
|
||||
===========
|
||||
-----------
|
||||
```
|
||||
TIMERS: PPC internal Timebase register
|
||||
RESOLUTION: ???
|
||||
SERIAL PORTS: simulated via bug
|
||||
@@ -18,27 +23,31 @@ DMA: none
|
||||
VIDEO: none
|
||||
SCSI: none
|
||||
NETWORKING: DEC21140
|
||||
```
|
||||
|
||||
DRIVER INFORMATION
|
||||
==================
|
||||
------------------
|
||||
```
|
||||
CLOCK DRIVER: PPC internal
|
||||
IOSUPP DRIVER: N/A
|
||||
SHMSUPP: N/A
|
||||
TIMER DRIVER: PPC internal
|
||||
TTY DRIVER: PPC internal
|
||||
```
|
||||
|
||||
STDIO
|
||||
=====
|
||||
-----
|
||||
```
|
||||
PORT: Console port 0
|
||||
ELECTRICAL: na
|
||||
BAUD: na
|
||||
BITS PER CHARACTER: na
|
||||
PARITY: na
|
||||
STOP BITS: na
|
||||
```
|
||||
|
||||
Notes
|
||||
=====
|
||||
|
||||
-----
|
||||
Based on papyrus bsp which only really supports
|
||||
the PowerOpen ABI with an ELF assembler.
|
||||
|
||||
+3
-2
@@ -1,3 +1,6 @@
|
||||
Motorola PowerPC
|
||||
================
|
||||
|
||||
The code in this directory has been taken WITH PERMISSION from
|
||||
Gabriel Paubert, paubert@iram.es. The main reason for having
|
||||
a separate bootloader for PreP compliant firmware is that the
|
||||
@@ -35,11 +38,9 @@ initialization (e.g printk, ...).
|
||||
Eric Valette (valette@crf.canon.fr)
|
||||
|
||||
|
||||
**************************************************
|
||||
2003/5/7, Greg Menke, gregory.menke@gsfc.nasa.gov
|
||||
|
||||
Reworked the pci bus 0 initialization a little and added support for
|
||||
configuring an arbitrary number of other busses & their respective
|
||||
bridges. Also added support for configuring IO ranges below 0x10000,
|
||||
which I think is reasonable given this is a PowerPC bsp.
|
||||
|
||||
@@ -1,3 +1,6 @@
|
||||
mpc55xxevb
|
||||
==========
|
||||
|
||||
Supported MCUs:
|
||||
|
||||
o MPC5516
|
||||
@@ -1,3 +1,6 @@
|
||||
mpc8260ads
|
||||
==========
|
||||
```
|
||||
BSP NAME: mpc8260ads
|
||||
BOARD: Motorola MPC8260 ADS Evaluation board
|
||||
BUS: N/A
|
||||
@@ -6,9 +9,11 @@ CPU: PowerPC MPC8260
|
||||
COPROCESSORS: Hardware FPU (except on revision 2J24M)
|
||||
MODE: 32 bit mode, I and D cache disabled
|
||||
DEBUG MONITOR: None
|
||||
```
|
||||
|
||||
PERIPHERALS
|
||||
===========
|
||||
-----------
|
||||
```
|
||||
TIMERS: Decrementer
|
||||
RESOLUTION: 0.1 microsecond
|
||||
SERIAL PORTS: 4 SCCs (SSC1 and 2 are connectd to RS232 drivers)
|
||||
@@ -19,25 +24,31 @@ DMA: Each serial port
|
||||
VIDEO: none
|
||||
SCSI: none
|
||||
NETWORKING: IP over HDLC (8 Mbps) on SCC3 (MPC8260)
|
||||
```
|
||||
|
||||
DRIVER INFORMATION
|
||||
==================
|
||||
------------------
|
||||
```
|
||||
CLOCK DRIVER: Decrementer
|
||||
IOSUPP DRIVER: SCC1, SCC2
|
||||
SHMSUPP: none
|
||||
TIMER DRIVER: Timebase register (lower 32 bits only)
|
||||
```
|
||||
|
||||
STDIO
|
||||
=====
|
||||
-----
|
||||
```
|
||||
PORT: SCC2
|
||||
ELECTRICAL: RS-232
|
||||
BAUD: 9600
|
||||
BITS PER CHARACTER: 8
|
||||
PARITY: None
|
||||
STOP BITS: 1
|
||||
```
|
||||
|
||||
NOTES
|
||||
=====
|
||||
-----
|
||||
```
|
||||
On-chip resources:
|
||||
SCC1 console
|
||||
SCC2 console
|
||||
@@ -82,11 +93,10 @@ On-chip resources:
|
||||
IRQ5
|
||||
IRQ6
|
||||
IRQ7
|
||||
|
||||
```
|
||||
|
||||
Board description
|
||||
-----------------
|
||||
|
||||
Clock rate: 40MHz (board can run up 66MHz with alternate OSC)
|
||||
Bus width: 32 bit Flash, 64 bit SDRAM
|
||||
FLASH: 8M SIMM
|
||||
@@ -99,7 +109,6 @@ The processor is marked with "XPC8260ZU166 166/133/66 MHz"
|
||||
|
||||
Board Configuration:
|
||||
--------------------
|
||||
|
||||
The evaluation board has a number of configurable options:
|
||||
|
||||
DIP switch settings used:
|
||||
@@ -112,7 +121,6 @@ A 40MHz oscillator is fitted to U16.
|
||||
|
||||
Board Connections:
|
||||
------------------
|
||||
|
||||
Connect a serial terminal to PA3 (SCC2) configured for 9600,n,8,1 to
|
||||
get console I/O. A 9way male-female straight-through cable is required to
|
||||
connect to a PC.
|
||||
@@ -131,7 +139,6 @@ Ground (GND) (n/a) Pin c1
|
||||
|
||||
Debugging/ Code loading:
|
||||
------------------------
|
||||
|
||||
Tested using the Metrowerks debugger and Macraigor OCDemon (Raven).
|
||||
The OCD connects via the parallel port and allows you to download code
|
||||
to the board. It may be possible to use some other debugger if you
|
||||
@@ -139,9 +146,9 @@ don't already have Metrowerks CodeWarrior.
|
||||
|
||||
|
||||
|
||||
Verification
|
||||
-------------------------------
|
||||
|
||||
Timing tests
|
||||
------------
|
||||
```
|
||||
*** TESTING IN PROGRESS - DO NOT BELIEVE THESE RESULTS ***
|
||||
|
||||
Single processor tests: Passed
|
||||
@@ -321,11 +328,4 @@ Network tests:
|
||||
TCP throughput (as measured by ttcp):
|
||||
Receive: 1324 kbytes/sec
|
||||
Transmit: 1037 kbytes/sec
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
```
|
||||
@@ -1,10 +1,5 @@
|
||||
Some information about this BSP
|
||||
================================
|
||||
|
||||
ACKNOWLEDGEMENTS
|
||||
----------------
|
||||
Acknowledgements:
|
||||
|
||||
mvme3100
|
||||
========
|
||||
Valuable information was obtained from the following drivers
|
||||
|
||||
linux: (BCM54xx) Maciej W. Rozycki, Amy Fong.
|
||||
@@ -24,8 +19,9 @@ Note that not all files that are part of this BSP were written by
|
||||
myself. Consult individual file headers for copyright
|
||||
and authorship information.
|
||||
|
||||
|
||||
HARDWARE SUPPORT
|
||||
===============
|
||||
---------------
|
||||
(some of the headers mentioned below contain more
|
||||
detailed information)
|
||||
|
||||
@@ -1,3 +1,5 @@
|
||||
mvme5500
|
||||
========
|
||||
Please reference README.booting for the boot/load process.
|
||||
|
||||
For the priority setting of the Interrupt Requests (IRQs), please
|
||||
@@ -29,6 +31,7 @@ LICENSE
|
||||
-------
|
||||
See ./LICENSE file.
|
||||
|
||||
```
|
||||
BSP NAME: mvme5500
|
||||
BOARD: MVME5500 by Motorola
|
||||
BUS: PCI
|
||||
@@ -38,9 +41,11 @@ COPROCESSORS: N/A
|
||||
MODE: 32/64 bit mode (support 32 bit for now)
|
||||
DEBUG MONITOR: MOTLoad
|
||||
SYSTEM CONTROLLER: GT64260B
|
||||
```
|
||||
|
||||
PERIPHERALS
|
||||
===========
|
||||
-----------
|
||||
```
|
||||
TIMERS: Eight, 32 bit programmable
|
||||
SERIAL PORTS: 2 NS 16550 on GT64260B
|
||||
REAL-TIME CLOCK: MK48T37V
|
||||
@@ -52,23 +57,28 @@ NETWORKING: Port 1: Intel 82544EI Gigabit Ethernet Controller
|
||||
10/100/1000Mb/s routed to front panel RJ-45
|
||||
Port 2: 10/100 Mb ethernet unit integrated on the
|
||||
Marvell's GT64260 system controller
|
||||
```
|
||||
|
||||
DRIVER INFORMATION
|
||||
==================
|
||||
------------------
|
||||
```
|
||||
CLOCK DRIVER: PPC internal
|
||||
IOSUPP DRIVER: N/A
|
||||
SHMSUPP: N/A
|
||||
TIMER DRIVER: PPC internal
|
||||
TTY DRIVER: PPC internal
|
||||
```
|
||||
|
||||
STDIO
|
||||
=====
|
||||
-----
|
||||
```
|
||||
PORT: Console port 0
|
||||
ELECTRICAL: na
|
||||
BAUD: na
|
||||
BITS PER CHARACTER: na
|
||||
PARITY: na
|
||||
STOP BITS: na
|
||||
```
|
||||
|
||||
|
||||
Jumpers
|
||||
@@ -89,11 +99,10 @@ In fact, (if I did not miss anything) the mvme5500 board should function
|
||||
properly if one keeps all the jumpers at factory configuration.
|
||||
One can leave out the jumper on J30 to disable EEPROM programming.
|
||||
|
||||
Notes
|
||||
=====
|
||||
|
||||
BSP BAT usage
|
||||
----------------------
|
||||
-------------
|
||||
```
|
||||
DBAT0 and IBAT0
|
||||
0x00000000
|
||||
0x0fffffff 1st 256M, for MEMORY access (caching enabled)
|
||||
@@ -101,6 +110,7 @@ DBAT0 and IBAT0
|
||||
DBAT1 and IBAT1
|
||||
0x00000000
|
||||
0x0fffffff 2nd 256M, for MEMORY access (caching enabled)
|
||||
```
|
||||
|
||||
UPDATE: (2004/5).
|
||||
The BSP now uses page tables for mapping the entire 512MB
|
||||
@@ -117,6 +127,7 @@ The default VME configuration uses DBAT0 to map
|
||||
more PCI memory space for use by the universe VME
|
||||
bridge:
|
||||
|
||||
```
|
||||
DBAT0
|
||||
0x90000000 PCI memory space <-> VME
|
||||
0x9fffffff
|
||||
@@ -125,5 +136,4 @@ Port VME-Addr Size PCI-Adrs Mode:
|
||||
0: 0x20000000 0x0F000000 0x90000000 A32, Dat, Sup
|
||||
1: 0x00000000 0x00FF0000 0x9F000000 A24, Dat, Sup
|
||||
2: 0x00000000 0x00010000 0x9FFF0000 A16, Dat, Sup
|
||||
|
||||
|
||||
```
|
||||
@@ -1,3 +1,6 @@
|
||||
psim
|
||||
====
|
||||
```
|
||||
BSP NAME: psim
|
||||
BOARD: PowerPC Simulator in GDB (psim)
|
||||
BUS: N/A
|
||||
@@ -7,9 +10,11 @@ COPROCESSORS: N/A
|
||||
MODE: 32 bit mode
|
||||
|
||||
DEBUG MONITOR: BUG mode (emulates Motorola debug monitor)
|
||||
```
|
||||
|
||||
PERIPHERALS
|
||||
===========
|
||||
-----------
|
||||
```
|
||||
TIMERS: PPC internal Timebase register
|
||||
RESOLUTION: ???
|
||||
SERIAL PORTS: simulated via bug
|
||||
@@ -18,26 +23,31 @@ DMA: none
|
||||
VIDEO: none
|
||||
SCSI: none
|
||||
NETWORKING: none
|
||||
```
|
||||
|
||||
DRIVER INFORMATION
|
||||
==================
|
||||
------------------
|
||||
```
|
||||
CLOCK DRIVER: PPC internal
|
||||
IOSUPP DRIVER: N/A
|
||||
SHMSUPP: N/A
|
||||
TIMER DRIVER: PPC internal
|
||||
TTY DRIVER: PPC internal
|
||||
```
|
||||
|
||||
STDIO
|
||||
=====
|
||||
-----
|
||||
```
|
||||
PORT: Console port 0
|
||||
ELECTRICAL: na
|
||||
BAUD: na
|
||||
BITS PER CHARACTER: na
|
||||
PARITY: na
|
||||
STOP BITS: na
|
||||
```
|
||||
|
||||
Notes
|
||||
=====
|
||||
-----
|
||||
The device tree for this BSP is included with rtems-tools and automated
|
||||
testing of psim is supported by the RTEMS Tester. See
|
||||
rtems-tools/tester/rtems/testing/bsps/psim-device-tree for specifics. This
|
||||
@@ -1,3 +1,6 @@
|
||||
mpci
|
||||
====
|
||||
|
||||
This shared memory driver support code works with a modified version
|
||||
of the PowerPC Simulator. The modifications are not yet merged
|
||||
into the mainsteam distribution.
|
||||
@@ -1,3 +1,5 @@
|
||||
qemuppc
|
||||
=======
|
||||
This BSP is designed to operate on the PPC simulator provided by qemu.
|
||||
We are using the Courverture Project's qemu source tree.
|
||||
|
||||
@@ -17,9 +19,11 @@ directory with their modified qemu is:
|
||||
My BASE is /home/joel/qemu-coverage. I configured like this
|
||||
from within the qemu source tree.
|
||||
|
||||
```shell
|
||||
./configure --prefix=/home/joel/qemu-coverage/install
|
||||
make
|
||||
make install
|
||||
```
|
||||
|
||||
This gives all simulated targets supported.
|
||||
|
||||
@@ -1,16 +1,13 @@
|
||||
RTEMS ALTIVEC SUPPORT
|
||||
=====================
|
||||
|
||||
1. History
|
||||
----------
|
||||
altivec
|
||||
=======
|
||||
|
||||
Altivec support was developed and maintained as a user-extension
|
||||
outside of RTEMS. This extension is still available (unbundled)
|
||||
from Till Straumann <strauman@slac.stanford.edu>; it is useful
|
||||
if an application desires 'lazy switching' of the altivec context.
|
||||
|
||||
2. Modes
|
||||
--------
|
||||
Modes
|
||||
-----
|
||||
|
||||
Altivec support -- the unbundled extension, that is -- can be used
|
||||
in two ways:
|
||||
@@ -25,7 +22,7 @@ and mode 'a' ONLY. For mode 'b' you need the unbundled extension
|
||||
(which is completely independent of this code).
|
||||
|
||||
Mode 'a' (All tasks are AltiVec-enabled)
|
||||
- - - - - - - - - - - - - - - - - - - - -
|
||||
----------------------------------------
|
||||
|
||||
The major disadvantage of this mode is that additional overhead is
|
||||
involved: tasks that never use the vector unit still save/restore
|
||||
@@ -41,7 +38,7 @@ The advantage is complete transparency to the user and full ABI
|
||||
compatibility (exept for ISRs and exception handlers), see below.
|
||||
|
||||
Mode 'b' (Only dedicated tasks are AltiVec-enabled)
|
||||
- - - - - - - - - - - - - - - - - - - - - - - - - -
|
||||
---------------------------------------------------
|
||||
|
||||
The advantage of this mode of operation is that the vector-registers
|
||||
are only saved/restored when a different, altivec-enabled task becomes
|
||||
@@ -52,9 +49,9 @@ Note that this mode of operation is not supported by the code
|
||||
in this directory -- you need the unbundled altivec extension
|
||||
mentioned above.
|
||||
|
||||
3. Compiler Options
|
||||
-------------------
|
||||
|
||||
Compiler Options
|
||||
-----------------
|
||||
```
|
||||
Three compiler options affect AltiVec: -maltivec, -mabi=altivec and
|
||||
-mvrsave=yes/no.
|
||||
|
||||
@@ -81,9 +78,10 @@ Three compiler options affect AltiVec: -maltivec, -mabi=altivec and
|
||||
If 'IGNORE_VRSAVE' is undefined then the code *does*
|
||||
use the VRSAVE information but I found that this does
|
||||
not execute noticeably faster.
|
||||
```
|
||||
|
||||
IMPORTANT NOTES
|
||||
===============
|
||||
---------------
|
||||
|
||||
AFAIK, RTEMS uses the EABI which requires a stack alignment of only 8 bytes
|
||||
which is NOT enough for AltiVec (which requires 16-byte alignment).
|
||||
@@ -111,15 +109,16 @@ Compiling with -mvrsave=yes does not produce incompatible code but
|
||||
may have a performance impact (since extra code is produced to maintain
|
||||
VRSAVE).
|
||||
|
||||
4. Multilib Variants
|
||||
--------------------
|
||||
|
||||
Multilib Variants
|
||||
-----------------
|
||||
|
||||
The default GCC configuration for RTEMS contains a -mcpu=7400 multilib
|
||||
variant which is the correct one to choose.
|
||||
|
||||
5. BSP 'custom' file.
|
||||
---------------------
|
||||
|
||||
BSP 'custom' file.
|
||||
------------------
|
||||
Now that you have the necessary newlib and libgcc etc. variants
|
||||
you also need to build RTEMS accordingly.
|
||||
|
||||
@@ -128,15 +127,15 @@ select the desired variant:
|
||||
|
||||
for mode 'a':
|
||||
|
||||
```shell
|
||||
CPU_CFLAGS = ... -mcpu=7400
|
||||
```
|
||||
|
||||
Note that since -maltivec globally defines __ALTIVEC__ RTEMS automatially
|
||||
enables code that takes care of switching the AltiVec context as necessary.
|
||||
This is transparent to application code.
|
||||
|
||||
6. BSP support
|
||||
--------------
|
||||
|
||||
It is the BSP's responsibility to initialize MSR_VE, VSCR and VRSAVE
|
||||
during early boot, ideally before any C-code is executed (because it
|
||||
may, theoretically, use vector instructions).
|
||||
@@ -153,9 +152,8 @@ The BSP must
|
||||
in VRSAVE in this case).
|
||||
- clear VSCR
|
||||
|
||||
7. PSIM note
|
||||
------------
|
||||
|
||||
PSIM note
|
||||
---------
|
||||
PSIM supports the AltiVec instruction set with the exception of
|
||||
the 'data stream' instructions for cache prefetching. The RTEMS
|
||||
altivec support includes run-time checks to skip these instruction
|
||||
@@ -164,7 +162,9 @@ when executing on PSIM.
|
||||
Note that AltiVec support within PSIM must be enabled at 'configure'
|
||||
time by passing the 'configure' option
|
||||
|
||||
```shell
|
||||
--enable-sim-float=altivec
|
||||
```
|
||||
|
||||
Note also that PSIM's AltiVec support has many bugs. It is recommended
|
||||
to apply the patches filed as an attachment with gdb bug report #2461
|
||||
@@ -175,10 +175,14 @@ building RTEMS/psim:
|
||||
|
||||
edit make/custom/psim.cfg and change
|
||||
|
||||
```shell
|
||||
CPU_CFLAGS = ... -mcpu=603e
|
||||
```
|
||||
|
||||
to
|
||||
|
||||
```shell
|
||||
CPU_CFLAGS = ... -mcpu=7400
|
||||
```
|
||||
|
||||
This change must be performed *before* configuring RTEMS/psim.
|
||||
@@ -1,10 +1,13 @@
|
||||
Exceptions
|
||||
==========
|
||||
|
||||
BSP support middleware for 'new-exception' style PPC.
|
||||
|
||||
T. Straumann, 12/2007
|
||||
|
||||
|
||||
EXPLANATION OF SOME TERMS
|
||||
=========================
|
||||
-------------------------
|
||||
|
||||
In this README we refer to exceptions and sometimes
|
||||
to 'interrupts'. Interrupts simply are asynchronous
|
||||
@@ -22,8 +25,9 @@ Asynchronous exceptions/interrupts, OTOH, use a dedicated
|
||||
interrupt stack and defer scheduling until after the last
|
||||
nested ISR has finished.
|
||||
|
||||
|
||||
RATIONALE
|
||||
=========
|
||||
---------
|
||||
The 'new-exception' processing API works at a rather
|
||||
low level. It provides functions for
|
||||
installing low-level code (which must be written in
|
||||
@@ -111,9 +115,9 @@ that they could is beyond doubt...):
|
||||
only deal with EE]). See separate section titled
|
||||
'race condition...' below for a detailed explanation.
|
||||
|
||||
STRUCTURE
|
||||
=========
|
||||
|
||||
STRUCTURE
|
||||
---------
|
||||
The middleware uses exception 'categories' or
|
||||
'flavors' as defined in raw_exception.h.
|
||||
|
||||
@@ -167,10 +171,11 @@ The middleware consists of the following parts:
|
||||
the BSP.
|
||||
|
||||
USAGE
|
||||
=====
|
||||
-----
|
||||
BSP writers must provide the following routines
|
||||
(declared in irq_supp.h):
|
||||
Interrupt controller (PIC) support:
|
||||
```c
|
||||
BSP_setup_the_pic() - initialize PIC hardware
|
||||
BSP_enable_irq_at_pic() - enable/disable given irq at PIC; IGNORE if
|
||||
BSP_disable_irq_at_pic() irq number out of range!
|
||||
@@ -194,6 +199,7 @@ USAGE
|
||||
BSP_panic("cannot initialize exceptions");
|
||||
}
|
||||
BSP_rtems_irq_mngt_set();
|
||||
```
|
||||
|
||||
Note that BSP_rtems_irq_mngt_set() hooks the C_dispatch_irq_handler()
|
||||
to the external and decrementer (PIT exception for bookE; a decrementer
|
||||
@@ -237,24 +243,24 @@ USAGE
|
||||
|
||||
- add
|
||||
|
||||
```shell
|
||||
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h
|
||||
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h
|
||||
|
||||
```
|
||||
to 'include_bsp_HEADERS'
|
||||
|
||||
- add
|
||||
|
||||
```shell
|
||||
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel
|
||||
../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel
|
||||
|
||||
```
|
||||
to 'libbsp_a_LIBADD'
|
||||
|
||||
(irq.c is in a separate '.rel' so that you can get support
|
||||
for exceptions only).
|
||||
|
||||
CAVEATS
|
||||
=======
|
||||
|
||||
-------
|
||||
On classic PPCs, early (and late) parts of the low-level
|
||||
exception handling code run with the MMU disabled which mean
|
||||
that the default caching attributes (write-back) are in effect
|
||||
@@ -283,7 +289,7 @@ this situation is not detected).
|
||||
|
||||
|
||||
RACE CONDITION WHEN DEALING WITH CRITICAL INTERRUPTS
|
||||
====================================================
|
||||
----------------------------------------------------
|
||||
|
||||
The problematic race condition is as follows:
|
||||
|
||||
@@ -411,8 +417,8 @@ RACE CONDITION WHEN DEALING WITH CRITICAL INTERRUPTS
|
||||
use OS primitives and currently there are no
|
||||
asynchronous machine-checks defined.
|
||||
|
||||
Epilogue:
|
||||
|
||||
Epilogue
|
||||
--------
|
||||
You have to disable all asynchronous exceptions which may cause a context
|
||||
switch before the restoring of the SRRs and the RFI. Reason:
|
||||
|
||||
@@ -1,3 +1,6 @@
|
||||
vme
|
||||
===
|
||||
|
||||
libbsp/shared/vmeUniverse/VME.h: VME API; BSP and bridge-chip independent
|
||||
VMEConfig.h: defines BSP specific constants for VME configuration
|
||||
vmeconfig.c configures the VME bridge using the VME.h API calls
|
||||
@@ -1,5 +1,5 @@
|
||||
This is a README file for the Intec SS555 of RTEMS 4.6.0
|
||||
|
||||
Intec SS555
|
||||
===========
|
||||
The SS555 port was sponsored by Defence Research and Development
|
||||
Canada - Suffield, and is Copyright (C) 2004, Real-Time Systems Inc.
|
||||
|
||||
@@ -11,7 +11,7 @@ querbach@realtime.bc.ca
|
||||
|
||||
Summary
|
||||
-------
|
||||
|
||||
```
|
||||
BSP NAME: ss555
|
||||
BOARD: Intec Automation Inc. SS555
|
||||
BUS: None
|
||||
@@ -21,9 +21,11 @@ COPROCESSORS: Built-in Motorola TPU
|
||||
MODE: 32 bit mode
|
||||
|
||||
DEBUG MONITOR: None
|
||||
```
|
||||
|
||||
PERIPHERALS
|
||||
===========
|
||||
-----------
|
||||
```
|
||||
TIMERS: PIT / Timebase
|
||||
RESOLUTION: 1 microsecond (4 MHz crystal / 4)
|
||||
SERIAL PORTS: 2 SCI
|
||||
@@ -32,18 +34,21 @@ DMA: None.
|
||||
VIDEO: None.
|
||||
SCSI: None.
|
||||
NETWORKING: None.
|
||||
|
||||
```
|
||||
|
||||
DRIVER INFORMATION
|
||||
==================
|
||||
------------------
|
||||
```
|
||||
CLOCK DRIVER: yes
|
||||
CONSOLE DRIVER: yes
|
||||
SHMSUPP: N/A
|
||||
TIMER DRIVER: yes
|
||||
NETWORK DRIVER: no
|
||||
```
|
||||
|
||||
NOTES
|
||||
=====
|
||||
-----
|
||||
```
|
||||
On-chip resources:
|
||||
SCI1 serial port
|
||||
SCI2 serial port (console)
|
||||
@@ -71,24 +76,27 @@ On-chip resources:
|
||||
IRQ_LVL5 SCI
|
||||
IRQ_LVL6 PIT
|
||||
IRQ_LVL7
|
||||
|
||||
```
|
||||
|
||||
Board description
|
||||
-----------------
|
||||
```
|
||||
Clock rate: 40 MHz development/embeddable board
|
||||
Bus width: 32-bit on-board RAM, 16-bit off-board I/O
|
||||
FLASH: 512k on-chip
|
||||
RAM: 512k 2-1-1-1 burst SRAM
|
||||
```
|
||||
|
||||
|
||||
Installation
|
||||
------------
|
||||
|
||||
The ss555 port uses the Intec SS555's external RAM in two different ways,
|
||||
depending on whether or not it is built for debugging by giving the
|
||||
VARIANT=DEBUG switch to make:
|
||||
|
||||
```shell
|
||||
make VARIANT=DEBUG all
|
||||
```
|
||||
|
||||
1. In the debugging case, the linker script concanttenates the .text,
|
||||
.data, and .bss sections starting at location zero, so they all can be
|
||||
@@ -104,8 +112,7 @@ forming one large block from the two RAM devices.
|
||||
|
||||
|
||||
Console driver
|
||||
---------------
|
||||
|
||||
--------------
|
||||
This BSP includes an termios-capable asynchronous serial line driver that
|
||||
supports SCI1 and SCI2. The RTEMS console is selected at configuration time
|
||||
with the CONSOLE_MINOR variable (see .../ss555/configure.ac). We default to
|
||||
@@ -150,8 +157,7 @@ I/O and termios.
|
||||
|
||||
|
||||
printk() and debug output
|
||||
-----------------------
|
||||
|
||||
-------------------------
|
||||
The implementation of printk() in RTEMS is mostly independent of most system
|
||||
services. The printk() function can therefore be used to print messages to a
|
||||
debug console, particularly when debugging startup code or device drivers,
|
||||
@@ -173,7 +179,6 @@ rtems_initialize_executive_early().
|
||||
|
||||
Watchdog Timer
|
||||
--------------
|
||||
|
||||
The MPC555 watchdog timer can be enabled at configuration time by defining
|
||||
the WATCHDOG_TIMEOUT variable. This variable sets the watchdog timeout
|
||||
period in steps of
|
||||
@@ -188,14 +193,12 @@ timer is disabled.
|
||||
|
||||
Miscellaneous
|
||||
-------------
|
||||
|
||||
Most code came from the mbx8xx port, except for the floating-point handling
|
||||
which came from the mpc8260ads.
|
||||
|
||||
|
||||
Host System
|
||||
-----------
|
||||
|
||||
The port was developed on an x86 box running Debian 3.0. The toolchain was
|
||||
built from the sources at rtems.org, except for the autotools which came
|
||||
from the Debian distribution.
|
||||
@@ -203,7 +206,7 @@ from the Debian distribution.
|
||||
|
||||
Test Configuration
|
||||
------------------
|
||||
|
||||
```
|
||||
Board: Intec SS555 v1.1
|
||||
CPU: Motorola MPC555LFMZP40, mask 1K83H
|
||||
Clock Speed: Crystal 4.0 MHz, CPU 40.0 MHz
|
||||
@@ -212,11 +215,10 @@ Times Reported in: Microseconds
|
||||
Timer Source: Timebase clock
|
||||
GCC Flags: -O4 -fno-keep-inline-functions -mcpu=(821/860)
|
||||
Console: Operates in polled mode on SMC2. No I/O through EPPC-Bug.
|
||||
|
||||
```
|
||||
|
||||
Test Results
|
||||
------------
|
||||
|
||||
Single processor tests:
|
||||
All tests passed, except that:
|
||||
- sp09 aborts due to memory shortage
|
||||
@@ -1,3 +1,6 @@
|
||||
t32mppc
|
||||
=======
|
||||
|
||||
Board support package for the Lauterbach Trace32 PowerPC simulator.
|
||||
|
||||
http://www.lauterbach.com
|
||||
@@ -1,9 +1,9 @@
|
||||
This is a README file for the tqm8xx BSP
|
||||
|
||||
tqm8xx
|
||||
======
|
||||
|
||||
Summary
|
||||
-------
|
||||
|
||||
```
|
||||
BSP NAME: tqm8xx
|
||||
BOARD: various boards based on TQ Components TQM8xx modules
|
||||
BUS: No backplane.
|
||||
@@ -13,9 +13,11 @@ COPROCESSORS: Built-in Motorola QUICC
|
||||
MODE: 32 bit mode
|
||||
|
||||
BOOT MONITOR: TQMon
|
||||
```
|
||||
|
||||
PERIPHERALS
|
||||
===========
|
||||
-----------
|
||||
```
|
||||
TIMERS: PIT / Timebase
|
||||
RESOLUTION: 1 microsecond / frequency = clock-speed / 16
|
||||
SERIAL PORTS: 1-4 SCCs, 1-2 SMC
|
||||
@@ -25,18 +27,22 @@ VIDEO: <none>
|
||||
SCSI: <none>
|
||||
NETWORKING: Ethernet 10 Mbps on SCC1 and/or
|
||||
10/100Mbps on FEC (for MPC866T)
|
||||
|
||||
```
|
||||
|
||||
|
||||
DRIVER INFORMATION
|
||||
==================
|
||||
------------------
|
||||
```
|
||||
CLOCK DRIVER: yes
|
||||
CONSOLE DRIVER: yes
|
||||
SHMSUPP: N/A
|
||||
TIMER DRIVER: yes
|
||||
NETWORK DRIVER: yes
|
||||
```
|
||||
|
||||
NOTES
|
||||
=====
|
||||
-----
|
||||
```
|
||||
On-chip resources:
|
||||
SCC1 network or serial port
|
||||
SCC2 serial port
|
||||
@@ -79,25 +85,19 @@ On-chip resources:
|
||||
IRQ_LVL5
|
||||
IRQ_LVL6
|
||||
IRQ_LVL7
|
||||
|
||||
```
|
||||
|
||||
Board description
|
||||
-----------------
|
||||
```
|
||||
Clock rate: 50MHz - 133MHz.
|
||||
Bus width: 32 bit Flash, 32 bit DRAM
|
||||
FLASH: 2-8MB
|
||||
RAM: 32-256MB SDRAM
|
||||
```
|
||||
|
||||
|
||||
Installation
|
||||
------------
|
||||
<tbd>
|
||||
|
||||
|
||||
Port Description
|
||||
Console driver
|
||||
---------------
|
||||
|
||||
This BSP contains a console driver for polled and interrupt-driven
|
||||
operation. It supports SCCs and SMCs.
|
||||
During BSP configuration, various variables can be set to activate a
|
||||
@@ -108,13 +108,9 @@ CONS_MODE_UNUSED, CONS_MODE_POLLED or CONS_MODE_IRQ
|
||||
|
||||
The driver always uses termios.
|
||||
|
||||
printk() and debug output
|
||||
-----------------------
|
||||
<tbd>
|
||||
|
||||
Floating-point
|
||||
--------------
|
||||
|
||||
The MPC8xx do not have floating-point units. All code should
|
||||
get compiled with the appropriate -mcpu flag. The nof variants of the gcc
|
||||
runtime libraries should be used for linking.
|
||||
@@ -123,15 +119,15 @@ runtime libraries should be used for linking.
|
||||
|
||||
Miscellaneous
|
||||
-------------
|
||||
|
||||
All development was based on the mbx8xx and gen68360 port.
|
||||
|
||||
Test Configuration
|
||||
------------------
|
||||
|
||||
Board: pghplus (
|
||||
```
|
||||
Board: pghplus
|
||||
CPU: Motorola MPC866T
|
||||
Clock Speed: 133MHz
|
||||
RAM: 64MByte
|
||||
Cache Configuration: Instruction cache on; data cache on, copyback mode.
|
||||
```
|
||||
|
||||
@@ -1,5 +1,6 @@
|
||||
# Adapted from vitex BSP
|
||||
|
||||
virtex
|
||||
======
|
||||
```
|
||||
BSP NAME: Virtex
|
||||
BOARD: Xilinx ML-403 and (hopefully) any vitex/PPC based board
|
||||
BUS: N/A
|
||||
@@ -9,9 +10,11 @@ COPROCESSORS: N/A
|
||||
MODE: 32 bit mode
|
||||
|
||||
DEBUG MONITOR:
|
||||
```
|
||||
|
||||
PERIPHERALS
|
||||
===========
|
||||
-----------
|
||||
```
|
||||
TIMERS: 405GP internal
|
||||
SERIAL PORTS: Xilinx consolelite
|
||||
REAL-TIME CLOCK: none
|
||||
@@ -19,38 +22,41 @@ DMA: Xilinx vitex internal
|
||||
VIDEO: none
|
||||
SCSI: none
|
||||
NETWORKING: Xilinx TEMAC
|
||||
```
|
||||
|
||||
DRIVER INFORMATION
|
||||
==================
|
||||
------------------
|
||||
```
|
||||
CLOCK DRIVER: PPC Decrementer
|
||||
IOSUPP DRIVER: N/A
|
||||
SHMSUPP: N/A
|
||||
TIMER DRIVER: N/A
|
||||
TTY DRIVER: consoleelite
|
||||
```
|
||||
|
||||
STDIO
|
||||
=====
|
||||
-----
|
||||
```
|
||||
PORT: Console port 0
|
||||
ELECTRICAL: RS-232
|
||||
BAUD: as defined in FPGA design
|
||||
BITS PER CHARACTER: 8
|
||||
PARITY: None
|
||||
STOP BITS: 1
|
||||
|
||||
Notes
|
||||
=====
|
||||
```
|
||||
|
||||
Board description
|
||||
-----------------
|
||||
```
|
||||
clock rate: 234 MHz
|
||||
ROM: 16MByte FLASH
|
||||
RAM: 64MByte DRAM
|
||||
```
|
||||
|
||||
Virtex only supports single processor operations.
|
||||
|
||||
Configuration
|
||||
-------------
|
||||
|
||||
This board support package is written for a typical virtex/PPC FPGA
|
||||
system. The rough features of such a board are described above.
|
||||
|
||||
@@ -68,6 +74,7 @@ For adapting this BSP to other boards, you can specify several configuration
|
||||
options at the configure command line (use "./configure --help" in this
|
||||
directory). Here is an example for the top-level configure invocation:
|
||||
|
||||
```shell
|
||||
/path/to/rtems/sources/configure \
|
||||
--target=powerpc-rtems4.11 \
|
||||
--enable-rtemsbsp=virtex \
|
||||
@@ -79,3 +86,4 @@ directory). Here is an example for the top-level configure invocation:
|
||||
VIRTEX_RAM_ORIGIN=0xfffc0000 \
|
||||
VIRTEX_RAM_LENGTH=0x3ffec \
|
||||
VIRTEX_RESET_ORIGIN=0xffffffec
|
||||
```
|
||||
@@ -1,5 +1,8 @@
|
||||
# Adapted from virtex BSP
|
||||
virtex4
|
||||
=======
|
||||
Adapted from virtex BSP
|
||||
|
||||
```
|
||||
BSP NAME: virtex4
|
||||
BOARD: N/A
|
||||
BUS: N/A
|
||||
@@ -9,9 +12,11 @@ COPROCESSORS: N/A
|
||||
MODE: 32 bit mode
|
||||
|
||||
DEBUG MONITOR:
|
||||
```
|
||||
|
||||
PERIPHERALS
|
||||
===========
|
||||
-----------
|
||||
```
|
||||
TIMERS: 405 internal
|
||||
SERIAL PORTS: none
|
||||
REAL-TIME CLOCK: none
|
||||
@@ -19,32 +24,35 @@ DMA: Xilinx virtex internal
|
||||
VIDEO: none
|
||||
SCSI: none
|
||||
NETWORKING: none
|
||||
```
|
||||
|
||||
DRIVER INFORMATION
|
||||
==================
|
||||
------------------
|
||||
```
|
||||
CLOCK DRIVER: PPC Decrementer
|
||||
IOSUPP DRIVER: N/A
|
||||
SHMSUPP: N/A
|
||||
TIMER DRIVER: N/A
|
||||
TTY DRIVER: N/A
|
||||
```
|
||||
|
||||
STDIO
|
||||
=====
|
||||
-----
|
||||
PORT: N/A
|
||||
ELECTRICAL: N/A
|
||||
BAUD: N/A
|
||||
BITS PER CHARACTER: N/A
|
||||
PARITY: N/A
|
||||
STOP BITS: N/A
|
||||
|
||||
Notes
|
||||
=====
|
||||
```
|
||||
|
||||
Board description
|
||||
-----------------
|
||||
```
|
||||
clock rate: 350 MHz
|
||||
ROM: N/A
|
||||
RAM: 128MByte DRAM
|
||||
```
|
||||
|
||||
Virtex only supports single processor operations.
|
||||
|
||||
@@ -1,5 +1,8 @@
|
||||
# Adapted from virtex BSP
|
||||
virtex5
|
||||
=======
|
||||
Adapted from virtex BSP
|
||||
|
||||
```
|
||||
BSP NAME: virtex5
|
||||
BOARD: N/A
|
||||
BUS: N/A
|
||||
@@ -9,9 +12,11 @@ COPROCESSORS: N/A
|
||||
MODE: 32 bit mode
|
||||
|
||||
DEBUG MONITOR:
|
||||
```
|
||||
|
||||
PERIPHERALS
|
||||
===========
|
||||
-----------
|
||||
```
|
||||
TIMERS: 440 internal
|
||||
SERIAL PORTS: none
|
||||
REAL-TIME CLOCK: none
|
||||
@@ -19,26 +24,28 @@ DMA: Xilinx virtex internal
|
||||
VIDEO: none
|
||||
SCSI: none
|
||||
NETWORKING: none
|
||||
```
|
||||
|
||||
DRIVER INFORMATION
|
||||
==================
|
||||
------------------
|
||||
```
|
||||
CLOCK DRIVER: PPC Decrementer
|
||||
IOSUPP DRIVER: N/A
|
||||
SHMSUPP: N/A
|
||||
TIMER DRIVER: N/A
|
||||
TTY DRIVER: N/A
|
||||
```
|
||||
|
||||
STDIO
|
||||
=====
|
||||
-----
|
||||
```
|
||||
PORT: N/A
|
||||
ELECTRICAL: N/A
|
||||
BAUD: N/A
|
||||
BITS PER CHARACTER: N/A
|
||||
PARITY: N/A
|
||||
STOP BITS: N/A
|
||||
|
||||
Notes
|
||||
=====
|
||||
```
|
||||
|
||||
Board description
|
||||
-----------------
|
||||
@@ -1,6 +1,8 @@
|
||||
# Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de)
|
||||
#
|
||||
gensh1
|
||||
======
|
||||
Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de)
|
||||
|
||||
```
|
||||
BSP NAME: generic SH1 (gensh1)
|
||||
BOARD: n/a
|
||||
BUS: n/a
|
||||
@@ -10,9 +12,11 @@ COPROCESSORS: none
|
||||
MODE: n/a
|
||||
|
||||
DEBUG MONITOR: gdb
|
||||
```
|
||||
|
||||
PERIPHERALS
|
||||
===========
|
||||
-----------
|
||||
```
|
||||
TIMERS: on-chip
|
||||
RESOLUTION: cf. Hitachi SH 703X Hardware Manual (Phi/4)
|
||||
SERIAL PORTS: on-chip (with 2 ports)
|
||||
@@ -21,27 +25,31 @@ DMA: not used
|
||||
VIDEO: none
|
||||
SCSI: none
|
||||
NETWORKING: none
|
||||
```
|
||||
|
||||
DRIVER INFORMATION
|
||||
==================
|
||||
------------------
|
||||
```
|
||||
CLOCK DRIVER: on-chip timer
|
||||
IOSUPP DRIVER: default
|
||||
SHMSUPP: default
|
||||
TIMER DRIVER: on-chip timer
|
||||
TTY DRIVER: /dev/null (stub)
|
||||
```
|
||||
|
||||
STDIO
|
||||
=====
|
||||
-----
|
||||
```
|
||||
PORT: /dev/null (stub)
|
||||
ELECTRICAL: n/a
|
||||
BAUD: n/a
|
||||
BITS PER CHARACTER: n/a
|
||||
PARITY: n/a
|
||||
STOP BITS: n/a
|
||||
```
|
||||
|
||||
NOTES
|
||||
=====
|
||||
|
||||
-----
|
||||
(1) The stub console driver (null) is enabled by default.
|
||||
|
||||
(2) The driver for the on-chip serial devices (sci) is still in its infancy
|
||||
@@ -1,8 +1,12 @@
|
||||
# Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de)
|
||||
# Adapted by: John Mills (jmills@tga.com)
|
||||
# Corrections: Radzislaw Galler (rgaller@et.put.poznan.pl)
|
||||
gensh2
|
||||
======
|
||||
|
||||
Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de)
|
||||
Adapted by: John Mills (jmills@tga.com)
|
||||
Corrections: Radzislaw Galler (rgaller@et.put.poznan.pl)
|
||||
|
||||
|
||||
```
|
||||
BSP NAME: generic SH2 (gensh2)
|
||||
BOARD: EVB7045F (note 2)
|
||||
BUS: n/a
|
||||
@@ -12,9 +16,11 @@ COPROCESSORS: none
|
||||
MODE: n/a
|
||||
|
||||
DEBUG MONITOR: gdb
|
||||
```
|
||||
|
||||
PERIPHERALS
|
||||
===========
|
||||
-----------
|
||||
```
|
||||
TIMERS: on-chip
|
||||
RESOLUTION: cf. Hitachi SH 704X Hardware Manual (Phi/16)
|
||||
SERIAL PORTS: on-chip (with 2 ports)
|
||||
@@ -23,27 +29,31 @@ DMA: not used
|
||||
VIDEO: none
|
||||
SCSI: none
|
||||
NETWORKING: none
|
||||
```
|
||||
|
||||
DRIVER INFORMATION
|
||||
==================
|
||||
------------------
|
||||
```
|
||||
CLOCK DRIVER: on-chip timer
|
||||
IOSUPP DRIVER: default
|
||||
SHMSUPP: default
|
||||
TIMER DRIVER: on-chip timer
|
||||
TTY DRIVER: /dev/console
|
||||
```
|
||||
|
||||
STDIO
|
||||
=====
|
||||
-----
|
||||
```
|
||||
PORT: /dev/sci0
|
||||
ELECTRICAL: SCI0
|
||||
BAUD: 9600
|
||||
BITS PER CHARACTER: 8
|
||||
PARITY: NONE
|
||||
STOP BITS: 1
|
||||
```
|
||||
|
||||
NOTES
|
||||
=====
|
||||
|
||||
-----
|
||||
(1) The present 'hw_init.c' file provides 'early_hw_init'(void) which
|
||||
is normally called from 'start.S' to provide such minimal HW setup
|
||||
as is conveniently written in 'C' and can make use of global
|
||||
@@ -1,8 +1,12 @@
|
||||
# Author: Alexandra Kossovsky <sasha@oktet.ru>
|
||||
# Victor Vengerov <vvv@oktet.ru>
|
||||
# OKTET Ltd, http://www.oktet.ru
|
||||
#
|
||||
gensh4
|
||||
======
|
||||
|
||||
Author: Alexandra Kossovsky <sasha@oktet.ru>
|
||||
Victor Vengerov <vvv@oktet.ru>
|
||||
OKTET Ltd, http://www.oktet.ru
|
||||
|
||||
|
||||
```
|
||||
BSP NAME: generic SH4 (gensh4)
|
||||
BOARD: n/a
|
||||
BUS: n/a
|
||||
@@ -12,9 +16,11 @@ COPROCESSORS: none
|
||||
MODE: n/a
|
||||
|
||||
DEBUG MONITOR: gdb (sh-ipl-g+ loader/stub)
|
||||
```
|
||||
|
||||
PERIPHERALS
|
||||
===========
|
||||
-----------
|
||||
```
|
||||
TIMERS: on-chip
|
||||
SERIAL PORTS: on-chip (with 2 ports)
|
||||
REAL-TIME CLOCK: none
|
||||
@@ -22,27 +28,31 @@ DMA: not used
|
||||
VIDEO: none
|
||||
SCSI: none
|
||||
NETWORKING: none
|
||||
```
|
||||
|
||||
DRIVER INFORMATION
|
||||
==================
|
||||
------------------
|
||||
```
|
||||
CLOCK DRIVER: on-chip timer
|
||||
IOSUPP DRIVER: default
|
||||
SHMSUPP: n/a
|
||||
TIMER DRIVER: on-chip timer
|
||||
TTY DRIVER: /dev/console
|
||||
```
|
||||
|
||||
STDIO
|
||||
=====
|
||||
-----
|
||||
```
|
||||
PORT: /dev/console
|
||||
ELECTRICAL: n/a
|
||||
BAUD: n/a
|
||||
BITS PER CHARACTER: n/a
|
||||
PARITY: n/a
|
||||
STOP BITS: n/a
|
||||
```
|
||||
|
||||
NOTES
|
||||
=====
|
||||
|
||||
-----
|
||||
(1) Driver for the on-chip serial devices is tested only with 1st serial
|
||||
port. We cannot test it on serial port with FIFO.
|
||||
|
||||
@@ -88,4 +98,3 @@ NOTES
|
||||
|
||||
(7) This project was done in cooperation with Transas company
|
||||
http://www.transas.com
|
||||
|
||||
@@ -1,16 +1,20 @@
|
||||
shsim
|
||||
=====
|
||||
|
||||
Simple BSP for the SH simulator built into gdb.
|
||||
|
||||
Simulator Invocation
|
||||
====================
|
||||
--------------------
|
||||
```shell
|
||||
sh-rtems[elf|]-gdb <executable>
|
||||
(gdb) target sim
|
||||
(gdb) set archi [sh|sh2]
|
||||
(gdb) load <executable>
|
||||
(gdb) run
|
||||
```
|
||||
|
||||
Status
|
||||
======
|
||||
|
||||
------
|
||||
* The simulator invocation procedure outlined above produces error messages
|
||||
with gdb-5.0, nevertheless seems to work. With gdb versions > 5.0 these
|
||||
error messages are gone. I.e. if you plan to seriously work with the gdb
|
||||
@@ -1,3 +1,6 @@
|
||||
serial
|
||||
======
|
||||
|
||||
This is the serial controller portion of the libchip library. This
|
||||
directory contains the source code for reusable console driver
|
||||
support code. Each individual driver is configured using the
|
||||
+2
-5
@@ -1,6 +1,5 @@
|
||||
/* $FreeBSD$ */
|
||||
/*-
|
||||
|
||||
EFI
|
||||
===
|
||||
Files in this directory and subdirectories are subject to the following
|
||||
copyright unless superceded or supplemented by additional specific license
|
||||
terms found in the file headers of individual files.
|
||||
@@ -32,5 +31,3 @@ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
OF THE POSSIBILITY OF SUCH DAMAGE. THE EFI SPECIFICATION AND ALL
|
||||
OTHER INFORMATION ON THIS WEB SITE ARE PROVIDED "AS IS" WITH NO
|
||||
WARRANTIES, AND ARE SUBJECT TO CHANGE WITHOUT NOTICE.
|
||||
|
||||
*/
|
||||
@@ -1,3 +1,5 @@
|
||||
shmdr
|
||||
=====
|
||||
The mpci.h file provided in here is too simple for an MPCI with
|
||||
multiple ways to get to a node.
|
||||
|
||||
@@ -1,7 +1,9 @@
|
||||
#
|
||||
# Description of SIS as related to this BSP
|
||||
#
|
||||
erc32
|
||||
=====
|
||||
Description of SIS as related to this BSP
|
||||
|
||||
|
||||
```
|
||||
BSP NAME: sis
|
||||
BOARD: any based on the European Space Agency's ERC32
|
||||
BUS: N/A
|
||||
@@ -12,9 +14,11 @@ COPROCESSORS: on-chip 602 compatible FPU
|
||||
MODE: 32 bit mode
|
||||
|
||||
DEBUG MONITOR: none
|
||||
```
|
||||
|
||||
PERIPHERALS
|
||||
===========
|
||||
-----------
|
||||
```
|
||||
TIMERS:
|
||||
NAME: General Purpose Timer
|
||||
RESOLUTION: 50 nanoseconds - 12.8 microseconds
|
||||
@@ -28,27 +32,31 @@ DMA: on-chip
|
||||
VIDEO: none
|
||||
SCSI: none
|
||||
NETWORKING: none
|
||||
```
|
||||
|
||||
DRIVER INFORMATION
|
||||
==================
|
||||
------------------
|
||||
```
|
||||
CLOCK DRIVER: ERC32 internal Real Time Clock Timer
|
||||
IOSUPP DRIVER: N/A
|
||||
SHMSUPP: N/A
|
||||
TIMER DRIVER: ERC32 internal General Purpose Timer
|
||||
CONSOLE DRIVER: ERC32 internal UART
|
||||
```
|
||||
|
||||
STDIO
|
||||
=====
|
||||
-----
|
||||
```
|
||||
PORT: Channel A
|
||||
ELECTRICAL: na since using simulator
|
||||
BAUD: na
|
||||
BITS PER CHARACTER: na
|
||||
PARITY: na
|
||||
STOP BITS: na
|
||||
```
|
||||
|
||||
Notes
|
||||
=====
|
||||
|
||||
-----
|
||||
ERC32 BSP only supports single processor operations.
|
||||
|
||||
A nice feature of this BSP is that the RAM and PROM size are set in the
|
||||
@@ -63,8 +71,8 @@ against sis v1.7.
|
||||
|
||||
|
||||
Memory Map
|
||||
==========
|
||||
|
||||
----------
|
||||
```
|
||||
0x00000000 - 0x00000000 + _PROM_SIZE code and initialized data
|
||||
0x01f80000 on chip peripherals
|
||||
0x00000000 - 0x02000000 + _RAM_SIZE destination for initialized data
|
||||
@@ -75,4 +83,5 @@ Memory Map
|
||||
The C heap is assigned all memory between the end of the BSS and the
|
||||
RTEMS Workspace. The size of the RTEMS Workspace is based on that
|
||||
specified in the application's configuration table.
|
||||
```
|
||||
|
||||
@@ -1,7 +1,9 @@
|
||||
#
|
||||
# Description of SIS as related to this BSP
|
||||
#
|
||||
leon2
|
||||
=====
|
||||
Description of SIS as related to this BSP
|
||||
|
||||
|
||||
```
|
||||
BSP NAME: sis
|
||||
BOARD: any based on the European Space Agency's ERC32
|
||||
BUS: N/A
|
||||
@@ -12,9 +14,11 @@ COPROCESSORS: on-chip 602 compatible FPU
|
||||
MODE: 32 bit mode
|
||||
|
||||
DEBUG MONITOR: none
|
||||
```
|
||||
|
||||
PERIPHERALS
|
||||
===========
|
||||
-----------
|
||||
```
|
||||
TIMERS:
|
||||
NAME: General Purpose Timer
|
||||
RESOLUTION: 50 nanoseconds - 12.8 microseconds
|
||||
@@ -28,27 +32,31 @@ DMA: on-chip
|
||||
VIDEO: none
|
||||
SCSI: none
|
||||
NETWORKING: none
|
||||
```
|
||||
|
||||
DRIVER INFORMATION
|
||||
==================
|
||||
------------------
|
||||
```
|
||||
CLOCK DRIVER: ERC32 internal Real Time Clock Timer
|
||||
IOSUPP DRIVER: N/A
|
||||
SHMSUPP: N/A
|
||||
TIMER DRIVER: ERC32 internal General Purpose Timer
|
||||
CONSOLE DRIVER: ERC32 internal UART
|
||||
```
|
||||
|
||||
STDIO
|
||||
=====
|
||||
-----
|
||||
```
|
||||
PORT: Channel A
|
||||
ELECTRICAL: na since using simulator
|
||||
BAUD: na
|
||||
BITS PER CHARACTER: na
|
||||
PARITY: na
|
||||
STOP BITS: na
|
||||
```
|
||||
|
||||
Notes
|
||||
=====
|
||||
|
||||
-----
|
||||
ERC32 BSP only supports single processor operations.
|
||||
|
||||
A nice feature of this BSP is that the RAM and PROM size are set in the
|
||||
@@ -63,8 +71,8 @@ against sis v1.7.
|
||||
|
||||
|
||||
Memory Map
|
||||
==========
|
||||
|
||||
----------
|
||||
```
|
||||
0x00000000 - 0x00000000 + _PROM_SIZE code and initialized data
|
||||
0x01f80000 on chip peripherals
|
||||
0x00000000 - 0x02000000 + _RAM_SIZE destination for initialized data
|
||||
@@ -75,4 +83,5 @@ Memory Map
|
||||
The C heap is assigned all memory between the end of the BSS and the
|
||||
RTEMS Workspace. The size of the RTEMS Workspace is based on that
|
||||
specified in the application's configuration table.
|
||||
```
|
||||
|
||||
@@ -1,22 +1,19 @@
|
||||
#
|
||||
# LEON3 BSP README
|
||||
#
|
||||
#
|
||||
#
|
||||
|
||||
leon3
|
||||
=====
|
||||
```
|
||||
BSP NAME: leon3
|
||||
BUS: AMBA Plug & Play
|
||||
CPU FAMILY: sparc
|
||||
CPU: LEON3
|
||||
|
||||
```
|
||||
|
||||
DRIVERS
|
||||
=======
|
||||
Timer Driver, Console Driver, Opencores Ethernet Driver
|
||||
|
||||
Notes
|
||||
=====
|
||||
|
||||
Notes
|
||||
-----
|
||||
This BSP supports single LEON3-processor system with minimum peripheral
|
||||
configuration of one UART. BSP reads system configuration area to get
|
||||
information such as memory mapping and usage of interrupt resources and
|
||||
@@ -32,4 +29,3 @@ Interrupt request signal can not be shared with other devices.
|
||||
Ethernet MAC core can be mapped in arbitrary memory address space and use
|
||||
arbitrary interrupt request signal. Interrupt request signal can not be
|
||||
shared with other devices.
|
||||
|
||||
@@ -1,3 +1,5 @@
|
||||
mpci
|
||||
====
|
||||
This should describe how to use SHM in a multiprocessor LEON3
|
||||
configuration.
|
||||
|
||||
@@ -1,3 +1,6 @@
|
||||
niagara
|
||||
=======
|
||||
```
|
||||
BSP NAME: niagara
|
||||
BOARD:
|
||||
BUS: n/a
|
||||
@@ -7,9 +10,11 @@ COPROCESSORS:
|
||||
MODE: n/a
|
||||
|
||||
DEBUG MONITOR:
|
||||
```
|
||||
|
||||
PERIPHERALS
|
||||
===========
|
||||
-----------
|
||||
```
|
||||
TIMERS: TICK and STICK registers (ASRs 4 and 24)
|
||||
RESOLUTION: CPU clock resolution
|
||||
SERIAL PORTS:
|
||||
@@ -18,33 +23,38 @@ DMA: none
|
||||
VIDEO: none
|
||||
SCSI: none
|
||||
NETWORKING: none
|
||||
```
|
||||
|
||||
DRIVER INFORMATION
|
||||
==================
|
||||
------------------
|
||||
```
|
||||
CLOCK DRIVER:
|
||||
IOSUPP DRIVER:
|
||||
SHMSUPP:
|
||||
TIMER DRIVER:
|
||||
TTY DRIVER:
|
||||
```
|
||||
|
||||
STDIO
|
||||
=====
|
||||
-----
|
||||
```
|
||||
PORT:
|
||||
ELECTRICAL:
|
||||
BAUD:
|
||||
BITS PER CHARACTER:
|
||||
PARITY:
|
||||
STOP BITS:
|
||||
```
|
||||
|
||||
NOTES
|
||||
=====
|
||||
|
||||
Board description
|
||||
-----------------
|
||||
```
|
||||
clock rate:
|
||||
bus width:
|
||||
ROM:
|
||||
RAM:
|
||||
```
|
||||
|
||||
This BSP is designed to operate on the UltraSPARC T1 (Niagara) SPARC64
|
||||
and similar processors.
|
||||
@@ -62,4 +72,3 @@ https://www.simics.net/
|
||||
M5:
|
||||
An open-source simulator.
|
||||
http://www.m5sim.org/wiki/index.php/Main_Page
|
||||
|
||||
@@ -1,3 +1,6 @@
|
||||
HelenOS
|
||||
=======
|
||||
|
||||
The sources in this directory are from the HelenOS project.
|
||||
See: http://www.helenos.org
|
||||
|
||||
@@ -1,3 +1,6 @@
|
||||
usiii
|
||||
=====
|
||||
```
|
||||
BSP NAME: usiii
|
||||
BOARD:
|
||||
BUS: n/a
|
||||
@@ -7,9 +10,11 @@ COPROCESSORS:
|
||||
MODE: n/a
|
||||
|
||||
DEBUG MONITOR:
|
||||
```
|
||||
|
||||
PERIPHERALS
|
||||
===========
|
||||
-----------
|
||||
```
|
||||
TIMERS: TICK register (ASR 4)
|
||||
RESOLUTION: CPU clock resolution
|
||||
SERIAL PORTS:
|
||||
@@ -18,26 +23,28 @@ DMA: none
|
||||
VIDEO: none
|
||||
SCSI: none
|
||||
NETWORKING: none
|
||||
```
|
||||
|
||||
DRIVER INFORMATION
|
||||
==================
|
||||
------------------
|
||||
```
|
||||
CLOCK DRIVER:
|
||||
IOSUPP DRIVER:
|
||||
SHMSUPP:
|
||||
TIMER DRIVER:
|
||||
TTY DRIVER:
|
||||
```
|
||||
|
||||
STDIO
|
||||
=====
|
||||
-----
|
||||
```
|
||||
PORT:
|
||||
ELECTRICAL:
|
||||
BAUD:
|
||||
BITS PER CHARACTER:
|
||||
PARITY:
|
||||
STOP BITS:
|
||||
|
||||
NOTES
|
||||
=====
|
||||
```
|
||||
|
||||
Board description
|
||||
-----------------
|
||||
@@ -54,4 +61,3 @@ This BSP has been run on the Simics simulator with the serengeti target.
|
||||
Simics:
|
||||
A commercially available simulator licensed by Virtutech.
|
||||
https://www.simics.net/
|
||||
|
||||
@@ -1,3 +1,5 @@
|
||||
gdbv850sim
|
||||
==========
|
||||
This directory contains a family of BSPs for the v850 simulator
|
||||
found in the GNU Debugger. A variant is provided for each CPU
|
||||
model option flag found in the GCC SVN head as of 30 May 2012.
|
||||
Reference in New Issue
Block a user