mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
synced 2025-12-20 03:05:47 +08:00
bsps/motorola_powerpc: Change defines from BSP names to avoid clash
- Change mvme2100 to mot_pcc_mvme2100 to avoid clashing with the RTEMS_BSP value for the BSP. You cannot have a define that is the BSP name.
This commit is contained in:
@@ -37,7 +37,7 @@
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* @{
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*/
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#if 1
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#if 1
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#define ISA8259_M_ELCR 0x4d0
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#define ISA8259_S_ELCR 0x4d1
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#endif
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@@ -169,7 +169,7 @@ extern "C" {
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/** @} */
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#if defined(mvme2100)
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#if defined(mot_ppc_mvme2100)
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#define BSP_DEC21143_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 1)
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#define BSP_PMC_PCMIP_TYPE1_SLOT0_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 2)
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#define BSP_PCMIP_TYPE1_SLOT1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 3)
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@@ -89,7 +89,7 @@ extern "C" {
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*/
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/* fundamental addresses for BSP (CHRPxxx and PREPxxx are from libcpu/io.h) */
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#if defined(mvme2100)
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#if defined(mot_ppc_mvme2100)
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#define _IO_BASE CHRP_ISA_IO_BASE
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#define _ISA_MEM_BASE CHRP_ISA_MEM_BASE
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/* address of our ram on the PCI bus */
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@@ -154,7 +154,7 @@ extern "C" {
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* find out what it is which is VERY different from other Motorola boards.
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*/
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#if defined(mvme2100)
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#if defined(mot_ppc_mvme2100)
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#define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x01e10000)
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/* #define BSP_UART_IOBASE_COM1 (0xffe10000) */
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#define BSP_OPEN_PIC_BASE_OFFSET 0x40000
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@@ -169,7 +169,7 @@ extern "C" {
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#define BSP_VGA_IOBASE ((_IO_BASE)+0x3c0)
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#endif
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#if defined(mvme2300) || defined(mvme2307) || defined(mvme2700)
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#if defined(mvme2300) || defined(mot_ppc_mvme2307) || defined(mot_ppc_mvme2700)
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#define MVME_HAS_DEC21140
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#endif
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#endif
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@@ -66,7 +66,7 @@
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* available and unused!
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*/
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#if defined(mvme2100)
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#if defined(mot_ppc_mvme2100)
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#define _VME_A32_WIN0_ON_PCI 0x90000000
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#define _VME_A24_ON_PCI 0x9f000000
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#define _VME_A16_ON_PCI 0x9fff0000
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@@ -133,7 +133,7 @@ extern "C" {
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#define BSP_PCI_ISA_BRIDGE_IRQ (BSP_PCI_IRQ0)
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#endif
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#if defined(mvme2100)
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#if defined(mot_ppc_mvme2100)
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#define BSP_DEC21143_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 1)
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#define BSP_PMC_PCMIP_TYPE1_SLOT0_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 2)
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#define BSP_PCMIP_TYPE1_SLOT1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 3)
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@@ -16,7 +16,7 @@ void bsp_reset(void)
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CPU_print_stack();
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/* shutdown and reboot */
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#if defined(mvme2100)
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#if defined(mot_ppc_mvme2100)
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*(unsigned char*)0xffe00000 |= 0x80;
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#else
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/* Memory-mapped Port 92 PIB device access
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@@ -109,7 +109,7 @@ char *save_boot_params(
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return loaderParam;
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}
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#if defined(mvme2100)
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#if defined(mot_ppc_mvme2100)
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unsigned int EUMBBAR;
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/*
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@@ -130,7 +130,7 @@ uint32_t _CPU_Counter_frequency(void)
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static void bsp_early( void )
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{
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#if !defined(mvme2100)
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#if !defined(mot_ppc_mvme2100)
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unsigned l2cr;
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#endif
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prep_t boardManufacturer;
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@@ -149,7 +149,7 @@ static void bsp_early( void )
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* Init MMU block address translation to enable hardware access
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*/
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#if !defined(mvme2100)
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#if !defined(mot_ppc_mvme2100)
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/*
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* PC legacy IO space used for inb/outb and all PC compatible hardware
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*/
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@@ -173,7 +173,7 @@ static void bsp_early( void )
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setdbat(3, 0xb0000000, 0xb0000000, 0x10000000, IO_PAGE);
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#endif
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#if defined(mvme2100)
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#if defined(mot_ppc_mvme2100)
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/* Need 0xfec00000 mapped for this */
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EUMBBAR = get_eumbbar();
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#endif
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@@ -200,7 +200,7 @@ static void bsp_early( void )
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#endif
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#if !defined(mvme2100)
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#if !defined(mot_ppc_mvme2100)
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/*
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* Enable L2 Cache. Note that the set_L2CR(L2CR) codes checks for
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* relevant CPU type (mpc750)...
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@@ -368,7 +368,7 @@ motorolaBoard getMotorolaBoard(void)
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*
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* NOTE: Every path must set currentBoard.
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*/
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#if defined(mvme2100)
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#if defined(mot_ppc_mvme2100)
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currentBoard = (motorolaBoard) MVME_2100;
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#else
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unsigned char cpu_type;
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@@ -98,7 +98,7 @@ static rtems_irq_prio irqPrioTable[BSP_IRQ_NUMBER]={
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};
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#if BSP_PCI_IRQ_NUMBER > 0
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#if defined(mvme2100)
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#if defined(mot_ppc_mvme2100)
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static unsigned char mvme2100_openpic_initpolarities[16] = {
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0, /* Not used - should be disabled */
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0, /* DEC21143 Controller */
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@@ -276,7 +276,7 @@ loop_exit:
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*/
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void BSP_rtems_irq_mng_init(unsigned cpuId)
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{
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#if BSP_ISA_IRQ_NUMBER > 0 && !defined(mvme2100)
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#if BSP_ISA_IRQ_NUMBER > 0 && !defined(mot_ppc_mvme2100)
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int known_cpi_isa_bridge = 0;
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#endif
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int i;
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@@ -285,7 +285,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId)
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/*
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* First initialize the Interrupt management hardware
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*/
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#if defined(mvme2100)
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#if defined(mot_ppc_mvme2100)
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#ifdef TRACE_IRQ_INIT
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printk("Going to initialize EPIC interrupt controller (openpic compliant)\n");
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#endif
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@@ -30,7 +30,7 @@
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extern const pci_config_access_functions pci_direct_functions;
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extern const pci_config_access_functions pci_indirect_functions;
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#if defined(mvme2100)
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#if defined(mot_ppc_mvme2100)
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/* FIXME - this should really be in a separate file - the 2100 doesn't
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* have a raven chip so there is no point having 2100 code here
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*/
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@@ -11,7 +11,7 @@
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#include <libchip/m48t08.h>
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/* Forward function declaration */
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#if !defined(mvme2100)
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#if !defined(mot_ppc_mvme2100)
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uint32_t mvmertc_get_register( uintptr_t, uint8_t );
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void mvmertc_set_register( uintptr_t, uint8_t, uint32_t );
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#endif
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@@ -24,7 +24,7 @@ rtc_tbl RTC_Table[] = {
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&m48t08_fns, /* pDeviceFns */
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rtc_probe, /* deviceProbe */
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NULL, /* pDeviceParams */
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#if defined(mvme2100)
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#if defined(mot_ppc_mvme2100)
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0xFFE81ff8, /* ulCtrlPort1 */
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0x00, /* ulDataPort */
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m48t08_get_register, /* getRegister */
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@@ -44,7 +44,7 @@ rtc_tbl RTC_Table[] = {
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size_t RTC_Count = NUM_RTCS;
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#if !defined(mvme2100)
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#if !defined(mot_ppc_mvme2100)
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#include <rtems/bspIo.h>
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void mvmertc_set_register(
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uintptr_t base,
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@@ -14,5 +14,5 @@ description: |
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Defined for MVME2100 -- undefined for others
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enabled-by: true
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links: []
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name: mvme2100
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name: mot_ppc_mvme2100
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type: build
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@@ -14,5 +14,5 @@ description: |
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Defined for MVME2307 -- undefined for others
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enabled-by: true
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links: []
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name: mvme2307
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name: mot_ppc_mvme2307
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type: build
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@@ -14,5 +14,5 @@ description: |
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Defined for MVME2700 -- undefined for others
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enabled-by: true
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links: []
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name: mvme2700
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name: mot_ppc_mvme2700
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type: build
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