mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
synced 2026-08-31 08:18:22 +08:00
2007-09-06 Daniel Hellstrom <daniel@gaisler.com>
New drivers: PCI, b1553BRM, SpaceWire(GRSPW), CAN (GRCAN,OC_CAN), Raw UART. * shared/1553/b1553brm.c, shared/1553/b1553brm_pci.c, shared/1553/b1553brm_rasta.c, shared/can/grcan.c, shared/can/grcan_rasta.c, shared/can/occan.c, shared/can/occan_pci.c, shared/spw/grspw.c, shared/spw/grspw_pci.c, shared/spw/grspw_rasta.c, shared/uart/apbuart.c, shared/uart/apbuart_pci.c, shared/uart/apbuart_rasta.c: New files missed in previous commit.
This commit is contained in:
@@ -1,3 +1,14 @@
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2007-09-06 Daniel Hellstrom <daniel@gaisler.com>
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New drivers: PCI, b1553BRM, SpaceWire(GRSPW), CAN (GRCAN,OC_CAN),
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Raw UART.
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* shared/1553/b1553brm.c, shared/1553/b1553brm_pci.c,
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shared/1553/b1553brm_rasta.c, shared/can/grcan.c,
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shared/can/grcan_rasta.c, shared/can/occan.c, shared/can/occan_pci.c,
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shared/spw/grspw.c, shared/spw/grspw_pci.c, shared/spw/grspw_rasta.c,
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shared/uart/apbuart.c, shared/uart/apbuart_pci.c,
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shared/uart/apbuart_rasta.c: New files missed in previous commit.
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2007-09-06 Daniel Hellstrom <daniel@gaisler.com>
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* Makefile.am: Add the following new drivers: PCI, b1553BRM,
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,132 @@
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/* Select PCI driver */
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#define B1553BRM_NO_AMBA
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#define B1553BRM_PCI
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#undef B1553BRM_MAXDEVS
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/* Use only 16K memory */
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#define DMA_MEM_16K
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/* Malloced memory or
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* Card local memory
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*/
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#define B1553BRM_LOCAL_MEM
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#define DONT_DEF_RAMON
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/* memory must be aligned to a 128k boundary */
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unsigned int brmpci_memarea_address;
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#define B1553BRM_LOCAL_MEM_ADR brmpci_memarea_address
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/* We have custom address tranlation for HW addresses */
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#define B1553BRM_ADR_TO
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/* No custom MEMAREA=>CPU used since BRM Core work with offsets
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* in it's descriptors.
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*/
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#undef B1553BRM_ADR_FROM
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/* Set registered device name */
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#define B1553BRM_DEVNAME "/dev/brmpci0"
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#define B1553BRM_DEVNAME_NO(devstr,no) ((devstr)[11]='0'+(no))
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/* Any non-static function will begin with */
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#define B1553BRM_PREFIX(name) b1553brmpci##name
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/* do nothing, assume that the interrupt handler is called
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* setup externally calling b1553_interrupt_handler.
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*/
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#define B1553BRM_REG_INT(handler,irq,arg) \
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if ( b1553brm_pci_int_reg ) \
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b1553brm_pci_int_reg(handler,irq,arg);
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#ifdef B1553BRM_ADR_TO
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/* Translate a address within the Memory Region (memarea) into an Hardware
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* device address. This address is put into hardware registers or descriptors
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* so that the hardware can access the Memory Region.
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* Example:
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* An local AMBA access at 0xe0000000 will translate into PCI address 0x40000000,
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* the PCI address 0x40000000 will translate into CPU-AMBA address 0x40000000.
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*/
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unsigned int brmpci_hw_address;
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static inline unsigned int memarea_to_hw(unsigned int addr) {
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/* don't translate? */
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if ( brmpci_hw_address == 0xffffffff )
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return addr;
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return ((addr & 0x000fffff) | brmpci_hw_address);
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}
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#endif
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/* not used since BRM Core work with offsets */
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#ifdef B1553BRM_ADR_FROM
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unsigned int brmpci_cpu_access_address;
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static inline unsigned int hw_to_cpu(unsigned int addr) {
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/* don't translate? */
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if ( brmpci_cpu_address == 0xffffffff )
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return addr;
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return ((addr & 0x0fffffff) | brmpci_cpu_address);
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}
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#endif
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void (*b1553brm_pci_int_reg)(void *handler, int irq, void *arg) = 0;
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static void b1553brmpci_interrupt_handler(int irq, void *arg);
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#include "b1553brm.c"
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/*
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*
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* memarea = preallocated memory somewhere, pointer to start of memory.
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* hw_address = how to translate a memarea address into an HW device AMBA address.
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*/
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int b1553brm_pci_register(
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amba_confarea_type *bus,
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unsigned int clksel,
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unsigned int clkdiv,
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unsigned int brm_freq,
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unsigned int memarea,
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unsigned int hw_address
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)
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{
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/* Setup configuration */
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/* if zero malloc will be used */
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brmpci_memarea_address = memarea;
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brmpci_hw_address = hw_address;
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#ifdef B1553BRM_ADR_FROM
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brmpci_cpu_address = memarea & 0xf0000000;
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#endif
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/* Register the driver */
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return B1553BRM_PREFIX(_register)(bus,clksel,clkdiv,brm_freq);
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}
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/* Call this from PCI interrupt handler
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* irq = the irq number of the HW device local to that IRQMP controller
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*
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*/
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static void b1553brmpci_interrupt_handler(int irq, void *arg){
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brm_interrupt(arg);
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}
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#if 0
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int b1553brm_pci_interrupt_handler(int irqmask){
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int i;
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unsigned int mask=0;
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/* find minor */
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for(i=0; i<brm_cores; i++){
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if ( (1<<brms[i].irqno) & irqmask ){
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mask |= 1<<brms[i].irqno;
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brm_interrupt(&brms[i]);
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/* more interrupts to scan for? */
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if ( irqmask & ~mask )
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return mask; /* handled */
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}
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}
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return mask;
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}
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#endif
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@@ -0,0 +1,115 @@
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/* Select PCI driver */
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#define B1553BRM_NO_AMBA
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#define B1553BRM_PCI
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#undef B1553BRM_MAXDEVS
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/* Use only 16K memory */
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#define DMA_MEM_128K
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/* Malloced memory or
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* Card local memory
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*/
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#define B1553BRM_LOCAL_MEM
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#define DONT_DEF_RAMON
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/* memory must be aligned to a 128k boundary */
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unsigned int brmrasta_memarea_address;
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#define B1553BRM_LOCAL_MEM_ADR brmrasta_memarea_address
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/* We have custom address tranlation for HW addresses */
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#define B1553BRM_ADR_TO
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/* No custom MEMAREA=>CPU used since BRM Core work with offsets
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* in it's descriptors.
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*/
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#undef B1553BRM_ADR_FROM
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/* Set registered device name */
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#define B1553BRM_DEVNAME "/dev/brmrasta0"
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#define B1553BRM_DEVNAME_NO(devstr,no) ((devstr)[13]='0'+(no))
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/* Any non-static function will begin with */
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#define B1553BRM_PREFIX(name) b1553brmrasta##name
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/* do nothing, assume that the interrupt handler is called
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* setup externally calling b1553_interrupt_handler.
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*/
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#define B1553BRM_REG_INT(handler,irq,arg) \
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if ( b1553brm_rasta_int_reg ) \
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b1553brm_rasta_int_reg(handler,irq,arg);
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#ifdef B1553BRM_ADR_TO
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/* Translate a address within the Memory Region (memarea) into an Hardware
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* device address. This address is put into hardware registers or descriptors
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* so that the hardware can access the Memory Region.
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* Example:
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* An local AMBA access at 0xe0000000 will translate into PCI address 0x40000000,
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* the PCI address 0x40000000 will translate into CPU-AMBA address 0x40000000.
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*/
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unsigned int brmrasta_hw_address;
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static inline unsigned int memarea_to_hw(unsigned int addr) {
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/* don't translate? */
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if ( brmrasta_hw_address == 0xffffffff )
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return addr;
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return ((addr & 0x0fffffff) | brmrasta_hw_address);
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}
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#endif
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/* not used since BRM Core work with offsets */
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#ifdef B1553BRM_ADR_FROM
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unsigned int brmrasta_cpu_access_address;
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static inline unsigned int hw_to_cpu(unsigned int addr) {
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/* don't translate? */
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if ( brmrasta_cpu_address == 0xffffffff )
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return addr;
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return ((addr & 0x0fffffff) | brmrasta_cpu_address);
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}
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#endif
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void (*b1553brm_rasta_int_reg)(void *handler, int irq, void *arg) = 0;
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static void b1553brmrasta_interrupt_handler(int irq, void *arg);
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#include "b1553brm.c"
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/*
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*
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* memarea = preallocated memory somewhere, pointer to start of memory.
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* hw_address = how to translate a memarea address into an HW device AMBA address.
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*/
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int b1553brm_rasta_register(
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amba_confarea_type *bus,
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unsigned int clksel,
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unsigned int clkdiv,
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unsigned int brm_freq,
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unsigned int memarea,
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unsigned int hw_address
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)
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{
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/* Setup configuration */
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/* if zero the malloc will be used */
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brmrasta_memarea_address = memarea;
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brmrasta_hw_address = hw_address;
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#ifdef B1553BRM_ADR_FROM
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brmrasta_cpu_address = memarea & 0xf0000000;
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#endif
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/* Register the driver */
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return B1553BRM_PREFIX(_register)(bus,clksel,clkdiv,brm_freq);
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}
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/* Call this from RASTA interrupt handler
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* irq = the irq number of the HW device local to that IRQMP controller
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*
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*/
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static void b1553brmrasta_interrupt_handler(int irq, void *arg){
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brm_interrupt(arg);
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}
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,99 @@
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#include <rasta.h>
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/* PCI frequency */
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#define SYS_FREQ_HZ 33000000
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/*#define USE_AT697_RAM 1 */
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/* memarea_to_hw(x)
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*
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* x: address in AT697 address space
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*
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* returns the address in the RASTA address space that can be used to access x with dma.
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*
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*/
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#ifdef USE_AT697_RAM
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static inline unsigned int memarea_to_hw(unsigned int addr) {
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return ((addr & 0x0fffffff) | RASTA_PCI_BASE);
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}
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#else
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static inline unsigned int memarea_to_hw(unsigned int addr) {
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return ((addr & 0x0fffffff) | RASTA_LOCAL_SRAM);
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}
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#endif
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#define MEMAREA_TO_HW(x) memarea_to_hw(x)
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#define IRQ_CLEAR_PENDING(irqno)
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#define IRQ_UNMASK(irqno)
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#define IRQ_MASK(irqno)
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#define IRQ_GLOBAL_DISABLE() sparc_disable_interrupts()
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#define IRQ_GLOBAL_ENABLE() sparc_enable_interrupts()
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#define GRCAN_REG_INT(handler,irqno,arg) \
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if ( grcan_rasta_int_reg ) \
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grcan_rasta_int_reg(handler,irqno,arg);
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void (*grcan_rasta_int_reg)(void *handler, int irq, void *arg) = 0;
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#define GRCAN_PREFIX(name) grcan_rasta##name
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/* We provide our own handler */
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#define GRCAN_DONT_DECLARE_IRQ_HANDLER
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#define GRCAN_REG_BYPASS_CACHE
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#define GRCAN_DMA_BYPASS_CACHE
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#define GRCAN_MAX_CORES 1
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/* Custom Statically allocated memory */
|
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#undef STATICALLY_ALLOCATED_TX_BUFFER
|
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#undef STATICALLY_ALLOCATED_RX_BUFFER
|
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|
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#define STATIC_TX_BUF_SIZE 4096
|
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#define STATIC_RX_BUF_SIZE 4096
|
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#define TX_BUF_SIZE 4096
|
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#define RX_BUF_SIZE 4096
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#define STATIC_TX_BUF_ADDR(core) \
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(grcan_rasta_rambase+(core)*(STATIC_TX_BUF_SIZE+STATIC_RX_BUF_SIZE))
|
||||
|
||||
#define STATIC_RX_BUF_ADDR(core) \
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(grcan_rasta_rambase+(core)*(STATIC_TX_BUF_SIZE+STATIC_RX_BUF_SIZE)+STATIC_RX_BUF_SIZE)
|
||||
|
||||
|
||||
#define GRCAN_DEVNAME "/dev/grcan0"
|
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#define GRCAN_DEVNAME_NO(devstr,no) ((devstr)[10]='0'+(no))
|
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|
||||
static int grcan_rasta_calc_memoffs(int maxcores, int corenum, unsigned int *mem_base, unsigned int *mem_end, unsigned int *bdtable_base);
|
||||
|
||||
void grcan_rasta_interrupt_handler(int irq, void *pDev);
|
||||
|
||||
unsigned int grcan_rasta_rambase;
|
||||
|
||||
#include "grcan.c"
|
||||
|
||||
|
||||
int grcan_rasta_ram_register(amba_confarea_type *abus, int rambase)
|
||||
{
|
||||
grcan_rasta_rambase = rambase;
|
||||
|
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return GRCAN_PREFIX(_register)(abus);
|
||||
}
|
||||
#if 0
|
||||
static void grcan_rasta_interrupt_handler(int v)
|
||||
{
|
||||
/* We know there is always only one GRCAN core in a RASTA chip... */
|
||||
grcan_interrupt(&grcans[0]);
|
||||
/*
|
||||
struct grcan_priv *pDev = arg;
|
||||
grcan_interrupt(pDev);
|
||||
*/
|
||||
}
|
||||
#endif
|
||||
void GRCAN_PREFIX(_interrupt_handler)(int irq, void *pDev)
|
||||
{
|
||||
grcan_interrupt(pDev);
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,64 @@
|
||||
|
||||
/* PCI cannot do byte accesses to addresses aligned byte wise
|
||||
* Use alternative reg map.
|
||||
*/
|
||||
#define OCCAN_WORD_REGS
|
||||
|
||||
/* Set registered device name */
|
||||
#define OCCAN_DEVNAME "/dev/occanpci0"
|
||||
#define OCCAN_DEVNAME_NO(devstr,no) ((devstr)[13]='0'+(no))
|
||||
|
||||
/* Any non-static function will begin with */
|
||||
#define OCCAN_PREFIX(name) occanpci##name
|
||||
|
||||
/* do nothing, assume that the interrupt handler is called
|
||||
* setup externally calling b1553_interrupt_handler.
|
||||
*/
|
||||
#define OCCAN_REG_INT(handler,irq,arg) \
|
||||
if ( occan_pci_int_reg ) \
|
||||
occan_pci_int_reg(handler,irq,arg);
|
||||
|
||||
void (*occan_pci_int_reg)(void *handler, int irq, void *arg) = 0;
|
||||
|
||||
void occanpci_interrupt_handler(int irq, void *arg);
|
||||
|
||||
/* AMBA Bus is clocked using the PCI clock (33.3MHz) */
|
||||
#define SYS_FREQ_HZ 33333333
|
||||
|
||||
/* Enable two redundant channels */
|
||||
#define REDUNDANT_CHANNELS 2
|
||||
|
||||
#define OCCAN_SET_CHANNEL(priv,channel) occanpci_set_channel(priv,channel)
|
||||
|
||||
#include "occan.c"
|
||||
|
||||
/* Define method that sets redundant channel
|
||||
* The channel select register:
|
||||
* 0x00 = byte regs
|
||||
* 0x40 = channel select
|
||||
* 0x80 = word regs
|
||||
*/
|
||||
static void inline occanpci_set_channel(occan_priv *priv, int channel){
|
||||
unsigned int *chan_sel = (unsigned int *)(((unsigned int)priv->regs & ~0xff)+0x40);
|
||||
if ( channel == 0 )
|
||||
*chan_sel = 0;
|
||||
else
|
||||
*chan_sel = 0xffffffff;
|
||||
}
|
||||
|
||||
int occan_pci_register(amba_confarea_type *bus)
|
||||
{
|
||||
/* Setup configuration */
|
||||
|
||||
/* Register the driver */
|
||||
return OCCAN_PREFIX(_register)(bus);
|
||||
}
|
||||
|
||||
|
||||
/* Call this from PCI interrupt handler
|
||||
* irq = the irq number of the HW device local to that IRQMP controller
|
||||
*
|
||||
*/
|
||||
void occanpci_interrupt_handler(int irq, void *arg){
|
||||
occan_interrupt(arg);
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,126 @@
|
||||
/* Select PCI driver */
|
||||
#define GRSPW_PCI
|
||||
|
||||
#undef GRSPW_MAXDEVS
|
||||
#undef DEBUG_SPACEWIRE_ONOFF
|
||||
|
||||
/* Only Malloced memory supported
|
||||
*/
|
||||
#undef GRSPW_LOCAL_MEM
|
||||
|
||||
/* memory must be aligned to a 128k boundary */
|
||||
unsigned int grspwpci_memarea_address;
|
||||
#define GRSPW_LOCAL_MEM_ADR grspwpci_memarea_address
|
||||
|
||||
/* We have custom address tranlation for HW addresses */
|
||||
#define GRSPW_ADR_TO
|
||||
|
||||
/* MEMAREA=>CPU used when reading descriptor buffer pointers,
|
||||
* they need to be translated from adresses used by GRSPW HW
|
||||
* into CPU readable addresses.
|
||||
*
|
||||
* NOT NEEDED AS GRSPW DRIVER USES INDEXES TO GET DESCRIPTOR
|
||||
* DATA POINTER ADDRESSES.
|
||||
*/
|
||||
#undef GRSPW_ADR_FROM
|
||||
|
||||
/* Set registered device name */
|
||||
#define GRSPW_DEVNAME "/dev/grspwpci0"
|
||||
#define GRSPW_DEVNAME_NO(devstr,no) ((devstr)[13]='0'+(no))
|
||||
|
||||
/* Any non-static function will begin with */
|
||||
#define GRSPW_PREFIX(name) grspwpci##name
|
||||
|
||||
/* do nothing, assume that the interrupt handler is called
|
||||
* setup externally calling b1553_interrupt_handler.
|
||||
*/
|
||||
#define GRSPW_REG_INT(handler,irq,arg) \
|
||||
if ( grspw_pci_int_reg ) \
|
||||
grspw_pci_int_reg(handler,irq,arg);
|
||||
|
||||
void (*grspw_pci_int_reg)(void *handler, int irq, void *arg) = 0;
|
||||
|
||||
|
||||
#ifdef GRSPW_ADR_TO
|
||||
/* Translate an address within the Memory Region (memarea) into an Hardware
|
||||
* device address. This address is put into hardware registers or descriptors
|
||||
* so that the hardware can access the Memory Region.
|
||||
* Example:
|
||||
* A local AMBA access at 0xe0000000 will translate into PCI address 0x40000000,
|
||||
* the PCI address 0x40000000 will translate into LEON-AMBA address 0x40000000.
|
||||
*/
|
||||
unsigned int grspwpci_hw_address;
|
||||
static inline unsigned int memarea_to_hw(unsigned int addr) {
|
||||
/* don't translate? */
|
||||
if ( grspwpci_hw_address == 0xffffffff )
|
||||
return addr;
|
||||
return ((addr & 0x0fffffff) | grspwpci_hw_address);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* not used since BRM Core work with offsets */
|
||||
#ifdef GRSPW_ADR_FROM
|
||||
unsigned int grspwpci_cpu_access_address;
|
||||
static inline unsigned int hw_to_cpu(unsigned int addr) {
|
||||
/* don't translate? */
|
||||
if ( grspwpci_cpu_address == 0xffffffff )
|
||||
return addr;
|
||||
return ((addr & 0x0fffffff) | grspwpci_cpu_address);
|
||||
}
|
||||
#endif
|
||||
|
||||
int grspwpci_interrupt_handler(int irq, void *arg);
|
||||
#include "grspw.c"
|
||||
|
||||
/*
|
||||
*
|
||||
* memarea = preallocated memory somewhere, pointer to start of memory.
|
||||
* hw_address = how to translate a memarea address into an HW device AMBA address.
|
||||
*/
|
||||
|
||||
int grspw_pci_register(
|
||||
amba_confarea_type *bus,
|
||||
unsigned int memarea,
|
||||
unsigned int hw_address
|
||||
)
|
||||
{
|
||||
/* Setup configuration */
|
||||
|
||||
/* if zero the malloc will be used */
|
||||
grspwpci_memarea_address = memarea;
|
||||
|
||||
grspwpci_hw_address = hw_address;
|
||||
|
||||
#ifdef GRSPW_ADR_FROM
|
||||
grspwpci_cpu_address = memarea & 0xf0000000;
|
||||
#endif
|
||||
|
||||
/* Register the driver */
|
||||
return GRSPW_PREFIX(_register)(bus);
|
||||
}
|
||||
|
||||
/* Call this from PCI interrupt handler
|
||||
* irq = the irq number of the HW device local to that IRQMP controller
|
||||
*
|
||||
*/
|
||||
int grspwpci_interrupt_handler(int irq, void *arg){
|
||||
grspw_interrupt( (GRSPW_DEV *)arg );
|
||||
}
|
||||
|
||||
#if 0
|
||||
int grspw_pci_interrupt_handler(int irqmask){
|
||||
int i;
|
||||
unsigned int mask=0;
|
||||
/* find minor */
|
||||
for(i=0; i<spw_cores; i++){
|
||||
if ( (1<<SPW_PARAM(i).irq) & irqmask ){
|
||||
mask |= 1<<SPW_PARAM(i).irq;
|
||||
grspw_interrupt(i);
|
||||
/* more interrupts to scan for? */
|
||||
if ( irqmask & ~mask )
|
||||
return mask; /* handled */
|
||||
}
|
||||
}
|
||||
return mask;
|
||||
}
|
||||
#endif
|
||||
@@ -0,0 +1,153 @@
|
||||
/* Select PCI driver */
|
||||
#define GRSPW_PCI
|
||||
|
||||
#undef GRSPW_MAXDEVS
|
||||
#undef DEBUG_SPACEWIRE_ONOFF
|
||||
/*#define DEBUG_SPACEWIRE_ONOFF*/
|
||||
/*
|
||||
* If USE_AT697_RAM is defined the RAM on the AT697 board will be used for DMA buffers (but rx message queue is always in AT697 ram).
|
||||
* USE_AT697_DMA specifies whether the messages will be fetched using DMA or PIO.
|
||||
*
|
||||
* RASTA_PCI_BASE is the base address of the GRPCI AHB slave
|
||||
*
|
||||
*/
|
||||
|
||||
#define USE_AT697_RAM 1
|
||||
#define USE_AT697_DMA 0
|
||||
#define RASTA_PCI_BASE 0xe0000000
|
||||
#define GRSPW_RASTA_MEM_OFF 0x21000
|
||||
|
||||
/* Make GRSPW driver use malloced or static memory
|
||||
*/
|
||||
#ifdef USE_AT697_RAM
|
||||
#undef GRSPW_STATIC_MEM
|
||||
#else
|
||||
#define GRSPW_STATIC_MEM
|
||||
#define GRSPW_CALC_MEMOFS(maxcores,corenum,ptr_mem_base,ptr_mem_end,ptr_bdtable_base) \
|
||||
grspw_rasta_calc_memoffs((maxcores),(corenum),(ptr_mem_base),(ptr_mem_end),(ptr_bdtable_base))
|
||||
#endif
|
||||
|
||||
/* We have custom address tranlation for HW addresses */
|
||||
#define GRSPW_ADR_TO
|
||||
|
||||
/* MEMAREA=>CPU used when reading descriptor buffer pointers,
|
||||
* they need to be translated from adresses used by GRSPW HW
|
||||
* into CPU readable addresses.
|
||||
*
|
||||
* NOT NEEDED AS GRSPW DRIVER USES INDEXES TO GET DESCRIPTOR
|
||||
* DATA POINTER ADDRESSES.
|
||||
*/
|
||||
#undef GRSPW_ADR_FROM
|
||||
|
||||
/* Set registered device name */
|
||||
#define GRSPW_DEVNAME "/dev/grspwrasta0"
|
||||
#define GRSPW_DEVNAME_NO(devstr,no) ((devstr)[15]='0'+(no))
|
||||
|
||||
/* Any non-static function will begin with */
|
||||
#define GRSPW_PREFIX(name) grspwrasta##name
|
||||
|
||||
/* do nothing, assume that the interrupt handler is called
|
||||
* setup externally calling grspw_interrupt_handler.
|
||||
*/
|
||||
#define GRSPW_REG_INT(handler,irq,arg) \
|
||||
if ( grspw_rasta_int_reg ) \
|
||||
grspw_rasta_int_reg(handler,irq,arg);
|
||||
|
||||
#define GRSPW_DONT_BYPASS_CACHE
|
||||
|
||||
#ifdef GRSPW_ADR_TO
|
||||
/* Translate a address within the Memory Region (memarea) into an Hardware
|
||||
* device address. This address is put into hardware registers or descriptors
|
||||
* so that the hardware can access the Memory Region.
|
||||
* Example:
|
||||
* An local AMBA access at 0xe0000000 will translate into PCI address 0x40000000,
|
||||
* the PCI address 0x40000000 will translate into CPU-AMBA address 0x40000000.
|
||||
*/
|
||||
static inline unsigned int memarea_to_hw(unsigned int addr) {
|
||||
return ((addr & 0x0fffffff) | RASTA_PCI_BASE);
|
||||
}
|
||||
#endif
|
||||
|
||||
void (*grspw_rasta_int_reg)(void *handler, int irq, void *arg) = 0;
|
||||
|
||||
static int grspw_rasta_calc_memoffs(int maxcores, int corenum, unsigned int *mem_base, unsigned int *mem_end, unsigned int *bdtable_base);
|
||||
|
||||
int grspw_rasta_interrupt_handler(unsigned int status);
|
||||
|
||||
void grspwrasta_interrupt_handler(int irq, void *pDev);
|
||||
|
||||
#include "grspw.c"
|
||||
|
||||
unsigned int grspw_rasta_memarea_address;
|
||||
|
||||
/* Register RASTA GRSPW driver.
|
||||
*
|
||||
* memarea = preallocated memory somewhere, pointer to start of memory.
|
||||
*/
|
||||
|
||||
int grspw_rasta_register(
|
||||
amba_confarea_type *bus,
|
||||
unsigned int ram_base
|
||||
)
|
||||
{
|
||||
/* Setup configuration */
|
||||
|
||||
/* if zero the malloc will be used */
|
||||
grspw_rasta_memarea_address = ram_base + GRSPW_RASTA_MEM_OFF;
|
||||
|
||||
/* Register the driver */
|
||||
return GRSPW_PREFIX(_register)(bus);
|
||||
}
|
||||
|
||||
#if 0
|
||||
/* Call this from PCI interrupt handler, simply figures out
|
||||
* which GRSPW core was responsible for the IRQ (may be multiple).
|
||||
* v = status of the PCI/AMBA MCPU IRQ CTRL
|
||||
*/
|
||||
int grspw_rasta_interrupt_handler(unsigned int status)
|
||||
{
|
||||
int minor;
|
||||
|
||||
for(minor = 0; minor < spw_cores; minor++) {
|
||||
if (status & (1<<grspw_devs[minor].irq) ) {
|
||||
grspw_interrupt(&grspw_devs[minor]);
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
void GRSPW_PREFIX(_interrupt_handler)(int irq, void *pDev)
|
||||
{
|
||||
grspw_interrupt(pDev);
|
||||
}
|
||||
|
||||
|
||||
#ifdef GRSPW_STATIC_MEM
|
||||
/*
|
||||
* --------------------------------------- <-
|
||||
* | Core1: BD TABLE 1 and 2 |
|
||||
* | Core2: BD TABLE 1 and 2 |
|
||||
* | Core3: BD TABLE 1 and 2 |
|
||||
* |-------------------------------------|
|
||||
* | Core1: rx data buf + rx header buf |
|
||||
* | Core2: rx data buf + rx header buf |
|
||||
* | Core3: rx data buf + rx header buf |
|
||||
* ---------------------------------------
|
||||
*/
|
||||
static int grspw_rasta_calc_memoffs(int maxcores, int corenum, unsigned int *mem_base, unsigned int *mem_end, unsigned int *bdtable_base)
|
||||
{
|
||||
if ( maxcores > 3 )
|
||||
return -1;
|
||||
|
||||
if ( bdtable_base )
|
||||
*bdtable_base = grspw_rasta_memarea_address + corenum*2*SPACEWIRE_BDTABLE_SIZE;
|
||||
|
||||
if ( mem_base )
|
||||
*mem_base = grspw_rasta_memarea_address + coremax*2*SPACEWIRE_BDTABLE_SIZE + corenum*BUFMEM_PER_LINK;
|
||||
|
||||
if ( mem_end )
|
||||
*mem_end = grspw_rasta_memarea_address + coremax*2*SPACEWIRE_BDTABLE_SIZE + (corenum+1)*BUFMEM_PER_LINK;
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,42 @@
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
/* Set registered device name */
|
||||
#define APBUART_DEVNAME "/dev/apbupci0"
|
||||
#define APBUART_DEVNAME_NO(devstr,no) ((devstr)[12]='0'+(no))
|
||||
|
||||
/* Any non-static function will begin with */
|
||||
#define APBUART_PREFIX(name) apbuartpci##name
|
||||
|
||||
/* do nothing, assume that the interrupt handler is called
|
||||
* setup externally calling apbuartpci_interrupt_handler.
|
||||
*/
|
||||
#define APBUART_REG_INT(handler,irq,arg) \
|
||||
if ( apbuart_pci_int_reg ) \
|
||||
apbuart_pci_int_reg(handler,irq,arg);
|
||||
|
||||
void (*apbuart_pci_int_reg)(void *handler, int irq, void *arg) = 0;
|
||||
|
||||
void apbuartpci_interrupt_handler(int irq, void *arg);
|
||||
|
||||
/* AMBA Bus is clocked using the PCI clock (33.3MHz) */
|
||||
#define SYS_FREQ_HZ 33333333
|
||||
|
||||
#include "apbuart.c"
|
||||
|
||||
int apbuart_pci_register(amba_confarea_type *bus)
|
||||
{
|
||||
/* Setup configuration */
|
||||
|
||||
/* Register the driver */
|
||||
return APBUART_PREFIX(_register)(bus);
|
||||
}
|
||||
|
||||
|
||||
/* Call this from PCI interrupt handler
|
||||
* irq = the irq number of the HW device local to that IRQMP controller
|
||||
*
|
||||
*/
|
||||
void apbuartpci_interrupt_handler(int irq, void *arg){
|
||||
apbuart_interrupt(arg);
|
||||
}
|
||||
@@ -0,0 +1,42 @@
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
/* Set registered device name */
|
||||
#define APBUART_DEVNAME "/dev/apburasta0"
|
||||
#define APBUART_DEVNAME_NO(devstr,no) ((devstr)[14]='0'+(no))
|
||||
|
||||
/* Any non-static function will begin with */
|
||||
#define APBUART_PREFIX(name) apbuartrasta##name
|
||||
|
||||
/* do nothing, assume that the interrupt handler is called
|
||||
* setup externally calling apbuartrasta_interrupt_handler.
|
||||
*/
|
||||
#define APBUART_REG_INT(handler,irq,arg) \
|
||||
if ( apbuart_rasta_int_reg ) \
|
||||
apbuart_rasta_int_reg(handler,irq,arg);
|
||||
|
||||
void (*apbuart_rasta_int_reg)(void *handler, int irq, void *arg) = 0;
|
||||
|
||||
void apbuartrasta_interrupt_handler(int irq, void *arg);
|
||||
|
||||
/* AMBA Bus is clocked using the RASTA internal clock (30MHz) */
|
||||
#define SYS_FREQ_HZ 30000000
|
||||
|
||||
#include "apbuart.c"
|
||||
|
||||
int apbuart_rasta_register(amba_confarea_type *bus)
|
||||
{
|
||||
/* Setup configuration */
|
||||
|
||||
/* Register the driver */
|
||||
return APBUART_PREFIX(_register)(bus);
|
||||
}
|
||||
|
||||
|
||||
/* Call this from RASTA interrupt handler
|
||||
* irq = the irq number of the HW device local to that IRQMP controller
|
||||
*
|
||||
*/
|
||||
void apbuartrasta_interrupt_handler(int irq, void *arg){
|
||||
apbuart_interrupt(arg);
|
||||
}
|
||||
Reference in New Issue
Block a user