mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
synced 2026-09-23 01:58:02 +08:00
2005-08-17 Mike Bertosh <mbertosh@motioncontrol.org>
* .cvsignore, Makefile.am, README, bsp_specs, configure.ac, clock/clock.c, console/console.c, include/bsp.h, include/bspopts.h.in, include/coverhd.h, include/tm27.h, network/network.c, start/start.S, startup/bspclean.c, startup/bspstart.c, startup/init5282.c, startup/linkcmds, startup/linkcmdsflash, startup/linkcmdsram, timer/timer.c: New files.
This commit is contained in:
Joel Sherrill
@@ -0,0 +1,14 @@
|
||||
aclocal.m4
|
||||
autom4te*.cache
|
||||
config.cache
|
||||
config.guess
|
||||
config.log
|
||||
config.status
|
||||
config.sub
|
||||
configure
|
||||
depcomp
|
||||
install-sh
|
||||
Makefile
|
||||
Makefile.in
|
||||
missing
|
||||
mkinstalldirs
|
||||
@@ -0,0 +1,121 @@
|
||||
##
|
||||
## $Id$
|
||||
##
|
||||
|
||||
ACLOCAL_AMFLAGS = -I ../../../../aclocal
|
||||
|
||||
include $(top_srcdir)/../../../../automake/compile.am
|
||||
include $(top_srcdir)/../../bsp.am
|
||||
|
||||
dist_project_lib_DATA = bsp_specs
|
||||
|
||||
include_HEADERS = include/bsp.h
|
||||
include_HEADERS += include/tm27.h
|
||||
|
||||
nodist_include_HEADERS = include/bspopts.h
|
||||
DISTCLEANFILES = include/bspopts.h
|
||||
|
||||
noinst_PROGRAMS =
|
||||
|
||||
include_HEADERS += include/coverhd.h
|
||||
|
||||
EXTRA_DIST = start/start.S
|
||||
start.$(OBJEXT): start/start.S
|
||||
$(CPPASCOMPILE) -DASM -o $@ -c $<
|
||||
project_lib_DATA = start.$(OBJEXT)
|
||||
|
||||
dist_project_lib_DATA += startup/linkcmds
|
||||
|
||||
noinst_PROGRAMS += startup.rel
|
||||
startup_rel_SOURCES = startup/bspclean.c \
|
||||
../../shared/bsplibc.c ../../shared/bsppost.c \
|
||||
../../m68k/shared/m68kpretaskinghook.c \
|
||||
startup/init5282.c startup/bspstart.c \
|
||||
../../shared/bootcard.c ../../shared/main.c \
|
||||
../../shared/sbrk.c ../../m68k/shared/setvec.c \
|
||||
../../shared/gnatinstallhandler.c
|
||||
startup_rel_CPPFLAGS = $(AM_CPPFLAGS)
|
||||
startup_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
|
||||
|
||||
noinst_PROGRAMS += clock.rel
|
||||
clock_rel_SOURCES = clock/clock.c
|
||||
clock_rel_CPPFLAGS = $(AM_CPPFLAGS)
|
||||
clock_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
|
||||
|
||||
noinst_PROGRAMS += console.rel
|
||||
console_rel_SOURCES = console/console.c
|
||||
console_rel_CPPFLAGS = $(AM_CPPFLAGS)
|
||||
console_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
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||||
|
||||
noinst_PROGRAMS += timer.rel
|
||||
timer_rel_SOURCES = timer/timer.c
|
||||
timer_rel_CPPFLAGS = $(AM_CPPFLAGS)
|
||||
timer_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
|
||||
|
||||
if HAS_NETWORKING
|
||||
network_CPPFLAGS = -D__INSIDE_RTEMS_BSD_TCPIP_STACK__
|
||||
noinst_PROGRAMS += network.rel
|
||||
network_rel_SOURCES = network/network.c
|
||||
network_rel_CPPFLAGS = $(AM_CPPFLAGS) \
|
||||
$(network_CPPFLAGS)
|
||||
network_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
|
||||
endif
|
||||
|
||||
noinst_LIBRARIES = libbsp.a
|
||||
libbsp_a_SOURCES =
|
||||
libbsp_a_LIBADD = startup.rel clock.rel console.rel timer.rel
|
||||
if HAS_NETWORKING
|
||||
libbsp_a_LIBADD += network.rel
|
||||
endif
|
||||
libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
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||||
../../../libcpu/@RTEMS_CPU@/shared/misc.rel
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||||
|
||||
all-local: $(PREINSTALL_FILES) $(TMPINSTALL_FILES)
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||||
|
||||
PREINSTALL_DIRS =
|
||||
PREINSTALL_FILES =
|
||||
TMPINSTALL_FILES =
|
||||
|
||||
$(PROJECT_INCLUDE)/$(dirstamp):
|
||||
@$(mkdir_p) $(PROJECT_INCLUDE)
|
||||
@: > $(PROJECT_INCLUDE)/$(dirstamp)
|
||||
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
|
||||
|
||||
$(PROJECT_LIB)/$(dirstamp):
|
||||
@$(mkdir_p) $(PROJECT_LIB)
|
||||
@: > $(PROJECT_LIB)/$(dirstamp)
|
||||
PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)
|
||||
|
||||
$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
|
||||
PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
|
||||
|
||||
$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
|
||||
|
||||
$(PROJECT_INCLUDE)/coverhd.h: include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
|
||||
|
||||
$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
|
||||
TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
|
||||
|
||||
$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
|
||||
PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds
|
||||
|
||||
CLEANFILES = $(PREINSTALL_FILES)
|
||||
DISTCLEANFILES += $(PREINSTALL_DIRS)
|
||||
CLEANFILES += $(TMPINSTALL_FILES)
|
||||
|
||||
include $(top_srcdir)/../../../../automake/local.am
|
||||
@@ -0,0 +1,456 @@
|
||||
#
|
||||
# $Id$
|
||||
#
|
||||
|
||||
Description: Avnet MCF5282
|
||||
============
|
||||
CPU: MCF5282, 59MHz
|
||||
RAM: 16M
|
||||
ROM: 8M
|
||||
|
||||
This is an evaluation board that uses the MCF5282 Coldfire CPU. It runs at about 59MHz scaled
|
||||
from a 7.372MHz crystal and is integrated with the Avnet designed AvBus.
|
||||
|
||||
ACKNOWLEDGEMENTS:
|
||||
=================
|
||||
This BSP is based on the work of:
|
||||
D. Peter Siddons
|
||||
Brett Swimley
|
||||
Jay Monkman
|
||||
Eric Norum
|
||||
Mike Bertosh
|
||||
|
||||
BSP NAME: av5282
|
||||
BOARD: Avnet MCF5282
|
||||
CPU FAMILY: ColdFire 5282
|
||||
CPU: MCF5282
|
||||
COPROCESSORS: N/A
|
||||
|
||||
DEBUG MONITOR: AVMON
|
||||
|
||||
PERIPHERALS
|
||||
===========
|
||||
TIMERS: Four PIT (RTEMS clock is PIT3), Four Timers
|
||||
RESOLUTION: 10 microsecond
|
||||
SERIAL PORTS: Internal UART 1, 2 and 3
|
||||
REAL-TIME CLOCK: none
|
||||
DMA: none
|
||||
VIDEO: none
|
||||
SCSI: none
|
||||
NETWORKING: Internal 10/100MHz FEC
|
||||
|
||||
DRIVER INFORMATION
|
||||
==================
|
||||
CLOCK DRIVER: PIT3
|
||||
IOSUPP DRIVER: none
|
||||
SHMSUPP: none
|
||||
TIMER DRIVER: TIMER3
|
||||
TTY DRIVER: UART1, 2 and 3
|
||||
|
||||
STDIO
|
||||
=====
|
||||
PORT: UART1 Terminal
|
||||
ELECTRICAL: RS-232
|
||||
BAUD: 19200
|
||||
BITS PER CHARACTER: 8
|
||||
PARITY: None
|
||||
STOP BITS: 1
|
||||
|
||||
|
||||
Memory map as set up by AVMON bootstrap and BSP initialization
|
||||
|
||||
+--------------------------------------------------+
|
||||
0000 0000 | 16 MByte SDRAM | 00FF FFFF
|
||||
0100 0000 | --------------------------------------------- |
|
||||
| Address space for future SDRAM expansion |
|
||||
. .
|
||||
. .
|
||||
. .
|
||||
| | 0FFF FFFF
|
||||
+--------------------------------------------------+
|
||||
1000 0000 | |
|
||||
. .
|
||||
. .
|
||||
. .
|
||||
| | 1FFF FFFF
|
||||
+--------------------------------------------------+
|
||||
2000 0000 | 64 kByte on-chip SRAM (RAMBAR) |
|
||||
. .
|
||||
. .
|
||||
. .
|
||||
| | 2FFF FFFF
|
||||
+--------------------------------------------------+
|
||||
3000 0000 | | 30FF FFFF
|
||||
. .
|
||||
. .
|
||||
. .
|
||||
| | 3FFF FFFF
|
||||
+--------------------------------------------------+
|
||||
4000 0000 | Internal peripheral system (IPSBAR) |
|
||||
. .
|
||||
| |
|
||||
. .
|
||||
. .
|
||||
. .
|
||||
| | 4FFF FFFF
|
||||
+--------------------------------------------------+
|
||||
. .
|
||||
. .
|
||||
. .
|
||||
+--------------------------------------------------+
|
||||
F000 0000 | 512 kByte on-chip flash (FLASHBAR) |
|
||||
. .
|
||||
FF80 0000 | External 8 MByte Flash memory .
|
||||
. .
|
||||
| | FFFF FFFF
|
||||
+--------------------------------------------------+
|
||||
|
||||
============================================================================
|
||||
|
||||
Interrupt map
|
||||
|
||||
+-----+-----------------------------------------------------------------------+
|
||||
| | PRIORITY |
|
||||
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
|
||||
|LEVEL| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|
||||
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
|
||||
| 7 | | | | | | | | |
|
||||
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
|
||||
| 6 | | | | | | | | |
|
||||
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
|
||||
| 5 | | | | | | | | |
|
||||
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
|
||||
| 4 | FEC RX | FEC TX | | | | | | PIT |
|
||||
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
|
||||
| 3 | UART 0 | UART 1 | UART 2 | | | | | |
|
||||
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
|
||||
| 2 | | | | | | | | |
|
||||
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
|
||||
| 1 | | | | | | | | |
|
||||
+-----+--------+--------+--------+--------+--------+--------+--------+--------+
|
||||
|
||||
============================================================================
|
||||
|
||||
TIMING TESTS
|
||||
**************************
|
||||
|
||||
|
||||
*** TIME TEST 1 ***
|
||||
rtems_semaphore_create 28
|
||||
rtems_semaphore_delete 31
|
||||
rtems_semaphore_obtain: available 6
|
||||
rtems_semaphore_obtain: not available -- NO_WAIT 7
|
||||
rtems_semaphore_release: no waiting tasks 14
|
||||
*** END OF TEST 1 ***
|
||||
|
||||
*** TIME TEST 2 ***
|
||||
rtems_semaphore_obtain: not available -- caller blocks 57
|
||||
*** END OF TEST 2 ***
|
||||
|
||||
*** TIME TEST 3 ***
|
||||
rtems_semaphore_release: task readied -- preempts caller 39
|
||||
*** END OF TEST 3 ***
|
||||
|
||||
*** TIME TEST 4 ***
|
||||
rtems_task_restart: blocked task -- preempts caller 86
|
||||
rtems_task_restart: ready task -- preempts caller 82
|
||||
rtems_semaphore_release: task readied -- returns to caller 28
|
||||
rtems_task_create 139
|
||||
rtems_task_start 32
|
||||
rtems_task_restart: suspended task -- returns to caller 42
|
||||
rtems_task_delete: suspended task 99
|
||||
rtems_task_restart: ready task -- returns to caller 44
|
||||
rtems_task_restart: blocked task -- returns to caller 59
|
||||
rtems_task_delete: blocked task 104
|
||||
*** END OF TEST 4 ***
|
||||
|
||||
*** TIME TEST 5 ***
|
||||
rtems_task_suspend: calling task 36
|
||||
rtems_task_resume: task readied -- preempts caller 33
|
||||
*** END OF TEST 5 ***
|
||||
|
||||
*** TIME TEST 6 ***
|
||||
rtems_task_restart: calling task 45
|
||||
rtems_task_suspend: returns to caller 12
|
||||
rtems_task_resume: task readied -- returns to caller 15
|
||||
rtems_task_delete: ready task 106
|
||||
*** END OF TEST 6 ***
|
||||
|
||||
*** TIME TEST 7 ***
|
||||
rtems_task_restart: suspended task -- preempts caller 68
|
||||
*** END OF TEST 7 ***
|
||||
|
||||
*** TIME TEST 8 ***
|
||||
rtems_task_set_priority: obtain current priority 9
|
||||
rtems_task_set_priority: returns to caller 21
|
||||
rtems_task_mode: obtain current mode 4
|
||||
rtems_task_mode: no reschedule 4
|
||||
rtems_task_mode: reschedule -- returns to caller 13
|
||||
rtems_task_mode: reschedule -- preempts caller 35
|
||||
rtems_task_set_note 7
|
||||
rtems_task_get_note 9
|
||||
rtems_clock_set 30
|
||||
rtems_clock_get 0
|
||||
*** END OF TEST 8 ***
|
||||
|
||||
*** TIME TEST 9 ***
|
||||
rtems_message_queue_create 81
|
||||
rtems_message_queue_send: no waiting tasks 30
|
||||
rtems_message_queue_urgent: no waiting tasks 31
|
||||
rtems_message_queue_receive: available 30
|
||||
rtems_message_queue_flush: no messages flushed 12
|
||||
rtems_message_queue_flush: messages flushed 18
|
||||
rtems_message_queue_delete 42
|
||||
*** END OF TEST 9 ***
|
||||
|
||||
*** TIME TEST 10 ***
|
||||
rtems_message_queue_receive: not available -- NO_WAIT 16
|
||||
rtems_message_queue_receive: not available -- caller blocks 58
|
||||
*** END OF TEST 10 ***
|
||||
|
||||
*** TIME TEST 11 ***
|
||||
rtems_message_queue_send: task readied -- preempts caller 53
|
||||
*** END OF TEST 11 ***
|
||||
|
||||
*** TIME TEST 12 ***
|
||||
rtems_message_queue_send: task readied -- returns to caller 35
|
||||
*** END OF TEST 12 ***
|
||||
|
||||
*** TIME TEST 13 ***
|
||||
rtems_message_queue_urgent: task readied -- preempts caller 51
|
||||
*** END OF TEST 13 ***
|
||||
|
||||
*** TIME TEST 14 ***
|
||||
rtems_message_queue_urgent: task readied -- returns to caller 33
|
||||
*** END OF TEST 14 ***
|
||||
|
||||
*** TIME TEST 15 ***
|
||||
rtems_event_receive: obtain current events 0
|
||||
rtems_event_receive: not available -- NO_WAIT 9
|
||||
rtems_event_receive: not available -- caller blocks 46
|
||||
rtems_event_send: no task readied 7
|
||||
rtems_event_receive: available 13
|
||||
rtems_event_send: task readied -- returns to caller 19
|
||||
*** END OF TEST 15 ***
|
||||
|
||||
*** TIME TEST 16 ***
|
||||
rtems_event_send: task readied -- preempts caller 35
|
||||
*** END OF TEST 16 ***
|
||||
|
||||
*** TIME TEST 17 ***
|
||||
rtems_task_set_priority: preempts caller 56
|
||||
*** END OF TEST 17 ***
|
||||
|
||||
*** TIME TEST 18 ***
|
||||
rtems_task_delete: calling task 124
|
||||
*** END OF TEST 18 ***
|
||||
|
||||
*** TIME TEST 19 ***
|
||||
rtems_signal_catch 8
|
||||
rtems_signal_send: returns to caller 17
|
||||
rtems_signal_send: signal to self 29
|
||||
exit ASR overhead: returns to calling task 23
|
||||
exit ASR overhead: returns to preempting task 26
|
||||
*** END OF TEST 19 ***
|
||||
|
||||
*** TIME TEST 20 ***
|
||||
rtems_partition_create 29
|
||||
rtems_region_create 59
|
||||
rtems_partition_get_buffer: available 15
|
||||
rtems_partition_get_buffer: not available 8
|
||||
rtems_partition_return_buffer 16
|
||||
rtems_partition_delete 14
|
||||
rtems_region_get_segment: available 38
|
||||
rtems_region_get_segment: not available -- NO_WAIT 41
|
||||
rtems_region_return_segment: no waiting tasks 42
|
||||
rtems_region_get_segment: not available -- caller blocks 80
|
||||
rtems_region_return_segment: task readied -- preempts caller 108
|
||||
rtems_region_return_segment: task readied -- returns to caller 86
|
||||
rtems_region_delete 36
|
||||
rtems_io_initialize 1
|
||||
rtems_io_open 2
|
||||
rtems_io_close 2
|
||||
rtems_io_read 1
|
||||
rtems_io_write 1
|
||||
rtems_io_control 1
|
||||
*** END OF TEST 20 ***
|
||||
|
||||
*** TIME TEST 21 ***
|
||||
rtems_task_ident 73
|
||||
rtems_message_queue_ident 74
|
||||
rtems_semaphore_ident 85
|
||||
rtems_partition_ident 73
|
||||
rtems_region_ident 75
|
||||
rtems_port_ident 73
|
||||
rtems_timer_ident 76
|
||||
rtems_rate_monotonic_ident 72
|
||||
*** END OF TEST 21 *
|
||||
|
||||
*** TIME TEST 22 ***
|
||||
rtems_message_queue_broadcast: task readied -- returns to caller 48
|
||||
rtems_message_queue_broadcast: no waiting tasks 18
|
||||
rtems_message_queue_broadcast: task readied -- preempts caller 58
|
||||
*** END OF TEST 22 ***
|
||||
|
||||
*** TIME TEST 23 ***
|
||||
rtems_timer_create 10
|
||||
rtems_timer_fire_after: inactive 20
|
||||
rtems_timer_fire_after: active 24
|
||||
rtems_timer_cancel: active 8
|
||||
rtems_timer_cancel: inactive 8
|
||||
rtems_timer_reset: inactive 16
|
||||
rtems_timer_reset: active 17
|
||||
rtems_timer_fire_when: inactive 35
|
||||
rtems_timer_fire_when: active 35
|
||||
rtems_timer_delete: active 16
|
||||
rtems_timer_delete: inactive 14
|
||||
rtems_task_wake_when 53
|
||||
*** END OF TEST 23 ***
|
||||
|
||||
*** TIME TEST 24 ***
|
||||
rtems_task_wake_after: yield -- returns to caller 5
|
||||
rtems_task_wake_after: yields -- preempts caller 30
|
||||
*** END OF TEST 24 ***
|
||||
|
||||
*** TIME TEST 25 ***
|
||||
rtems_clock_tick 11
|
||||
*** END OF TEST 25 ***
|
||||
|
||||
*** TIME TEST 26 ***
|
||||
_ISR_Disable 0
|
||||
_ISR_Flash 0
|
||||
_ISR_Enable 0
|
||||
_Thread_Disable_dispatch 0
|
||||
_Thread_Enable_dispatch 3
|
||||
_Thread_Set_state 12
|
||||
_Thread_Disptach (NO FP) 23
|
||||
context switch: no floating point contexts 19
|
||||
context switch: self 3
|
||||
context switch: to another task 2
|
||||
fp context switch: restore 1st FP task 19
|
||||
fp context switch: save idle, restore initialized 4
|
||||
fp context switch: save idle, restore idle 17
|
||||
fp context switch: save initialized, restore initialized 4
|
||||
_Thread_Resume 11
|
||||
_Thread_Unblock 8
|
||||
_Thread_Ready 7
|
||||
_Thread_Get 4
|
||||
_Semaphore_Get 2
|
||||
_Thread_Get: invalid id 0
|
||||
*** END OF TEST 26 ***
|
||||
|
||||
*** TIME TEST 27 ***
|
||||
interrupt entry overhead: returns to interrupted task 5
|
||||
interrupt exit overhead: returns to interrupted task 4
|
||||
interrupt entry overhead: returns to nested interrupt 3
|
||||
interrupt exit overhead: returns to nested interrupt 3
|
||||
interrupt entry overhead: returns to preempting task 6
|
||||
interrupt exit overhead: returns to preempting task 30
|
||||
*** END OF TEST 27 ***
|
||||
|
||||
*** TIME TEST 28 ***
|
||||
rtems_port_create 18
|
||||
rtems_port_external_to_internal 6
|
||||
rtems_port_internal_to_external 7
|
||||
rtems_port_delete 18
|
||||
*** END OF TEST 28 ***
|
||||
|
||||
*** TIME TEST 29 ***
|
||||
rtems_rate_monotonic_create 18
|
||||
rtems_rate_monotonic_period: initiate period -- returns to caller 29
|
||||
rtems_rate_monotonic_period: obtain status 15
|
||||
rtems_rate_monotonic_cancel 19
|
||||
rtems_rate_monotonic_delete: inactive 22
|
||||
rtems_rate_monotonic_delete: active 24
|
||||
rtems_rate_monotonic_period: conclude periods -- caller blocks 36
|
||||
*** END OF TEST 29 ***
|
||||
|
||||
*** TIME CHECKER ***
|
||||
Units may not be in microseconds for this test!!!
|
||||
0 100000
|
||||
Total time = 0
|
||||
Average time = 0
|
||||
<pause>
|
||||
NULL timer stopped at 0
|
||||
LOOP (1000) timer stopped at 225
|
||||
LOOP (10000) timer stopped at 2242
|
||||
LOOP (50000) timer stopped at 11207
|
||||
LOOP (100000) timer stopped at 22414
|
||||
*** END OF TIME CHECKER ***
|
||||
|
||||
*** TIME TEST OVERHEAD ***
|
||||
rtems_initialize_executive 0
|
||||
rtems_shutdown_executive 0
|
||||
rtems_task_create 1
|
||||
rtems_task_ident 0
|
||||
rtems_task_start 0
|
||||
rtems_task_restart 0
|
||||
rtems_task_delete 0
|
||||
rtems_task_suspend 0
|
||||
rtems_task_resume 0
|
||||
rtems_task_set_priority 0
|
||||
rtems_task_mode 0
|
||||
rtems_task_get_note 0
|
||||
rtems_task_set_note 0
|
||||
rtems_task_wake_when 1
|
||||
rtems_task_wake_after 0
|
||||
rtems_interrupt_catch 0
|
||||
rtems_clock_get 1
|
||||
rtems_clock_set 1
|
||||
rtems_clock_tick 0
|
||||
<pause>
|
||||
rtems_timer_create 0
|
||||
rtems_timer_delete 0
|
||||
rtems_timer_ident 0
|
||||
rtems_timer_fire_after 0
|
||||
rtems_timer_fire_when 1
|
||||
rtems_timer_reset 0
|
||||
rtems_timer_cancel 0
|
||||
rtems_semaphore_create 1
|
||||
rtems_semaphore_delete 0
|
||||
rtems_semaphore_ident 0
|
||||
rtems_semaphore_obtain 0
|
||||
rtems_semaphore_release 0
|
||||
rtems_message_queue_create 0
|
||||
rtems_message_queue_ident 0
|
||||
rtems_message_queue_delete 0
|
||||
rtems_message_queue_send 0
|
||||
rtems_message_queue_urgent 0
|
||||
rtems_message_queue_broadcast 0
|
||||
rtems_message_queue_receive 0
|
||||
rtems_message_queue_flush 0
|
||||
<pause>
|
||||
rtems_event_send 0
|
||||
rtems_event_receive 0
|
||||
rtems_signal_catch 0
|
||||
rtems_signal_send 0
|
||||
rtems_partition_create 1
|
||||
rtems_partition_ident 0
|
||||
rtems_partition_delete 0
|
||||
rtems_partition_get_buffer 0
|
||||
rtems_partition_return_buffer 0
|
||||
rtems_region_create 1
|
||||
rtems_region_ident 0
|
||||
rtems_region_delete 0
|
||||
rtems_region_get_segment 1
|
||||
rtems_region_return_segment 0
|
||||
rtems_port_create 1
|
||||
rtems_port_ident 0
|
||||
rtems_port_delete 0
|
||||
rtems_port_external_to_internal 0
|
||||
rtems_port_internal_to_external 0
|
||||
<pause>
|
||||
rtems_io_initialize 0
|
||||
rtems_io_open 0
|
||||
rtems_io_close 0
|
||||
rtems_io_read 0
|
||||
rtems_io_write 0
|
||||
rtems_io_control 0
|
||||
rtems_fatal_error_occurred 0
|
||||
rtems_rate_monotonic_create 0
|
||||
rtems_rate_monotonic_ident 0
|
||||
rtems_rate_monotonic_delete 0
|
||||
rtems_rate_monotonic_cancel 0
|
||||
rtems_rate_monotonic_period 0
|
||||
rtems_multiprocessing_announce 0
|
||||
*** END OF TIME OVERHEAD ***
|
||||
@@ -0,0 +1,27 @@
|
||||
%rename cpp old_cpp
|
||||
%rename lib old_lib
|
||||
%rename endfile old_endfile
|
||||
%rename startfile old_startfile
|
||||
%rename link old_link
|
||||
|
||||
*cpp:
|
||||
%(old_cpp) %{qrtems: -D__embedded__} -Asystem(embedded)
|
||||
|
||||
*lib:
|
||||
%{!qrtems: %(old_lib)} %{!nostdlib: %{qrtems: --start-group \
|
||||
%{!qrtems_debug: -lrtemsbsp -lrtemscpu} %{qrtems_debug: -lrtemsbsp_g -lrtemscpu_g} \
|
||||
-lc -lgcc --end-group \
|
||||
%{!qnolinkcmds: -T linkcmds%s}}}
|
||||
|
||||
*startfile:
|
||||
%{!qrtems: %(old_startfile)} %{!nostdlib: %{qrtems: \
|
||||
%{!qrtems_debug: start.o%s} \
|
||||
%{qrtems_debug: start_g.o%s} \
|
||||
crti.o%s crtbegin.o%s }}
|
||||
|
||||
*link:
|
||||
%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N -e start}
|
||||
|
||||
*endfile:
|
||||
%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s crtn.o%s}
|
||||
|
||||
@@ -0,0 +1,63 @@
|
||||
/*
|
||||
* Use the last periodic interval timer (PIT3) as the system clock.
|
||||
*
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#include <rtems.h>
|
||||
#include <bsp.h>
|
||||
#include <mcf5282/mcf5282.h>
|
||||
|
||||
/*
|
||||
* Use INTC0 base
|
||||
*/
|
||||
#define CLOCK_VECTOR (64+58)
|
||||
|
||||
/*
|
||||
* Periodic interval timer interrupt handler
|
||||
*/
|
||||
#define Clock_driver_support_at_tick() \
|
||||
do { \
|
||||
MCF5282_PIT3_PCSR |= MCF5282_PIT_PCSR_PIF; \
|
||||
} while (0) \
|
||||
|
||||
/*
|
||||
* Attach clock interrupt handler
|
||||
*/
|
||||
#define Clock_driver_support_install_isr( _new, _old ) \
|
||||
do { \
|
||||
_old = (rtems_isr_entry)set_vector(_new, CLOCK_VECTOR, 1); \
|
||||
} while(0)
|
||||
|
||||
/*
|
||||
* Turn off the clock
|
||||
*/
|
||||
#define Clock_driver_support_shutdown_hardware() \
|
||||
do { \
|
||||
MCF5282_PIT3_PCSR &= ~MCF5282_PIT_PCSR_EN; \
|
||||
} while(0)
|
||||
|
||||
/*
|
||||
* Set up the clock hardware
|
||||
*
|
||||
* We need to have 1 interrupt every 10,000 microseconds
|
||||
* so we need to set prescaler to 64 and the PMR register to 0x23FE
|
||||
*/
|
||||
#define Clock_driver_support_initialize_hardware() \
|
||||
do { \
|
||||
int level; \
|
||||
int preScaleCode = 5; \
|
||||
MCF5282_INTC0_ICR58 = MCF5282_INTC_ICR_IL(PIT3_IRQ_LEVEL) | \
|
||||
MCF5282_INTC_ICR_IP(PIT3_IRQ_PRIORITY); \
|
||||
rtems_interrupt_disable( level ); \
|
||||
MCF5282_INTC0_IMRH &= ~MCF5282_INTC_IMRH_INT58; \
|
||||
MCF5282_PIT3_PCSR &= ~MCF5282_PIT_PCSR_EN; \
|
||||
rtems_interrupt_enable( level ); \
|
||||
MCF5282_PIT3_PMR = 0x23FE; \
|
||||
MCF5282_PIT3_PCSR = MCF5282_PIT_PCSR_PRE(preScaleCode) | \
|
||||
MCF5282_PIT_PCSR_PIE | \
|
||||
MCF5282_PIT_PCSR_RLD | \
|
||||
MCF5282_PIT_PCSR_EN; \
|
||||
} while (0)
|
||||
|
||||
#include "../../../shared/clockdrv_shell.c"
|
||||
@@ -0,0 +1,24 @@
|
||||
## Process this file with autoconf to produce a configure script.
|
||||
##
|
||||
## $Id$
|
||||
|
||||
AC_PREREQ(2.59)
|
||||
AC_INIT([rtems-c-src-lib-libbsp-m68k-av5282],[_RTEMS_VERSION],[rtems-bugs@rtems.com])
|
||||
AC_CONFIG_SRCDIR([bsp_specs])
|
||||
RTEMS_TOP(../../../../../..)
|
||||
|
||||
RTEMS_CANONICAL_TARGET_CPU
|
||||
AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.9])
|
||||
RTEMS_BSP_CONFIGURE
|
||||
|
||||
RTEMS_PROG_CC_FOR_TARGET
|
||||
RTEMS_CANONICALIZE_TOOLS
|
||||
RTEMS_PROG_CCAS
|
||||
|
||||
RTEMS_CHECK_NETWORKING
|
||||
|
||||
AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
|
||||
|
||||
# Explicitly list all Makefiles here
|
||||
AC_CONFIG_FILES([Makefile])
|
||||
AC_OUTPUT
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,102 @@
|
||||
/*
|
||||
* av5282 BSP header file
|
||||
*/
|
||||
|
||||
#ifndef __SBav5282_BSP_H
|
||||
#define __SBav5282_BSP_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <rtems.h>
|
||||
#include <rtems/iosupp.h>
|
||||
#include <rtems/console.h>
|
||||
#include <rtems/clockdrv.h>
|
||||
#include <rtems/iosupp.h>
|
||||
#include <rtems/bspIo.h>
|
||||
|
||||
/***************************************************************************/
|
||||
/** Hardware data structure headers **/
|
||||
#include <mcf5282/mcf5282.h> /* internal MCF5282 modules */
|
||||
|
||||
/***************************************************************************/
|
||||
/** Network driver configuration **/
|
||||
struct rtems_bsdnet_ifconfig;
|
||||
extern int rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config, int attaching );
|
||||
#define RTEMS_BSP_NETWORK_DRIVER_NAME "fs1"
|
||||
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_fec_driver_attach
|
||||
|
||||
/***************************************************************************/
|
||||
/** User Definable configuration **/
|
||||
|
||||
/* define which port the console should use - all other ports are then defined as general purpose */
|
||||
#define CONSOLE_PORT 0
|
||||
|
||||
|
||||
/*
|
||||
* Define the time limits for RTEMS Test Suite test durations.
|
||||
* Long test and short test duration limits are provided. These
|
||||
* values are in seconds and need to be converted to ticks for the
|
||||
* application.
|
||||
*
|
||||
*/
|
||||
#define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */
|
||||
#define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */
|
||||
|
||||
/* externals */
|
||||
|
||||
/* constants */
|
||||
|
||||
/* miscellaneous stuff assumed to exist */
|
||||
|
||||
extern rtems_configuration_table BSP_Configuration;
|
||||
|
||||
/*
|
||||
* Device Driver Table Entries
|
||||
*/
|
||||
|
||||
/*
|
||||
* NOTE: Use the standard Console driver entry
|
||||
*/
|
||||
|
||||
/*
|
||||
* NOTE: Use the standard Clock driver entry
|
||||
*/
|
||||
|
||||
|
||||
/* functions */
|
||||
|
||||
unsigned32 get_CPU_clock_speed(void);
|
||||
void bsp_cleanup(void);
|
||||
|
||||
m68k_isr_entry set_vector(
|
||||
rtems_isr_entry handler,
|
||||
rtems_vector_number vector,
|
||||
int type
|
||||
);
|
||||
|
||||
/*
|
||||
* Interrupt assignments
|
||||
* Highest-priority listed first
|
||||
*/
|
||||
#define FEC_IRQ_LEVEL 4
|
||||
#define FEC_IRQ_RX_PRIORITY 7
|
||||
#define FEC_IRQ_TX_PRIORITY 6
|
||||
|
||||
#define PIT3_IRQ_LEVEL 4
|
||||
#define PIT3_IRQ_PRIORITY 0
|
||||
|
||||
#define UART0_IRQ_LEVEL 3
|
||||
#define UART0_IRQ_PRIORITY 7
|
||||
#define UART1_IRQ_LEVEL 3
|
||||
#define UART1_IRQ_PRIORITY 6
|
||||
#define UART2_IRQ_LEVEL 3
|
||||
#define UART2_IRQ_PRIORITY 5
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
/* end of include file */
|
||||
@@ -0,0 +1,16 @@
|
||||
/* include/bspopts.h.in. Generated from configure.ac by autoheader. */
|
||||
|
||||
/* Define to the address where bug reports for this package should be sent. */
|
||||
#undef PACKAGE_BUGREPORT
|
||||
|
||||
/* Define to the full name of this package. */
|
||||
#undef PACKAGE_NAME
|
||||
|
||||
/* Define to the full name and version of this package. */
|
||||
#undef PACKAGE_STRING
|
||||
|
||||
/* Define to the one symbol short name of this package. */
|
||||
#undef PACKAGE_TARNAME
|
||||
|
||||
/* Define to the version of this package. */
|
||||
#undef PACKAGE_VERSION
|
||||
@@ -0,0 +1,106 @@
|
||||
/* coverhd.h
|
||||
*
|
||||
* This include file has defines to represent the overhead associated
|
||||
* with calling a particular directive from C. These are used in the
|
||||
* Timing Test Suite to ignore the overhead required to pass arguments
|
||||
* to directives. On some CPUs and/or target boards, this overhead
|
||||
* is significant and makes it difficult to distinguish internal
|
||||
* RTEMS execution time from that used to call the directive.
|
||||
* This file should be updated after running the C overhead timing
|
||||
* test. Once this update has been performed, the RTEMS Time Test
|
||||
* Suite should be rebuilt to account for these overhead times in the
|
||||
* timing results.
|
||||
*
|
||||
* NOTE: If these are all zero, then the times reported include
|
||||
* all calling overhead including passing of arguments.
|
||||
*
|
||||
* COPYRIGHT (c) 1989-1998.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
* Copyright assigned to U.S. Government, 1994.
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.OARcorp.com/rtems/license.html.
|
||||
*
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __COVERHD_h
|
||||
#define __COVERHD_h
|
||||
|
||||
#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE 0
|
||||
#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE 0
|
||||
#define CALLING_OVERHEAD_TASK_CREATE 0
|
||||
#define CALLING_OVERHEAD_TASK_IDENT 0
|
||||
#define CALLING_OVERHEAD_TASK_START 0
|
||||
#define CALLING_OVERHEAD_TASK_RESTART 0
|
||||
#define CALLING_OVERHEAD_TASK_DELETE 0
|
||||
#define CALLING_OVERHEAD_TASK_SUSPEND 0
|
||||
#define CALLING_OVERHEAD_TASK_RESUME 0
|
||||
#define CALLING_OVERHEAD_TASK_SET_PRIORITY 0
|
||||
#define CALLING_OVERHEAD_TASK_MODE 0
|
||||
#define CALLING_OVERHEAD_TASK_GET_NOTE 0
|
||||
#define CALLING_OVERHEAD_TASK_SET_NOTE 0
|
||||
#define CALLING_OVERHEAD_TASK_WAKE_WHEN 1
|
||||
#define CALLING_OVERHEAD_TASK_WAKE_AFTER 0
|
||||
#define CALLING_OVERHEAD_INTERRUPT_CATCH 0
|
||||
#define CALLING_OVERHEAD_CLOCK_GET 1
|
||||
#define CALLING_OVERHEAD_CLOCK_SET 1
|
||||
#define CALLING_OVERHEAD_CLOCK_TICK 0
|
||||
|
||||
#define CALLING_OVERHEAD_TIMER_CREATE 0
|
||||
#define CALLING_OVERHEAD_TIMER_IDENT 0
|
||||
#define CALLING_OVERHEAD_TIMER_DELETE 0
|
||||
#define CALLING_OVERHEAD_TIMER_FIRE_AFTER 1
|
||||
#define CALLING_OVERHEAD_TIMER_FIRE_WHEN 1
|
||||
#define CALLING_OVERHEAD_TIMER_RESET 0
|
||||
#define CALLING_OVERHEAD_TIMER_CANCEL 0
|
||||
#define CALLING_OVERHEAD_SEMAPHORE_CREATE 0
|
||||
#define CALLING_OVERHEAD_SEMAPHORE_IDENT 0
|
||||
#define CALLING_OVERHEAD_SEMAPHORE_DELETE 0
|
||||
#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN 0
|
||||
#define CALLING_OVERHEAD_SEMAPHORE_RELEASE 0
|
||||
#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE 0
|
||||
#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT 0
|
||||
#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE 0
|
||||
#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND 0
|
||||
#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT 0
|
||||
#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST 0
|
||||
#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE 0
|
||||
#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH 0
|
||||
|
||||
#define CALLING_OVERHEAD_EVENT_SEND 0
|
||||
#define CALLING_OVERHEAD_EVENT_RECEIVE 0
|
||||
#define CALLING_OVERHEAD_SIGNAL_CATCH 0
|
||||
#define CALLING_OVERHEAD_SIGNAL_SEND 0
|
||||
#define CALLING_OVERHEAD_PARTITION_CREATE 0
|
||||
#define CALLING_OVERHEAD_PARTITION_IDENT 0
|
||||
#define CALLING_OVERHEAD_PARTITION_DELETE 0
|
||||
#define CALLING_OVERHEAD_PARTITION_GET_BUFFER 0
|
||||
#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER 0
|
||||
#define CALLING_OVERHEAD_REGION_CREATE 0
|
||||
#define CALLING_OVERHEAD_REGION_IDENT 0
|
||||
#define CALLING_OVERHEAD_REGION_DELETE 0
|
||||
#define CALLING_OVERHEAD_REGION_GET_SEGMENT 0
|
||||
#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT 0
|
||||
#define CALLING_OVERHEAD_PORT_CREATE 0
|
||||
#define CALLING_OVERHEAD_PORT_IDENT 0
|
||||
#define CALLING_OVERHEAD_PORT_DELETE 0
|
||||
#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 0
|
||||
#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 0
|
||||
|
||||
#define CALLING_OVERHEAD_IO_INITIALIZE 0
|
||||
#define CALLING_OVERHEAD_IO_OPEN 0
|
||||
#define CALLING_OVERHEAD_IO_CLOSE 0
|
||||
#define CALLING_OVERHEAD_IO_READ 0
|
||||
#define CALLING_OVERHEAD_IO_WRITE 0
|
||||
#define CALLING_OVERHEAD_IO_CONTROL 0
|
||||
#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED 0
|
||||
#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE 0
|
||||
#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT 0
|
||||
#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE 0
|
||||
#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL 0
|
||||
#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD 0
|
||||
#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE 0
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,29 @@
|
||||
/*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.com/license/LICENSE.
|
||||
*/
|
||||
|
||||
#ifndef _RTEMS_TMTEST27
|
||||
#error "This is an RTEMS internal file you must not include directly."
|
||||
#endif
|
||||
|
||||
#ifndef __tm27_h
|
||||
#define __tm27_h
|
||||
|
||||
/*
|
||||
* Stuff for Time Test 27
|
||||
* Don't bother with hardware -- just use a software-interrupt
|
||||
*/
|
||||
|
||||
#define MUST_WAIT_FOR_INTERRUPT 0
|
||||
|
||||
#define Install_tm27_vector( handler ) set_vector( (handler), 35, 1 )
|
||||
|
||||
#define Cause_tm27_intr() asm volatile ("trap #3");
|
||||
|
||||
#define Clear_tm27_intr() /* empty */
|
||||
|
||||
#define Lower_tm27_intr() /* empty */
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,398 @@
|
||||
/*
|
||||
* uC5282 startup code
|
||||
*
|
||||
* This file contains the entry point for the application.
|
||||
* The name of this entry point is compiler dependent.
|
||||
* It jumps to the BSP which is responsible for performing
|
||||
* all initialization.
|
||||
*
|
||||
* COPYRIGHT (c) 1989-1998.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
* Copyright assigned to U.S. Government, 1994.
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
*
|
||||
* http://www.OARcorp.com/rtems/license.html.
|
||||
*
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#include <rtems/asm.h>
|
||||
|
||||
#define SRAM_SIZE (64*1024)
|
||||
#define DEFAULT_IPSBAR 0x40000000
|
||||
|
||||
BEGIN_CODE
|
||||
#define INITIAL_STACK __SRAMBASE+SRAM_SIZE-4
|
||||
|
||||
PUBLIC (INTERRUPT_VECTOR)
|
||||
SYM(INTERRUPT_VECTOR):
|
||||
.long INITIAL_STACK | 0: Initial 'SSP'
|
||||
.long start | 1: Initial PC
|
||||
.long SYM(_uhoh) | 2: Bus error
|
||||
.long SYM(_uhoh) | 3: Address error
|
||||
.long SYM(_uhoh) | 4: Illegal instruction
|
||||
.long SYM(_uhoh) | 5: Zero division
|
||||
.long SYM(_uhoh) | 6: CHK, CHK2 instruction
|
||||
.long SYM(_uhoh) | 7: TRAPcc, TRAPV instructions
|
||||
.long SYM(_uhoh) | 8: Privilege violation
|
||||
.long SYM(_uhoh) | 9: Trace
|
||||
.long SYM(_uhoh) | 10: Line 1010 emulator
|
||||
.long SYM(_uhoh) | 11: Line 1111 emulator
|
||||
.long SYM(_uhoh) | 12: Hardware breakpoint
|
||||
.long SYM(_uhoh) | 13: Reserved for coprocessor violation
|
||||
.long SYM(_uhoh) | 14: Format error
|
||||
.long SYM(_uhoh) | 15: Uninitialized interrupt
|
||||
.long SYM(_uhoh) | 16: Unassigned, reserved
|
||||
.long SYM(_uhoh) | 17:
|
||||
.long SYM(_uhoh) | 18:
|
||||
.long SYM(_uhoh) | 19:
|
||||
.long SYM(_uhoh) | 20:
|
||||
.long SYM(_uhoh) | 21:
|
||||
.long SYM(_uhoh) | 22:
|
||||
.long SYM(_uhoh) | 23:
|
||||
.long SYM(_spuriousInterrupt) | 24: Spurious interrupt
|
||||
.long SYM(_uhoh) | 25: Level 1 interrupt autovector
|
||||
.long SYM(_uhoh) | 26: Level 2 interrupt autovector
|
||||
.long SYM(_uhoh) | 27: Level 3 interrupt autovector
|
||||
.long SYM(_uhoh) | 28: Level 4 interrupt autovector
|
||||
.long SYM(_uhoh) | 29: Level 5 interrupt autovector
|
||||
.long SYM(_uhoh) | 30: Level 6 interrupt autovector
|
||||
.long SYM(_uhoh) | 31: Level 7 interrupt autovector
|
||||
.long SYM(_uhoh) | 32: Trap instruction (0-15)
|
||||
.long SYM(_uhoh) | 33:
|
||||
.long SYM(_uhoh) | 34:
|
||||
.long SYM(_uhoh) | 35:
|
||||
.long SYM(_uhoh) | 36:
|
||||
.long SYM(_uhoh) | 37:
|
||||
.long SYM(_uhoh) | 38:
|
||||
.long SYM(_uhoh) | 39:
|
||||
.long SYM(_uhoh) | 40:
|
||||
.long SYM(_uhoh) | 41:
|
||||
.long SYM(_uhoh) | 42:
|
||||
.long SYM(_uhoh) | 43:
|
||||
.long SYM(_uhoh) | 44:
|
||||
.long SYM(_uhoh) | 45:
|
||||
.long SYM(_uhoh) | 46:
|
||||
.long SYM(_uhoh) | 47:
|
||||
.long SYM(_uhoh) | 48: Reserved for coprocessor
|
||||
.long SYM(_uhoh) | 49:
|
||||
.long SYM(_uhoh) | 50:
|
||||
.long SYM(_uhoh) | 51:
|
||||
.long SYM(_uhoh) | 52:
|
||||
.long SYM(_uhoh) | 53:
|
||||
.long SYM(_uhoh) | 54:
|
||||
.long SYM(_uhoh) | 55:
|
||||
.long SYM(_uhoh) | 56:
|
||||
.long SYM(_uhoh) | 57:
|
||||
.long SYM(_uhoh) | 58:
|
||||
.long SYM(_uhoh) | 59: Unassigned, reserved
|
||||
.long SYM(_uhoh) | 60:
|
||||
.long SYM(_uhoh) | 61:
|
||||
.long SYM(_uhoh) | 62:
|
||||
.long SYM(_uhoh) | 63:
|
||||
.long SYM(_spuriousInterrupt) | 64: User spurious handler
|
||||
.long SYM(_uhoh) | 65:
|
||||
.long SYM(_uhoh) | 66:
|
||||
.long SYM(_uhoh) | 67:
|
||||
.long SYM(_uhoh) | 68:
|
||||
.long SYM(_uhoh) | 69:
|
||||
.long SYM(_uhoh) | 70:
|
||||
.long SYM(_uhoh) | 71:
|
||||
.long SYM(_uhoh) | 72:
|
||||
.long SYM(_uhoh) | 73:
|
||||
.long SYM(_uhoh) | 74:
|
||||
.long SYM(_uhoh) | 75:
|
||||
.long SYM(_uhoh) | 76:
|
||||
.long SYM(_uhoh) | 77:
|
||||
.long SYM(_uhoh) | 78:
|
||||
.long SYM(_uhoh) | 79:
|
||||
.long SYM(_uhoh) | 80:
|
||||
.long SYM(_uhoh) | 81:
|
||||
.long SYM(_uhoh) | 82:
|
||||
.long SYM(_uhoh) | 83:
|
||||
.long SYM(_uhoh) | 84:
|
||||
.long SYM(_uhoh) | 85:
|
||||
.long SYM(_uhoh) | 86:
|
||||
.long SYM(_uhoh) | 87:
|
||||
.long SYM(_uhoh) | 88:
|
||||
.long SYM(_uhoh) | 89:
|
||||
.long SYM(_uhoh) | 90:
|
||||
.long SYM(_uhoh) | 91:
|
||||
.long SYM(_uhoh) | 92:
|
||||
.long SYM(_uhoh) | 93:
|
||||
.long SYM(_uhoh) | 94:
|
||||
.long SYM(_uhoh) | 95:
|
||||
.long SYM(_uhoh) | 96:
|
||||
.long SYM(_uhoh) | 97:
|
||||
.long SYM(_uhoh) | 98:
|
||||
.long SYM(_uhoh) | 99:
|
||||
.long SYM(_uhoh) | 100:
|
||||
.long SYM(_uhoh) | 101:
|
||||
.long SYM(_uhoh) | 102:
|
||||
.long SYM(_uhoh) | 103:
|
||||
.long SYM(_uhoh) | 104:
|
||||
.long SYM(_uhoh) | 105:
|
||||
.long SYM(_uhoh) | 106:
|
||||
.long SYM(_uhoh) | 107:
|
||||
.long SYM(_uhoh) | 108:
|
||||
.long SYM(_uhoh) | 109:
|
||||
.long SYM(_uhoh) | 110:
|
||||
.long SYM(_uhoh) | 111:
|
||||
.long SYM(_uhoh) | 112:
|
||||
.long SYM(_uhoh) | 113:
|
||||
.long SYM(_uhoh) | 114:
|
||||
.long SYM(_uhoh) | 115:
|
||||
.long SYM(_uhoh) | 116:
|
||||
.long SYM(_uhoh) | 117:
|
||||
.long SYM(_uhoh) | 118:
|
||||
.long SYM(_uhoh) | 119:
|
||||
.long SYM(_uhoh) | 120:
|
||||
.long SYM(_uhoh) | 121:
|
||||
.long SYM(_uhoh) | 122:
|
||||
.long SYM(_uhoh) | 123:
|
||||
.long SYM(_uhoh) | 124:
|
||||
.long SYM(_uhoh) | 125:
|
||||
.long SYM(_uhoh) | 126:
|
||||
.long SYM(_uhoh) | 127:
|
||||
.long SYM(_uhoh) | 128:
|
||||
.long SYM(_uhoh) | 129:
|
||||
.long SYM(_uhoh) | 130:
|
||||
.long SYM(_uhoh) | 131:
|
||||
.long SYM(_uhoh) | 132:
|
||||
.long SYM(_uhoh) | 133:
|
||||
.long SYM(_uhoh) | 134:
|
||||
.long SYM(_uhoh) | 135:
|
||||
.long SYM(_uhoh) | 136:
|
||||
.long SYM(_uhoh) | 137:
|
||||
.long SYM(_uhoh) | 138:
|
||||
.long SYM(_uhoh) | 139:
|
||||
.long SYM(_uhoh) | 140:
|
||||
.long SYM(_uhoh) | 141:
|
||||
.long SYM(_uhoh) | 142:
|
||||
.long SYM(_uhoh) | 143:
|
||||
.long SYM(_uhoh) | 144:
|
||||
.long SYM(_uhoh) | 145:
|
||||
.long SYM(_uhoh) | 146:
|
||||
.long SYM(_uhoh) | 147:
|
||||
.long SYM(_uhoh) | 148:
|
||||
.long SYM(_uhoh) | 149:
|
||||
.long SYM(_uhoh) | 150:
|
||||
.long SYM(_uhoh) | 151:
|
||||
.long SYM(_uhoh) | 152:
|
||||
.long SYM(_uhoh) | 153:
|
||||
.long SYM(_uhoh) | 154:
|
||||
.long SYM(_uhoh) | 155:
|
||||
.long SYM(_uhoh) | 156:
|
||||
.long SYM(_uhoh) | 157:
|
||||
.long SYM(_uhoh) | 158:
|
||||
.long SYM(_uhoh) | 159:
|
||||
.long SYM(_uhoh) | 160:
|
||||
.long SYM(_uhoh) | 161:
|
||||
.long SYM(_uhoh) | 162:
|
||||
.long SYM(_uhoh) | 163:
|
||||
.long SYM(_uhoh) | 164:
|
||||
.long SYM(_uhoh) | 165:
|
||||
.long SYM(_uhoh) | 166:
|
||||
.long SYM(_uhoh) | 167:
|
||||
.long SYM(_uhoh) | 168:
|
||||
.long SYM(_uhoh) | 169:
|
||||
.long SYM(_uhoh) | 170:
|
||||
.long SYM(_uhoh) | 171:
|
||||
.long SYM(_uhoh) | 172:
|
||||
.long SYM(_uhoh) | 173:
|
||||
.long SYM(_uhoh) | 174:
|
||||
.long SYM(_uhoh) | 175:
|
||||
.long SYM(_uhoh) | 176:
|
||||
.long SYM(_uhoh) | 177:
|
||||
.long SYM(_uhoh) | 178:
|
||||
.long SYM(_uhoh) | 179:
|
||||
.long SYM(_uhoh) | 180:
|
||||
.long SYM(_uhoh) | 181:
|
||||
.long SYM(_uhoh) | 182:
|
||||
.long SYM(_uhoh) | 183:
|
||||
.long SYM(_uhoh) | 184:
|
||||
.long SYM(_uhoh) | 185:
|
||||
.long SYM(_uhoh) | 186:
|
||||
.long SYM(_uhoh) | 187:
|
||||
.long SYM(_uhoh) | 188:
|
||||
.long SYM(_uhoh) | 189:
|
||||
.long SYM(_uhoh) | 190:
|
||||
.long SYM(_uhoh) | 191:
|
||||
.long SYM(_uhoh) | 192:
|
||||
.long SYM(_uhoh) | 193:
|
||||
.long SYM(_uhoh) | 194:
|
||||
.long SYM(_uhoh) | 195:
|
||||
.long SYM(_uhoh) | 196:
|
||||
.long SYM(_uhoh) | 197:
|
||||
.long SYM(_uhoh) | 198:
|
||||
.long SYM(_uhoh) | 199:
|
||||
.long SYM(_uhoh) | 200:
|
||||
.long SYM(_uhoh) | 201:
|
||||
.long SYM(_uhoh) | 202:
|
||||
.long SYM(_uhoh) | 203:
|
||||
.long SYM(_uhoh) | 204:
|
||||
.long SYM(_uhoh) | 205:
|
||||
.long SYM(_uhoh) | 206:
|
||||
.long SYM(_uhoh) | 207:
|
||||
.long SYM(_uhoh) | 208:
|
||||
.long SYM(_uhoh) | 209:
|
||||
.long SYM(_uhoh) | 210:
|
||||
.long SYM(_uhoh) | 211:
|
||||
.long SYM(_uhoh) | 212:
|
||||
.long SYM(_uhoh) | 213:
|
||||
.long SYM(_uhoh) | 214:
|
||||
.long SYM(_uhoh) | 215:
|
||||
.long SYM(_uhoh) | 216:
|
||||
.long SYM(_uhoh) | 217:
|
||||
.long SYM(_uhoh) | 218:
|
||||
.long SYM(_uhoh) | 219:
|
||||
.long SYM(_uhoh) | 220:
|
||||
.long SYM(_uhoh) | 221:
|
||||
.long SYM(_uhoh) | 222:
|
||||
.long SYM(_uhoh) | 223:
|
||||
.long SYM(_uhoh) | 224:
|
||||
.long SYM(_uhoh) | 225:
|
||||
.long SYM(_uhoh) | 226:
|
||||
.long SYM(_uhoh) | 227:
|
||||
.long SYM(_uhoh) | 228:
|
||||
.long SYM(_uhoh) | 229:
|
||||
.long SYM(_uhoh) | 230:
|
||||
.long SYM(_uhoh) | 231:
|
||||
.long SYM(_uhoh) | 232:
|
||||
.long SYM(_uhoh) | 233:
|
||||
.long SYM(_uhoh) | 234:
|
||||
.long SYM(_uhoh) | 235:
|
||||
.long SYM(_uhoh) | 236:
|
||||
.long SYM(_uhoh) | 237:
|
||||
.long SYM(_uhoh) | 238:
|
||||
.long SYM(_uhoh) | 239:
|
||||
.long SYM(_uhoh) | 240:
|
||||
.long SYM(_uhoh) | 241:
|
||||
.long SYM(_uhoh) | 242:
|
||||
.long SYM(_uhoh) | 243:
|
||||
.long SYM(_uhoh) | 244:
|
||||
.long SYM(_uhoh) | 245:
|
||||
.long SYM(_uhoh) | 246:
|
||||
.long SYM(_uhoh) | 247:
|
||||
.long SYM(_uhoh) | 248:
|
||||
.long SYM(_uhoh) | 249:
|
||||
.long SYM(_uhoh) | 250:
|
||||
.long SYM(_uhoh) | 251:
|
||||
.long SYM(_uhoh) | 252:
|
||||
.long SYM(_uhoh) | 253:
|
||||
.long SYM(_uhoh) | 254:
|
||||
.long SYM(_uhoh) | 255:
|
||||
|
||||
/*
|
||||
* Default trap handler
|
||||
* With an oscilloscope you can see AS* stop
|
||||
*/
|
||||
.align 4
|
||||
PUBLIC (_uhoh)
|
||||
SYM(_uhoh):
|
||||
nop | Leave spot for breakpoint
|
||||
stop #0x2700 | Stop with interrupts disabled
|
||||
bra.w SYM(_uhoh) | Stuck forever
|
||||
|
||||
.align 4
|
||||
PUBLIC (_spuriousInterrupt)
|
||||
SYM(_spuriousInterrupt):
|
||||
addql #1,SYM(_M68kSpuriousInterruptCount)
|
||||
rte
|
||||
/***************************************************************************
|
||||
Function : start
|
||||
|
||||
Description : setup the internal SRAM for use and setup the INITIAL STACK ptr.
|
||||
Also enable the internal peripherals
|
||||
***************************************************************************/
|
||||
.align 4
|
||||
PUBLIC (start)
|
||||
SYM(start):
|
||||
move.w #0x0000,d0 | Turn off watchdog timer
|
||||
move.w d0, (0x40140000)
|
||||
move.w #0x2000,d0 | Set system frequency to 58960000
|
||||
move.w d0, (0x40120000)
|
||||
move.w #0x2700,sr | Disable interrupts
|
||||
|
||||
move.l #__SRAMBASE+1,d0 | Enable the MCF5282 internal SRAM
|
||||
movec d0,%rambar | ...so we have a stack
|
||||
move.l #(INITIAL_STACK),sp | Overwrite the fake stack pointer
|
||||
|
||||
/*
|
||||
* If we're being started by the debugger, and the debugger has
|
||||
* moved the IPSBAR, we're doomed........
|
||||
*/
|
||||
move.l #__IPSBAR+1,d0 | Enable the MCF5282 internal peripherals
|
||||
move.l d0,DEFAULT_IPSBAR
|
||||
|
||||
/*
|
||||
* Remainder of the startup code is handled by C code
|
||||
*/
|
||||
jmp SYM(Init5282) | Start C code (which never returns)
|
||||
|
||||
/***************************************************************************
|
||||
Function : CopyDataClearBSSAndStart
|
||||
|
||||
Description : Copy DATA segment, Copy SRAM segment, clear BSS segment,
|
||||
start C program. Assume that DATA and BSS sizes are multiples of 4.
|
||||
***************************************************************************/
|
||||
.align 4
|
||||
|
||||
PUBLIC (CopyDataClearBSSAndStart)
|
||||
SYM(CopyDataClearBSSAndStart):
|
||||
lea SYM(_data_dest_start),a0 | Get start of DATA in RAM
|
||||
lea SYM(_data_src_start),a2 | Get start of DATA in ROM
|
||||
cmpl a0,a2 | Are they the same?
|
||||
beq.s NODATACOPY | Yes, no copy necessary
|
||||
lea SYM(_data_dest_end),a1 | Get end of DATA in RAM
|
||||
bra.s DATACOPYLOOPTEST | Branch into copy loop
|
||||
DATACOPYLOOP:
|
||||
movel a2@+,a0@+ | Copy word from ROM to RAM
|
||||
DATACOPYLOOPTEST:
|
||||
cmpl a1,a0 | Done?
|
||||
bcs.s DATACOPYLOOP | No, skip
|
||||
NODATACOPY:
|
||||
|
||||
/* Now, clear BSS */
|
||||
lea _clear_start,a0 | Get start of BSS
|
||||
lea _clear_end,a1 | Get end of BSS
|
||||
clrl d0 | Value to set
|
||||
bra.s ZEROLOOPTEST | Branch into clear loop
|
||||
ZEROLOOP:
|
||||
movel d0,a0@+ | Clear a word
|
||||
ZEROLOOPTEST:
|
||||
cmpl a1,a0 | Done?
|
||||
bcs.s ZEROLOOP | No, skip
|
||||
|
||||
|
||||
/*
|
||||
* Right : Now we're ready to boot RTEMS
|
||||
*/
|
||||
clrl d0 | Pass in null to all boot_card() params
|
||||
movel d0,a7@- | environp
|
||||
movel d0,a7@- | argv
|
||||
movel d0,a7@- | argc
|
||||
jsr SYM(boot_card) | Call C boot_card function to startup RTEMS
|
||||
movel a7@+,d0
|
||||
movel a7@+,d0
|
||||
movel a7@+,d0
|
||||
MULTI_TASK_EXIT:
|
||||
nop
|
||||
nop
|
||||
trap #14
|
||||
bra MULTI_TASK_EXIT
|
||||
|
||||
END_CODE
|
||||
|
||||
.align 2
|
||||
BEGIN_DATA_DCL
|
||||
.align 2
|
||||
PUBLIC (_M68kSpuriousInterruptCount)
|
||||
SYM (_M68kSpuriousInterruptCount):
|
||||
.long 0
|
||||
END_DATA_DCL
|
||||
|
||||
END
|
||||
|
||||
@@ -0,0 +1,35 @@
|
||||
/*
|
||||
* SBC5206 bsp_cleanup
|
||||
*
|
||||
* This routine returns control from RTEMS to the monitor.
|
||||
*
|
||||
* Author:
|
||||
* David Fiddes, D.J@fiddes.surfaid.org
|
||||
* http://www.calm.hw.ac.uk/davidf/coldfire/
|
||||
*
|
||||
* COPYRIGHT (c) 1989-1998.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
* Copyright assigned to U.S. Government, 1994.
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
*
|
||||
* http://www.OARcorp.com/rtems/license.html.
|
||||
*
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#include <rtems.h>
|
||||
#include <bsp.h>
|
||||
#include <rtems/bspIo.h>
|
||||
|
||||
void bsp_cleanup( void )
|
||||
{
|
||||
printk("\nRTEMS exited!\n");
|
||||
for ( ;; )
|
||||
{
|
||||
asm volatile ( " nop " );
|
||||
asm volatile ( " nop " );
|
||||
}
|
||||
|
||||
}
|
||||
@@ -0,0 +1,227 @@
|
||||
/*
|
||||
* BSP startup
|
||||
*
|
||||
* This routine starts the application. It includes application,
|
||||
* board, and monitor specific initialization and configuration.
|
||||
* The generic CPU dependent initialization has been performed
|
||||
* before this routine is invoked.
|
||||
*
|
||||
* Author:
|
||||
* David Fiddes, D.J@fiddes.surfaid.org
|
||||
* http://www.calm.hw.ac.uk/davidf/coldfire/
|
||||
*
|
||||
* COPYRIGHT (c) 1989-1998.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
* Copyright assigned to U.S. Government, 1994.
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
*
|
||||
* http://www.OARcorp.com/rtems/license.html.
|
||||
*
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#include <bsp.h>
|
||||
#include <rtems/libio.h>
|
||||
#include <rtems/libcsupport.h>
|
||||
#include <string.h>
|
||||
|
||||
/*
|
||||
* The original table from the application and our copy of it with
|
||||
* some changes.
|
||||
*/
|
||||
extern rtems_configuration_table Configuration;
|
||||
rtems_configuration_table BSP_Configuration;
|
||||
rtems_cpu_table Cpu_table;
|
||||
char *rtems_progname;
|
||||
|
||||
/*
|
||||
* Location of 'VME' access
|
||||
*/
|
||||
#define VME_ONE_BASE 0x30000000
|
||||
#define VME_TWO_BASE 0x31000000
|
||||
|
||||
/*
|
||||
* Cacheable areas
|
||||
*/
|
||||
#define SDRAM_BASE 0
|
||||
#define SDRAM_SIZE (16*1024*1024)
|
||||
#define FLASH_BASE 0xFF800000
|
||||
#define FLASH_SIZE (8*1024*1024)
|
||||
|
||||
/*
|
||||
* CPU-space access
|
||||
*/
|
||||
#define m68k_set_cacr(_cacr) asm volatile ("movec %0,%%cacr\n\tnop" : : "d" (_cacr))
|
||||
#define m68k_set_acr0(_acr0) asm volatile ("movec %0,%%acr0" : : "d" (_acr0))
|
||||
#define m68k_set_acr1(_acr1) asm volatile ("movec %0,%%acr1" : : "d" (_acr1))
|
||||
|
||||
/*
|
||||
* Read/write copy of common cache
|
||||
* Split I/D cache
|
||||
* Allow CPUSHL to invalidate a cache line
|
||||
* Enable buffered writes
|
||||
* No burst transfers on non-cacheable accesses
|
||||
* Default cache mode is *disabled* (cache only ACRx areas)
|
||||
*/
|
||||
static unsigned32 cacr_mode = MCF5XXX_CACR_CENB |
|
||||
MCF5XXX_CACR_DBWE |
|
||||
MCF5XXX_CACR_DCM;
|
||||
/*
|
||||
* Cannot be frozen
|
||||
*/
|
||||
void _CPU_cache_freeze_data(void) {}
|
||||
void _CPU_cache_unfreeze_data(void) {}
|
||||
void _CPU_cache_freeze_instruction(void) {}
|
||||
void _CPU_cache_unfreeze_instruction(void) {}
|
||||
|
||||
/*
|
||||
* Write-through data cache -- flushes are unnecessary
|
||||
*/
|
||||
void _CPU_cache_flush_1_data_line(const void *d_addr) {}
|
||||
void _CPU_cache_flush_entire_data(void) {}
|
||||
|
||||
void _CPU_cache_enable_instruction(void)
|
||||
{
|
||||
rtems_interrupt_level level;
|
||||
|
||||
rtems_interrupt_disable(level);
|
||||
cacr_mode &= ~MCF5XXX_CACR_DIDI;
|
||||
m68k_set_cacr(cacr_mode);
|
||||
rtems_interrupt_enable(level);
|
||||
}
|
||||
|
||||
void _CPU_cache_disable_instruction(void)
|
||||
{
|
||||
rtems_interrupt_level level;
|
||||
|
||||
rtems_interrupt_disable(level);
|
||||
cacr_mode |= MCF5XXX_CACR_DIDI;
|
||||
m68k_set_cacr(cacr_mode);
|
||||
rtems_interrupt_enable(level);
|
||||
}
|
||||
|
||||
void _CPU_cache_invalidate_entire_instruction(void)
|
||||
{
|
||||
m68k_set_cacr(cacr_mode | MCF5XXX_CACR_CINV | MCF5XXX_CACR_INVI);
|
||||
}
|
||||
|
||||
void _CPU_cache_invalidate_1_instruction_line(const void *addr)
|
||||
{
|
||||
/*
|
||||
* Top half of cache is I-space
|
||||
*/
|
||||
addr = (void *)((int)addr | 0x400);
|
||||
asm volatile ("cpushl %%bc,(%0)" :: "a" (addr));
|
||||
}
|
||||
|
||||
void _CPU_cache_enable_data(void)
|
||||
{
|
||||
rtems_interrupt_level level;
|
||||
|
||||
rtems_interrupt_disable(level);
|
||||
cacr_mode &= ~MCF5XXX_CACR_DISD;
|
||||
m68k_set_cacr(cacr_mode);
|
||||
rtems_interrupt_enable(level);
|
||||
}
|
||||
|
||||
void _CPU_cache_disable_data(void)
|
||||
{
|
||||
rtems_interrupt_level level;
|
||||
|
||||
rtems_interrupt_disable(level);
|
||||
rtems_interrupt_disable(level);
|
||||
cacr_mode |= MCF5XXX_CACR_DISD;
|
||||
m68k_set_cacr(cacr_mode);
|
||||
rtems_interrupt_enable(level);
|
||||
}
|
||||
|
||||
void _CPU_cache_invalidate_entire_data(void)
|
||||
{
|
||||
m68k_set_cacr(cacr_mode | MCF5XXX_CACR_CINV | MCF5XXX_CACR_INVD);
|
||||
}
|
||||
|
||||
void _CPU_cache_invalidate_1_data_line(const void *addr)
|
||||
{
|
||||
/*
|
||||
* Bottom half of cache is D-space
|
||||
*/
|
||||
addr = (void *)((int)addr & ~0x400);
|
||||
asm volatile ("cpushl %%bc,(%0)" :: "a" (addr));
|
||||
}
|
||||
|
||||
/*
|
||||
* Use the shared implementations of the following routines
|
||||
*/
|
||||
void bsp_postdriver_hook(void);
|
||||
void bsp_libc_init( void *, unsigned32, int );
|
||||
void bsp_pretasking_hook(void); /* m68k version */
|
||||
|
||||
/*
|
||||
* bsp_start
|
||||
*
|
||||
* This routine does the bulk of the system initialisation.
|
||||
*/
|
||||
void bsp_start( void )
|
||||
{
|
||||
extern char _WorkspaceBase[];
|
||||
extern char _RamSize[];
|
||||
extern unsigned long _M68k_Ramsize;
|
||||
|
||||
_M68k_Ramsize = (unsigned long)_RamSize; /* RAM size set in linker script */
|
||||
|
||||
/*
|
||||
* Allocate the memory for the RTEMS Work Space. This can come from
|
||||
* a variety of places: hard coded address, malloc'ed from outside
|
||||
* RTEMS world (e.g. simulator or primitive memory manager), or (as
|
||||
* typically done by stock BSPs) by subtracting the required amount
|
||||
* of work space from the last physical address on the CPU board.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Need to "allocate" the memory for the RTEMS Workspace and
|
||||
* tell the RTEMS configuration where it is. This memory is
|
||||
* not malloc'ed. It is just "pulled from the air".
|
||||
*/
|
||||
|
||||
BSP_Configuration.work_space_start = (void *)_WorkspaceBase;
|
||||
|
||||
/*
|
||||
* initialize the CPU table for this BSP
|
||||
*/
|
||||
Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
|
||||
Cpu_table.postdriver_hook = bsp_postdriver_hook;
|
||||
Cpu_table.do_zero_of_workspace = TRUE;
|
||||
Cpu_table.interrupt_stack_size = 4096;
|
||||
|
||||
Cpu_table.interrupt_vector_table = (m68k_isr *)0; /* vectors at start of RAM */
|
||||
|
||||
/*
|
||||
* Invalidate the cache and disable it
|
||||
*/
|
||||
m68k_set_acr0(0);
|
||||
m68k_set_acr1(0);
|
||||
m68k_set_cacr(MCF5XXX_CACR_CINV);
|
||||
|
||||
/*
|
||||
* Cache SDRAM and FLASH
|
||||
*/
|
||||
m68k_set_acr0(MCF5XXX_ACR_AB(SDRAM_BASE) |
|
||||
MCF5XXX_ACR_AM(SDRAM_SIZE-1) |
|
||||
MCF5XXX_ACR_EN |
|
||||
MCF5XXX_ACR_BWE |
|
||||
MCF5XXX_ACR_SM_IGNORE);
|
||||
|
||||
/*
|
||||
* Enable the cache
|
||||
*/
|
||||
m68k_set_cacr(cacr_mode);
|
||||
|
||||
}
|
||||
|
||||
unsigned32 get_CPU_clock_speed(void)
|
||||
{
|
||||
extern char _CPUClockSpeed[];
|
||||
return( (unsigned32)_CPUClockSpeed);
|
||||
}
|
||||
@@ -0,0 +1,86 @@
|
||||
/*
|
||||
* This is where the real hardware setup is done. A minimal stack
|
||||
* has been provided by the start.S code. No normal C or RTEMS
|
||||
* functions can be called from here.
|
||||
*
|
||||
* This routine is pretty simple for the uC5282 because all the hard
|
||||
* work has been done by the bootstrap dBUG code.
|
||||
*/
|
||||
|
||||
#include <rtems.h>
|
||||
#include <bsp.h>
|
||||
#define m68k_set_cacr(_cacr) asm volatile ("movec %0,%%cacr" : : "d" (_cacr))
|
||||
#define m68k_set_acr0(_acr0) asm volatile ("movec %0,%%acr0" : : "d" (_acr0))
|
||||
#define m68k_set_acr1(_acr1) asm volatile ("movec %0,%%acr1" : : "d" (_acr1))
|
||||
#define MM_SDRAM_BASE (0x00000000)
|
||||
|
||||
void Init5282 (void)
|
||||
{
|
||||
extern void CopyDataClearBSSAndStart (void);
|
||||
int x;
|
||||
int temp = 0;
|
||||
|
||||
//Setup the GPIO Registers
|
||||
MCF5282_GPIO_PBCDPAR = 0x80;
|
||||
MCF5282_GPIO_PEPAR = 0x5100;
|
||||
MCF5282_GPIO_PJPAR = 0xFF;
|
||||
MCF5282_GPIO_PASPAR = 0x0000;
|
||||
MCF5282_GPIO_PEHLPAR = 0xC0;
|
||||
MCF5282_GPIO_PUAPAR = 0x0F;
|
||||
MCF5282_QADC_DDRQB = 0x07;
|
||||
MCF5282_GPTA_GPTDDR = 0x0C;
|
||||
MCF5282_GPTA_GPTPORT = 0x4;
|
||||
|
||||
//Setup the Chip Selects so CS0 is flash
|
||||
MCF5282_CS0_CSAR =(0xff800000 & 0xffff0000)>>16;
|
||||
MCF5282_CS0_CSMR = 0x007f0001;
|
||||
MCF5282_CS0_CSCR =(((0xf)&0x0F)<<10)|(1<<8)|(0x80);
|
||||
|
||||
//Setup the SDRAM
|
||||
for(x=0; x<20000; x++)
|
||||
{
|
||||
temp +=1;
|
||||
}
|
||||
MCF5282_SDRAMC_DCR = 0x00000239;
|
||||
MCF5282_SDRAMC_DACR0 = 0x00001320;
|
||||
MCF5282_SDRAMC_DMR0 = (0x00FC0000) | (0x00000001);
|
||||
for(x=0; x<20000; x++)
|
||||
{
|
||||
temp +=1;
|
||||
}
|
||||
// set ip ( bit 3 ) in dacr
|
||||
MCF5282_SDRAMC_DACR0 |= (0x00000008) ;
|
||||
// init precharge
|
||||
*((short *)MM_SDRAM_BASE) = 0;
|
||||
// set RE in dacr
|
||||
MCF5282_SDRAMC_DACR0 |= (0x00008000);
|
||||
// wait
|
||||
for(x=0; x<20000; x++)
|
||||
{
|
||||
temp +=1;
|
||||
}
|
||||
// issue IMRS
|
||||
MCF5282_SDRAMC_DACR0 |= (0x00000040);
|
||||
*((short *)MM_SDRAM_BASE) = 0x0000;
|
||||
for(x=0; x<60000; x++)
|
||||
{
|
||||
temp +=1;
|
||||
}
|
||||
*((unsigned long*)MM_SDRAM_BASE)=0x12345678;
|
||||
|
||||
/* Copy the interrupt vector table to address 0x0 in SDRAM */
|
||||
{
|
||||
extern void INTERRUPT_VECTOR();
|
||||
uint32_t *inttab = (uint32_t *)&INTERRUPT_VECTOR;
|
||||
uint32_t *intvec = (uint32_t *)0x0;
|
||||
register int i;
|
||||
for (i = 0; i < 256; i++)
|
||||
{
|
||||
*(intvec++) = *(inttab++);
|
||||
}
|
||||
}
|
||||
/*
|
||||
* Copy data, clear BSS and call boot_card()
|
||||
*/
|
||||
CopyDataClearBSSAndStart ();
|
||||
}
|
||||
@@ -0,0 +1,175 @@
|
||||
/*
|
||||
* This file contains directives for the GNU linker which are specific
|
||||
* to the Arcturus uC DIMM ColdFire 5282
|
||||
*
|
||||
* COPYRIGHT (c) 1989-1999.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.OARcorp.com/rtems/license.html.
|
||||
*
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
/*
|
||||
* Declare some sizes.
|
||||
*/
|
||||
_RamBase = DEFINED(_RamBase) ? _RamBase : 0x0 ;
|
||||
_RamSize = DEFINED(_RamSize) ? _RamSize : 16M ;
|
||||
_HeapSize = DEFINED(_HeapSize) ? _HeapSize : 0 ;
|
||||
_VBR = 0x0;
|
||||
|
||||
/*
|
||||
* System clock speed
|
||||
*/
|
||||
_CPUClockSpeed = DEFINED(_CPUClockSpeed) ? _CPUClockSpeed : 58976000 ;
|
||||
|
||||
/*
|
||||
* Location of on-chip devicesa
|
||||
*/
|
||||
__IPSBAR = DEFINED(__IPSBAR) ? __IPSBAR : 0x40000000 ;
|
||||
__SRAMBASE = DEFINED(__SRAMBASE) ? __SRAMBASE : 0x20000000 ;
|
||||
|
||||
|
||||
ENTRY(start)
|
||||
MEMORY
|
||||
{
|
||||
ram : ORIGIN = 0, LENGTH = 16M
|
||||
sram : ORIGIN = 0x20000000, LENGTH = 64K
|
||||
flash : ORIGIN = 0xFF800000, LENGTH = 8M
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
|
||||
_header_offset = 0;
|
||||
|
||||
/*
|
||||
* Text, data and bss segments
|
||||
*/
|
||||
.text 0x40000 : {
|
||||
|
||||
*(.text)
|
||||
*(.ram_code)
|
||||
|
||||
/*
|
||||
* C++ constructors/destructors
|
||||
*/
|
||||
*(.gnu.linkonce.t.*)
|
||||
|
||||
/*
|
||||
* Initialization and finalization code.
|
||||
*
|
||||
* Various files can provide initialization and finalization
|
||||
* functions. crtbegin.o and crtend.o are two instances. The
|
||||
* body of these functions are in .init and .fini sections. We
|
||||
* accumulate the bodies here, and prepend function prologues
|
||||
* from crti.o and function epilogues from crtn.o. crti.o must
|
||||
* be linked first; crtn.o must be linked last. Because these
|
||||
* are wildcards, it doesn't matter if the user does not
|
||||
* actually link against crti.o and crtn.o; the linker won't
|
||||
* look for a file to match a wildcard. The wildcard also
|
||||
* means that it doesn't matter which directory crti.o and
|
||||
* crtn.o are in.
|
||||
*/
|
||||
PROVIDE (_init = .);
|
||||
*crti.o(.init)
|
||||
*(.init)
|
||||
*crtn.o(.init)
|
||||
PROVIDE (_fini = .);
|
||||
*crti.o(.fini)
|
||||
*(.fini)
|
||||
*crtn.o(.fini)
|
||||
|
||||
/*
|
||||
* Special FreeBSD sysctl sections.
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
__start_set_sysctl_set = .;
|
||||
*(set_sysctl_*);
|
||||
__stop_set_sysctl_set = ABSOLUTE(.);
|
||||
*(set_domain_*);
|
||||
*(set_pseudo_*);
|
||||
|
||||
|
||||
/*
|
||||
* C++ constructors/destructors
|
||||
*
|
||||
* gcc uses crtbegin.o to find the start of the constructors
|
||||
* and destructors so we make sure it is first. Because this
|
||||
* is a wildcard, it doesn't matter if the user does not
|
||||
* actually link against crtbegin.o; the linker won't look for
|
||||
* a file to match a wildcard. The wildcard also means that
|
||||
* it doesn't matter which directory crtbegin.o is in. The
|
||||
* constructor and destructor list are terminated in
|
||||
* crtend.o. The same comments apply to it.
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
*crtbegin.o(.ctors)
|
||||
*(.ctors)
|
||||
*crtend.o(.ctors)
|
||||
*crtbegin.o(.dtors)
|
||||
*(.dtors)
|
||||
*crtend.o(.dtors)
|
||||
|
||||
/*
|
||||
* Exception frame info
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
*(.eh_frame)
|
||||
|
||||
/*
|
||||
* Read-only data
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
_rodata_start = . ;
|
||||
*(.rodata*)
|
||||
*(.gnu.linkonce.r*)
|
||||
|
||||
. = ALIGN (16);
|
||||
|
||||
*(.console_gdb_xfer)
|
||||
*(.bootstrap_data)
|
||||
. = ALIGN(16);
|
||||
_estuff = .;
|
||||
PROVIDE (_etext = .);
|
||||
} >ram
|
||||
|
||||
.data : {
|
||||
PROVIDE( _data_dest_start = . );
|
||||
PROVIDE( _copy_start = .);
|
||||
*(.data)
|
||||
*(.gnu.linkonce.d*)
|
||||
*(.gcc_except_table)
|
||||
*(.jcr)
|
||||
. = ALIGN (16);
|
||||
PROVIDE (_edata = .);
|
||||
PROVIDE (_copy_end = .);
|
||||
PROVIDE (_data_dest_end = . );
|
||||
} >ram
|
||||
|
||||
_data_src_start = _estuff;
|
||||
_data_src_end = _data_dest_start + SIZEOF(.data);
|
||||
|
||||
.bss : {
|
||||
_clear_start = .;
|
||||
*(.bss)
|
||||
*(COMMON)
|
||||
. = ALIGN (16);
|
||||
PROVIDE (end = .);
|
||||
_clear_end = .;
|
||||
|
||||
_WorkspaceBase = .;
|
||||
} >ram
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
|
||||
PROVIDE (end_of_all = .);
|
||||
}
|
||||
@@ -0,0 +1,175 @@
|
||||
/*
|
||||
* This file contains directives for the GNU linker which are specific
|
||||
* to the Arcturus uC DIMM ColdFire 5282
|
||||
*
|
||||
* COPYRIGHT (c) 1989-1999.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.OARcorp.com/rtems/license.html.
|
||||
*
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
/*
|
||||
* Declare some sizes.
|
||||
*/
|
||||
_RamBase = DEFINED(_RamBase) ? _RamBase : 0x0 ;
|
||||
_RamSize = DEFINED(_RamSize) ? _RamSize : 16M ;
|
||||
_HeapSize = DEFINED(_HeapSize) ? _HeapSize : 0 ;
|
||||
_VBR = 0x0;
|
||||
|
||||
/*
|
||||
* System clock speed
|
||||
*/
|
||||
_CPUClockSpeed = DEFINED(_CPUClockSpeed) ? _CPUClockSpeed : 58976000 ;
|
||||
|
||||
/*
|
||||
* Location of on-chip devicesa
|
||||
*/
|
||||
__IPSBAR = DEFINED(__IPSBAR) ? __IPSBAR : 0x40000000 ;
|
||||
__SRAMBASE = DEFINED(__SRAMBASE) ? __SRAMBASE : 0x20000000 ;
|
||||
|
||||
ENTRY(start)
|
||||
MEMORY
|
||||
{
|
||||
ram : ORIGIN = 0, LENGTH = 16M
|
||||
sram : ORIGIN = 0x20000000, LENGTH = 64K
|
||||
flash : ORIGIN = 0xFF800000, LENGTH = 8M
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
|
||||
_header_offset = 0;
|
||||
|
||||
/*
|
||||
* Text, data and bss segments
|
||||
*/
|
||||
.text : {
|
||||
|
||||
*(.text)
|
||||
*(.ram_code)
|
||||
|
||||
/*
|
||||
* C++ constructors/destructors
|
||||
*/
|
||||
*(.gnu.linkonce.t.*)
|
||||
|
||||
/*
|
||||
* Initialization and finalization code.
|
||||
*
|
||||
* Various files can provide initialization and finalization
|
||||
* functions. crtbegin.o and crtend.o are two instances. The
|
||||
* body of these functions are in .init and .fini sections. We
|
||||
* accumulate the bodies here, and prepend function prologues
|
||||
* from crti.o and function epilogues from crtn.o. crti.o must
|
||||
* be linked first; crtn.o must be linked last. Because these
|
||||
* are wildcards, it doesn't matter if the user does not
|
||||
* actually link against crti.o and crtn.o; the linker won't
|
||||
* look for a file to match a wildcard. The wildcard also
|
||||
* means that it doesn't matter which directory crti.o and
|
||||
* crtn.o are in.
|
||||
*/
|
||||
PROVIDE (_init = .);
|
||||
*crti.o(.init)
|
||||
*(.init)
|
||||
*crtn.o(.init)
|
||||
PROVIDE (_fini = .);
|
||||
*crti.o(.fini)
|
||||
*(.fini)
|
||||
*crtn.o(.fini)
|
||||
|
||||
/*
|
||||
* Special FreeBSD sysctl sections.
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
__start_set_sysctl_set = .;
|
||||
*(set_sysctl_*);
|
||||
__stop_set_sysctl_set = ABSOLUTE(.);
|
||||
*(set_domain_*);
|
||||
*(set_pseudo_*);
|
||||
|
||||
|
||||
/*
|
||||
* C++ constructors/destructors
|
||||
*
|
||||
* gcc uses crtbegin.o to find the start of the constructors
|
||||
* and destructors so we make sure it is first. Because this
|
||||
* is a wildcard, it doesn't matter if the user does not
|
||||
* actually link against crtbegin.o; the linker won't look for
|
||||
* a file to match a wildcard. The wildcard also means that
|
||||
* it doesn't matter which directory crtbegin.o is in. The
|
||||
* constructor and destructor list are terminated in
|
||||
* crtend.o. The same comments apply to it.
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
*crtbegin.o(.ctors)
|
||||
*(.ctors)
|
||||
*crtend.o(.ctors)
|
||||
*crtbegin.o(.dtors)
|
||||
*(.dtors)
|
||||
*crtend.o(.dtors)
|
||||
|
||||
/*
|
||||
* Exception frame info
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
*(.eh_frame)
|
||||
|
||||
/*
|
||||
* Read-only data
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
_rodata_start = . ;
|
||||
*(.rodata*)
|
||||
*(.gnu.linkonce.r*)
|
||||
|
||||
. = ALIGN (16);
|
||||
|
||||
*(.console_gdb_xfer)
|
||||
*(.bootstrap_data)
|
||||
. = ALIGN(16);
|
||||
_estuff = .;
|
||||
PROVIDE (_etext = .);
|
||||
} >flash
|
||||
|
||||
.data 0x1000 : AT ( ADDR(.text) + SIZEOF ( .text ) )
|
||||
{
|
||||
PROVIDE( _data_dest_start = . );
|
||||
PROVIDE( _copy_start = .);
|
||||
*(.data)
|
||||
*(.gnu.linkonce.d*)
|
||||
*(.gcc_except_table)
|
||||
*(.jcr)
|
||||
. = ALIGN (16);
|
||||
PROVIDE (_edata = .);
|
||||
PROVIDE (_copy_end = .);
|
||||
PROVIDE (_data_dest_end = . );
|
||||
}
|
||||
|
||||
_data_src_start = _estuff;
|
||||
_data_src_end = _data_dest_start + SIZEOF(.data);
|
||||
|
||||
.bss : {
|
||||
_clear_start = .;
|
||||
*(.bss)
|
||||
*(COMMON)
|
||||
. = ALIGN (16);
|
||||
PROVIDE (end = .);
|
||||
_clear_end = .;
|
||||
|
||||
_WorkspaceBase = .;
|
||||
}
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
|
||||
PROVIDE (end_of_all = .);
|
||||
}
|
||||
@@ -0,0 +1,174 @@
|
||||
/*
|
||||
* This file contains directives for the GNU linker which are specific
|
||||
* to the Arcturus uC DIMM ColdFire 5282
|
||||
*
|
||||
* COPYRIGHT (c) 1989-1999.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.OARcorp.com/rtems/license.html.
|
||||
*
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
/*
|
||||
* Declare some sizes.
|
||||
*/
|
||||
_RamBase = DEFINED(_RamBase) ? _RamBase : 0x0 ;
|
||||
_RamSize = DEFINED(_RamSize) ? _RamSize : 16M ;
|
||||
_HeapSize = DEFINED(_HeapSize) ? _HeapSize : 0 ;
|
||||
_VBR = 0x0;
|
||||
|
||||
/*
|
||||
* System clock speed
|
||||
*/
|
||||
_CPUClockSpeed = DEFINED(_CPUClockSpeed) ? _CPUClockSpeed : 58976000 ;
|
||||
|
||||
/*
|
||||
* Location of on-chip devicesa
|
||||
*/
|
||||
__IPSBAR = DEFINED(__IPSBAR) ? __IPSBAR : 0x40000000 ;
|
||||
__SRAMBASE = DEFINED(__SRAMBASE) ? __SRAMBASE : 0x20000000 ;
|
||||
|
||||
ENTRY(start)
|
||||
MEMORY
|
||||
{
|
||||
ram : ORIGIN = 0, LENGTH = 16M
|
||||
sram : ORIGIN = 0x20000000, LENGTH = 64K
|
||||
flash : ORIGIN = 0xFF800000, LENGTH = 8M
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
|
||||
_header_offset = 0;
|
||||
|
||||
/*
|
||||
* Text, data and bss segments
|
||||
*/
|
||||
.text 0x40000 : {
|
||||
|
||||
*(.text)
|
||||
*(.ram_code)
|
||||
|
||||
/*
|
||||
* C++ constructors/destructors
|
||||
*/
|
||||
*(.gnu.linkonce.t.*)
|
||||
|
||||
/*
|
||||
* Initialization and finalization code.
|
||||
*
|
||||
* Various files can provide initialization and finalization
|
||||
* functions. crtbegin.o and crtend.o are two instances. The
|
||||
* body of these functions are in .init and .fini sections. We
|
||||
* accumulate the bodies here, and prepend function prologues
|
||||
* from crti.o and function epilogues from crtn.o. crti.o must
|
||||
* be linked first; crtn.o must be linked last. Because these
|
||||
* are wildcards, it doesn't matter if the user does not
|
||||
* actually link against crti.o and crtn.o; the linker won't
|
||||
* look for a file to match a wildcard. The wildcard also
|
||||
* means that it doesn't matter which directory crti.o and
|
||||
* crtn.o are in.
|
||||
*/
|
||||
PROVIDE (_init = .);
|
||||
*crti.o(.init)
|
||||
*(.init)
|
||||
*crtn.o(.init)
|
||||
PROVIDE (_fini = .);
|
||||
*crti.o(.fini)
|
||||
*(.fini)
|
||||
*crtn.o(.fini)
|
||||
|
||||
/*
|
||||
* Special FreeBSD sysctl sections.
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
__start_set_sysctl_set = .;
|
||||
*(set_sysctl_*);
|
||||
__stop_set_sysctl_set = ABSOLUTE(.);
|
||||
*(set_domain_*);
|
||||
*(set_pseudo_*);
|
||||
|
||||
|
||||
/*
|
||||
* C++ constructors/destructors
|
||||
*
|
||||
* gcc uses crtbegin.o to find the start of the constructors
|
||||
* and destructors so we make sure it is first. Because this
|
||||
* is a wildcard, it doesn't matter if the user does not
|
||||
* actually link against crtbegin.o; the linker won't look for
|
||||
* a file to match a wildcard. The wildcard also means that
|
||||
* it doesn't matter which directory crtbegin.o is in. The
|
||||
* constructor and destructor list are terminated in
|
||||
* crtend.o. The same comments apply to it.
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
*crtbegin.o(.ctors)
|
||||
*(.ctors)
|
||||
*crtend.o(.ctors)
|
||||
*crtbegin.o(.dtors)
|
||||
*(.dtors)
|
||||
*crtend.o(.dtors)
|
||||
|
||||
/*
|
||||
* Exception frame info
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
*(.eh_frame)
|
||||
|
||||
/*
|
||||
* Read-only data
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
_rodata_start = . ;
|
||||
*(.rodata*)
|
||||
*(.gnu.linkonce.r*)
|
||||
|
||||
. = ALIGN (16);
|
||||
|
||||
*(.console_gdb_xfer)
|
||||
*(.bootstrap_data)
|
||||
. = ALIGN(16);
|
||||
_estuff = .;
|
||||
PROVIDE (_etext = .);
|
||||
} >ram
|
||||
|
||||
.data : {
|
||||
PROVIDE( _data_dest_start = . );
|
||||
PROVIDE( _copy_start = .);
|
||||
*(.data)
|
||||
*(.gnu.linkonce.d*)
|
||||
*(.gcc_except_table)
|
||||
*(.jcr)
|
||||
. = ALIGN (16);
|
||||
PROVIDE (_edata = .);
|
||||
PROVIDE (_copy_end = .);
|
||||
PROVIDE (_data_dest_end = . );
|
||||
} >ram
|
||||
|
||||
_data_src_start = _estuff;
|
||||
_data_src_end = _data_dest_start + SIZEOF(.data);
|
||||
|
||||
.bss : {
|
||||
_clear_start = .;
|
||||
*(.bss)
|
||||
*(COMMON)
|
||||
. = ALIGN (16);
|
||||
PROVIDE (end = .);
|
||||
_clear_end = .;
|
||||
|
||||
_WorkspaceBase = .;
|
||||
} >ram
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
|
||||
PROVIDE (end_of_all = .);
|
||||
}
|
||||
@@ -0,0 +1,43 @@
|
||||
/*
|
||||
* Timer Init
|
||||
*
|
||||
* Use the last DMA timer (DTIM3) as the diagnostic timer.
|
||||
*/
|
||||
|
||||
#include <rtems.h>
|
||||
#include <bsp.h>
|
||||
|
||||
void
|
||||
Timer_initialize(void)
|
||||
{
|
||||
int preScaleDivisor = 58;
|
||||
int div = MCF5282_TIMER_DTMR_CLK_DIV1;
|
||||
MCF5282_TIMER3_DTRR = 0x2710;
|
||||
MCF5282_TIMER3_DTMR = 0;
|
||||
MCF5282_TIMER3_DTMR = MCF5282_TIMER_DTMR_PS(preScaleDivisor - 1) | div |
|
||||
MCF5282_TIMER_DTMR_RST;
|
||||
}
|
||||
|
||||
/*
|
||||
* Return timer value in microsecond units
|
||||
*/
|
||||
int
|
||||
Read_timer(void)
|
||||
{
|
||||
return MCF5282_TIMER3_DTCN;
|
||||
}
|
||||
|
||||
/*
|
||||
* Empty function call used in loops to measure basic cost of looping
|
||||
* in Timing Test Suite.
|
||||
*/
|
||||
rtems_status_code
|
||||
Empty_function(void)
|
||||
{
|
||||
return RTEMS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
void
|
||||
Set_find_average_overhead(rtems_boolean find_flag)
|
||||
{
|
||||
}
|
||||
Reference in New Issue
Block a user