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cpukit/aarch64: Add ESR register decoding
This commit is contained in:
Alex White
committed by
Joel Sherrill
Joel Sherrill
parent
05cd707d28
commit
1af1c193bc
@@ -45,10 +45,113 @@
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#include <inttypes.h>
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#include <rtems/score/cpu.h>
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#include <rtems/score/io.h>
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#include <rtems/bspIo.h>
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typedef struct {
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char *s;
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size_t n;
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} String_Context;
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static void _CPU_Put_char( int c, void *arg )
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{
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String_Context *sctx = arg;
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size_t n = sctx->n;
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if (n > 0) {
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char *s = sctx->s;
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*s = (char) c;
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sctx->s = s + 1;
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sctx->n = n - 1;
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}
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}
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static void _CPU_Binary_sprintf(
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char *s,
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size_t maxlen,
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uint32_t num_bits,
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uint32_t value
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)
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{
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String_Context sctx;
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uint32_t mask;
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sctx.s = s;
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sctx.n = maxlen;
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mask = 1 << (num_bits - 1);
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while ( mask != 0 ) {
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_IO_Printf( _CPU_Put_char, &sctx, "%d", (value & mask ? 1 : 0) );
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mask >>= 1;
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}
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s[num_bits] = '\0';
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}
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static const char* _CPU_Exception_class_to_string( uint16_t exception_class )
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{
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/* The 80 character limit is intentionally ignored for these strings. */
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switch ( exception_class ) {
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case 0x01:
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return "Trapped WFI or WFE instruction";
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case 0x03:
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return "Trapped MCR or MRC access with (coproc==0b1111)";
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case 0x04:
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return "Trapped MCRR or MRRC access with (coproc==0b1111)";
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case 0x05:
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return "Trapped MCR or MRC access with (coproc==0b1110)";
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case 0x06:
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return "Trapped LDC or STC access";
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case 0x0c:
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return "Trapped MRRC access with (coproc==0b1110)";
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case 0x0e:
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return "Illegal Execution state";
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case 0x18:
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return "Trapped MSR, MRS, or System instruction";
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case 0x20:
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return "Instruction Abort from a lower Exception level";
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case 0x21:
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return "Instruction Abort taken without a change in Exception level";
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case 0x22:
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return "PC alignment fault";
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case 0x24:
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return "Data Abort from a lower Exception level";
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case 0x25:
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return "Data Abort taken without a change in Exception level";
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case 0x26:
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return "SP alignment fault";
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case 0x30:
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return "Breakpoint exception from a lower Exception level";
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case 0x31:
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return "Breakpoint exception taken without a change in Exception level";
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case 0x32:
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return "Software Step exception from a lower Exception level";
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case 0x33:
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return "Software Step exception taken without a change in Exception level";
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case 0x34:
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return "Watchpoint exception from a lower Exception level";
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case 0x35:
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return "Watchpoint exception taken without a change in Exception level";
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case 0x38:
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return "BKPT instruction execution in AArch32 state";
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case 0x3c:
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return "BRK instruction execution in AArch64 state";
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default:
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return "Unknown";
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}
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}
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void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
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{
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uint32_t ec;
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uint32_t il;
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uint32_t iss;
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char ec_str[7];
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char iss_str[26];
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int i;
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const uint128_t *qx;
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printk(
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"\n"
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"X0 = 0x%016" PRIx64 " X17 = 0x%016" PRIx64 "\n"
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@@ -68,8 +171,7 @@ void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
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"X14 = 0x%016" PRIx64 " SP = 0x%016" PRIxPTR "\n"
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"X15 = 0x%016" PRIx64 " PC = 0x%016" PRIxPTR "\n"
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"X16 = 0x%016" PRIx64 " DAIF = 0x%016" PRIx64 "\n"
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"VEC = 0x%016" PRIxPTR " CPSR = 0x%016" PRIx64 "\n"
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"ESR = 0x%016" PRIx64 " FAR = 0x%016" PRIx64 "\n",
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"VEC = 0x%016" PRIxPTR " CPSR = 0x%016" PRIx64 "\n",
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frame->register_x0, frame->register_x17,
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frame->register_x1, frame->register_x18,
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frame->register_x2, frame->register_x19,
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@@ -83,23 +185,36 @@ void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
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frame->register_x10, frame->register_x27,
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frame->register_x11, frame->register_x28,
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frame->register_x12, frame->register_fp,
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frame->register_x13, (intptr_t)frame->register_lr,
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frame->register_x14, (intptr_t)frame->register_sp,
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frame->register_x15, (intptr_t)frame->register_pc,
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frame->register_x13, (intptr_t) frame->register_lr,
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frame->register_x14, (intptr_t) frame->register_sp,
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frame->register_x15, (intptr_t) frame->register_pc,
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frame->register_x16, frame->register_daif,
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(intptr_t) frame->vector, frame->register_cpsr,
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frame->register_syndrome, frame->register_fault_address
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(intptr_t) frame->vector, frame->register_cpsr
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);
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const uint128_t *qx = &frame->register_q0;
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int i;
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ec = frame->register_syndrome >> 26 & 0x3f;
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il = frame->register_syndrome >> 25 & 0x1;
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iss = frame->register_syndrome & 0x1ffffff;
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_CPU_Binary_sprintf( ec_str, sizeof( ec_str ), sizeof( ec_str ) - 1, ec );
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_CPU_Binary_sprintf( iss_str, sizeof( iss_str ), sizeof( iss_str ) - 1, iss );
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printk(
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"ESR = EC: 0b%s" " IL: 0b%d" " ISS: 0b%s" "\n"
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" %s\n",
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ec_str, il, iss_str, _CPU_Exception_class_to_string( ec )
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);
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printk( "FAR = 0x%016" PRIx64 "\n", frame->register_fault_address );
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qx = &frame->register_q0;
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printk(
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"FPCR = 0x%016" PRIx64 " FPSR = 0x%016" PRIx64 "\n",
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frame->register_fpcr, frame->register_fpsr
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);
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for ( i = 0; i < 32; ++i ) {
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for ( i = 0 ; i < 32 ; ++i ) {
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uint64_t low = (uint64_t) qx[i];
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uint64_t high = (uint64_t) (qx[i] >> 32);
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