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dev/i2c: Add Xilinx AXI I2C driver.
This is a generic driver for use with Xilinx AXI I2C controller IP. Closes #3100.
This commit is contained in:
@@ -10,6 +10,7 @@ include_dev_i2c_HEADERS += include/dev/i2c/eeprom.h
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include_dev_i2c_HEADERS += include/dev/i2c/gpio-nxp-pca9535.h
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include_dev_i2c_HEADERS += include/dev/i2c/i2c.h
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include_dev_i2c_HEADERS += include/dev/i2c/switch-nxp-pca9548a.h
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include_dev_i2c_HEADERS += include/dev/i2c/xilinx-axi-i2c.h
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include_dev_spidir = $(includedir)/dev/spi
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include_dev_spi_HEADERS =
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@@ -36,6 +37,7 @@ libdev_a_SOURCES += i2c/gpio-nxp-pca9535.c
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libdev_a_SOURCES += i2c/i2c-bus.c
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libdev_a_SOURCES += i2c/i2c-dev.c
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libdev_a_SOURCES += i2c/switch-nxp-pca9548a.c
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libdev_a_SOURCES += i2c/xilinx-axi-i2c.c
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libdev_a_SOURCES += spi/spi-bus.c
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libdev_a_SOURCES += serial/sc16is752.c
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libdev_a_SOURCES += serial/sc16is752-spi.c
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,86 @@
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/*
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* Copyright (c) 2016-2017 Chris Johns <chrisj@rtems.org> All rights reserved.
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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/*
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* Xilinx AXI IIC Interface v2.0. See PG090.pdf.
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*
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* Note, only master support is provided and no dynamic mode by design.
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*
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* The clock set up is to be handled by the IP integrator. There are too many
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* factors handling this in software.
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*/
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#ifndef XILINX_AXI_I2C_H
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#define XILINX_AXI_I2C_H
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#include <dev/i2c/i2c.h>
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/*
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* The PL integrator controls the timing. This interface allows software to
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* override those settings. It pays to check the timing with ChipScope.
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*
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* If you set the AXI bus frequency you can use the clock speed ioctl call to
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* change the speed dymanically. The ioctl call overrides the defaults passed
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* in.
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*
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* Set the valid mask to the values that are to be set.
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*/
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#define XILINX_AIX_I2C_AXI_CLOCK (1 << 0)
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#define XILINX_AIX_I2C_TSUSTA (1 << 1)
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#define XILINX_AIX_I2C_TSUSTO (1 << 2)
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#define XILINX_AIX_I2C_THDSTA (1 << 3)
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#define XILINX_AIX_I2C_TSUDAT (1 << 4)
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#define XILINX_AIX_I2C_TBUF (1 << 5)
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#define XILINX_AIX_I2C_THIGH (1 << 6)
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#define XILINX_AIX_I2C_TLOW (1 << 7)
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#define XILINX_AIX_I2C_THDDAT (1 << 8)
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#define XILINX_AIX_I2C_ALL_REGS (XILINX_AIX_I2C_TSUSTA | \
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XILINX_AIX_I2C_TSUSTO | \
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XILINX_AIX_I2C_THDSTA | \
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XILINX_AIX_I2C_TSUDAT | \
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XILINX_AIX_I2C_TBUF | \
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XILINX_AIX_I2C_THIGH | \
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XILINX_AIX_I2C_TLOW | \
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XILINX_AIX_I2C_THDDAT)
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typedef struct
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{
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uint32_t valid_mask;
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uint32_t AXI_CLOCK;
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uint32_t SCL_INERTIAL_DELAY;
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uint32_t TSUSTA;
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uint32_t TSUSTO;
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uint32_t THDSTA;
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uint32_t TSUDAT;
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uint32_t TBUF;
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uint32_t THIGH;
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uint32_t TLOW;
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uint32_t THDDAT;
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} xilinx_aix_i2c_timing;
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/*
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* Register the driver.
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*
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* The driver can multipex a number of I2C buses (in master mode only) using
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* the GPO port. The PL designer can use the output pins to select a bus. This
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* is useful if connecting a number of slave devices that have limit selectable
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* addresses.
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*
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* @param bus_path The driver's device path.
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* @param register_base AXI base address.
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* @param irq AXI FPGA interrupt.
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* @param gpio_address Bits 12:15 of a slave address it written to the GPO.
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* @param timing Override the default timing. NULL means no changes.
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*/
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int i2c_bus_register_xilinx_aix_i2c(const char* bus_path,
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uintptr_t register_base,
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rtems_vector_number irq,
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bool ten_gpio,
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const xilinx_aix_i2c_timing* timing);
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#endif
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@@ -39,6 +39,10 @@ $(PROJECT_INCLUDE)/dev/i2c/switch-nxp-pca9548a.h: include/dev/i2c/switch-nxp-pca
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$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/dev/i2c/switch-nxp-pca9548a.h
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PREINSTALL_FILES += $(PROJECT_INCLUDE)/dev/i2c/switch-nxp-pca9548a.h
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$(PROJECT_INCLUDE)/dev/i2c/xilinx-axi-i2c.h: include/dev/i2c/xilinx-axi-i2c.h $(PROJECT_INCLUDE)/dev/i2c/$(dirstamp)
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$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/dev/i2c/xilinx-axi-i2c.h
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PREINSTALL_FILES += $(PROJECT_INCLUDE)/dev/i2c/xilinx-axi-i2c.h
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$(PROJECT_INCLUDE)/dev/spi/$(dirstamp):
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@$(MKDIR_P) $(PROJECT_INCLUDE)/dev/spi
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@: > $(PROJECT_INCLUDE)/dev/spi/$(dirstamp)
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