mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
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2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
PR 1573/cpukit * configure.ac, posix/src/killinfo.c, posix/src/psignalclearprocesssignals.c, posix/src/psignalsetprocesssignals.c, posix/src/psignalunblockthread.c, posix/src/pthreadcreate.c, posix/src/pthreadkill.c, posix/src/pthreadsigmask.c, rtems/src/signalsend.c, rtems/src/taskmode.c, score/Makefile.am, score/preinstall.am, score/include/rtems/system.h, score/include/rtems/score/context.h, score/include/rtems/score/isr.h, score/include/rtems/score/thread.h, score/src/isr.c, score/src/isrthreaddispatch.c, score/src/thread.c, score/src/threaddispatch.c, score/src/threadloadenv.c: Add a per cpu data structure which contains the information required by RTEMS for each CPU core. This encapsulates information such as thread executing, heir, idle and dispatch needed. * score/include/rtems/score/percpu.h, score/src/percpu.c: New files.
This commit is contained in:
@@ -1,3 +1,22 @@
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2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
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PR 1573/cpukit
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* configure.ac, posix/src/killinfo.c,
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posix/src/psignalclearprocesssignals.c,
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posix/src/psignalsetprocesssignals.c,
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posix/src/psignalunblockthread.c, posix/src/pthreadcreate.c,
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posix/src/pthreadkill.c, posix/src/pthreadsigmask.c,
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rtems/src/signalsend.c, rtems/src/taskmode.c, score/Makefile.am,
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score/preinstall.am, score/include/rtems/system.h,
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score/include/rtems/score/context.h, score/include/rtems/score/isr.h,
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score/include/rtems/score/thread.h, score/src/isr.c,
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score/src/isrthreaddispatch.c, score/src/thread.c,
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score/src/threaddispatch.c, score/src/threadloadenv.c: Add a per cpu
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data structure which contains the information required by RTEMS for
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each CPU core. This encapsulates information such as thread
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executing, heir, idle and dispatch needed.
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* score/include/rtems/score/percpu.h, score/src/percpu.c: New files.
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2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
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* libcsupport/src/libio_sockets.c: Use
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@@ -251,6 +251,9 @@ AC_CHECK_DECLS([sbrk],,,[#include <unistd.h>])
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## Check if libc provides BSD's strlcpy/strlcat
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AC_CHECK_FUNCS(strlcpy strlcat)
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## This is needed to generate the field offsets of the per CPU
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## data structure so they can be accessed from assembly code.
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AC_CHECK_SIZEOF([void *])
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# ... far too many conditionals ...
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AM_CONDITIONAL(LIBRPC,[test x"$rtems_cv_HAS_NETWORKING" = x"yes"])
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@@ -314,8 +314,6 @@ int killinfo(
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*/
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process_it:
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the_thread->do_post_task_switch_extension = true;
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/*
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* Returns true if the signal was synchronously given to a thread
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* blocked waiting for the signal.
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@@ -53,8 +53,6 @@ void _POSIX_signals_Clear_process_signals(
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}
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if ( clear_signal ) {
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_POSIX_signals_Pending &= ~mask;
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if ( !_POSIX_signals_Pending )
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_Thread_Do_post_task_switch_extension--;
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}
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_ISR_Enable( level );
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}
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@@ -41,8 +41,6 @@ void _POSIX_signals_Set_process_signals(
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ISR_Level level;
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_ISR_Disable( level );
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if ( !_POSIX_signals_Pending )
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_Thread_Do_post_task_switch_extension++;
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_POSIX_signals_Pending |= mask;
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_ISR_Enable( level );
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}
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@@ -98,8 +98,6 @@ bool _POSIX_signals_Unblock_thread(
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* + Any other combination, do nothing.
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*/
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the_thread->do_post_task_switch_extension = true;
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if ( the_thread->current_state & STATES_INTERRUPTIBLE_BY_SIGNAL ) {
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the_thread->Wait.return_code = EINTR;
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/*
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@@ -120,7 +118,7 @@ bool _POSIX_signals_Unblock_thread(
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}
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} else if ( the_thread->current_state == STATES_READY ) {
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if ( _ISR_Is_in_progress() && _Thread_Is_executing( the_thread ) )
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_ISR_Signals_to_thread_executing = true;
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_Context_Switch_necessary = true;
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}
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}
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return false;
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@@ -190,14 +190,6 @@ int pthread_create(
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api->schedpolicy = schedpolicy;
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api->schedparam = schedparam;
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/*
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* This insures we evaluate the process-wide signals pending when we
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* first run.
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*
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* NOTE: Since the thread starts with all unblocked, this is necessary.
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*/
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the_thread->do_post_task_switch_extension = true;
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/*
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* POSIX threads are allocated and started in one operation.
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*/
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@@ -63,10 +63,8 @@ int pthread_kill(
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(void) _POSIX_signals_Unblock_thread( the_thread, sig, NULL );
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the_thread->do_post_task_switch_extension = true;
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if ( _ISR_Is_in_progress() && _Thread_Is_executing( the_thread ) )
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_ISR_Signals_to_thread_executing = true;
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_Context_Switch_necessary = true;
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}
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_Thread_Enable_dispatch();
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return 0;
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@@ -65,7 +65,6 @@ int pthread_sigmask(
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if ( ~api->signals_blocked &
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(api->signals_pending | _POSIX_signals_Pending) ) {
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_Thread_Executing->do_post_task_switch_extension = true;
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_Thread_Dispatch();
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}
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@@ -64,10 +64,8 @@ rtems_status_code rtems_signal_send(
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if ( asr->is_enabled ) {
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_ASR_Post_signals( signal_set, &asr->signals_posted );
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the_thread->do_post_task_switch_extension = true;
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if ( _ISR_Is_in_progress() && _Thread_Is_executing( the_thread ) )
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_ISR_Signals_to_thread_executing = true;
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_Context_Switch_necessary = true;
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} else {
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_ASR_Post_signals( signal_set, &asr->signals_pending );
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}
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@@ -117,7 +117,6 @@ rtems_status_code rtems_task_mode(
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_ASR_Swap_signals( asr );
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if ( _ASR_Are_signals_pending( asr ) ) {
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needs_asr_dispatching = true;
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executing->do_post_task_switch_extension = true;
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}
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}
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}
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@@ -24,15 +24,15 @@ include_rtems_score_HEADERS = include/rtems/score/address.h \
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include/rtems/score/coremutex.h include/rtems/score/coresem.h \
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include/rtems/score/heap.h include/rtems/score/protectedheap.h \
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include/rtems/score/interr.h include/rtems/score/isr.h \
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include/rtems/score/object.h include/rtems/score/priority.h \
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include/rtems/score/stack.h include/rtems/score/states.h \
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include/rtems/score/sysstate.h include/rtems/score/thread.h \
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include/rtems/score/threadq.h include/rtems/score/threadsync.h \
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include/rtems/score/timespec.h include/rtems/score/timestamp.h \
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include/rtems/score/timestamp64.h include/rtems/score/tod.h \
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include/rtems/score/tqdata.h include/rtems/score/userext.h \
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include/rtems/score/watchdog.h include/rtems/score/wkspace.h \
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include/rtems/score/cpuopts.h
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include/rtems/score/object.h include/rtems/score/percpu.h \
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include/rtems/score/priority.h include/rtems/score/stack.h \
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include/rtems/score/states.h include/rtems/score/sysstate.h \
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include/rtems/score/thread.h include/rtems/score/threadq.h \
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include/rtems/score/threadsync.h include/rtems/score/timespec.h \
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include/rtems/score/timestamp.h include/rtems/score/timestamp64.h \
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include/rtems/score/tod.h include/rtems/score/tqdata.h \
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include/rtems/score/userext.h include/rtems/score/watchdog.h \
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include/rtems/score/wkspace.h include/rtems/score/cpuopts.h
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if HAS_PTHREADS
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include_rtems_score_HEADERS += include/rtems/score/corespinlock.h \
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@@ -101,6 +101,9 @@ libscore_a_SOURCES += src/coremutex.c src/coremutexflush.c \
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src/coremutexseize.c src/coremutexsurrender.c \
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src/coremutexseizeintr.c
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## CORE_PERCPU_C_FILES
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libscore_a_SOURCES += src/percpu.c
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## CORE_RWLOCK_C_FILES
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if HAS_PTHREADS
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libscore_a_SOURCES += src/corerwlock.c src/corerwlockobtainread.c \
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@@ -23,6 +23,9 @@
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*
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* This handler encapsulates functionality which abstracts thread context
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* management in a portable manner.
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*
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* The context switch needed variable is contained in the per cpu
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* data structure.
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*/
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/**@{*/
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@@ -40,16 +43,6 @@ extern "C" {
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*/
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#define CONTEXT_FP_SIZE CPU_CONTEXT_FP_SIZE
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/**
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* @brief Is Context Switch Needed?
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*
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* This variable is set to true when a reschedule operation
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* has determined that the processor should be taken away from the
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* currently executing thread and given to the heir thread.
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*/
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SCORE_EXTERN volatile bool _Context_Switch_necessary;
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/**
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* @brief Initialize Context Area
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* This routine initializes @a _the_context such that the stack
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@@ -21,11 +21,16 @@
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#ifndef _RTEMS_SCORE_ISR_H
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#define _RTEMS_SCORE_ISR_H
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#include <rtems/score/percpu.h>
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/**
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* @defgroup ScoreISR ISR Handler
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*
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* This handler encapsulates functionality which provides the foundation
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* ISR services used in all of the APIs supported by RTEMS.
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*
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* The ISR Nest level counter variable is maintained as part of the
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* per cpu data structure.
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*/
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/**@{*/
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@@ -75,18 +80,6 @@ typedef ISR_Handler ( *ISR_Handler_entry )(
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*/
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#define ISR_INTERRUPT_MAXIMUM_VECTOR_NUMBER CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER
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/**
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* The following is true if signals have been sent to the currently
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* executing thread by an ISR handler.
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*/
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SCORE_EXTERN bool _ISR_Signals_to_thread_executing;
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/**
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* The following contains the interrupt service routine nest level.
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* When this variable is zero, a thread is executing.
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*/
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SCORE_EXTERN volatile uint32_t _ISR_Nest_level;
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#if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE)
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/**
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* The following declares the Vector Table. Application
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@@ -0,0 +1,166 @@
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/**
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* @file rtems/score/percpu.h
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*
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* This include file defines the per CPU information required
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* by RTEMS.
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*/
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/*
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* COPYRIGHT (c) 1989-2010.
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* On-Line Applications Research Corporation (OAR).
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.com/license/LICENSE.
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*
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* $Id$
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*/
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#ifndef _RTEMS_PERCPU_H
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#define _RTEMS_PERCPU_H
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#ifdef ASM
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#include <rtems/asm.h>
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#endif
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/**
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* @defgroup PerCPU RTEMS Per CPU Information
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*
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* This defines the per CPU state information required by RTEMS
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* and the BSP. In an SMP configuration, there will be multiple
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* instances of this data structure -- one per CPU -- and the
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* current CPU number will be used as the index.
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*/
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/**@{*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef ASM
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/**
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* This forward defines the Thread Control Block structure.
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*/
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typedef struct Thread_Control_struct Thread_Control;
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/**
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* @brief Per CPU Core Structure
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*
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* This structure is used to hold per core state information.
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*/
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typedef struct {
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#if (CPU_ALLOCATE_INTERRUPT_STACK == TRUE) || \
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(CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
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/**
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* This contains a pointer to the lower range of the interrupt stack for
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* this CPU. This is the address allocated and freed.
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*/
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void *interrupt_stack_low;
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/**
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* This contains a pointer to the interrupt stack pointer for this CPU.
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* It will be loaded at the beginning on an ISR.
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*/
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void *interrupt_stack_high;
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#endif
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/**
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*
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* This contains the current interrupt nesting level on this
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* CPU.
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*/
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uint32_t isr_nest_level;
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/** This is the thread executing on this CPU. */
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Thread_Control *executing;
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/** This is the heir thread for this this CPU. */
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Thread_Control *heir;
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/** This is the idle thread for this CPU. */
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Thread_Control *idle;
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/** This is set to true when this CPU needs to run the dispatcher. */
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volatile bool dispatch_needed;
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} Per_CPU_Control;
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#endif
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#ifdef ASM
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#if (CPU_ALLOCATE_INTERRUPT_STACK == TRUE) || \
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(CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
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/*
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* If this CPU target lets RTEMS allocates the interrupt stack, then
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* we need to have places in the per cpu table to hold them.
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*/
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#define PER_CPU_INTERRUPT_STACK_LOW 0
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#define PER_CPU_INTERRUPT_STACK_HIGH (1 * SIZEOF_VOID_P)
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#define PER_CPU_END_STACK (2 * SIZEOF_VOID_P)
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#else
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/*
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* Otherwise, there are no interrupt stack addresses in the per CPU table.
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*/
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#define PER_CPU_END_STACK 0
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#endif
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/*
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* These are the offsets of the required elements in the per CPU table.
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*/
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#define PER_CPU_ISR_NEST_LEVEL PER_CPU_END_STACK + 0
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#define PER_CPU_EXECUTING PER_CPU_END_STACK + (1 * SIZEOF_VOID_P)
|
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#define PER_CPU_HEIR PER_CPU_END_STACK + (2 * SIZEOF_VOID_P)
|
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#define PER_CPU_IDLE PER_CPU_END_STACK + (3 * SIZEOF_VOID_P)
|
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#define PER_CPU_DISPATCH_NEEDED PER_CPU_END_STACK + (4 * SIZEOF_VOID_P)
|
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#define ISR_NEST_LEVEL \
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(SYM(_Per_CPU_Information) + PER_CPU_ISR_NEST_LEVEL)
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#define DISPATCH_NEEDED \
|
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(SYM(_Per_CPU_Information) + PER_CPU_DISPATCH_NEEDED)
|
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|
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/*
|
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* Do not define these offsets if they are not in the table.
|
||||
*/
|
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#if (CPU_ALLOCATE_INTERRUPT_STACK == TRUE) || \
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(CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
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#define INTERRUPT_STACK_LOW \
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(SYM(_Per_CPU_Information) + PER_CPU_INTERRUPT_STACK_LOW)
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#define INTERRUPT_STACK_HIGH \
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(SYM(_Per_CPU_Information) + PER_CPU_INTERRUPT_STACK_HIGH)
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#endif
|
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||||
#endif
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||||
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||||
#ifndef ASM
|
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/**
|
||||
* @brief Set of Per CPU Core Information
|
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*
|
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* This is an array of per CPU core information.
|
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*/
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extern Per_CPU_Control _Per_CPU_Information;
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|
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/*
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* On an SMP system, these macros dereference the CPU core number.
|
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* But on a non-SMP system, these macros are simple references.
|
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* Thus when built for non-SMP, there should be no performance penalty.
|
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*/
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#define _Thread_Heir _Per_CPU_Information.heir
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#define _Thread_Executing _Per_CPU_Information.executing
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#define _Thread_Idle _Per_CPU_Information.idle
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#define _ISR_Nest_level _Per_CPU_Information.isr_nest_level
|
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#define _CPU_Interrupt_stack_low _Per_CPU_Information.interrupt_stack_low
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#define _CPU_Interrupt_stack_high _Per_CPU_Information.interrupt_stack_high
|
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#define _Context_Switch_necessary _Per_CPU_Information.dispatch_needed
|
||||
|
||||
#endif /* ASM */
|
||||
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||||
#ifdef __cplusplus
|
||||
}
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||||
#endif
|
||||
|
||||
/**@}*/
|
||||
|
||||
#endif
|
||||
/* end of include file */
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||||
@@ -24,6 +24,13 @@
|
||||
*
|
||||
* This handler encapsulates functionality related to the management of
|
||||
* threads. This includes the creation, deletion, and scheduling of threads.
|
||||
*
|
||||
* The following variables are maintained as part of the per cpu data
|
||||
* structure.
|
||||
*
|
||||
* + Idle thread pointer
|
||||
* + Executing thread pointer
|
||||
* + Heir thread pointer
|
||||
*/
|
||||
/**@{*/
|
||||
|
||||
@@ -55,6 +62,7 @@ extern "C" {
|
||||
typedef uint32_t Thread_CPU_usage_t;
|
||||
#endif
|
||||
|
||||
#include <rtems/score/percpu.h>
|
||||
#include <rtems/score/context.h>
|
||||
#include <rtems/score/cpu.h>
|
||||
#if defined(RTEMS_MULTIPROCESSING)
|
||||
@@ -147,10 +155,6 @@ typedef enum {
|
||||
#endif
|
||||
} Thread_CPU_budget_algorithms;
|
||||
|
||||
/** This type defines the Thread Control Block structure.
|
||||
*/
|
||||
typedef struct Thread_Control_struct Thread_Control;
|
||||
|
||||
/** This defines thes the entry point for the thread specific timeslice
|
||||
* budget management algorithm.
|
||||
*/
|
||||
@@ -363,10 +367,6 @@ struct Thread_Control_struct {
|
||||
/** This field is true if the thread is offered globally */
|
||||
bool is_global;
|
||||
#endif
|
||||
/** This field is is true if the post task context switch should be
|
||||
* executed for this thread at the next context switch.
|
||||
*/
|
||||
bool do_post_task_switch_extension;
|
||||
/** This field is true if the thread is preemptible. */
|
||||
bool is_preemptible;
|
||||
#if __RTEMS_ADA__
|
||||
@@ -426,12 +426,6 @@ SCORE_EXTERN void *rtems_ada_self;
|
||||
*/
|
||||
SCORE_EXTERN Objects_Information _Thread_Internal_information;
|
||||
|
||||
/**
|
||||
* The following define the thread control pointers used to access
|
||||
* and manipulate the idle thread.
|
||||
*/
|
||||
SCORE_EXTERN Thread_Control *_Thread_Idle;
|
||||
|
||||
/**
|
||||
* The following context area contains the context of the "thread"
|
||||
* which invoked the start multitasking routine. This context is
|
||||
@@ -448,12 +442,6 @@ SCORE_EXTERN Context_Control _Thread_BSP_context;
|
||||
*/
|
||||
SCORE_EXTERN volatile uint32_t _Thread_Dispatch_disable_level;
|
||||
|
||||
/**
|
||||
* If this is non-zero, then the post-task switch extension
|
||||
* is run regardless of the state of the per thread flag.
|
||||
*/
|
||||
SCORE_EXTERN uint32_t _Thread_Do_post_task_switch_extension;
|
||||
|
||||
/**
|
||||
* The following holds how many user extensions are in the system. This
|
||||
* is used to determine how many user extension data areas to allocate
|
||||
@@ -472,20 +460,6 @@ SCORE_EXTERN uint32_t _Thread_Ticks_per_timeslice;
|
||||
*/
|
||||
SCORE_EXTERN Chain_Control *_Thread_Ready_chain;
|
||||
|
||||
/**
|
||||
* The following points to the thread which is currently executing.
|
||||
* This thread is implicitly manipulated by numerous directives.
|
||||
*/
|
||||
SCORE_EXTERN Thread_Control *_Thread_Executing;
|
||||
|
||||
/**
|
||||
* The following points to the highest priority ready thread
|
||||
* in the system. Unless the current thread is not preemptibl,
|
||||
* then this thread will be context switched to when the next
|
||||
* dispatch occurs.
|
||||
*/
|
||||
SCORE_EXTERN Thread_Control *_Thread_Heir;
|
||||
|
||||
/**
|
||||
* The following points to the thread whose floating point
|
||||
* context is currently loaded.
|
||||
|
||||
@@ -169,6 +169,7 @@ typedef void * proc_ptr;
|
||||
#include <stdint.h>
|
||||
#endif
|
||||
#include <rtems/score/cpu.h> /* processor specific information */
|
||||
#include <rtems/score/percpu.h>
|
||||
|
||||
#ifndef ASM
|
||||
/**
|
||||
|
||||
@@ -99,6 +99,10 @@ $(PROJECT_INCLUDE)/rtems/score/object.h: include/rtems/score/object.h $(PROJECT_
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/object.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/object.h
|
||||
|
||||
$(PROJECT_INCLUDE)/rtems/score/percpu.h: include/rtems/score/percpu.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/percpu.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/percpu.h
|
||||
|
||||
$(PROJECT_INCLUDE)/rtems/score/priority.h: include/rtems/score/priority.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/priority.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/priority.h
|
||||
|
||||
@@ -34,8 +34,6 @@
|
||||
|
||||
void _ISR_Handler_initialization( void )
|
||||
{
|
||||
_ISR_Signals_to_thread_executing = false;
|
||||
|
||||
_ISR_Nest_level = 0;
|
||||
|
||||
#if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE)
|
||||
@@ -64,6 +62,9 @@ void _ISR_Handler_initialization( void )
|
||||
Configuration.interrupt_stack_size
|
||||
);
|
||||
|
||||
_CPU_Interrupt_stack_high = (void *)
|
||||
((uintptr_t) _CPU_Interrupt_stack_high & ~CPU_STACK_ALIGNMENT);
|
||||
|
||||
/* Interrupt stack might have to be aligned and/or setup
|
||||
* in a specific way.
|
||||
*/
|
||||
|
||||
@@ -33,15 +33,6 @@ void _ISR_Thread_dispatch( void )
|
||||
{
|
||||
if ( _Context_Switch_necessary ) {
|
||||
_Thread_Dispatch();
|
||||
} else if ( _ISR_Signals_to_thread_executing ) {
|
||||
_ISR_Signals_to_thread_executing = false;
|
||||
if (
|
||||
_Thread_Do_post_task_switch_extension
|
||||
|| _Thread_Executing->do_post_task_switch_extension
|
||||
) {
|
||||
_Thread_Executing->do_post_task_switch_extension = false;
|
||||
_API_extensions_Run_postswitch();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -0,0 +1,29 @@
|
||||
/*
|
||||
* COPYRIGHT (c) 1989-2010.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.com/license/LICENSE.
|
||||
*
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#if HAVE_CONFIG_H
|
||||
#include "config.h"
|
||||
#endif
|
||||
|
||||
#include <rtems/system.h>
|
||||
#include <rtems/score/thread.h>
|
||||
#include <rtems/score/percpu.h>
|
||||
#include <rtems/score/wkspace.h>
|
||||
#include <rtems/score/wkspace.h>
|
||||
#include <rtems/config.h>
|
||||
#include <string.h>
|
||||
|
||||
/*
|
||||
* On single core systems, we can efficiently directly access a single
|
||||
* statically allocated per cpu structure. And the fields are initialized
|
||||
* as individual elements just like it has always been done.
|
||||
*/
|
||||
Per_CPU_Control _Per_CPU_Information;
|
||||
@@ -76,8 +76,6 @@ void _Thread_Handler_initialization(void)
|
||||
_Thread_Allocated_fp = NULL;
|
||||
#endif
|
||||
|
||||
_Thread_Do_post_task_switch_extension = 0;
|
||||
|
||||
_Thread_Maximum_extensions = maximum_extensions;
|
||||
|
||||
_Thread_Ticks_per_timeslice = ticks_per_timeslice;
|
||||
|
||||
@@ -94,12 +94,26 @@ void _Thread_Dispatch( void )
|
||||
_Thread_Dispatch_disable_level = 1;
|
||||
_Context_Switch_necessary = false;
|
||||
_Thread_Executing = heir;
|
||||
|
||||
/*
|
||||
* When the heir and executing are the same, then we are being
|
||||
* requested to do the post switch dispatching. This is normally
|
||||
* done to dispatch signals.
|
||||
*/
|
||||
if ( heir == executing )
|
||||
goto post_switch;
|
||||
|
||||
/*
|
||||
* Since heir and executing are not the same, we need to do a real
|
||||
* context switch.
|
||||
*/
|
||||
#if __RTEMS_ADA__
|
||||
executing->rtems_ada_self = rtems_ada_self;
|
||||
rtems_ada_self = heir->rtems_ada_self;
|
||||
#endif
|
||||
if ( heir->budget_algorithm == THREAD_CPU_BUDGET_ALGORITHM_RESET_TIMESLICE )
|
||||
heir->cpu_time_budget = _Thread_Ticks_per_timeslice;
|
||||
|
||||
_ISR_Enable( level );
|
||||
|
||||
#ifndef __RTEMS_USE_TICKS_FOR_STATISTICS__
|
||||
@@ -170,14 +184,10 @@ void _Thread_Dispatch( void )
|
||||
_ISR_Disable( level );
|
||||
}
|
||||
|
||||
post_switch:
|
||||
_Thread_Dispatch_disable_level = 0;
|
||||
|
||||
_ISR_Enable( level );
|
||||
|
||||
if ( _Thread_Do_post_task_switch_extension ||
|
||||
executing->do_post_task_switch_extension ) {
|
||||
executing->do_post_task_switch_extension = false;
|
||||
_API_extensions_Run_postswitch();
|
||||
}
|
||||
|
||||
_API_extensions_Run_postswitch();
|
||||
}
|
||||
|
||||
@@ -58,8 +58,6 @@ void _Thread_Load_environment(
|
||||
#endif
|
||||
is_fp = false;
|
||||
|
||||
|
||||
the_thread->do_post_task_switch_extension = false;
|
||||
the_thread->is_preemptible = the_thread->Start.is_preemptible;
|
||||
the_thread->budget_algorithm = the_thread->Start.budget_algorithm;
|
||||
the_thread->budget_callout = the_thread->Start.budget_callout;
|
||||
|
||||
Reference in New Issue
Block a user