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score/cpu: Add CPU_Per_CPU_control

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Add CPU port specific per-CPU control.
This commit is contained in:
Sebastian Huber
2013-08-09 21:58:39 +02:00
parent 838d71427b
commit 10fd4aacc7
20 changed files with 135 additions and 4 deletions
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cpukit/score/cpu/arm/rtems/score/cpu.h
+6
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@@ -208,6 +208,8 @@
#define CPU_USE_GENERIC_BITFIELD_DATA TRUE
#define CPU_PER_CPU_CONTROL_SIZE 0
/** @} */
#ifdef ARM_MULTILIB_VFP_D32
@@ -233,6 +235,10 @@ extern "C" {
*/
/**@{**/
typedef struct {
/* There is no CPU specific per-CPU state */
} CPU_Per_CPU_control;
typedef struct {
#if defined(ARM_MULTILIB_ARCH_V4)
uint32_t register_cpsr;
cpukit/score/cpu/avr/rtems/score/cpu.h
+6
View File
@@ -374,6 +374,8 @@ extern "C" {
#define CPU_MODES_INTERRUPT_MASK 0x00000001
#define CPU_PER_CPU_CONTROL_SIZE 0
/*
* Processor defined structures required for cpukit/score.
*
@@ -386,6 +388,10 @@ extern "C" {
#ifndef ASM
typedef struct {
/* There is no CPU specific per-CPU state */
} CPU_Per_CPU_control;
/*
* Contexts
*
cpukit/score/cpu/bfin/rtems/score/cpu.h
+8 -2
View File
@@ -397,6 +397,8 @@ extern "C" {
*/
#define CPU_MODES_INTERRUPT_MASK 0x00000001
#define CPU_PER_CPU_CONTROL_SIZE 0
/*
* Processor defined structures required for cpukit/score.
*
@@ -407,6 +409,12 @@ extern "C" {
/* may need to put some structures here. */
#ifndef ASM
typedef struct {
/* There is no CPU specific per-CPU state */
} CPU_Per_CPU_control;
/**
* @defgroup CPUContext Processor Dependent Context Management
*
@@ -450,8 +458,6 @@ extern "C" {
*/
/**@{**/
#ifndef ASM
/**
* This defines the minimal set of integer and processor state registers
* that must be saved during a voluntary context switch from one thread
cpukit/score/cpu/h8300/rtems/score/cpu.h
+6
View File
@@ -342,6 +342,8 @@ extern "C" {
#define CPU_MODES_INTERRUPT_MASK 0x00000001
#define CPU_PER_CPU_CONTROL_SIZE 0
/*
* Processor defined structures required for cpukit/score.
*
@@ -393,6 +395,10 @@ extern "C" {
#ifndef ASM
typedef struct {
/* There is no CPU specific per-CPU state */
} CPU_Per_CPU_control;
#define nogap __attribute__ ((packed))
typedef struct {
cpukit/score/cpu/i386/rtems/score/cpu.h
+6
View File
@@ -126,10 +126,16 @@ extern "C" {
#define CPU_BIG_ENDIAN FALSE
#define CPU_LITTLE_ENDIAN TRUE
#define CPU_PER_CPU_CONTROL_SIZE 0
/* structures */
#ifndef ASM
typedef struct {
/* There is no CPU specific per-CPU state */
} CPU_Per_CPU_control;
/*
* Basic integer context for the i386 family.
*/
cpukit/score/cpu/lm32/rtems/score/cpu.h
+6
View File
@@ -391,6 +391,8 @@ extern "C" {
*/
#define CPU_MODES_INTERRUPT_MASK 0x00000001
#define CPU_PER_CPU_CONTROL_SIZE 0
/*
* Processor defined structures required for cpukit/score.
*
@@ -401,6 +403,10 @@ extern "C" {
/* may need to put some structures here. */
typedef struct {
/* There is no CPU specific per-CPU state */
} CPU_Per_CPU_control;
/**
* @defgroup CPUContext Processor Dependent Context Management
*
cpukit/score/cpu/m32c/rtems/score/cpu.h
+6
View File
@@ -414,6 +414,8 @@ extern "C" {
*/
#define CPU_MODES_INTERRUPT_MASK 0x00000001
#define CPU_PER_CPU_CONTROL_SIZE 0
/*
* Processor defined structures required for cpukit/score.
*
@@ -424,6 +426,10 @@ extern "C" {
/* may need to put some structures here. */
typedef struct {
/* There is no CPU specific per-CPU state */
} CPU_Per_CPU_control;
/**
* @defgroup CPUContext Processor Dependent Context Management
*
cpukit/score/cpu/m32r/rtems/score/cpu.h
+6
View File
@@ -407,6 +407,8 @@ extern "C" {
*/
#define CPU_MODES_INTERRUPT_MASK 0x00000001
#define CPU_PER_CPU_CONTROL_SIZE 0
/*
* Processor defined structures required for cpukit/score.
*
@@ -417,6 +419,10 @@ extern "C" {
/* may need to put some structures here. */
typedef struct {
/* There is no CPU specific per-CPU state */
} CPU_Per_CPU_control;
/**
* @defgroup CPUContext Processor Dependent Context Management
*
cpukit/score/cpu/m68k/rtems/score/cpu.h
+6
View File
@@ -112,6 +112,8 @@ extern "C" {
#define CPU_BIG_ENDIAN TRUE
#define CPU_LITTLE_ENDIAN FALSE
#define CPU_PER_CPU_CONTROL_SIZE 0
#if ( CPU_HARDWARE_FP == TRUE ) && !defined( __mcoldfire__ )
#if defined( __mc68060__ )
#define M68K_FP_STATE_SIZE 16
@@ -124,6 +126,10 @@ extern "C" {
/* structures */
typedef struct {
/* There is no CPU specific per-CPU state */
} CPU_Per_CPU_control;
/*
* Basic integer context for the m68k family.
*/
cpukit/score/cpu/mips/rtems/score/cpu.h
+6
View File
@@ -353,6 +353,8 @@ extern "C" {
#define CPU_SIZEOF_POINTER 4
#define CPU_PER_CPU_CONTROL_SIZE 0
/*
* Processor defined structures
*
@@ -399,6 +401,10 @@ extern "C" {
#ifndef ASM
typedef struct {
/* There is no CPU specific per-CPU state */
} CPU_Per_CPU_control;
/* WARNING: If this structure is modified, the constants in cpu.h must be updated. */
#if (__mips == 1) || (__mips == 32)
#define __MIPS_REGISTER_TYPE uint32_t
cpukit/score/cpu/moxie/rtems/score/cpu.h
+6
View File
@@ -330,6 +330,8 @@ extern "C" {
*/
#define CPU_MODES_INTERRUPT_MASK 0x00000001
#define CPU_PER_CPU_CONTROL_SIZE 0
/*
* Processor defined structures required for cpukit/score.
*
@@ -340,6 +342,10 @@ extern "C" {
/* may need to put some structures here. */
typedef struct {
/* There is no CPU specific per-CPU state */
} CPU_Per_CPU_control;
/*
* Contexts
*
cpukit/score/cpu/nios2/rtems/score/cpu.h
+6
View File
@@ -112,8 +112,14 @@ extern "C" {
#define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0
#define CPU_PER_CPU_CONTROL_SIZE 0
#ifndef ASM
typedef struct {
/* There is no CPU specific per-CPU state */
} CPU_Per_CPU_control;
/**
* @brief Thread register context.
*
cpukit/score/cpu/no_cpu/rtems/score/cpu.h
+18
View File
@@ -474,6 +474,14 @@ extern "C" {
*/
#define CPU_MODES_INTERRUPT_MASK 0x00000001
/**
* @brief The size of the CPU specific per-CPU control.
*
* This define must be visible to assember files since it is used to derive
* structure offsets.
*/
#define CPU_PER_CPU_CONTROL_SIZE 0
/*
* Processor defined structures required for cpukit/score.
*
@@ -484,6 +492,16 @@ extern "C" {
/* may need to put some structures here. */
/**
* @brief The CPU specific per-CPU control.
*
* The CPU port can place here all state information that must be available and
* maintained for each CPU in the system.
*/
typedef struct {
/* CPU specific per-CPU state */
} CPU_Per_CPU_control;
/**
* @defgroup CPUContext Processor Dependent Context Management
*
cpukit/score/cpu/powerpc/rtems/score/cpu.h
+6
View File
@@ -212,6 +212,8 @@ extern "C" {
#define CPU_IDLE_TASK_IS_FP FALSE
#define CPU_PER_CPU_CONTROL_SIZE 0
/*
* Processor defined structures required for cpukit/score.
*/
@@ -267,6 +269,10 @@ extern "C" {
#ifndef ASM
typedef struct {
/* There is no CPU specific per-CPU state */
} CPU_Per_CPU_control;
/* Non-volatile context according to E500ABIUG and EABI */
typedef struct {
uint32_t gpr1;
cpukit/score/cpu/sh/rtems/score/cpu.h
+6
View File
@@ -297,12 +297,18 @@ extern "C" {
#define CPU_MODES_INTERRUPT_MASK 0x0000000f
#define CPU_PER_CPU_CONTROL_SIZE 0
/*
* Processor defined structures required for cpukit/score.
*/
/* may need to put some structures here. */
typedef struct {
/* There is no CPU specific per-CPU state */
} CPU_Per_CPU_control;
/*
* Contexts
*
cpukit/score/cpu/sparc/rtems/score/cpu.h
+7
View File
@@ -357,6 +357,8 @@ typedef struct {
/** This defines the size of the minimum stack frame. */
#define CPU_MINIMUM_STACK_FRAME_SIZE 0x60
#define CPU_PER_CPU_CONTROL_SIZE 0
/**
* @defgroup Contexts SPARC Context Structures
*
@@ -379,6 +381,11 @@ typedef struct {
/**@{**/
#ifndef ASM
typedef struct {
/* There is no CPU specific per-CPU state */
} CPU_Per_CPU_control;
/**
* @brief SPARC basic context.
*
cpukit/score/cpu/sparc64/rtems/score/cpu.h
+6
View File
@@ -224,6 +224,8 @@ extern "C" {
#define CPU_MODES_INTERRUPT_MASK 0x0000000F
#define CPU_PER_CPU_CONTROL_SIZE 0
/*
* This structure represents the organization of the minimum stack frame
* for the SPARC. More framing information is required in certain situaions
@@ -233,6 +235,10 @@ extern "C" {
#ifndef ASM
typedef struct {
/* There is no CPU specific per-CPU state */
} CPU_Per_CPU_control;
typedef struct {
uint64_t l0;
uint64_t l1;
cpukit/score/cpu/v850/rtems/score/cpu.h
+6
View File
@@ -395,6 +395,12 @@ extern "C" {
*/
#define CPU_MODES_INTERRUPT_MASK 0x00000001
#define CPU_PER_CPU_CONTROL_SIZE 0
typedef struct {
/* There is no CPU specific per-CPU state */
} CPU_Per_CPU_control;
/**
* @defgroup CPUContext Processor Dependent Context Management
*
cpukit/score/include/rtems/score/percpu.h
+7 -2
View File
@@ -141,6 +141,11 @@ typedef enum {
* This structure is used to hold per core state information.
*/
typedef struct {
/**
* @brief CPU port specific control.
*/
CPU_Per_CPU_control cpu_per_cpu;
#if (CPU_ALLOCATE_INTERRUPT_STACK == TRUE) || \
(CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
/**
@@ -310,7 +315,7 @@ void _Per_CPU_Wait_for_state(
* we need to have places in the per CPU table to hold them.
*/
#define PER_CPU_INTERRUPT_STACK_LOW \
0
CPU_PER_CPU_CONTROL_SIZE
#define PER_CPU_INTERRUPT_STACK_HIGH \
PER_CPU_INTERRUPT_STACK_LOW + CPU_SIZEOF_POINTER
#define PER_CPU_END_STACK \
@@ -322,7 +327,7 @@ void _Per_CPU_Wait_for_state(
(SYM(_Per_CPU_Information) + PER_CPU_INTERRUPT_STACK_HIGH)
#else
#define PER_CPU_END_STACK \
0
CPU_PER_CPU_CONTROL_SIZE
#endif
/*
cpukit/score/src/percpuasm.c
+5
View File
@@ -33,6 +33,11 @@ RTEMS_STATIC_ASSERT(
);
#endif
RTEMS_STATIC_ASSERT(
sizeof( CPU_Per_CPU_control ) == CPU_PER_CPU_CONTROL_SIZE,
CPU_PER_CPU_CONTROL_SIZE
);
#if defined( RTEMS_SMP )
RTEMS_STATIC_ASSERT(
sizeof( Per_CPU_Control_envelope ) == PER_CPU_CONTROL_SIZE,