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Remove m68k/idp BSP

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closes #2546.
This commit is contained in:
Joel Sherrill
2016-01-23 17:53:15 -06:00
parent 5cf8e66e47
commit 0cd5f478f6
23 changed files with 0 additions and 2055 deletions
Download Patch File Download Diff File Expand all files Collapse all files
c/src/lib/libbsp/m68k/acinclude.m4
-2
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@@ -12,8 +12,6 @@ AC_DEFUN([RTEMS_CHECK_BSPDIR],
AC_CONFIG_SUBDIRS([gen68360]);;
genmcf548x )
AC_CONFIG_SUBDIRS([genmcf548x]);;
idp )
AC_CONFIG_SUBDIRS([idp]);;
mcf5206elite )
AC_CONFIG_SUBDIRS([mcf5206elite]);;
mcf52235 )
c/src/lib/libbsp/m68k/idp/Makefile.am
-56
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@@ -1,56 +0,0 @@
ACLOCAL_AMFLAGS = -I ../../../../aclocal
include $(top_srcdir)/../../../../automake/compile.am
include_bspdir = $(includedir)/bsp
dist_project_lib_DATA = bsp_specs
include_HEADERS = include/bsp.h
include_HEADERS += ../../shared/include/tm27.h
nodist_include_HEADERS = include/bspopts.h
nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h
DISTCLEANFILES = include/bspopts.h
include_HEADERS += include/leds.h
nodist_include_HEADERS += ../../shared/include/coverhd.h
## Motorola device support files
include_rtems_motoroladir = $(includedir)/rtems/motorola
include_rtems_motorola_HEADERS = include/motorola/mc68230.h
include_rtems_motorola_HEADERS += include/motorola/mc68681.h
noinst_LIBRARIES = libbspstart.a
libbspstart_a_SOURCES = ../../m68k/shared/start/start.S
project_lib_DATA = start.$(OBJEXT)
dist_project_lib_DATA += startup/linkcmds
noinst_LIBRARIES += libbsp.a
libbsp_a_SOURCES =
# startup
libbsp_a_SOURCES += ../../shared/bspclean.c ../../shared/bsplibc.c \
../../shared/bsppredriverhook.c \
../../shared/bsppost.c startup/bspstart.c ../../shared/bootcard.c \
../../shared/bspgetworkarea.c \
../../shared/sbrk.c ../../shared/setvec.c \
../../shared/gnatinstallhandler.c
# clock
libbsp_a_SOURCES += clock/ckinit.c
# console
libbsp_a_SOURCES += console/console.c console/leds.c console/mc68ec.c \
console/duart.c ../../shared/dummy_printk_support.c
# timer
libbsp_a_SOURCES += timer/timer.c timer/timerisr.S
EXTRA_DIST = include/README
EXTRA_DIST += times
libbsp_a_LIBADD = \
../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
../../../libcpu/@RTEMS_CPU@/shared/misc.rel
include $(srcdir)/preinstall.am
include $(top_srcdir)/../../../../automake/local.am
c/src/lib/libbsp/m68k/idp/README
-31
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@@ -1,31 +0,0 @@
This board support package has not been tested with multiprocessor
or the timing support. The uniprocessor IDP package was tested though
with a fairly large application (although bugs may exist). The
$RTEMS_ROOT/src/tests/Makefile should therefore have the samples and
the tests directories compiled first with the tmtests (timing) and
multiprocessor directories optional.
Let me know if you have any problems or bug fixes. Bug fixes are greatly
appreciated. I do not work for RTEMS or am a member of the RTEMS support
group in any way, however. I am just one of many that appreciate
"free" software and enjoy contributing when possible :). You can do it too!
-- doug mcbride
mcbride@rodin.colorado.edu
==============================================================
Notes: Make sure that -msoft-float is defined when compiling in the
newlib-beta-rtems/newlib/msoft-float directory subtree. You also probably
want to add the following line to line 413 of
newlib-beta-rtems/newlib/msoft-float/libc/stdio/vfprintf.c:
#define INTEGER_ONLY
That allows you to pass most of the paranoia test in the samples
directory of RTEMS although you can't see the floating point values actually
printed (software floating point tends to make that difficult anyway).
In order to pass the whole paranoia test (with one flaw), however, I had to
comment out the following line in milestone 140 (why?):
/* printf ("Testing X^((X + 1) / (X - 1)) vs. exp(2) = %.17e as X -> 1.\n",
Exp2); */
c/src/lib/libbsp/m68k/idp/bsp_specs
-13
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@@ -1,13 +0,0 @@
%rename endfile old_endfile
%rename startfile old_startfile
%rename link old_link
*startfile:
%{!qrtems: %(old_startfile)} \
%{!nostdlib: %{qrtems: start.o%s crti.o%s crtbegin.o%s -e start}}
*link:
%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N}
*endfile:
%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s crtn.o%s}
c/src/lib/libbsp/m68k/idp/clock/ckinit.c
-137
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@@ -1,137 +0,0 @@
/*
* This is modified by Doug McBride to get it to work for the MC68EC040
* IDP board. The below comments are kept to show that some prior work
* was done in the area and the modifications performed was application
* specific for the IDP board to port it to.
*
* This routine initializes the mc68230 on the MC68EC040 board.
* The tick frequency is 40 milliseconds.
*/
/*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#include <stdlib.h>
#include <bsp.h>
uint32_t Clock_isrs; /* ISRs until next tick */
volatile uint32_t Clock_driver_ticks;
/* ticks since initialization */
rtems_isr_entry Old_ticker;
extern void led_putnum(void);
void Disable_clock(void);
#define CLOCK_VECTOR 0x4D
void Clock_exit( void );
/*
* ISR Handler
*
*
* ((1ms * 6.5 MHz) / 2^5) = 203.125) where 6.5 MHz is the clock rate of the
* MC68230, 2^5 is the prescaler factor, and 1ms is the common interrupt
* interval for the Clock_isr routine.
*
* Therefore, 203 (decimal) is the number to program into the CPRH-L registers
* of the MC68230 for countdown. However, I have found that 193 instead of
* 203 provides greater accuracy -- why? The crystal should be more accurate
* than that
*/
static rtems_isr Clock_isr(
rtems_vector_number vector
)
{
Clock_driver_ticks += 1;
/* acknowledge interrupt
MC68230_TSR = 1; */
MC68230_WRITE (MC68230_TSR, 1);
if ( Clock_isrs == 1 ) {
rtems_clock_tick();
/* Cast to an integer so that 68EC040 IDP which doesn't have an FPU doesn't
have a heart attack -- if you use newlib1.6 or greater and get
libgcc.a for gcc with software floating point support, this is not
a problem */
Clock_isrs =
(int)(rtems_configuration_get_microseconds_per_tick() / 1000);
}
else
Clock_isrs -= 1;
}
void Disable_clock(void)
{
/* Disable timer */
MC68230_WRITE (MC68230_TCR, 0x00);
}
static void Install_clock(
rtems_isr_entry clock_isr )
{
Clock_driver_ticks = 0;
Clock_isrs = (int)(rtems_configuration_get_microseconds_per_tick() / 1000);
/* led_putnum('c'); * for debugging purposes */
Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
/* Disable timer for initialization */
MC68230_WRITE (MC68230_TCR, 0x00);
/* some PI/T initialization stuff here -- see comment in the ckisr.c
file in this directory to understand why I use the values that I do */
/* Set up the interrupt vector on the MC68230 chip:
MC68230_TIVR = CLOCK_VECTOR; */
MC68230_WRITE (MC68230_TIVR, CLOCK_VECTOR);
/* Set CPRH through CPRL to 193 (not 203) decimal for countdown--see ckisr.c
CPRH = 0x00;
CPRM = 0x00;
CPRL = 0xC1; */
MC68230_WRITE (MC68230_CPRH, 0x00);
MC68230_WRITE (MC68230_CPRM, 0x00);
MC68230_WRITE (MC68230_CPRL, 0xC1);
/* Enable timer and use it as an external periodic interrupt generator
MC68230_TCR = 0xA1; */
/* led_putnum('a'); * for debugging purposes */
MC68230_WRITE (MC68230_TCR, 0xA1);
/*
* Schedule the clock cleanup routine to execute if the application exits.
*/
atexit( Clock_exit );
}
/* The following was added for debugging purposes */
void Clock_exit( void )
{
uint8_t data;
/* disable timer
data = TCR;
TCR = (data & 0xFE); */
MC68230_READ (MC68230_TCR, data);
MC68230_WRITE (MC68230_TCR, (data & 0xFE));
/* do not restore old vector */
}
rtems_device_driver Clock_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *pargp
)
{
Install_clock( Clock_isr );
return RTEMS_SUCCESSFUL;
}
c/src/lib/libbsp/m68k/idp/configure.ac
-20
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@@ -1,20 +0,0 @@
## Process this file with autoconf to produce a configure script.
AC_PREREQ([2.69])
AC_INIT([rtems-c-src-lib-libbsp-m68k-idp],[_RTEMS_VERSION],[https://devel.rtems.org/newticket])
AC_CONFIG_SRCDIR([bsp_specs])
RTEMS_TOP(../../../../../..)
RTEMS_CANONICAL_TARGET_CPU
AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2])
RTEMS_BSP_CONFIGURE
RTEMS_PROG_CC_FOR_TARGET
RTEMS_CANONICALIZE_TOOLS
RTEMS_PROG_CCAS
RTEMS_BSP_CLEANUP_OPTIONS(0, 0)
# Explicitly list all Makefiles here
AC_CONFIG_FILES([Makefile])
AC_OUTPUT
c/src/lib/libbsp/m68k/idp/console/console.c
-227
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@@ -1,227 +0,0 @@
/*
* This file contains the Motorola IDP console IO package.
*/
/*
* Written by Doug McBride, Colorado Space Grant College
* Based off of the board support packages of RTEMS
*
* Updated to RTEMS 3.2.0 by Joel Sherrill.
*/
#define MIDP_INIT
#include <bsp.h>
#include <rtems/libio.h>
#include <rtems/ringbuf.h>
Ring_buffer_t Console_Buffer[ 2 ];
rtems_isr C_Receive_ISR(rtems_vector_number vector);
/* console_initialize
*
* This routine initializes the console IO driver.
*/
rtems_device_driver console_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
rtems_status_code status;
Ring_buffer_Initialize( &Console_Buffer[ 0 ] );
Ring_buffer_Initialize( &Console_Buffer[ 1 ] );
init_pit();
status = rtems_io_register_name(
"/dev/console",
major,
(rtems_device_minor_number) 0
);
if (status != RTEMS_SUCCESSFUL)
rtems_fatal_error_occurred(status);
status = rtems_io_register_name(
"/dev/tty00",
major,
(rtems_device_minor_number) 0
);
if (status != RTEMS_SUCCESSFUL)
rtems_fatal_error_occurred(status);
status = rtems_io_register_name(
"/dev/tty01",
major,
(rtems_device_minor_number) 1
);
if (status != RTEMS_SUCCESSFUL)
rtems_fatal_error_occurred(status);
return RTEMS_SUCCESSFUL;
}
/* is_character_ready
*
* This routine returns TRUE if a character is available.
*/
static bool is_character_ready(
char *ch,
int port
)
{
if ( Ring_buffer_Is_empty( &Console_Buffer[ port ] ) )
return false;
Ring_buffer_Remove_character( &Console_Buffer[ port ], *ch );
return true;
}
/* inbyte
*
* This routine reads a character from the UART through a buffer.
*/
static char inbyte(
int port
)
{
char tmp_char;
/* If you come into this routine without checking is_character_ready() first
and you want nonblocking code, then it's your own fault */
while ( !is_character_ready( &tmp_char, port ) );
return tmp_char;
}
/* outbyte
*
* This routine transmits a character out the M68681. It supports
* XON/XOFF flow control.
*/
static void outbyte(
char ch,
int port
)
{
switch ( port ) {
case 0:
transmit_char( ch );
break;
case 1:
transmit_char_portb( ch );
break;
}
}
/*
* Open entry point
*/
rtems_device_driver console_open(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return RTEMS_SUCCESSFUL;
}
/*
* Close entry point
*/
rtems_device_driver console_close(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return RTEMS_SUCCESSFUL;
}
/*
* read bytes from the serial port. We only have stdin.
*/
rtems_device_driver console_read(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
rtems_libio_rw_args_t *rw_args;
char *buffer;
int maximum;
int count = 0;
rw_args = (rtems_libio_rw_args_t *) arg;
buffer = rw_args->buffer;
maximum = rw_args->count;
if ( minor > 1 )
return RTEMS_INVALID_NUMBER;
for (count = 0; count < maximum; count++) {
buffer[ count ] = inbyte( minor );
if (buffer[ count ] == '\n' || buffer[ count ] == '\r') {
buffer[ count++ ] = '\n';
break;
}
}
rw_args->bytes_moved = count;
return (count >= 0) ? RTEMS_SUCCESSFUL : RTEMS_UNSATISFIED;
}
/*
* write bytes to the serial port. Stdout and stderr are the same.
*/
rtems_device_driver console_write(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
int count;
int maximum;
rtems_libio_rw_args_t *rw_args;
char *buffer;
rw_args = (rtems_libio_rw_args_t *) arg;
buffer = rw_args->buffer;
maximum = rw_args->count;
if ( minor > 1 )
return RTEMS_INVALID_NUMBER;
for (count = 0; count < maximum; count++) {
if ( buffer[ count ] == '\n') {
outbyte('\r', minor );
}
outbyte( buffer[ count ], minor );
}
rw_args->bytes_moved = maximum;
return 0;
}
/*
* IO Control entry point
*/
rtems_device_driver console_control(
rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
{
return RTEMS_SUCCESSFUL;
}
c/src/lib/libbsp/m68k/idp/console/duart.c
-263
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@@ -1,263 +0,0 @@
/*#########################################################
#
# This code is a modified version of what you will find at the
# end of the IDP User's manual. The original code is copyrighted
# by Motorola and Motorola Semiconductor Products as well as
# Motorola Software products group.
#
# Modifications to the original IDP code by Doug McBride, Colorado
# Space Grant College. Modifications include a means of accessing
# port B of the duart as well as port A as well as modifications for
# buffering and RTEMS support. Modifications are provided
# as is and may not be correct.
#
# Rob Savoye provided the format for the mc68681 header file
#
# Joel Sherrill provided inspiration for recoding my original assembly
# for this file into C (a good idea)
#
##########################################################*/
#include <bsp.h>
#include <rtems/ringbuf.h>
rtems_isr C_Receive_ISR(rtems_vector_number vector);
extern Ring_buffer_t Console_Buffer[];
extern unsigned char inbuf[];
extern unsigned char inbuf_portb[];
extern unsigned tail;
extern unsigned tail_portb;
unsigned char Pit_initialized = 0;
/*#####################################################################
# The volatile routine to initialize the duart -- port a and port b
######################################################################*/
void init_pit()
{
/*
* ports A & B while configuring PIT by:
*
* + disable Interrupt Mask Register
* + disable port A transmitter
* + disable port A receiver
* + disable port B transmitter
* + disable port B receiver
*/
MC68681_WRITE(DUART_ADDR, MC68681_INTERRUPT_MASK_REG, 0x00);
MC68681_WRITE(DUART_ADDR, MC68681_COMMAND_REG_A ,MC68681_MODE_REG_DISABLE_TX);
MC68681_WRITE(DUART_ADDR, MC68681_COMMAND_REG_A, MC68681_MODE_REG_DISABLE_RX);
MC68681_WRITE(DUART_ADDR, MC68681_COMMAND_REG_B, MC68681_MODE_REG_DISABLE_TX);
MC68681_WRITE(DUART_ADDR, MC68681_COMMAND_REG_B, MC68681_MODE_REG_DISABLE_RX);
/*
* install ISR for ports A and B
*/
set_vector(C_Receive_ISR, (MC68230_VECT+MC68230_H3VECT), 1);
/*
* initialize pit
*
* set mode to 0 -- disable all ports
* set up pirq and piack
* all pins on port b are input
* submode 1x, h3 interrupt enabled
* setup pivr
* turn on all ports
*/
MC68230_WRITE(MC68230_PGCR, 0x00);
MC68230_WRITE(MC68230_PSRR, 0x18);
MC68230_WRITE(MC68230_PBDDR, 0x00);
MC68230_WRITE(MC68230_PBCR, 0x82);
MC68230_WRITE(MC68230_PIVR, MC68230_VECT);
MC68230_WRITE(MC68230_PGCR, 0x20);
/*
* For some reason, the reset of receiver/transmitter only works for
* the first time around -- it garbles the output otherwise
* (e.g., sp21)
*/
if (!Pit_initialized)
{
/*
* initialize the duart registers on port b
* WARNING:OPTIMIZER MAY ONLY EXECUTE THIRD STATEMENT IF NOT VOLATILE
*
* reset tx, channel b
* reset rx, channel b
* reset mr pointer, ch
*/
MC68681_WRITE(DUART_ADDR, MC68681_COMMAND_REG_B, MC68681_MODE_REG_RESET_TX);
MC68681_WRITE(DUART_ADDR, MC68681_COMMAND_REG_B, MC68681_MODE_REG_RESET_RX);
MC68681_WRITE(DUART_ADDR, MC68681_COMMAND_REG_B, MC68681_MODE_REG_RESET_MR_PTR);
/*
* initialize the duart registers on port a
* WARNING:OPTIMIZER MAY ONLY EXECUTE THIRD STATEMENT IF NOT VOLATILE
*
* reset tx, channel a
* reset rx, channel a
* reset mr pointer, ch
*/
MC68681_WRITE(DUART_ADDR, MC68681_COMMAND_REG_A, MC68681_MODE_REG_RESET_TX);
MC68681_WRITE(DUART_ADDR, MC68681_COMMAND_REG_A, MC68681_MODE_REG_RESET_RX);
MC68681_WRITE(DUART_ADDR, MC68681_COMMAND_REG_A, MC68681_MODE_REG_RESET_MR_PTR);
Pit_initialized = 1;
}
/*
* Init the general registers of the duart
*
* init ivr
* init imr
* init acr
* init ctur
* init ctlr
* init opcr
* init cts
*/
MC68681_WRITE(DUART_ADDR, MC68681_INTERRUPT_VECTOR_REG,
MC68681_INTERRUPT_VECTOR_INIT);
MC68681_WRITE(DUART_ADDR, MC68681_INTERRUPT_MASK_REG,
MC68681_IR_RX_READY_A | MC68681_IR_RX_READY_B);
MC68681_WRITE(DUART_ADDR, MC68681_AUX_CTRL_REG, MC68681_CLEAR);
MC68681_WRITE(DUART_ADDR, MC68681_COUNTER_TIMER_UPPER_REG, 0x00);
MC68681_WRITE(DUART_ADDR, MC68681_COUNTER_TIMER_LOWER_REG, 0x02);
MC68681_WRITE(DUART_ADDR, MC68681_OUTPUT_PORT_CONFIG_REG, MC68681_CLEAR);
MC68681_WRITE(DUART_ADDR, MC68681_OUTPUT_PORT_SET_REG, 0x01);
/*
* init the actual serial port for port a
*
* Set Baud Rate to 9600
* Set Stop bit length of 1
* enable Transmit and receive
*/
MC68681_WRITE(DUART_ADDR, MC68681_CLOCK_SELECT_REG_A, MC68681_BAUD_RATE_MASK_9600);
MC68681_WRITE(DUART_ADDR, MC68681_MODE_REG_1A,
(MC68681_8BIT_CHARS | MC68681_NO_PARITY));
MC68681_WRITE(DUART_ADDR, MC68681_MODE_REG_2A,MC68681_STOP_BIT_LENGTH_1);
MC68681_WRITE(DUART_ADDR, MC68681_COMMAND_REG_A,
(MC68681_MODE_REG_ENABLE_TX | MC68681_MODE_REG_ENABLE_RX));
/*
* init the actual serial port for port b
* init csrb -- 9600 baud
*/
MC68681_WRITE(DUART_ADDR, MC68681_CLOCK_SELECT_REG_B, MC68681_BAUD_RATE_MASK_9600);
#define EIGHT_BITS_NO_PARITY
#ifdef EIGHT_BITS_NO_PARITY
/*
* Set 8 Bit characters with no parity
*/
MC68681_WRITE(DUART_ADDR, MC68681_MODE_REG_1B,
(MC68681_NO_PARITY | MC68681_8BIT_CHARS) );
#else
/*
* Set 7 Bit Characters with parity
*/
MC68681_WRITE(DUART_ADDR, MC68681_MODE_REG_1B,
(MC68681_WITH_PARITY | MC68681_7BIT_CHARS) );
#endif
/*
* Set Stop Bit length to 1
* Disable Recieve and transmit on B
*/
MC68681_WRITE(DUART_ADDR, MC68681_MODE_REG_2B,MC68681_STOP_BIT_LENGTH_1);
MC68681_WRITE(DUART_ADDR, MC68681_COMMAND_REG_B,
(MC68681_MODE_REG_ENABLE_TX | MC68681_MODE_REG_ENABLE_RX) );
}
/*#####################################################################
# interrupt handler for receive of character from duart on ports A & B
#####################################################################*/
rtems_isr C_Receive_ISR(rtems_vector_number vector)
{
volatile unsigned char *_addr;
/*
* Clear pit interrupt.
*/
_addr = (unsigned char *) (MC68230_PIT_ADDR + MC68230_PITSR);
*_addr = 0x04;
/*
* check port A first for input
* extract rcvrdy on port B
* set ptr to recieve buffer and read character into ring buffer
*/
_addr = (unsigned char *) (DUART_ADDR + MC68681_STATUS_REG_A);
if (*_addr & MC68681_RX_READY) /* extract rcvrdy on port A */
{
_addr = (unsigned char *) (DUART_ADDR + MC68681_RECEIVE_BUFFER_A);
Ring_buffer_Add_character( &Console_Buffer[ 0 ], *_addr );
}
/*
* If not on port A, let's check port B
* extract rcvrdy on port B
* set ptr to recieve buffer and read character into ring buffer
*/
else
{
_addr = (unsigned char *) (DUART_ADDR + MC68681_STATUS_REG_B);
if (*_addr & MC68681_RX_READY) /* extract rcvrdy on port B */
{
_addr = (unsigned char *) (DUART_ADDR + MC68681_RECEIVE_BUFFER_B);
Ring_buffer_Add_character( &Console_Buffer[ 1 ], *_addr );
}
/*
* if not ready on port A or port B, must be an error
* if error, get out so that fifo is undisturbed
*/
}
}
/*#####################################################################
# This is the routine that actually transmits a character one at a time
# This routine transmits on port A of the IDP board
#####################################################################*/
void transmit_char(char ch)
{
volatile unsigned char *_addr;
/*
* Get SRA (extract txrdy)
*/
_addr = (unsigned char *) (DUART_ADDR + MC68681_STATUS_REG_A);
while (!(*_addr & MC68681_TX_READY))
{
}
/*
* transmit character over port A
*/
MC68681_WRITE(DUART_ADDR, MC68681_TRANSMIT_BUFFER_A, ch);
}
/*#####################################################################
# This is the routine that actually transmits a character one at a time
# This routine transmits on port B of the IDP board
#####################################################################*/
void transmit_char_portb(char ch)
{
volatile unsigned char *_addr;
/*
* Get SRB (extract txrdy)
*/
_addr = (unsigned char *) (DUART_ADDR + MC68681_STATUS_REG_B);
while (!(*_addr & MC68681_TX_READY))
{
}
/*
* transmit character over port B
*/
MC68681_WRITE(DUART_ADDR, MC68681_TRANSMIT_BUFFER_B, ch);
}
c/src/lib/libbsp/m68k/idp/console/leds.c
-81
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@@ -1,81 +0,0 @@
/*
* leds.c -- control the led's on a Motorola mc68ec0x0 board.
* Written by rob@cygnus.com (Rob Savoye)
*/
#include "leds.h"
void zylons(void);
void clear_leds(void);
/*
* led_putnum --
* print a hex number on the LED. the value of num must be a char with
* the ascii value. ie... number 0 is '0', a is 'a', ' ' (null) clears
* the led display.
* Setting the bit to 0 turns it on, 1 turns it off.
* the LED's are controlled by setting the right bit mask in the base
* address.
* The bits are:
* [d.p | g | f | e | d | c | b | a ] is the byte.
*
* The locations are:
*
* a
* -----
* f | | b
* | g |
* -----
* | |
* e | | c
* -----
* d . d.p (decimal point)
*/
void
led_putnum ( char num )
{
static unsigned char *leds = (unsigned char *)LED_ADDR;
static unsigned char num_bits [18] = {
0xff, /* clear all */
0xc0, 0xf9, 0xa4, 0xb0, 0x99, 0x92, 0x82, 0xf8, 0x80, 0x98, /* numbers 0-9 */
0x98, 0x20, 0x3, 0x27, 0x21, 0x4, 0xe /* letters a-f */
};
if (num >= '0' && num <= '9')
num = (num - '0') + 1;
if (num >= 'a' && num <= 'f')
num = (num - 'a') + 12;
if (num == ' ')
num = 0;
*leds = num_bits[(int)num];
}
/* This procedure added by Doug McBride, Colorado Space Grant College --
Probably should be a macro instead */
void
clear_leds ( )
{
static unsigned char *leds = (unsigned char *)LED_ADDR;
*leds = 0xFF;
}
void rtems_bsp_delay( int );
/*
* zylons -- draw a rotating pattern. NOTE: this function never returns.
*/
void
zylons()
{
unsigned char *leds = (unsigned char *)LED_ADDR;
unsigned char curled = 0xfe;
while (1)
{
*leds = curled;
curled = (curled >> 1) | (curled << 7);
rtems_bsp_delay ( 8000 );
}
}
c/src/lib/libbsp/m68k/idp/console/mc68ec.c
-19
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@@ -1,19 +0,0 @@
/*
* mc68ec.c -- Low level support for the Motorola mc68ec0x0 board.
* Written by rob@cygnus.com (Rob Savoye)
*/
#include <bsp.h>
#include "leds.h"
/*
* rtems_bsp_delay -- delay execution. This is an ugly hack. It should
* use the timer, but I'm waiting for docs. (sigh)
*/
void rtems_bsp_delay(int num)
{
while (num--)
{
__asm__ ("nop");
}
}
c/src/lib/libbsp/m68k/idp/doxygen.h
-15
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@@ -1,15 +0,0 @@
/**
* @defgroup bsp_m68k M68K
*
* @ingroup bsp_kit
*
* @brief M68K Board Support Packages
*/
/**
* @defgroup m68k_idp M68K IDP Modules
*
* @ingroup bsp_m68k
*
* @brief M68K IDP Modules
*/
c/src/lib/libbsp/m68k/idp/include/README
-9
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@@ -1,9 +0,0 @@
The following files really should be made generic and allowed to
be shared between BSPs:
mc68230.h
mc68681.h
ringbuf.h
However at the moment the BSP is not tested under 3.2.0 so it is
dangerous to do so.
c/src/lib/libbsp/m68k/idp/include/bsp.h
-56
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@@ -1,56 +0,0 @@
/**
* @file
*
* @ingroup idp_bsp
*
* @brief This include file contains all Motorola 680x0 IDP board
* IO definitions.
*/
#ifndef LIBBSP_M68K_IDP_BSP_H
#define LIBBSP_M68K_IDP_BSP_H
#include <bspopts.h>
#include <bsp/default-initial-extension.h>
#include <rtems.h>
#include <rtems/console.h>
#include <rtems/clockdrv.h>
#include <rtems/motorola/mc68230.h>
#include <rtems/motorola/mc68681.h>
/**
* @defgroup idp_bsp IO definitions
*
* @ingroup m68k_idp
*
* @brief Motorola 680x0 IDP board IO definitions
*/
#define DUART_ADDR 0xb00003 /* base address of the MC68681 DUART */
/* Constants */
#define RAM_START 0
#define RAM_END 0x200000
extern rtems_isr_entry M68Kvec[]; /* vector table address */
/* functions */
rtems_isr_entry set_vector(
rtems_isr_entry handler,
rtems_vector_number vector,
int type
);
void rtems_bsp_delay(int num);
/*
* Prototypes for methods inside the BSP that cross file boundaries.
*/
void init_pit( void );
void transmit_char( char ch );
void transmit_char_portb( char ch );
#endif
c/src/lib/libbsp/m68k/idp/include/leds.h
-40
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@@ -1,40 +0,0 @@
/**
* @file
*
* @ingroup m68k_leds
*
* @brief Led Control
*/
/*
* Written by rob@cygnus.com (Rob Savoye)
*/
#ifndef __LEDS_H__
#define __LEDS_H__
#define LED_ADDR 0xd00003
#define LED_0 ~0x1
#define LED_1 ~0x2
#define LED_2 ~0x4
#define LED_3 ~0x8
#define LED_4 ~0x10
#define LED_5 ~0x20
#define LED_6 ~0x40
#define LED_7 ~0x80
#define LEDS_OFF 0xff
#define LEDS_ON 0x0
/**
* @defgroup m68k_leds Led Control
*
* @ingroup m68k_idp
*
* @brief control the led's on a Motorola mc68ec0x0 board
*/
#define FUDGE(x) ((x >= 0xa && x <= 0xf) ? (x + 'a') & 0x7f : (x + '0') & 0x7f)
extern void led_putnum( char );
#endif /* __LEDS_H__ */
c/src/lib/libbsp/m68k/idp/include/motorola/mc68230.h
-81
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@@ -1,81 +0,0 @@
/**
* @file rtems/motorola/mc68230.h
*
* @ingroup idp_m68230
*
* @brief Low level support code for the Motorola 68230 Parallel
* Interface/Timer (PIT)
*/
/*
* Modified by Doug McBride, Colorado Space Grant College
*
* Format taken partly from RTEMS code and mostly from Motorola IDP user's
* manual. RTEMS copyright information below.
*
* COPYRIGHT (c) 1989-2011.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
/**
* @defgroup idp_mc68230 Motorola MC68230
*
* @ingroup m68k_idp
*
* @brief Support code for Motorola MC68230 PIT
*/
#ifndef _RTEMS_MOTOROLA_MC68230_H
#define _RTEMS_MOTOROLA_MC68230_H
/* Some Motorola IDP User manual defines: */
#define MC68230_PIT_ADDR 0x00c01003 /* base address of the PIT */
#define MC68230_REGOFF 0x04 /* Difference between addresses */
#define MC68230_VECT 64
#define MC68230_H1VECT 0x00
#define MC68230_H2VECT 0x01
#define MC68230_H3VECT 0x02
#define MC68230_H4VECT 0x03
/*
* mc68230 register offsets
*/
#define MC68230_PGCR 0x00
#define MC68230_PSRR 1*MC68230_REGOFF
#define MC68230_PADDR 2*MC68230_REGOFF
#define MC68230_PBDDR 3*MC68230_REGOFF
#define MC68230_PCDDR 4*MC68230_REGOFF
#define MC68230_PIVR 5*MC68230_REGOFF
#define MC68230_PACR 6*MC68230_REGOFF
#define MC68230_PBCR 7*MC68230_REGOFF
#define MC68230_PADR 8*MC68230_REGOFF
#define MC68230_PBDR 9*MC68230_REGOFF
#define MC68230_PAAR 10*MC68230_REGOFF
#define MC68230_PBAR 11*MC68230_REGOFF
#define MC68230_PCDR 12*MC68230_REGOFF
#define MC68230_PITSR 13*MC68230_REGOFF
#define MC68230_TCR 16*MC68230_REGOFF
#define MC68230_TIVR 17*MC68230_REGOFF
#define MC68230_CPRH 19*MC68230_REGOFF
#define MC68230_CPRM 20*MC68230_REGOFF
#define MC68230_CPRL 21*MC68230_REGOFF
#define MC68230_CNTRH 23*MC68230_REGOFF
#define MC68230_CNTRM 24*MC68230_REGOFF
#define MC68230_CNTRL 25*MC68230_REGOFF
#define MC68230_TSR 26*MC68230_REGOFF
/* Some RTEMS style defines: */
#ifndef MC68230_VOL8
#define MC68230_VOL8( ptr ) ((volatile uint8_t *)(ptr))
#endif
#define MC68230_WRITE( reg, data ) \
*(MC68230_VOL8(MC68230_PIT_ADDR+reg)) = (data)
#define MC68230_READ( reg, data ) \
(data) = *(MC68230_VOL8(MC68230_PIT_ADDR+reg))
#endif
c/src/lib/libbsp/m68k/idp/include/motorola/mc68681.h
-315
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@@ -1,315 +0,0 @@
/**
* @file rtems/motorola/mc68681.h
*
* @ingroup idp_mc68681
*
* @brief Low level support code for the Motorola mc68681 DUART.
*/
/*
*
* Originally written by rob@cygnus.com (Rob Savoye) for the libgloss
* IDP support.
*/
/**
* @defgroup idp_mc68681 Motorola MC68681
*
* @ingroup m68k_idp
*
* @brief Support code for Motorola MC68681 DUART
*/
#ifndef _RTEMS_MOTOROLA_MC68681_H
#define _RTEMS_MOTOROLA_MC68681_H
/*
* In the dark ages when this controller was designed, it was actually
* possible to access data on unaligned byte boundaries with no penalty.
* Now we find this chip in configurations in which the registers are
* at 16-bit, 32-bit, and 64-bit boundaries at the whim of the board
* designer. If the registers are not at byte addresses, then
* set this multiplier before including this file to correct the offsets.
*/
#ifndef MC68681_OFFSET_MULTIPLIER
#define MC68681_OFFSET_MULTIPLIER 1
#endif
#define __MC68681_REG(_R) ((_R) * MC68681_OFFSET_MULTIPLIER)
/*
* mc68681 register offsets Read/Write Addresses
*/
#define MC68681_MODE_REG_1A __MC68681_REG(0) /* MR1A-MR Prior to Read */
#define MC68681_MODE_REG_2A __MC68681_REG(0) /* MR2A-MR After Read */
#define MC68681_COUNT_MODE_CURRENT_MSB __MC68681_REG(6) /* CTU */
#define MC68681_COUNTER_TIMER_UPPER_REG __MC68681_REG(6) /* CTU */
#define MC68681_COUNT_MODE_CURRENT_LSB __MC68681_REG(7) /* CTL */
#define MC68681_COUNTER_TIMER_LOWER_REG __MC68681_REG(7) /* CTL */
#define MC68681_INTERRUPT_VECTOR_REG __MC68681_REG(12) /* IVR */
#define MC68681_MODE_REG_1B __MC68681_REG(8) /* MR1B-MR Prior to Read */
#define MC68681_MODE_REG_2B __MC68681_REG(8) /* MR2BA-MR After Read */
/*
* mc68681 register offsets Read Only Addresses
*/
#define MC68681_STATUS_REG_A __MC68681_REG(1) /* SRA */
#define MC68681_MASK_ISR_REG __MC68681_REG(2) /* MISR */
#define MC68681_RECEIVE_BUFFER_A __MC68681_REG(3) /* RHRA */
#define MC68681_INPUT_PORT_CHANGE_REG __MC68681_REG(4) /* IPCR */
#define MC68681_INTERRUPT_STATUS_REG __MC68681_REG(5) /* ISR */
#define MC68681_STATUS_REG_B __MC68681_REG(9) /* SRB */
#define MC68681_RECEIVE_BUFFER_B __MC68681_REG(11) /* RHRB */
#define MC68681_INPUT_PORT __MC68681_REG(13) /* IP */
#define MC68681_START_COUNT_CMD __MC68681_REG(14) /* SCC */
#define MC68681_STOP_COUNT_CMD __MC68681_REG(15) /* STC */
/*
* mc68681 register offsets Write Only Addresses
*/
#define MC68681_CLOCK_SELECT_REG_A __MC68681_REG(1) /* CSRA */
#define MC68681_COMMAND_REG_A __MC68681_REG(2) /* CRA */
#define MC68681_TRANSMIT_BUFFER_A __MC68681_REG(3) /* THRA */
#define MC68681_AUX_CTRL_REG __MC68681_REG(4) /* ACR */
#define MC68681_INTERRUPT_MASK_REG __MC68681_REG(5) /* IMR */
#define MC68681_CLOCK_SELECT_REG_B __MC68681_REG(9) /* CSRB */
#define MC68681_COMMAND_REG_B __MC68681_REG(10) /* CRB */
#define MC68681_TRANSMIT_BUFFER_B __MC68681_REG(11) /* THRB */
#define MC68681_OUTPUT_PORT_CONFIG_REG __MC68681_REG(13) /* OPCR */
#define MC68681_OUTPUT_PORT_SET_REG __MC68681_REG(14) /* SOPBC */
#define MC68681_OUTPUT_PORT_RESET_BITS __MC68681_REG(15) /* COPBC */
#ifndef MC6681_VOL
#define MC6681_VOL( ptr ) ((volatile unsigned char *)(ptr))
#endif
#define MC68681_WRITE( _base, _reg, _data ) \
*((volatile unsigned char *)_base+_reg) = (_data)
#define MC68681_READ( _base, _reg ) \
*(((volatile unsigned char *)_base+_reg))
#define MC68681_CLEAR 0x00
#define MC68681_PORT_A 0
#define MC68681_PORT_B 1
/*
* DUART Command Register Definitions:
*
* MC68681_COMMAND_REG_A,MC68681_COMMAND_REG_B
*/
#define MC68681_MODE_REG_ENABLE_RX 0x01
#define MC68681_MODE_REG_DISABLE_RX 0x02
#define MC68681_MODE_REG_ENABLE_TX 0x04
#define MC68681_MODE_REG_DISABLE_TX 0x08
#define MC68681_MODE_REG_RESET_MR_PTR 0x10
#define MC68681_MODE_REG_RESET_RX 0x20
#define MC68681_MODE_REG_RESET_TX 0x30
#define MC68681_MODE_REG_RESET_ERROR 0x40
#define MC68681_MODE_REG_RESET_BREAK 0x50
#define MC68681_MODE_REG_START_BREAK 0x60
#define MC68681_MODE_REG_STOP_BREAK 0x70
#define MC68681_MODE_REG_SET_RX_BRG 0x80
#define MC68681_MODE_REG_CLEAR_RX_BRG 0x90
#define MC68681_MODE_REG_SET_TX_BRG 0xa0
#define MC68681_MODE_REG_CLEAR_TX_BRG 0xb0
#define MC68681_MODE_REG_SET_STANDBY 0xc0
#define MC68681_MODE_REG_SET_ACTIVE 0xd0
/*
* Mode Register Definitions
*
* MC68681_MODE_REG_1A
* MC68681_MODE_REG_1B
*/
#define MC68681_5BIT_CHARS 0x00
#define MC68681_6BIT_CHARS 0x01
#define MC68681_7BIT_CHARS 0x02
#define MC68681_8BIT_CHARS 0x03
#define MC68681_ODD_PARITY 0x00
#define MC68681_EVEN_PARITY 0x04
#define MC68681_WITH_PARITY 0x00
#define MC68681_FORCE_PARITY 0x08
#define MC68681_NO_PARITY 0x10
#define MC68681_MULTI_DROP 0x18
#define MC68681_ERR_MODE_CHAR 0x00
#define MC68681_ERR_MODE_BLOCK 0x20
#define MC68681_RX_INTR_RX_READY 0x00
#define MC68681_RX_INTR_FFULL 0x40
#define MC68681_NO_RX_RTS_CTL 0x00
#define MC68681_RX_RTS_CTRL 0x80
/*
* Mode Register Definitions
*
* MC68681_MODE_REG_2A
* MC68681_MODE_REG_2B
*/
#define MC68681_STOP_BIT_LENGTH__563 0x00
#define MC68681_STOP_BIT_LENGTH__625 0x01
#define MC68681_STOP_BIT_LENGTH__688 0x02
#define MC68681_STOP_BIT_LENGTH__75 0x03
#define MC68681_STOP_BIT_LENGTH__813 0x04
#define MC68681_STOP_BIT_LENGTH__875 0x05
#define MC68681_STOP_BIT_LENGTH__938 0x06
#define MC68681_STOP_BIT_LENGTH_1 0x07
#define MC68681_STOP_BIT_LENGTH_1_563 0x08
#define MC68681_STOP_BIT_LENGTH_1_625 0x09
#define MC68681_STOP_BIT_LENGTH_1_688 0x0a
#define MC68681_STOP_BIT_LENGTH_1_75 0x0b
#define MC68681_STOP_BIT_LENGTH_1_813 0x0c
#define MC68681_STOP_BIT_LENGTH_1_875 0x0d
#define MC68681_STOP_BIT_LENGTH_1_938 0x0e
#define MC68681_STOP_BIT_LENGTH_2 0x0f
#define MC68681_CTS_ENABLE_TX 0x10
#define MC68681_TX_RTS_CTRL 0x20
#define MC68681_CHANNEL_MODE_NORMAL 0x00
#define MC68681_CHANNEL_MODE_ECHO 0x40
#define MC68681_CHANNEL_MODE_LOCAL_LOOP 0x80
#define MC68681_CHANNEL_MODE_REMOTE_LOOP 0xc0
/*
* Status Register Definitions
*
* MC68681_STATUS_REG_A, MC68681_STATUS_REG_B
*/
#define MC68681_RX_READY 0x01
#define MC68681_FFULL 0x02
#define MC68681_TX_READY 0x04
#define MC68681_TX_EMPTY 0x08
#define MC68681_OVERRUN_ERROR 0x10
#define MC68681_PARITY_ERROR 0x20
#define MC68681_FRAMING_ERROR 0x40
#define MC68681_RECEIVED_BREAK 0x80
/*
* Interupt Status Register Definitions.
*
* MC68681_INTERRUPT_STATUS_REG
*/
/*
* Interupt Mask Register Definitions
*
* MC68681_INTERRUPT_MASK_REG
*/
#define MC68681_IR_TX_READY_A 0x01
#define MC68681_IR_RX_READY_A 0x02
#define MC68681_IR_BREAK_A 0x04
#define MC68681_IR_COUNTER_READY 0x08
#define MC68681_IR_TX_READY_B 0x10
#define MC68681_IR_RX_READY_B 0x20
#define MC68681_IR_BREAK_B 0x40
#define MC68681_IR_INPUT_PORT_CHANGE 0x80
/*
* Status Register Definitions.
*
* MC68681_STATUS_REG_A,MC68681_STATUS_REG_B
*/
#define MC68681_STATUS_RXRDY 0x01
#define MC68681_STATUS_FFULL 0x02
#define MC68681_STATUS_TXRDY 0x04
#define MC68681_STATUS_TXEMT 0x08
#define MC68681_STATUS_OVERRUN_ERROR 0x10
#define MC68681_STATUS_PARITY_ERROR 0x20
#define MC68681_STATUS_FRAMING_ERROR 0x40
#define MC68681_STATUS_RECEIVED_BREAK 0x80
/*
* Definitions for the Interrupt Vector Register:
*
* MC68681_INTERRUPT_VECTOR_REG
*/
#define MC68681_INTERRUPT_VECTOR_INIT 0x0f
/*
* Definitions for the Auxiliary Control Register
*
* MC68681_AUX_CTRL_REG
*/
#define MC68681_AUX_BRG_SET1 0x00
#define MC68681_AUX_BRG_SET2 0x80
/*
* The following Baud rates assume the X1 clock pin is driven with a
* 3.6864 MHz signal. If a different frequency is used the DUART channel
* is running at the follwoing baud rate:
* ((Table Baud Rate)*frequency)/3.6864 MHz
*/
/*
* Definitions for the Clock Select Register:
*
* MC68681_CLOCK_SELECT_REG_A,MC68681_CLOCK_SELECT_REG_A
*
* Note: ACR[7] is the MSB of the Auxiliary Control register
* X is the extend bit.
* CRA - 0x08 Set Rx BRG Select Extend Bit (X=1)
* CRA - 0x09 Clear Rx BRG Select Extend Bit (X=0)
* CRB - 0x0a Set Tx BRG Select Extend Bit (X=1)
* CRB - 0x0b Clear Tx BRG Select Extend Bit (x=1)
*/
#define MC68681_BAUD_RATE_MASK_50 0x00 /* ACR[7]=0,X=0 */
/* ARC[7]=1,X=1 */
#define MC68681_BAUD_RATE_MASK_75 0x00 /* ACR[7]=0,X=0 */
/* ARC[7]=1,X=1 */
#define MC68681_BAUD_RATE_MASK_110 0x01
#define MC68681_BAUD_RATE_MASK_134_5 0x02
#define MC68681_BAUD_RATE_MASK_150 0x03 /* ACR[7]=0,X=0 */
/* ARC[7]=1,X=1 */
#define MC68681_BAUD_RATE_MASK_200 0x03 /* ACR[7]=0,X=0 */
/* ARC[7]=1,X=1 */
#define MC68681_BAUD_RATE_MASK_300 0x04 /* ACR[7]=0,X=0 */
/* ARC[7]=1,X=1 */
#define MC68681_BAUD_RATE_MASK_600 0x05 /* ACR[7]=0,X=0 */
/* ARC[7]=1,X=1 */
#define MC68681_BAUD_RATE_MASK_1050 0x07 /* ACR[7]=0,X=0 */
/* ARC[7]=1,X=1 */
#define MC68681_BAUD_RATE_MASK_1200 0x06 /* ACR[7]=0,X=0 */
/* ARC[7]=1,X=1 */
#define MC68681_BAUD_RATE_MASK_1800 0x0a /* ACR[7]=0,X=0 */
/* ARC[7]=1,X=1 */
#define MC68681_BAUD_RATE_MASK_2400 0x08 /* ACR[7]=0,X=0 */
/* ARC[7]=1,X=1 */
#define MC68681_BAUD_RATE_MASK_3600 0x04 /* ACR[7]=0,X=0 */
/* ARC[7]=1,X=1 */
#define MC68681_BAUD_RATE_MASK_4800 0x09
#define MC68681_BAUD_RATE_MASK_7200 0x0a /* ACR[7]=0,X=0 */
/* ARC[7]=1,X=1 */
#define MC68681_BAUD_RATE_MASK_9600 0xbb
#define MC68681_BAUD_RATE_MASK_14_4K 0x05 /* ACR[7]=0,X=0 */
/* ARC[7]=1,X=1 */
#define MC68681_BAUD_RATE_MASK_19_2K 0xcc /* ACR[7]=1,X=0 */
/* ARC[7]=0,X=1 */
#define MC68681_BAUD_RATE_MASK_28_8K 0x06 /* ACR[7]=0,X=0 */
/* ARC[7]=1,X=1 */
#define MC68681_BAUD_RATE_MASK_38_4K 0xcc /* ACR[7]=0,X=0 */
/* ARC[7]=1,X=1 */
#define MC68681_BAUD_RATE_MASK_57_6K 0x07 /* ACR[7]=0,X=0 */
/* ARC[7]=1,X=1 */
#define MC68681_BAUD_RATE_MASK_115_5K 0x08
#define MC68681_BAUD_RATE_MASK_TIMER 0xdd
#define MC68681_BAUD_RATE_MASK_TIMER_16X 0xee
#define MC68681_BAUD_RATE_MASK_TIMER_1X 0xff
#endif
c/src/lib/libbsp/m68k/idp/make/custom/idp.cfg
-24
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@@ -1,24 +0,0 @@
#
# Config file for the IDP BSP
#
include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=m68k
RTEMS_CPU_MODEL=m68ec040
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
#
CPU_CFLAGS = -msoft-float
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer
define bsp-post-link
$(OBJCOPY) -O srec $(basename $@)$(EXEEXT) $(basename $@).srec
sed -e 's/.$$//' -e '/^S0/d' $(basename $@).srec | \
$(PACKHEX) > $(basename $@)$(DOWNEXT)
rm -f $(basename $@).srec
$(default-bsp-post-link)
endef
c/src/lib/libbsp/m68k/idp/preinstall.am
-84
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@@ -1,84 +0,0 @@
## Automatically generated by ampolish3 - Do not edit
if AMPOLISH3
$(srcdir)/preinstall.am: Makefile.am
$(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am
endif
PREINSTALL_DIRS =
DISTCLEANFILES += $(PREINSTALL_DIRS)
all-am: $(PREINSTALL_FILES)
PREINSTALL_FILES =
CLEANFILES = $(PREINSTALL_FILES)
all-local: $(TMPINSTALL_FILES)
TMPINSTALL_FILES =
CLEANFILES += $(TMPINSTALL_FILES)
$(PROJECT_LIB)/$(dirstamp):
@$(MKDIR_P) $(PROJECT_LIB)
@: > $(PROJECT_LIB)/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)
$(PROJECT_INCLUDE)/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)
@: > $(PROJECT_INCLUDE)/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
$(PROJECT_INCLUDE)/bsp/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
@: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs
$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
$(PROJECT_INCLUDE)/tm27.h: ../../shared/include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h
$(PROJECT_INCLUDE)/leds.h: include/leds.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/leds.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/leds.h
$(PROJECT_INCLUDE)/coverhd.h: ../../shared/include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
$(PROJECT_INCLUDE)/rtems/motorola/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)/rtems/motorola
@: > $(PROJECT_INCLUDE)/rtems/motorola/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/rtems/motorola/$(dirstamp)
$(PROJECT_INCLUDE)/rtems/motorola/mc68230.h: include/motorola/mc68230.h $(PROJECT_INCLUDE)/rtems/motorola/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/motorola/mc68230.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/motorola/mc68230.h
$(PROJECT_INCLUDE)/rtems/motorola/mc68681.h: include/motorola/mc68681.h $(PROJECT_INCLUDE)/rtems/motorola/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/motorola/mc68681.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/motorola/mc68681.h
$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds
c/src/lib/libbsp/m68k/idp/startup/bspstart.c
-59
View File
@@ -1,59 +0,0 @@
/*
* This routine does the bulk of the system initialization.
*/
/*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#include <bsp.h>
#include <bsp/bootcard.h>
unsigned char *duart_base;
extern struct duart_regs duart_info;
#define DELAY 5000
void led_putnum(void);
void bsp_start( void )
{
rtems_isr_entry *monitors_vector_table;
int index;
/* RAM size set in linker script */
duart_base = (unsigned char *)DUART_ADDR;
/*
* Set the VBR here to the monitor's default.
*/
monitors_vector_table = (rtems_isr_entry *)0;
/* This is where you set vector base register = 0 */
m68k_set_vbr( monitors_vector_table );
/* The vector interrupt table for the 680x0 is in appendix B-2
* of the M68000 Family Programmer's reference table
*/
for ( index=2 ; index<=255 ; index++ )
M68Kvec[ index ] = monitors_vector_table[ 32 ];
M68Kvec[ 2 ] = monitors_vector_table[ 2 ]; /* bus error vector */
M68Kvec[ 4 ] = monitors_vector_table[ 4 ]; /* breakpoints vector */
M68Kvec[ 9 ] = monitors_vector_table[ 9 ]; /* trace vector */
/*
* Set the VBR here if you do not want to use the monitor's vector table.
*/
m68k_set_vbr( &M68Kvec );
rtems_cache_enable_instruction();
rtems_cache_enable_data();
/* led_putnum('e'); * for debugging purposes only */
}
c/src/lib/libbsp/m68k/idp/startup/linkcmds
-201
View File
@@ -1,201 +0,0 @@
/* This file is a derivation of that found with the newlib-1.6 distribution
* for the idp.ld file. That file, it appears, was originally written by
* Rob Savoye. Other ideas came from Joel Sherrill for the RTEMS linkcmds
* file (this is basically a mixture of the two).
*/
/*
* Setup the memory map of the MC68ec0x0 Board (IDP)
* stack grows up towards high memory. This works for
* both the rom68k and the mon68k monitors.
*/
MEMORY
{
ram : org = 0x10000, l = 2M
}
/*
* Declare some sizes.
*/
RamBase = DEFINED(RamBase) ? RamBase : 0x0;
RamSize = DEFINED(RamSize) ? RamSize : 2M;
HeapSize = DEFINED(HeapSize) ? HeapSize : 0x0;
_StackSize = DEFINED(_StackSize) ? _StackSize : 0x1000;
SECTIONS
{
ram : {
. = .;
} >ram
/*
* Text, data and bss segments
*/
.text : {
*(.text*)
/*
* C++ constructors/destructors
*/
*(.gnu.linkonce.t.*)
/*
* Initialization and finalization code.
*
* Various files can provide initialization and finalization
* functions. crtbegin.o and crtend.o are two instances. The
* body of these functions are in .init and .fini sections. We
* accumulate the bodies here, and prepend function prologues
* from crti.o and function epilogues from crtn.o. crti.o must
* be linked first; crtn.o must be linked last. Because these
* are wildcards, it doesn't matter if the user does not
* actually link against crti.o and crtn.o; the linker won't
* look for a file to match a wildcard. The wildcard also
* means that it doesn't matter which directory crti.o and
* crtn.o are in.
*/
PROVIDE (_init = .);
*crti.o(.init)
*(.init)
*crtn.o(.init)
PROVIDE (_fini = .);
*crti.o(.fini)
*(.fini)
*crtn.o(.fini)
/*
* Special FreeBSD sysctl sections.
*/
. = ALIGN (16);
__start_set_sysctl_set = .;
*(set_sysctl_*);
__stop_set_sysctl_set = ABSOLUTE(.);
*(set_domain_*);
*(set_pseudo_*);
/*
* C++ constructors/destructors
*
* gcc uses crtbegin.o to find the start of the constructors
* and destructors so we make sure it is first. Because this
* is a wildcard, it doesn't matter if the user does not
* actually link against crtbegin.o; the linker won't look for
* a file to match a wildcard. The wildcard also means that
* it doesn't matter which directory crtbegin.o is in. The
* constructor and destructor list are terminated in
* crtend.o. The same comments apply to it.
*/
. = ALIGN (16);
*crtbegin.o(.ctors)
*(.ctors)
*crtend.o(.ctors)
*crtbegin.o(.dtors)
*(.dtors)
*crtend.o(.dtors)
/*
* Exception frame info
*/
. = ALIGN (16);
*(.eh_frame)
/*
* Read-only data
*/
. = ALIGN (16);
_rodata_start = .;
*(.rodata*)
KEEP (*(SORT(.rtemsroset.*)))
*(.gnu.linkonce.r*)
. = ALIGN (16);
PROVIDE (_etext = .);
} >ram
.tdata : {
_TLS_Data_begin = .;
*(.tdata .tdata.* .gnu.linkonce.td.*)
_TLS_Data_end = .;
} >ram
.tbss : {
_TLS_BSS_begin = .;
*(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
_TLS_BSS_end = .;
} >ram
_TLS_Data_size = _TLS_Data_end - _TLS_Data_begin;
_TLS_Data_begin = _TLS_Data_size != 0 ? _TLS_Data_begin : _TLS_BSS_begin;
_TLS_Data_end = _TLS_Data_size != 0 ? _TLS_Data_end : _TLS_BSS_begin;
_TLS_BSS_size = _TLS_BSS_end - _TLS_BSS_begin;
_TLS_Size = _TLS_BSS_end - _TLS_Data_begin;
_TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss));
.data : {
PROVIDE (_copy_start = .);
*(.data*)
KEEP (*(SORT(.rtemsrwset.*)))
*(.gnu.linkonce.d*)
*(.gcc_except_table*)
*(.jcr)
. = ALIGN (16);
PROVIDE (_edata = .);
PROVIDE (_copy_end = .);
} >ram
.bss : {
_clear_start = .;
*(.dynbss)
*(.bss* .gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (16);
PROVIDE (end = .);
. += _StackSize;
. = ALIGN (16);
_stack_init = .;
_clear_end = .;
WorkAreaBase = .;
} >ram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* These must appear regardless of . */
}
c/src/lib/libbsp/m68k/idp/timer/timer.c
-98
View File
@@ -1,98 +0,0 @@
/*
* Code Modified for the MC68230 by Doug McBride, Colorado Space Grant College
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#include <rtems.h>
#include <rtems/btimer.h>
#include <bsp.h>
#include <rtems/motorola/mc68230.h>
#define TIMER_VECTOR 0x4D
int Ttimer_val;
bool benchmark_timer_find_average_overhead;
rtems_isr timerisr(rtems_vector_number);
void benchmark_timer_initialize(void)
{
(void) set_vector( timerisr, TIMER_VECTOR, 0 ); /* install ISR */
Ttimer_val = 0; /* clear timer ISR count */
/* some PI/T initialization stuff here */
/* Set up the interrupt vector on the MC68230 chip:
TIVR = TIMER_VECTOR; */
MC68230_WRITE (MC68230_TIVR, TIMER_VECTOR);
/* Set CPRH through CPRL to maximum count to reduce interrupt overhead
CPRH = 0xFF;
CPRM = 0xFF;
CPRL = 0xFF; */
MC68230_WRITE (MC68230_CPRH, 0xFF);
MC68230_WRITE (MC68230_CPRM, 0xFF);
MC68230_WRITE (MC68230_CPRL, 0xFF);
/* Enable timer and use it as an external periodic interrupt generator
TCR = 0xA1; */
MC68230_WRITE (MC68230_TCR, 0xA1);
}
#define AVG_OVERHEAD 9 /* may not be right -- do this later */
#define LEAST_VALID 10 /* Don't trust a value lower than this */
benchmark_timer_t benchmark_timer_read(void)
{
uint8_t data;
uint8_t msb, osb, lsb;
uint32_t remaining, total;
/* Disable timer so that timer can be read
data = MC68230_TCR;
MC68230_TCR = (data & 0xFE); */
MC68230_READ (MC68230_TCR, data);
MC68230_WRITE (MC68230_TCR, (data & 0xFE));
/* Read the counter value
msb = MC68230_CNTRH;
osb = MC68230_CNTRM;
lsb = MC68230_CNTRL; */
MC68230_READ (MC68230_CNTRH, msb);
MC68230_READ (MC68230_CNTRM, osb);
MC68230_READ (MC68230_CNTRL, lsb);
/* Calculate the time so far */
remaining = 0x1000000 - ((msb << 16) + (osb << 8) + lsb);
total = (Ttimer_val * 0x1000000) + remaining;
/* Enable timer so that timer can continue
MC68230_TCR = 0xA1; */
MC68230_WRITE (MC68230_TCR, 0xA1);
/* do not restore old vector */
if ( benchmark_timer_find_average_overhead == true )
return total; /* in countdown units */
if ( total < LEAST_VALID )
return 0; /* below timer resolution */
/* Clocked at 6.5 Mhz */
/* Avoid floating point problems, be lazy, and return the total minus
the average overhead */
return (total - AVG_OVERHEAD);
}
void benchmark_timer_disable_subtracting_average_overhead(
bool find_flag
)
{
benchmark_timer_find_average_overhead = find_flag;
}
c/src/lib/libbsp/m68k/idp/timer/timerisr.S
-35
View File
@@ -1,35 +0,0 @@
/* timer_isr()
*
* This routine provides the ISR for the MC68230 timer on the Motorola
* IDP board. The timer is set up to generate an interrupt at maximum
* intervals.
*
* Code modified by Doug McBride, Colorado Space Grant College
* countdown should be loaded automatically
*
* Input parameters: NONE
*
* Output parameters: NONE
*
* COPYRIGHT (c) 1989-1999.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#include <rtems/asm.h>
BEGIN_CODE
.set TSR, 0x00c0106B | base address of PIT register "TSR"
PUBLIC (timerisr)
SYM (timerisr):
movb #1,TSR | acknowledge interrupt
addql #1, SYM (Ttimer_val) | increment timer value
rte
END_CODE
END
c/src/lib/libbsp/m68k/idp/times
-189
View File
@@ -1,189 +0,0 @@
#
# Timing Test Suite Results for the Motorola IDP BSP
#
NOTE: This BSP is used submitted and no information is currently available.
Board: IDP
CPU:
Clock Speed:
Memory Configuration: SRAM, DRAM, cache, etc
Wait States:
Times Reported in: cycles, microseconds, etc
Timer Source: Count Down Timer, on-CPU cycle counter, etc
Column A: unused
Column B: unused
# DESCRIPTION A B
== ================================================================= ==== ====
1 rtems_semaphore_create 20
rtems_semaphore_delete 21
rtems_semaphore_obtain: available 15
rtems_semaphore_obtain: not available -- NO_WAIT 15
rtems_semaphore_release: no waiting tasks 16
2 rtems_semaphore_obtain: not available -- caller blocks 62
3 rtems_semaphore_release: task readied -- preempts caller 55
4 rtems_task_restart: blocked task -- preempts caller 77
rtems_task_restart: ready task -- preempts caller 70
rtems_semaphore_release: task readied -- returns to caller 25
rtems_task_create 57
rtems_task_start 31
rtems_task_restart: suspended task -- returns to caller 36
rtems_task_delete: suspended task 47
rtems_task_restart: ready task -- returns to caller 37
rtems_task_restart: blocked task -- returns to caller 46
rtems_task_delete: blocked task 50
5 rtems_task_suspend: calling task 51
rtems_task_resume: task readied -- preempts caller 49
6 rtems_task_restart: calling task 59
rtems_task_suspend: returns to caller 18
rtems_task_resume: task readied -- returns to caller 19
rtems_task_delete: ready task 50
7 rtems_task_restart: suspended task -- preempts caller 70
8 rtems_task_set_priority: obtain current priority 12
rtems_task_set_priority: returns to caller 27
rtems_task_mode: obtain current mode 5
rtems_task_mode: no reschedule 5
rtems_task_mode: reschedule -- returns to caller 8
rtems_task_mode: reschedule -- preempts caller 39
rtems_clock_set 33
rtems_clock_get 3
9 rtems_message_queue_create 110
rtems_message_queue_send: no waiting tasks 37
rtems_message_queue_urgent: no waiting tasks 37
rtems_message_queue_receive: available 31
rtems_message_queue_flush: no messages flushed 12
rtems_message_queue_flush: messages flushed 16
rtems_message_queue_delete 26
10 rtems_message_queue_receive: not available -- NO_WAIT 15
rtems_message_queue_receive: not available -- caller blocks 62
11 rtems_message_queue_send: task readied -- preempts caller 72
12 rtems_message_queue_send: task readied -- returns to caller 39
13 rtems_message_queue_urgent: task readied -- preempts caller 72
14 rtems_message_queue_urgent: task readied -- returns to caller 39
15 rtems_event_receive: obtain current events 1
rtems_event_receive: not available -- NO_WAIT 12
rtems_event_receive: not available -- caller blocks 56
rtems_event_send: no task readied 12
rtems_event_receive: available 12
rtems_event_send: task readied -- returns to caller 24
16 rtems_event_send: task readied -- preempts caller 55
17 rtems_task_set_priority: preempts caller 62
18 rtems_task_delete: calling task 83
19 rtems_signal_catch 9
rtems_signal_send: returns to caller 15
rtems_signal_send: signal to self 18
exit ASR overhead: returns to calling task 22
exit ASR overhead: returns to preempting task 49
20 rtems_partition_create 35
rtems_region_create 23
rtems_partition_get_buffer: available 15
rtems_partition_get_buffer: not available 13
rtems_partition_return_buffer 18
rtems_partition_delete 16
rtems_region_get_segment: available 22
rtems_region_get_segment: not available -- NO_WAIT 21
rtems_region_return_segment: no waiting tasks 19
rtems_region_get_segment: not available -- caller blocks 64
rtems_region_return_segment: task readied -- preempts caller 74
rtems_region_return_segment: task readied -- returns to caller 44
rtems_region_delete 16
rtems_io_initialize 2
rtems_io_open 1
rtems_io_close 1
rtems_io_read 1
rtems_io_write 1
rtems_io_control 1
21 rtems_task_ident 149
rtems_message_queue_ident 145
rtems_semaphore_ident 156
rtems_partition_ident 145
rtems_region_ident 148
rtems_port_ident 145
rtems_timer_ident 145
rtems_rate_monotonic_ident 145
22 rtems_message_queue_broadcast: task readied -- returns to caller 42
rtems_message_queue_broadcast: no waiting tasks 17
rtems_message_queue_broadcast: task readied -- preempts caller 78
23 rtems_timer_create 14
rtems_timer_fire_after: inactive 22
rtems_timer_fire_after: active 24
rtems_timer_cancel: active 15
rtems_timer_cancel: inactive 13
rtems_timer_reset: inactive 21
rtems_timer_reset: active 23
rtems_timer_fire_when: inactive 34
rtems_timer_fire_when: active 34
rtems_timer_delete: active 19
rtems_timer_delete: inactive 17
rtems_task_wake_when 69
24 rtems_task_wake_after: yield -- returns to caller 9
rtems_task_wake_after: yields -- preempts caller 45
25 rtems_clock_tick 4
26 _ISR_Disable 0
_ISR_Flash 1
_ISR_Enable 1
_Thread_Disable_dispatch 0
_Thread_Enable_dispatch 7
_Thread_Set_state 11
_Thread_Disptach (NO FP) 31
context switch: no floating point contexts 21
context switch: self 10
context switch: to another task 10
context switch: restore 1st FP task 25
fp context switch: save idle, restore idle 31
fp context switch: save idle, restore initialized 19
fp context switch: save initialized, restore initialized 20
_Thread_Resume 7
_Thread_Unblock 7
_Thread_Ready 9
_Thread_Get 4
_Semaphore_Get 2
_Thread_Get: invalid id 0
27 interrupt entry overhead: returns to interrupted task 6
interrupt exit overhead: returns to interrupted task 6
interrupt entry overhead: returns to nested interrupt 6
interrupt exit overhead: returns to nested interrupt 5
interrupt entry overhead: returns to preempting task 7
interrupt exit overhead: returns to preempting task 36
28 rtems_port_create 16
rtems_port_external_to_internal 11
rtems_port_internal_to_external 11
rtems_port_delete 16
29 rtems_rate_monotonic_create 15
rtems_rate_monotonic_period: initiate period -- returns to caller 21
rtems_rate_monotonic_period: obtain status 13
rtems_rate_monotonic_cancel 16
rtems_rate_monotonic_delete: inactive 18
rtems_rate_monotonic_delete: active 20
rtems_rate_monotonic_period: conclude periods -- caller blocks 53