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2008-09-16 Joel Sherrill <joel.sherrill@oarcorp.com>

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* Makefile.am, configure.ac, include/bspopts.h.in, startup/bspstart.c,
	startup/linkcmds, startup/linkcmds.m5484FireEngine.flash: Add use of
	bsp_get_work_area() in its own file and rely on BSP Framework to
	perform more initialization. Remove unnecessary includes of
	rtems/libio.h and rtems/libcsupport.h.
This commit is contained in:
Joel Sherrill
2008-09-16 19:03:19 +00:00
parent 2a0726aa60
commit 0ba477eab1
7 changed files with 78 additions and 110 deletions
Download Patch File Download Diff File Expand all files Collapse all files
c/src/lib/libbsp/m68k/genmcf548x/ChangeLog
+8
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@@ -1,3 +1,11 @@
2008-09-16 Joel Sherrill <joel.sherrill@oarcorp.com>
* Makefile.am, configure.ac, include/bspopts.h.in, startup/bspstart.c,
startup/linkcmds, startup/linkcmds.m5484FireEngine.flash: Add use of
bsp_get_work_area() in its own file and rely on BSP Framework to
perform more initialization. Remove unnecessary includes of
rtems/libio.h and rtems/libcsupport.h.
2008-09-10 Joel Sherrill <joel.sherrill@oarcorp.com>
* include/bsp.h: Review of all bsp_cleanup() implementations. In this
c/src/lib/libbsp/m68k/genmcf548x/Makefile.am
+2 -1
View File
@@ -26,7 +26,8 @@ project_lib_DATA = start.$(OBJEXT)
dist_project_lib_DATA += startup/linkcmds
startup_SOURCES = startup/bspclean.c ../../shared/bsplibc.c \
../../shared/bsppost.c ../../m68k/shared/m68kpretaskinghook.c \
../../shared/bsppost.c ../../m68k/shared/m68kbspgetworkarea.c \
../../shared/bsppretaskinghook.c ../../shared/bsppredriverhook.c \
startup/init548x.c startup/bspstart.c ../../shared/bootcard.c \
../../shared/sbrk.c ../../m68k/shared/setvec.c \
../../shared/gnatinstallhandler.c
c/src/lib/libbsp/m68k/genmcf548x/configure.ac
+2
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@@ -24,6 +24,8 @@ RTEMS_BSPOPTS_SET([BSP_CPU_CLOCK_SPEED],[*],[100000000])
RTEMS_BSPOPTS_HELP([BSP_CPU_CLOCK_SPEED],
[Use a clock speed of 100000000 for the m5484FireEngine board])
RTEMS_BSP_BOOTCARD_HANDLES_RAM_ALLOCATION
# Explicitly list all Makefiles here
AC_CONFIG_FILES([Makefile])
AC_OUTPUT
c/src/lib/libbsp/m68k/genmcf548x/include/bspopts.h.in
+8
View File
@@ -1,8 +1,16 @@
/* include/bspopts.h.in. Generated from configure.ac by autoheader. */
/* BSP uses shared logic in bootcard.c */
#undef BSP_BOOTCARD_HANDLES_RAM_ALLOCATION
/* Use a clock speed of 100000000 for the m5484FireEngine board */
#undef BSP_CPU_CLOCK_SPEED
/* If defined, then PSIM will put a non-zero pattern into the RTEMS Workspace
and C program heap. This should assist in finding code that assumes memory
starts set to zero. */
#undef BSP_DIRTY_MEMORY
/* Define to the address where bug reports for this package should be sent. */
#undef PACKAGE_BUGREPORT
c/src/lib/libbsp/m68k/genmcf548x/startup/bspstart.c
-52
View File
@@ -44,17 +44,9 @@
\*===============================================================*/
#include <bsp.h>
#include <rtems/libio.h>
#include <rtems/libcsupport.h>
#include <string.h>
char *HeapStart, *HeapEnd;
unsigned long _HeapSize;
extern uint32_t _CPU_cacr_shadow;
extern unsigned long _M68k_Ramsize;
/*
* These labels (!) are defined in the linker command file or when the linker is
* invoked.
@@ -70,7 +62,6 @@ extern char _BootFlashSize[];
extern char _CodeFlashSize[];
extern char _TopRamReserved [];
extern char _WorkspaceBase [];
extern char _RamSize[];
/*
* CPU-space access
@@ -196,38 +187,6 @@ for(way_cnt=0; way_cnt<4; way_cnt++)
}
}
/*
* Use the shared implementations of the following routines
*/
void bsp_predriver_hook(void)
{
/* Do nothing */
}
void bsp_postdriver_hook(void);
void bsp_libc_init( void *, uint32_t, int );
void bsp_pretasking_hook(void); /* m68k version */
void bsp_calc_mem_layout(void)
{
/*
* compute the memory layout:
* - first unused address is Workspace start
* - Heap starts at end of workspace
* - Heap ends at end of memory - reserved memory area
*/
Configuration.work_space_start = _WorkspaceBase;
HeapStart = ((char *)Configuration.work_space_start +
Configuration.work_space_size);
HeapEnd = (void *)(RAM_END - (uint32_t)_TopRamReserved);
_HeapSize = HeapEnd - HeapStart;
}
/*
* Coldfire acr and mmu settings
*/
@@ -288,17 +247,6 @@ void bsp_calc_mem_layout(void)
*/
void bsp_start( void )
{
_M68k_Ramsize = (unsigned long)_RamSize; /* RAM size set in linker script */
/*
* Allocate the memory for the RTEMS Work Space and Heap. This can come from
* a variety of places: hard coded address, malloc'ed from outside
* RTEMS world (e.g. simulator or primitive memory manager), or (as
* typically done by stock BSPs) by subtracting the required amount
* of work space from the last physical address on the CPU board.
*/
bsp_calc_mem_layout();
/*
* do mapping of acr's and/or mmu
*/
c/src/lib/libbsp/m68k/genmcf548x/startup/linkcmds
+29 -28
View File
@@ -48,38 +48,39 @@
/*
* Location and size of on-chip devices
*/
_SdramBase = DEFINED(_SdramBase) ? _SdramBase : 0x00000000;
_SdramSize = DEFINED(_SdramSize) ? _SdramSize : (64 * 1024 * 1024);
_SysSramBase = DEFINED(_SysSramBase) ? _SysSramBase : __MBAR + 0x00010000;
_SysSramSize = DEFINED(_SysSramSize) ? _SysSramSize : (32 * 1024);
_McdapiBase = DEFINED(_McdapiBase) ? _McdapiBase : _SysSramBase;
_McdapiSize = DEFINED(_McdapiSize) ? _McdapiSize : (12 * 1024);
_CoreSramBase0 = DEFINED(_CoreSramBase0) ? _CoreSramBase0 : 0x20000000;
_CoreSramBase1 = DEFINED(_CoreSramBase1) ? _CoreSramBase1 : 0x20001000;
_CoreSramSize0 = DEFINED(_CoreSramSize0) ? _CoreSramSize0 : (4 * 1024);
_CoreSramSize1 = DEFINED(_CoreSramSize1) ? _CoreSramSize1 : (4 * 1024);
_BootFlashBase = DEFINED(_BootFlashBase) ? _BootFlashBase : 0xFF800000;
_BootFlashSize = DEFINED(_BootFlashSize) ? _BootFlashSize : (2 * 1024 * 1024);
_CodeFlashBase = DEFINED(_CodeFlashBase) ? _CodeFlashBase : 0xE0000000;
_CodeFlashSize = DEFINED(_CodeFlashSize) ? _CodeFlashSize : (16 * 1024 * 1024);
_SdramBase = DEFINED(_SdramBase) ? _SdramBase : 0x00000000;
_SdramSize = DEFINED(_SdramSize) ? _SdramSize : (64 * 1024*1024);
_SysSramBase = DEFINED(_SysSramBase) ? _SysSramBase : __MBAR + 0x00010000;
_SysSramSize = DEFINED(_SysSramSize) ? _SysSramSize : (32 * 1024);
_McdapiBase = DEFINED(_McdapiBase) ? _McdapiBase : _SysSramBase;
_McdapiSize = DEFINED(_McdapiSize) ? _McdapiSize : (12 * 1024);
_CoreSramBase0 = DEFINED(_CoreSramBase0) ? _CoreSramBase0 : 0x20000000;
_CoreSramBase1 = DEFINED(_CoreSramBase1) ? _CoreSramBase1 : 0x20001000;
_CoreSramSize0 = DEFINED(_CoreSramSize0) ? _CoreSramSize0 : (4 * 1024);
_CoreSramSize1 = DEFINED(_CoreSramSize1) ? _CoreSramSize1 : (4 * 1024);
_BootFlashBase = DEFINED(_BootFlashBase) ? _BootFlashBase : 0xFF800000;
_BootFlashSize = DEFINED(_BootFlashSize) ? _BootFlashSize : (2 * 1024*1024);
_CodeFlashBase = DEFINED(_CodeFlashBase) ? _CodeFlashBase : 0xE0000000;
_CodeFlashSize = DEFINED(_CodeFlashSize) ? _CodeFlashSize : (16 * 1024*1024);
_VectorRam = DEFINED(_VectorRam) ? _VectorRam : _SdramBase;
_DataRam = DEFINED(_DataRam) ? _DataRam : _data_dest_start;
_DataRom = DEFINED(_DataRom) ? _DataRom : _data_src_start;
_DataEnd = DEFINED(_DataEnd) ? _DataEnd : _data_dest_end;
_BssStart = DEFINED(_BssStart) ? _BssStart : _clear_start;
_BssEnd = DEFINED(_BssEnd) ? _BssEnd : _clear_end;
_SpInit = DEFINED(_SpInit) ? _SpInit : _EndInitStackSpace;
_InitPc = DEFINED(_InitPc) ? _InitPc : _SdramBase + 0x400;
_VectorRam = DEFINED(_VectorRam) ? _VectorRam : _SdramBase;
_DataRam = DEFINED(_DataRam) ? _DataRam : _data_dest_start;
_DataRom = DEFINED(_DataRom) ? _DataRom : _data_src_start;
_DataEnd = DEFINED(_DataEnd) ? _DataEnd : _data_dest_end;
_BssStart = DEFINED(_BssStart) ? _BssStart : _clear_start;
_BssEnd = DEFINED(_BssEnd) ? _BssEnd : _clear_end;
_SpInit = DEFINED(_SpInit) ? _SpInit : _EndInitStackSpace;
_InitPc = DEFINED(_InitPc) ? _InitPc : _SdramBase + 0x400;
_InitStackSize = DEFINED(StackSize) ? StackSize : 0x800; /* 2 kB */
_TopRamReserved = DEFINED(_TopRamReserved) ? _TopRamReserved : 0;
_InitStackSize = DEFINED(StackSize) ? StackSize : 0x800; /* 2 kB */
_TopRamReserved = DEFINED(_TopRamReserved) ? _TopRamReserved : 0;
_RamBase = DEFINED(_SdramBase) ? _SdramBase : _SdramBase;
_RamSize = DEFINED(_SdramSize) ? _SdramSize : _SdramSize;
_VBR = DEFINED(_VBR) ? _VBR : _RamBase;
_RamBase = DEFINED(_SdramBase) ? _SdramBase : _SdramBase;
_RamSize = DEFINED(_SdramSize) ? _SdramSize : _SdramSize;
_HeapSize = DEFINED(_HeapSize) ? _HeapSize : 0x0;
_VBR = DEFINED(_VBR) ? _VBR : _RamBase;
__MBAR = DEFINED(__MBAR) ? __MBAR : 0x10000000;
__MBAR = DEFINED(__MBAR) ? __MBAR : 0x10000000;
ENTRY(start)
MEMORY
c/src/lib/libbsp/m68k/genmcf548x/startup/linkcmds.m5484FireEngine.flash
+29 -29
View File
@@ -48,38 +48,38 @@
/*
* Location and size of on-chip devices
*/
_SdramBase = DEFINED(_SdramBase) ? _SdramBase : 0x00000000;
_SdramSize = DEFINED(_SdramSize) ? _SdramSize : (64 * 1024 * 1024);
_SysSramBase = DEFINED(_SysSramBase) ? _SysSramBase : __MBAR + 0x00010000;
_SysSramSize = DEFINED(_SysSramSize) ? _SysSramSize : (32 * 1024);
_McdapiBase = DEFINED(_McdapiBase) ? _McdapiBase : _SysSramBase;
_McdapiSize = DEFINED(_McdapiSize) ? _McdapiSize : (12 * 1024);
_CoreSramBase0 = DEFINED(_CoreSramBase0) ? _CoreSramBase0 : 0x20000000;
_CoreSramBase1 = DEFINED(_CoreSramBase1) ? _CoreSramBase1 : 0x20001000;
_CoreSramSize0 = DEFINED(_CoreSramSize0) ? _CoreSramSize0 : (4 * 1024);
_CoreSramSize1 = DEFINED(_CoreSramSize1) ? _CoreSramSize1 : (4 * 1024);
_BootFlashBase = DEFINED(_BootFlashBase) ? _BootFlashBase : 0xFF800000;
_BootFlashSize = DEFINED(_BootFlashSize) ? _BootFlashSize : (2 * 1024 * 1024);
_CodeFlashBase = DEFINED(_CodeFlashBase) ? _CodeFlashBase : 0xE0000000;
_CodeFlashSize = DEFINED(_CodeFlashSize) ? _CodeFlashSize : (16 * 1024 * 1024);
_SdramBase = DEFINED(_SdramBase) ? _SdramBase : 0x00000000;
_SdramSize = DEFINED(_SdramSize) ? _SdramSize : (64 * 1024 * 1024);
_SysSramBase = DEFINED(_SysSramBase) ? _SysSramBase : __MBAR + 0x00010000;
_SysSramSize = DEFINED(_SysSramSize) ? _SysSramSize : (32 * 1024);
_McdapiBase = DEFINED(_McdapiBase) ? _McdapiBase : _SysSramBase;
_McdapiSize = DEFINED(_McdapiSize) ? _McdapiSize : (12 * 1024);
_CoreSramBase0 = DEFINED(_CoreSramBase0) ? _CoreSramBase0 : 0x20000000;
_CoreSramBase1 = DEFINED(_CoreSramBase1) ? _CoreSramBase1 : 0x20001000;
_CoreSramSize0 = DEFINED(_CoreSramSize0) ? _CoreSramSize0 : (4 * 1024);
_CoreSramSize1 = DEFINED(_CoreSramSize1) ? _CoreSramSize1 : (4 * 1024);
_BootFlashBase = DEFINED(_BootFlashBase) ? _BootFlashBase : 0xFF800000;
_BootFlashSize = DEFINED(_BootFlashSize) ? _BootFlashSize : (2 * 1024 * 1024);
_CodeFlashBase = DEFINED(_CodeFlashBase) ? _CodeFlashBase : 0xE0000000;
_CodeFlashSize = DEFINED(_CodeFlashSize) ? _CodeFlashSize : (16 * 1024 * 1024);
_VectorRam = DEFINED(_VectorRam) ? _VectorRam : _SdramBase;
_DataRam = DEFINED(_DataRam) ? _DataRam : _data_dest_start;
_DataRom = DEFINED(_DataRom) ? _DataRom : _data_src_start;
_DataEnd = DEFINED(_DataEnd) ? _DataEnd : _data_dest_end;
_BssStart = DEFINED(_BssStart) ? _BssStart : _clear_start;
_BssEnd = DEFINED(_BssEnd) ? _BssEnd : _clear_end;
_SpInit = DEFINED(_SpInit) ? _SpInit : _EndInitStackSpace;
_InitPc = DEFINED(_InitPc) ? _InitPc : _SdramBase + 0x400;
_VectorRam = DEFINED(_VectorRam) ? _VectorRam : _SdramBase;
_DataRam = DEFINED(_DataRam) ? _DataRam : _data_dest_start;
_DataRom = DEFINED(_DataRom) ? _DataRom : _data_src_start;
_DataEnd = DEFINED(_DataEnd) ? _DataEnd : _data_dest_end;
_BssStart = DEFINED(_BssStart) ? _BssStart : _clear_start;
_BssEnd = DEFINED(_BssEnd) ? _BssEnd : _clear_end;
_SpInit = DEFINED(_SpInit) ? _SpInit : _EndInitStackSpace;
_InitPc = DEFINED(_InitPc) ? _InitPc : _SdramBase + 0x400;
_InitStackSize = DEFINED(StackSize) ? StackSize : 0x2000; /* 8 kB */
_TopRamReserved= DEFINED(_TopRamReserved) ? _TopRamReserved : 0;
_InitStackSize = DEFINED(StackSize) ? StackSize : 0x2000; /* 8 kB */
_TopRamReserved = DEFINED(_TopRamReserved) ? _TopRamReserved : 0;
_RamBase = DEFINED(_SdramBase) ? _SdramBase : _SdramBase;
_RamSize = DEFINED(_SdramSize) ? _SdramSize : _SdramSize;
_HeapSize = DEFINED(_HeapSize) ? _HeapSize : 0x0;
_VBR = DEFINED(_VBR) ? _VBR : _RamBase;
_RamBase = DEFINED(_SdramBase) ? _SdramBase : _SdramBase;
_RamSize = DEFINED(_SdramSize) ? _SdramSize : _SdramSize;
_VBR = DEFINED(_VBR) ? _VBR : _RamBase;
__MBAR = DEFINED(__MBAR) ? __MBAR : 0x10000000;
__MBAR = DEFINED(__MBAR) ? __MBAR : 0x10000000;
ENTRY(start)
MEMORY