mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
synced 2026-11-09 08:37:58 +08:00
2005-04-28 Jennifer Averett <jennifer.averett@oarcorp.com>
* acinclude.m4: Initial release of ep1a bsp * ep1a/Makefile.am, ep1a/bsp_specs, ep1a/configure.ac, ep1a/console/alloc360.c, ep1a/console/console.c, ep1a/console/console.h, ep1a/console/init68360.c, ep1a/console/m68360.h, ep1a/console/mc68360_scc.c, ep1a/console/ns16550cfg.c, ep1a/console/ns16550cfg.h, ep1a/console/rsPMCQ1.c, ep1a/console/rsPMCQ1.h, ep1a/include/bsp.h, ep1a/irq/irq.c, ep1a/irq/irq_init.c, ep1a/pci/no_host_bridge.c, ep1a/start/start.S, ep1a/startup/bspstart.c, ep1a/startup/linkcmds, ep1a/vme/vmeconfig.c: New files.
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@@ -1,3 +1,16 @@
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2005-04-28 Jennifer Averett <jennifer.averett@oarcorp.com>
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||||
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* acinclude.m4: Initial release of ep1a bsp
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* ep1a/Makefile.am, ep1a/bsp_specs, ep1a/configure.ac,
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||||
ep1a/console/alloc360.c, ep1a/console/console.c,
|
||||
ep1a/console/console.h, ep1a/console/init68360.c,
|
||||
ep1a/console/m68360.h, ep1a/console/mc68360_scc.c,
|
||||
ep1a/console/ns16550cfg.c, ep1a/console/ns16550cfg.h,
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ep1a/console/rsPMCQ1.c, ep1a/console/rsPMCQ1.h, ep1a/include/bsp.h,
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||||
ep1a/irq/irq.c, ep1a/irq/irq_init.c, ep1a/pci/no_host_bridge.c,
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||||
ep1a/start/start.S, ep1a/startup/bspstart.c, ep1a/startup/linkcmds,
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ep1a/vme/vmeconfig.c: New files.
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2004-12-30 Ralf Corsepius <ralf.corsepius@rtems.org>
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* acinclude.m4: Reflect eth_comm having been removed.
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@@ -0,0 +1,22 @@
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%rename lib old_lib
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%rename endfile old_endfile
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%rename startfile old_startfile
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%rename link old_link
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*lib:
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%{!qrtems: %(old_lib)} %{!nostdlib: %{qrtems: --start-group \
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%{!qrtems_debug: -lrtemsbsp -lrtemscpu} %{qrtems_debug: -lrtemsbsp_g -lrtemscpu_g} \
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-lc -lgcc --end-group \
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%{!qnolinkcmds: -T linkcmds%s}}}
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*startfile:
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%{!qrtems: %(old_startfile)} %{!nostdlib: %{qrtems: ecrti%O%s rtems_crti%O%s crtbegin.o%s \
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%{!qrtems_debug: start.o%s} \
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%{qrtems_debug: start_g.o%s}}}
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||||
|
||||
*link:
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%{!qrtems: %(old_link)} %{qrtems: -Qy -dp -Bstatic -e __rtems_entry_point -u __vectors}
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*endfile:
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%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s ecrtn.o%s}
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@@ -0,0 +1,30 @@
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## Process this file with autoconf to produce a configure script.
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||||
##
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## $Id$
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|
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AC_PREREQ(2.59)
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AC_INIT([rtems-c-src-lib-libbsp-powerpc-ep1a],[_RTEMS_VERSION],[rtems-bugs@rtems.com])
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AC_CONFIG_SRCDIR([bsp_specs])
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RTEMS_TOP(../../../../../..)
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|
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RTEMS_CANONICAL_TARGET_CPU
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AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.9])
|
||||
RTEMS_BSP_CONFIGURE
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||||
|
||||
RTEMS_PROG_CC_FOR_TARGET([-ansi -fasm])
|
||||
RTEMS_CANONICALIZE_TOOLS
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RTEMS_PROG_CCAS
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||||
|
||||
RTEMS_BSPOPTS_SET([CONSOLE_USE_INTERRUPTS],[*],[0])
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RTEMS_BSPOPTS_HELP([CONSOLE_USE_INTERRUPTS],
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[whether using console interrupts])
|
||||
|
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RTEMS_CHECK_NETWORKING
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AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
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||||
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# Explicitly list all Makefiles here
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AC_CONFIG_FILES([Makefile])
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RTEMS_PPC_EXCEPTIONS
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|
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AC_OUTPUT
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@@ -0,0 +1,104 @@
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||||
/*
|
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* MC68360 buffer descriptor allocation routines
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*
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||||
* W. Eric Norum
|
||||
* Saskatchewan Accelerator Laboratory
|
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* University of Saskatchewan
|
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* Saskatoon, Saskatchewan, CANADA
|
||||
* eric@skatter.usask.ca
|
||||
*
|
||||
* COPYRIGHT (c) 1989-1999.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
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* http://www.rtems.com/license/LICENSE.
|
||||
*
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* $Id$
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||||
*/
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#include <rtems.h>
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#include <bsp.h>
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#include "m68360.h"
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#include <rtems/error.h>
|
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#include "rsPMCQ1.h"
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||||
#include <rtems/bspIo.h>
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|
||||
void M360SetupMemory( M68360_t ptr ){
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||||
volatile m360_t *m360;
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||||
|
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m360 = ptr->m360;
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|
||||
ptr->bdregions[0].base = (char *)&m360->dpram1[0];
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ptr->bdregions[0].size = sizeof m360->dpram1;
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ptr->bdregions[0].used = 0;
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|
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ptr->bdregions[1].base = (char *)&m360->dpram3[0];
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ptr->bdregions[1].size = sizeof m360->dpram3;
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ptr->bdregions[1].used = 0;
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ptr->bdregions[2].base = (char *)&m360->dpram0[0];
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ptr->bdregions[2].size = sizeof m360->dpram0;
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ptr->bdregions[2].used = 0;
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ptr->bdregions[3].base = (char *)&m360->dpram2[0];
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ptr->bdregions[3].size = sizeof m360->dpram2;
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ptr->bdregions[3].used = 0;
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}
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|
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|
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/*
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* Send a command to the CPM RISC processer
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*/
|
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void *
|
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M360AllocateBufferDescriptors (M68360_t ptr, int count)
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{
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unsigned int i;
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ISR_Level level;
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void *bdp = NULL;
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unsigned int want = count * sizeof(m360BufferDescriptor_t);
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int have;
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/*
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* Running with interrupts disabled is usually considered bad
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* form, but this routine is probably being run as part of an
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* initialization sequence so the effect shouldn't be too severe.
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*/
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_ISR_Disable (level);
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for (i = 0 ; i < M360_NUM_DPRAM_REAGONS ; i++) {
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/*
|
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* Verify that the region exists.
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* This test is necessary since some chips have
|
||||
* less dual-port RAM.
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*/
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if (ptr->bdregions[i].used == 0) {
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volatile unsigned char *cp = ptr->bdregions[i].base;
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*cp = 0xAA;
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if (*cp != 0xAA) {
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ptr->bdregions[i].used = ptr->bdregions[i].size;
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continue;
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}
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*cp = 0x55;
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if (*cp != 0x55) {
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ptr->bdregions[i].used = ptr->bdregions[i].size;
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continue;
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||||
}
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*cp = 0x0;
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}
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have = ptr->bdregions[i].size - ptr->bdregions[i].used;
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if (have >= want) {
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bdp = ptr->bdregions[i].base + ptr->bdregions[i].used;
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ptr->bdregions[i].used += want;
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break;
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}
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}
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_ISR_Enable (level);
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if (bdp == NULL){
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printk("rtems_panic can't allocate %d buffer descriptor(s).\n");
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rtems_panic ("Can't allocate %d buffer descriptor(s).\n", count);
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}
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return bdp;
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}
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File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,38 @@
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/*
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||||
* This file contains the TTY driver table definition for the PPCn_60x
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*
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* This driver uses the termios pseudo driver.
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*
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* COPYRIGHT (c) 1998 by Radstone Technology
|
||||
*
|
||||
*
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||||
* THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
|
||||
* KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
|
||||
* AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
|
||||
*
|
||||
* You are hereby granted permission to use, copy, modify, and distribute
|
||||
* this file, provided that this notice, plus the above copyright notice
|
||||
* and disclaimer, appears in all copies. Radstone Technology will provide
|
||||
* no support for this code.
|
||||
*
|
||||
*
|
||||
* COPYRIGHT (c) 1989-1999.
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||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.com/license/LICENSE.
|
||||
*
|
||||
* $Id$
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||||
*/
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#include <rtems/ringbuf.h>
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#include <libchip/serial.h>
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#include <libchip/ns16550.h>
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extern console_tbl Console_Port_Tbl[];
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extern console_data Console_Port_Data[];
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extern unsigned long Console_Port_Count;
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boolean Console_Port_Tbl_Init_ppc8245(int minor);
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||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,47 @@
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||||
/*
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* This include file contains all console driver definations for the nc16550
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||||
*
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||||
* COPYRIGHT (c) 1989-1999.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.com/license/LICENSE.
|
||||
*
|
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* $Id$
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||||
*/
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||||
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#include <rtems.h>
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#include <bsp.h>
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#include "console.h"
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|
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typedef struct uart_reg
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||||
{
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unsigned char reg;
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unsigned char pad[7];
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} uartReg;
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||||
|
||||
unsigned8 Read_ns16550_register(
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unsigned32 ulCtrlPort,
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unsigned8 ucRegNum
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||||
)
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||||
{
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||||
struct uart_reg *p = (struct uart_reg *)ulCtrlPort;
|
||||
unsigned8 ucData;
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ucData = p[ucRegNum].reg;
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asm volatile("sync");
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||||
return ucData;
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||||
}
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|
||||
void Write_ns16550_register(
|
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unsigned32 ulCtrlPort,
|
||||
unsigned8 ucRegNum,
|
||||
unsigned8 ucData
|
||||
)
|
||||
{
|
||||
struct uart_reg *p = (struct uart_reg *)ulCtrlPort;
|
||||
volatile int i;
|
||||
p[ucRegNum].reg = ucData;
|
||||
asm volatile("sync");
|
||||
for (i=0;i<0x08ff;i++);
|
||||
}
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||||
@@ -0,0 +1,57 @@
|
||||
/* nc16550cfg.h
|
||||
*
|
||||
* This include file contains all console driver definations for the nc16550
|
||||
*
|
||||
* COPYRIGHT (c) 1998 by Radstone Technology
|
||||
*
|
||||
*
|
||||
* THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
|
||||
* KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
|
||||
* AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
|
||||
*
|
||||
* You are hereby granted permission to use, copy, modify, and distribute
|
||||
* this file, provided that this notice, plus the above copyright notice
|
||||
* and disclaimer, appears in all copies. Radstone Technology will provide
|
||||
* no support for this code.
|
||||
*
|
||||
* COPYRIGHT (c) 1989-1999.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.com/license/LICENSE.
|
||||
*
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef __NS16550_CONFIG_H
|
||||
#define __NS16550_CONFIG_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Board specific register access routines
|
||||
*/
|
||||
|
||||
unsigned8 Read_ns16550_register(
|
||||
unsigned32 ulCtrlPort,
|
||||
unsigned8 ucRegNum
|
||||
);
|
||||
|
||||
void Write_ns16550_register(
|
||||
unsigned32 ulCtrlPort,
|
||||
unsigned8 ucRegNum,
|
||||
unsigned8 ucData
|
||||
);
|
||||
|
||||
extern console_fns ns16550_fns_8245;
|
||||
extern console_fns ns16550_fns_polled_8245;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,148 @@
|
||||
/* rsPMCQ1.h - Radstone PMCQ1 private header
|
||||
*
|
||||
* Copyright 2000 Radstone Technology
|
||||
*
|
||||
* THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
|
||||
* KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
|
||||
* AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
|
||||
*
|
||||
* You are hereby granted permission to use, copy, modify, and distribute
|
||||
* this file, provided that this notice, plus the above copyright notice
|
||||
* and disclaimer, appears in all copies. Radstone Technology will provide
|
||||
* no support for this code.
|
||||
*
|
||||
* COPYRIGHT (c) 2005.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.com/license/LICENSE.
|
||||
*
|
||||
*/
|
||||
|
||||
/*
|
||||
modification history
|
||||
--------------------
|
||||
01a,20Dec00,jpb created
|
||||
*/
|
||||
|
||||
#ifndef __INCPMCQ1H
|
||||
#define __INCPMCQ1H
|
||||
|
||||
#include <libcpu/io.h>
|
||||
#include <bsp/irq.h>
|
||||
|
||||
/*
|
||||
* PMCQ1 definitions
|
||||
*/
|
||||
|
||||
/*
|
||||
* 360 definitions
|
||||
*/
|
||||
|
||||
#define Q1_360_MBAR 0x0003ff00 /* master base address register */
|
||||
|
||||
#define REG_B_OFFSET 0x1000 /* offset to the internal registers */
|
||||
|
||||
#define Q1_360_SIM_MCR (REG_B_OFFSET+0x00)
|
||||
#define Q1_360_SIM_PEPAR (REG_B_OFFSET+0x16)
|
||||
#define Q1_360_SIM_SYPCR (REG_B_OFFSET+0x22)
|
||||
#define Q1_360_SIM_PICR (REG_B_OFFSET+0x26)
|
||||
#define Q1_360_SIM_PITR (REG_B_OFFSET+0x2A)
|
||||
#define Q1_360_SIM_GMR (REG_B_OFFSET+0x40)
|
||||
#define Q1_360_SIM_BR0 (REG_B_OFFSET+0x50)
|
||||
#define Q1_360_SIM_OR0 (REG_B_OFFSET+0x54)
|
||||
#define Q1_360_SIM_BR1 (REG_B_OFFSET+0x60)
|
||||
#define Q1_360_SIM_OR1 (REG_B_OFFSET+0x64)
|
||||
|
||||
#define Q1_360_CPM_ICCR (REG_B_OFFSET+0x500)
|
||||
#define Q1_360_CPM_SDCR (REG_B_OFFSET+0x51E)
|
||||
#define Q1_360_CPM_CICR (REG_B_OFFSET+0x540)
|
||||
|
||||
/*
|
||||
* EPLD offsets
|
||||
*
|
||||
* Only top 4 data bits are used
|
||||
*/
|
||||
#define PMCQ1_CODE_VERSION 0x00040000 /* Code Version */
|
||||
|
||||
#define PMCQ1_BOARD_REVISION 0x00040004 /* Board Revision */
|
||||
|
||||
#define PMCQ1_BUILD_OPTION 0x00040008 /* Build Option */
|
||||
#define PMCQ1_ACE_FITTED 0x80000000
|
||||
#define PMCQ1_QUICC_FITTED 0x40000000
|
||||
#define PMCQ1_SRAM_SIZE 0x30000000 /* 01 - 1MB */
|
||||
#define PMCQ1_SRAM_FITTED 0x20000000
|
||||
|
||||
#define PMCQ1_INT_STATUS 0x0004000c /* Interrupt Status */
|
||||
#define PMCQ1_INT_STATUS_MA 0x20000000
|
||||
#define PMCQ1_INT_STATUS_QUICC 0x10000000
|
||||
|
||||
#define PMCQ1_INT_MASK 0x00040010 /* Interrupt Mask */
|
||||
#define PMCQ1_INT_MASK_QUICC 0x20000000
|
||||
#define PMCQ1_INT_MASK_MA 0x10000000
|
||||
|
||||
#define PMCQ1_RT_ADDRESS 0x00040014 /* RT Address Latch */
|
||||
|
||||
#define PMCQ1_DRIVER_ENABLE 0x0004001c /* Channel Drive Enable */
|
||||
#define PMCQ1_DRIVER_ENABLE_3 0x80000000
|
||||
#define PMCQ1_DRIVER_ENABLE_2 0x40000000
|
||||
#define PMCQ1_DRIVER_ENABLE_1 0x20000000
|
||||
#define PMCQ1_DRIVER_ENABLE_0 0x10000000
|
||||
|
||||
#define PMCQ1_MINIACE_REGS 0x000c0000
|
||||
#define PMCQ1_MINIACE_MEM 0x00100000
|
||||
#define PMCQ1_RAM 0x00200000
|
||||
|
||||
/*
|
||||
#define PMCQ1_Read_EPLD( _base, _reg ) ( *((unsigned long *) ((unsigned32)_base + _reg)) )
|
||||
#define PMCQ1_Write_EPLD( _base, _reg, _data ) *((unsigned long *) ((unsigned32)_base + _reg)) = _data
|
||||
*/
|
||||
uint32_t PMCQ1_Read_EPLD( uint32_t base, uint32_t reg );
|
||||
void PMCQ1_Write_EPLD( uint32_t base, uint32_t reg, uint32_t data );
|
||||
|
||||
/*
|
||||
* QSPAN-II register offsets
|
||||
*/
|
||||
|
||||
#define QSPAN2_INT_STATUS 0x00000600
|
||||
|
||||
|
||||
#define PCI_ID(v, d) ((d << 16) | v)
|
||||
|
||||
|
||||
#define PCI_VEN_ID_RADSTONE 0x11b5
|
||||
#define PCI_DEV_ID_PMC1553 0x0001
|
||||
#define PCI_DEV_ID_PMCF1 0x0002
|
||||
#define PCI_DEV_ID_PMCMMA 0x0003
|
||||
#define PCI_DEV_ID_PMCQ1 0x0007
|
||||
#define PCI_DEV_ID_PMCQ2 0x0008
|
||||
#define PCI_DEV_ID_PMCF1V2 0x0012
|
||||
|
||||
|
||||
|
||||
typedef struct _PMCQ1BoardData
|
||||
{
|
||||
struct _PMCQ1BoardData *pNext;
|
||||
unsigned long busNo;
|
||||
unsigned long slotNo;
|
||||
unsigned long funcNo;
|
||||
unsigned long baseaddr;
|
||||
unsigned long bridgeaddr;
|
||||
rtems_irq_hdl quiccInt;
|
||||
rtems_irq_hdl_param quiccArg;
|
||||
rtems_irq_hdl maInt;
|
||||
rtems_irq_hdl_param maArg;
|
||||
} PMCQ1BoardData, *PPMCQ1BoardData;
|
||||
|
||||
extern PPMCQ1BoardData pmcq1BoardData;
|
||||
|
||||
/*
|
||||
* Function declarations
|
||||
*/
|
||||
extern unsigned int rsPMCQ1QuiccIntConnect(
|
||||
unsigned long busNo, unsigned long slotNo,unsigned long funcNo, rtems_irq_hdl routine,rtems_irq_hdl_param arg );
|
||||
unsigned int rsPMCQ1Init();
|
||||
|
||||
#endif /* __INCPMCQ1H */
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,60 @@
|
||||
/*
|
||||
* COPYRIGHT (c) 1989-1999.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.com/license/LICENSE.
|
||||
*
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#ifndef _RTEMS_TMTEST27
|
||||
#error "This is an RTEMS internal file you must not include directly."
|
||||
#endif
|
||||
|
||||
#ifndef __tm27_h
|
||||
#define __tm27_h
|
||||
|
||||
#include <bsp/irq.h>
|
||||
|
||||
#define MUST_WAIT_FOR_INTERRUPT 1
|
||||
|
||||
void nullFunc() {}
|
||||
|
||||
static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER,
|
||||
0,
|
||||
(rtems_irq_enable)nullFunc,
|
||||
(rtems_irq_disable)nullFunc,
|
||||
(rtems_irq_is_enabled) nullFunc};
|
||||
void Install_tm27_vector(void (*_handler)())
|
||||
{
|
||||
clockIrqData.hdl = _handler;
|
||||
if (!BSP_install_rtems_irq_handler (&clockIrqData)) {
|
||||
printk("Error installing clock interrupt handler!\n");
|
||||
rtems_fatal_error_occurred(1);
|
||||
}
|
||||
}
|
||||
|
||||
#define Cause_tm27_intr() \
|
||||
do { \
|
||||
unsigned32 _clicks = 8; \
|
||||
asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
|
||||
} while (0)
|
||||
|
||||
|
||||
#define Clear_tm27_intr() \
|
||||
do { \
|
||||
unsigned32 _clicks = 0xffffffff; \
|
||||
asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
|
||||
} while (0)
|
||||
|
||||
#define Lower_tm27_intr() \
|
||||
do { \
|
||||
unsigned32 _msr = 0; \
|
||||
_ISR_Set_level( 0 ); \
|
||||
asm volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
|
||||
_msr |= 0x8002; \
|
||||
asm volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
|
||||
} while (0)
|
||||
#endif
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,31 @@
|
||||
/*
|
||||
* COPYRIGHT (c) 1989-1999.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.com/license/LICENSE.
|
||||
*
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
#include <libcpu/io.h>
|
||||
#include <libcpu/spr.h>
|
||||
|
||||
#include <bsp.h>
|
||||
#include <bsp/pci.h>
|
||||
#include <bsp/consoleIo.h>
|
||||
#include <bsp/residual.h>
|
||||
#include <bsp/openpic.h>
|
||||
|
||||
#include <rtems/bspIo.h>
|
||||
|
||||
/*
|
||||
* For the 8240 and the 8245 there is no host bridge the
|
||||
* Open PIC device is built into the processor chip.
|
||||
*/
|
||||
|
||||
void detect_host_bridge()
|
||||
{
|
||||
OpenPIC=(volatile struct OpenPIC *) (EUMBBAR + BSP_OPEN_PIC_BASE_OFFSET );
|
||||
}
|
||||
@@ -0,0 +1,151 @@
|
||||
/*
|
||||
* This is based on the mvme-crt0.S file from libgloss/rs6000.
|
||||
* crt0.S -- startup file for PowerPC systems.
|
||||
*
|
||||
* (c) 1998, Radstone Technology plc.
|
||||
*
|
||||
*
|
||||
* This is an unpublished work the copyright in which vests
|
||||
* in Radstone Technology plc. All rights reserved.
|
||||
*
|
||||
* The information contained herein is the property of Radstone
|
||||
* Technology plc. and is supplied without liability for
|
||||
* errors or omissions and no part may be reproduced, used or
|
||||
* disclosed except as authorized by contract or other written
|
||||
* permission. The copyright and the foregoing
|
||||
* restriction on reproduction, use and disclosure extend to
|
||||
* all the media in which this information may be
|
||||
* embodied.
|
||||
*
|
||||
* Copyright (c) 1995 Cygnus Support
|
||||
*
|
||||
* The authors hereby grant permission to use, copy, modify, distribute,
|
||||
* and license this software and its documentation for any purpose, provided
|
||||
* that existing copyright notices are retained in all copies and that this
|
||||
* notice is included verbatim in any distributions. No written agreement,
|
||||
* license, or royalty fee is required for any of the authorized uses.
|
||||
* Modifications to this software may be copyrighted by their authors
|
||||
* and need not follow the licensing terms described here, provided that
|
||||
* the new terms are clearly indicated on the first page of each file where
|
||||
* they apply.
|
||||
*
|
||||
* start.S,v 1.4 2002/04/19 13:25:27 joel Exp
|
||||
*/
|
||||
/*
|
||||
#include <ppc-asm.h>
|
||||
#include <bsp.h>
|
||||
*/
|
||||
|
||||
#include <asm.h>
|
||||
#include <rtems/score/cpu.h>
|
||||
#include <libcpu/io.h>
|
||||
#include <ppc-asm.h>
|
||||
|
||||
#define H0_60X_ICE 0x8000 /* HID0 I-Cache Enable */
|
||||
#define H0_60X_DCE 0x4000 /* HID0 D-Cache Enable */
|
||||
|
||||
.file "start.s"
|
||||
|
||||
.extern FUNC_NAME(atexit)
|
||||
.globl FUNC_NAME(__atexit)
|
||||
.section ".sdata","aw"
|
||||
.align 2
|
||||
FUNC_NAME(__atexit): /* tell C's eabi-ctor's we have an atexit function */
|
||||
.long FUNC_NAME(atexit)@fixup /* and that it is to register __do_global_dtors */
|
||||
|
||||
.section ".fixup","aw"
|
||||
.align 2
|
||||
.long FUNC_NAME(__atexit)
|
||||
|
||||
.text
|
||||
.globl __rtems_entry_point
|
||||
.type __rtems_entry_point,@function
|
||||
__rtems_entry_point:
|
||||
|
||||
/* Set MSR */
|
||||
/*
|
||||
* Enable data and instruction address translation and floating point
|
||||
*/
|
||||
li r3,MSR_IR | MSR_DR | MSR_FP
|
||||
mtmsr r3
|
||||
|
||||
/* XXX - ADD BACK IN CACHING INSTRUCTIONS */
|
||||
|
||||
/* clear bss */
|
||||
lis r6,__bss_start@h
|
||||
ori r6,r6,__bss_start@l
|
||||
lis r7,__bss_end@h
|
||||
ori r7,r7,__bss_end@l
|
||||
|
||||
cmplw 1,r6,r7
|
||||
bc 4,4,.Lbss_done
|
||||
|
||||
subf r8,r6,r7 /* number of bytes to zero */
|
||||
srwi r9,r8,2 /* number of words to zero */
|
||||
mtctr r9
|
||||
li r0,0 /* zero to clear memory */
|
||||
addi r6,r6,-4 /* adjust so we can use stwu */
|
||||
.Lbss_loop:
|
||||
stwu r0,4(r6) /* zero bss */
|
||||
bdnz .Lbss_loop
|
||||
|
||||
.Lbss_done:
|
||||
|
||||
/* clear sbss */
|
||||
lis r6,__sbss_start@h
|
||||
ori r6,r6,__sbss_start@l
|
||||
lis r7,__sbss_end@h
|
||||
ori r7,r7,__sbss_end@l
|
||||
|
||||
cmplw 1,r6,r7
|
||||
bc 4,4,.Lsbss_done
|
||||
|
||||
subf r8,r6,r7 /* number of bytes to zero */
|
||||
srwi r9,r8,2 /* number of words to zero */
|
||||
mtctr r9
|
||||
li r0,0 /* zero to clear memory */
|
||||
addi r6,r6,-4 /* adjust so we can use stwu */
|
||||
.Lsbss_loop:
|
||||
stwu r0,4(r6) /* zero sbss */
|
||||
bdnz .Lsbss_loop
|
||||
|
||||
.Lsbss_done:
|
||||
|
||||
lis sp,__stack@h
|
||||
ori sp,sp,__stack@l
|
||||
|
||||
/* set up initial stack frame */
|
||||
addi sp,sp,-4 /* make sure we don't overwrite debug mem */
|
||||
lis r0,0
|
||||
stw r0,0(sp) /* clear back chain */
|
||||
stwu sp,-56(sp) /* push another stack frame */
|
||||
|
||||
lis r5,environ@ha
|
||||
la r5,environ@l(r5) /* environp */
|
||||
li r4, 0 /* argv */
|
||||
li r3, 0 /* argc */
|
||||
|
||||
/* Let her rip */
|
||||
bl FUNC_NAME(boot_card)
|
||||
|
||||
/*
|
||||
* This should never get reached
|
||||
*/
|
||||
/*
|
||||
* Return MSR to its reset state
|
||||
*/
|
||||
li r3,0
|
||||
mtmsr r3
|
||||
isync
|
||||
|
||||
/*
|
||||
* Call reset entry point
|
||||
*/
|
||||
lis r3,0xfff0
|
||||
ori r3,r3,0x100
|
||||
mtlr r3
|
||||
blr
|
||||
.Lstart:
|
||||
.size _start,.Lstart-_start
|
||||
|
||||
.comm environ,4,4
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,191 @@
|
||||
OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc",
|
||||
"elf32-powerpc")
|
||||
|
||||
OUTPUT_ARCH(powerpc)
|
||||
ENTRY(_start)
|
||||
|
||||
/*
|
||||
* Number of Decrementer countdowns per millisecond
|
||||
*
|
||||
* Calculated by: (66.67 Mhz * 1000) / 4 cycles per click
|
||||
*/
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.vectors 0x00100 :
|
||||
{
|
||||
*(.vectors)
|
||||
}
|
||||
|
||||
/* Read-only sections, merged into text segment: */
|
||||
/* SDS ROM worked at 0x30000 */
|
||||
. = 0x30000;
|
||||
.interp : { *(.interp) }
|
||||
.hash : { *(.hash) }
|
||||
.dynsym : { *(.dynsym) }
|
||||
.dynstr : { *(.dynstr) }
|
||||
.rela.text : { *(.rela.text) }
|
||||
.rela.data : { *(.rela.data) }
|
||||
.rela.rodata : { *(.rela.rodata) }
|
||||
.rela.got : { *(.rela.got) }
|
||||
.rela.got1 : { *(.rela.got1) }
|
||||
.rela.got2 : { *(.rela.got2) }
|
||||
.rela.ctors : { *(.rela.ctors) }
|
||||
.rela.dtors : { *(.rela.dtors) }
|
||||
.rela.init : { *(.rela.init) }
|
||||
.rela.fini : { *(.rela.fini) }
|
||||
.rela.bss : { *(.rela.bss) }
|
||||
.rela.plt : { *(.rela.plt) }
|
||||
.rela.sdata : { *(.rela.sdata2) }
|
||||
.rela.sbss : { *(.rela.sbss2) }
|
||||
.rela.sdata2 : { *(.rela.sdata2) }
|
||||
.rela.sbss2 : { *(.rela.sbss2) }
|
||||
.plt : { *(.plt) }
|
||||
.text :
|
||||
{
|
||||
_start = .;
|
||||
*(.text)
|
||||
/*
|
||||
* Special FreeBSD sysctl sections.
|
||||
*/
|
||||
. = ALIGN (16);
|
||||
__start_set_sysctl_set = .;
|
||||
*(set_sysctl_*);
|
||||
__stop_set_sysctl_set = ABSOLUTE(.);
|
||||
*(set_domain_*);
|
||||
*(set_pseudo_*);
|
||||
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.descriptors)
|
||||
/* .gnu.warning sections are handled specially by elf32.em. */
|
||||
*(.gnu.warning)
|
||||
} =0
|
||||
.init : { _init = .; *(.init) }
|
||||
.fini : { _fini = .; *(.fini) }
|
||||
.rodata : { *(.rodata*) *(.gnu.linkonce.r*) }
|
||||
.rodata1 : { *(.rodata1) }
|
||||
.eh_frame : { *.(eh_frame) }
|
||||
_etext = .;
|
||||
PROVIDE (etext = .);
|
||||
PROVIDE (__SDATA2_START__ = .);
|
||||
.sdata2 : { *(.sdata2) *(.gnu.linkonce.s2.*) }
|
||||
.sbss2 : { *(.sbss2) *(.gnu.linkonce.sb2.*) }
|
||||
PROVIDE (__SBSS2_START__ = .);
|
||||
.sbss2 : { *(.sbss2) }
|
||||
PROVIDE (__SBSS2_END__ = .);
|
||||
/* Adjust the address for the data segment. We want to adjust up to
|
||||
the same address within the page on the next page up. It would
|
||||
be more correct to do this:
|
||||
. = ALIGN(0x40000) + (ALIGN(8) & (0x40000 - 1));
|
||||
The current expression does not correctly handle the case of a
|
||||
text segment ending precisely at the end of a page; it causes the
|
||||
data segment to skip a page. The above expression does not have
|
||||
this problem, but it will currently (2/95) cause BFD to allocate
|
||||
a single segment, combining both text and data, for this case.
|
||||
This will prevent the text segment from being shared among
|
||||
multiple executions of the program; I think that is more
|
||||
important than losing a page of the virtual address space (note
|
||||
that no actual memory is lost; the page which is skipped can not
|
||||
be referenced). */
|
||||
. = ALIGN(8) + 0x40000;
|
||||
PROVIDE (sdata = .);
|
||||
.data :
|
||||
{
|
||||
PROVIDE(__DATA_START__ = ABSOLUTE(.) );
|
||||
*(.data)
|
||||
*(.gnu.linkonce.d.*)
|
||||
CONSTRUCTORS
|
||||
}
|
||||
PROVIDE (__EXCEPT_START__ = .);
|
||||
.gcc_except_table : { *(.gcc_except_table) }
|
||||
PROVIDE (__EXCEPT_END__ = .);
|
||||
|
||||
.data1 : { *(.data1) }
|
||||
.got1 : { *(.got1) }
|
||||
.dynamic : { *(.dynamic) }
|
||||
/* Put .ctors and .dtors next to the .got2 section, so that the pointers
|
||||
get relocated with -mrelocatable. Also put in the .fixup pointers.
|
||||
The current compiler no longer needs this, but keep it around for 2.7.2 */
|
||||
PROVIDE (_GOT2_START_ = .);
|
||||
.got2 : { *(.got2) }
|
||||
PROVIDE (__GOT2_END__ = .);
|
||||
PROVIDE (__CTOR_LIST__ = .);
|
||||
.ctors : { *(.ctors) }
|
||||
PROVIDE (__CTOR_END__ = .);
|
||||
PROVIDE (__DTOR_LIST__ = .);
|
||||
.dtors : { *(.dtors) }
|
||||
PROVIDE (__DTOR_END__ = .);
|
||||
PROVIDE (_FIXUP_START_ = .);
|
||||
.fixup : { *(.fixup) }
|
||||
PROVIDE (_FIXUP_END_ = .);
|
||||
PROVIDE (__FIXUP_END__ = .);
|
||||
PROVIDE (_GOT2_END_ = .);
|
||||
PROVIDE (_GOT_START_ = .);
|
||||
s.got = .;
|
||||
.got : { *(.got) }
|
||||
.got.plt : { *(.got.plt) }
|
||||
PROVIDE (_GOT_END_ = .);
|
||||
PROVIDE (__GOT_END__ = .);
|
||||
/* We want the small data sections together, so single-instruction offsets
|
||||
can access them all, and initialized data all before uninitialized, so
|
||||
we can shorten the on-disk segment size. */
|
||||
PROVIDE (__SDATA_START__ = .);
|
||||
.sdata : { *(.sdata) *(.gnu.linkonce.s.*) }
|
||||
_edata = .;
|
||||
PROVIDE (edata = .);
|
||||
PROVIDE (RAM_END = ADDR(.text) + 10M);
|
||||
. = ALIGN(8) + 0x1000;
|
||||
PROVIDE (__SBSS_START__ = .);
|
||||
.sbss :
|
||||
{
|
||||
PROVIDE (__sbss_start = .);
|
||||
*(.sbss)
|
||||
*(.scommon)
|
||||
PROVIDE (__sbss_end = .);
|
||||
}
|
||||
PROVIDE (__SBSS_END__ = .);
|
||||
.bss :
|
||||
{
|
||||
PROVIDE (__bss_start = .);
|
||||
*(.dynbss)
|
||||
*(.bss)
|
||||
*(COMMON)
|
||||
PROVIDE (__bss_end = .);
|
||||
}
|
||||
. = ALIGN(8) + 0x8000;
|
||||
PROVIDE (__stack = .);
|
||||
_end = . ;
|
||||
__rtems_end = . ;
|
||||
PROVIDE (end = .);
|
||||
|
||||
/* These are needed for ELF backends which have not yet been
|
||||
converted to the new style linker. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
/* DWARF debug sections.
|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
/* These must appear regardless of . */
|
||||
}
|
||||
@@ -0,0 +1,142 @@
|
||||
/*
|
||||
* COPYRIGHT (c) 1989-1999.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.com/license/LICENSE.
|
||||
*
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
/* Standard VME bridge configuration for VGM type boards */
|
||||
|
||||
/* Author: Till Straumann <strauman@slac.stanford.edu>, 3/2002 */
|
||||
|
||||
#include <bsp.h>
|
||||
#include <bsp/VME.h>
|
||||
#include <bsp/irq.h>
|
||||
#include <libcpu/bat.h>
|
||||
#include <libcpu/spr.h>
|
||||
#include <bsp/motorola.h>
|
||||
|
||||
/* Use a weak alias for the VME configuration.
|
||||
* This permits individual applications to override
|
||||
* this routine.
|
||||
* They may even create an 'empty'
|
||||
*
|
||||
* void BSP_vme_config(void) {}
|
||||
*
|
||||
* which will avoid linking in the Universe driver
|
||||
* at all :-).
|
||||
*/
|
||||
|
||||
void BSP_vme_config(void) __attribute__ (( weak, alias("__BSP_default_vme_config") ));
|
||||
|
||||
SPR_RO(DBAT0U)
|
||||
|
||||
extern unsigned32 VME_Slot1;
|
||||
|
||||
void
|
||||
__BSP_default_vme_config(void)
|
||||
{
|
||||
union {
|
||||
struct _BATU bat;
|
||||
unsigned long batbits;
|
||||
} dbat0u;
|
||||
|
||||
vmeUniverseInit();
|
||||
vmeUniverseReset();
|
||||
|
||||
/* setup a PCI area to map the VME bus */
|
||||
|
||||
dbat0u.batbits = _read_DBAT0U();
|
||||
|
||||
/* map VME address ranges */
|
||||
vmeUniverseMasterPortCfg(
|
||||
0,
|
||||
VME_AM_EXT_SUP_DATA,
|
||||
_VME_A32_WIN0_ON_VME,
|
||||
_VME_A32_WIN0_ON_PCI,
|
||||
0x0F000000);
|
||||
vmeUniverseMasterPortCfg(
|
||||
1,
|
||||
VME_AM_STD_SUP_DATA,
|
||||
0x00000000,
|
||||
_VME_A24_ON_PCI,
|
||||
0x00ff0000);
|
||||
vmeUniverseMasterPortCfg(
|
||||
2,
|
||||
VME_AM_SUP_SHORT_IO,
|
||||
0x00000000,
|
||||
_VME_A16_ON_PCI,
|
||||
0x00010000);
|
||||
|
||||
#ifdef _VME_DRAM_OFFSET
|
||||
#if 0
|
||||
if (VME_Slot1){
|
||||
/* map our memory to VME */
|
||||
printk("vmeUniverseSlavePortCfg length of 0x%x\n", BSP_mem_size);
|
||||
vmeUniverseSlavePortCfg(
|
||||
0,
|
||||
VME_AM_EXT_SUP_DATA,
|
||||
_VME_DRAM_32_OFFSET1,
|
||||
PCI_DRAM_OFFSET,
|
||||
BSP_mem_size);
|
||||
printk("vmeUniverseSlavePortCfg length of 0x%x\n", _VME_A24_SIZE);
|
||||
vmeUniverseSlavePortCfg(
|
||||
1,
|
||||
VME_AM_STD_SUP_DATA,
|
||||
_VME_DRAM_24_OFFSET1,
|
||||
PCI_DRAM_OFFSET,
|
||||
_VME_A24_SIZE);
|
||||
printk("vmeUniverseSlavePortCfg length of 0x%x\n", _VME_A16_SIZE);
|
||||
vmeUniverseSlavePortCfg(
|
||||
2,
|
||||
VME_AM_SUP_SHORT_IO,
|
||||
_VME_DRAM_16_OFFSET1,
|
||||
PCI_DRAM_OFFSET,
|
||||
_VME_A16_SIZE);
|
||||
}
|
||||
else {
|
||||
printk("vmeUniverseSlavePortCfg length of 0x%x\n", BSP_mem_size);
|
||||
vmeUniverseSlavePortCfg(
|
||||
0,
|
||||
VME_AM_EXT_SUP_DATA,
|
||||
_VME_DRAM_32_OFFSET2,
|
||||
PCI_DRAM_OFFSET,
|
||||
BSP_mem_size);
|
||||
printk("vmeUniverseSlavePortCfg length of 0x%x\n", _VME_A24_SIZE);
|
||||
vmeUniverseSlavePortCfg(
|
||||
1,
|
||||
VME_AM_STD_SUP_DATA,
|
||||
_VME_DRAM_24_OFFSET2,
|
||||
PCI_DRAM_OFFSET,
|
||||
_VME_A24_SIZE);
|
||||
printk("vmeUniverseSlavePortCfg length of 0x%x\n", _VME_A16_SIZE);
|
||||
vmeUniverseSlavePortCfg(
|
||||
2,
|
||||
VME_AM_SUP_SHORT_IO,
|
||||
_VME_DRAM_16_OFFSET2,
|
||||
PCI_DRAM_OFFSET,
|
||||
_VME_A16_SIZE);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* make sure the host bridge PCI master is enabled */
|
||||
vmeUniverseWriteReg(
|
||||
vmeUniverseReadReg(UNIV_REGOFF_PCI_CSR) | UNIV_PCI_CSR_BM,
|
||||
UNIV_REGOFF_PCI_CSR);
|
||||
#endif
|
||||
|
||||
|
||||
/* stdio is not yet initialized; the driver will revert to printk */
|
||||
vmeUniverseMasterPortsShow(0);
|
||||
vmeUniverseSlavePortsShow(0);
|
||||
|
||||
/* install the VME insterrupt manager */
|
||||
vmeUniverseInstallIrqMgr(0,5,1,6);
|
||||
if (vmeUniverse0PciIrqLine<0)
|
||||
BSP_panic("Unable to get interrupt line info from PCI config");
|
||||
_BSP_vme_bridge_irq=BSP_PCI_IRQ_LOWEST_OFFSET+vmeUniverse0PciIrqLine;
|
||||
}
|
||||
Reference in new issue
Block a user