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* [components][clock_time] Refactor time subsystem around clock_time Introduce the clock_time core with clock source/event separation, high-resolution scheduling, and boot-time helpers, plus clock_timer adapters for timer peripherals. Remove legacy ktime/cputime/hwtimer implementations and migrate arch and BSP time paths to the new subsystem while keeping POSIX time integration functional. Update drivers, Kconfig/SConscript wiring, documentation, and tests; add clock_time overview docs and align naming to clock_boottime/clock_hrtimer/clock_timer. * [components][clock_time] Use BSP-provided clock timer frequency on riscv64 * [risc-v] Use runtime clock timer frequency for tick and delays * [bsp] Add clock timer frequency hooks for riscv64 boards * [bsp] Update Renesas RA driver doc clock_timer link * [bsp] Sync zynqmp-r5-axu4ev rtconfig after config refresh * [bsp][rk3500] Update rk3500 clock configuration * [bsp][hpmicro] Add rt_hw_us_delay hook and update board delays * [bsp][stm32l496-st-nucleo] enable clock_time for hwtimer sample in ci * [bsp][hpmicro] Fix rtconfig include scope for hpm6750evk Move rtconfig.h include outside the ENET_MULTIPLE_PORT guard for hpm6750evk and hpm6750evk2 so configuration macros are available regardless of ENET settings. * [bsp][raspi3] select clock time for systimer * [bsp][hpm5300evk] Trim trailing blank line * [bsp][hpm5301evklite] Trim trailing blank line * [bsp][hpm5e00evk] Trim trailing blank line * [bsp][hpm6200evk] Trim trailing blank line * [bsp][hpm6300evk] Trim trailing blank line * [bsp][hpm6750evk] Trim trailing blank line * [bsp][hpm6750evk2] Trim trailing blank line * [bsp][hpm6750evkmini] Trim trailing blank line * [bsp][hpm6800evk] Trim trailing blank line * [bsp][hpm6e00evk] Trim trailing blank line * [bsp][nxp] switch lpc178x to gcc and remove mcx timer source * [bsp][stm32] fix the CONFIG_RT_USING_CLOCK_TIME issue. * [docs][clock_time] add clock time documentation * [docs][clock_time] Update clock time subsystem documentation - Update device driver index to use correct page reference - Clarify upper layer responsibilities in architecture overview - Update README to describe POSIX/libc, Soft RTC, and device driver usage - Refine architecture diagram with improved layout and color scheme - Remove obsolete clock_timer.md file * [kernel][utest] Trim trailing space * [clock_time] Fix hrtimer wrap handling * [clock_time] fix the static rt_inline issue * [clock_time] fix the rt_clock_hrtimer_control result issue
acm32f0x0板级支持包
1. 简介
ACM32F0x0芯片是上海爱信诺航芯电子科技有限公司(后续简称上海航芯)一系列支持多种低功耗模式的通用MCU。包括如下硬件特性：
|--------------------------|--------------------|
| 硬件 | 描述 |
|---|---|
| 芯片型号 | ACM32F0X0系列 |
| CPU | ARM Cortex-M0 |
| 主频 | 64MHz |
| 片内SRAM | 32K |
| 片内Flash | 128K |
| -------------------------- | -------------------- |
具体型号及资源请参考上海航芯官方网站ACM32F0。
2. 编译说明
推荐使用env工具，可以在console下进入到bsp/acm32f0x0-nucleo目录中，运行以下命令：
scons
来编译这个板级支持包。如果编译正确无误，会产生rtthread.elf、rtthread.bin文件。其中rtthread.bin需要烧写到设备中进行运行。
也可以通过scons --target=iar或scons --target=mdk5生成IAR或是keil工程，再使用相应的工具进行编译。
3. 烧写及执行
开发板的使用请参考上海航芯官方网站相应型号的开发工具。
3.1 运行结果
如果编译 & 烧写无误，当复位设备后，会在串口上看到RT-Thread的启动logo信息：
4. 驱动支持情况及计划
| 片上外设 | 支持情况 | 备注 |
|---|---|---|
| GPIO | 支持 | PA0, PA1... PD15 ---> PIN: 0, 1...63 |
| UART | 支持 | UART1/UART2 |
| LED | 支持 | LED1 |
| WDT | 支持 | WDT/IWDT |
| ADC | 支持 |
5. 联系人信息
维护人：AisinoChip < xiangfeng.liu@aisinochip.com >