mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2026-10-07 00:59:00 +08:00
add EMAC driver.
This commit is contained in:
@@ -14,7 +14,7 @@ LR_IROM1 (0) (1024 * 128)
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}
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; RW data
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RW_IRAM1 0x20000000 (1024 * 64)
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RW_IRAM1 0x20000000 (1024 * 48)
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{
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.ANY (+RW +ZI)
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}
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@@ -20,6 +20,14 @@
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void rt_init_thread_entry(void* parameter)
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{
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rt_components_init();
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rt_kprintf("new");
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#ifdef RT_USING_LWIP
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cme_m7_eth_init();
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//set_if("e0", "192.168.3.99", "192.168.1.1", "255.255.255.0");
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#endif /* RT_USING_LWIP */
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}
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int rt_application_init()
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@@ -39,10 +47,4 @@ int rt_application_init()
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return 0;
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}
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void NMI_Handler(void)
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{
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rt_kprintf("NMI_Handler\n");
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}
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/*@}*/
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@@ -3,7 +3,16 @@ Import('rtconfig')
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from building import *
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cwd = os.path.join(str(Dir('#')), 'drivers')
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src = Glob('*.c')
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src = ['board.c']
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# add uart driver.
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src += ['uart.c']
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# add EMAC driver for Lwip.
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if GetDepend('RT_USING_LWIP') == True:
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src += ['emac.c', 'app_phy.c']
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CPPPATH = [cwd]
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group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
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@@ -0,0 +1,121 @@
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#include <stdio.h>
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#include "app_phy.h"
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#define PHY_BASE_ADDR 0x7
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#define PHY_REG_CONTROL 0x0
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#define PHY_REG_STATUS 0x1
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#define PHY_REG_ANE 0x6
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#define PHY_REG_SPEC_STATUS 0x11
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#define PHY_REG_EXTEND_STATUS 0x1B
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#define PHY_BIT_CONTROL_RESET 0x8000 /*!< Control reg : reset */
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#define PHY_BIT_CONTROL_ANEN 0x1000 /*!< Control reg : auto-negotiation enable */
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#define PHY_BIT_CONTROL_RSAN 0x0200 /*!< Control reg : auto-negotiation restart */
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#define PHY_BIT_STATUS_ANC 0x0020 /*!< Status reg : auto-negotiation complete */
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#define PHY_BIT_STATUS_LINK 0x0004 /*!< Status reg : link is up */
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#define PHY_BIT_ANE_LPAN 0x0001 /*!< ANE reg : link partner can auto-neg */
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#define PHY_BIT_SPEED 0xC000 /*!< specific status reg : speed */
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#define PHY_BIT_DUPLEX 0x2000 /*!< specific status reg : duplex */
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#define PHY_BIT_AUTO_MEDIA_DISABLE 0x8000 /*!< extended status reg : auto media select disable */
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#define PHY_BIT_AUTO_MEDIA_REG_DISABLE 0x0200 /*!< extended status reg : auto media register select disable */
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void phy_Reset() {
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ETH_PhyWrite(PHY_BASE_ADDR, PHY_REG_CONTROL, PHY_BIT_CONTROL_RESET);
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while (1) {
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uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_CONTROL);
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if ((ret & PHY_BIT_CONTROL_RESET) == 0) {
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break;
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}
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}
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}
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void phy_AutoMediaSelect() {
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uint32_t data;
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// auto media and auto media register selection
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data = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_EXTEND_STATUS);
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data &= ~PHY_BIT_AUTO_MEDIA_DISABLE;
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data &= ~PHY_BIT_AUTO_MEDIA_REG_DISABLE;
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ETH_PhyWrite(PHY_BASE_ADDR, PHY_REG_EXTEND_STATUS, data);
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}
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void phy_AutoNeg() {
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uint32_t data;
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data = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_CONTROL);
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data |= (PHY_BIT_CONTROL_ANEN | PHY_BIT_CONTROL_RSAN);
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ETH_PhyWrite(PHY_BASE_ADDR, PHY_REG_CONTROL, data);
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while (1) {
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uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_STATUS);
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if ((ret & PHY_BIT_STATUS_ANC) == PHY_BIT_STATUS_ANC) {
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break;
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}
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}
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}
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BOOL phy_IsLink() {
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uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_STATUS);
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return (ret & PHY_BIT_STATUS_LINK) ? TRUE : FALSE;
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}
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BOOL phy_PartnerCanAutoNeg() {
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uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_ANE);
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return (ret & PHY_BIT_ANE_LPAN) ? TRUE : FALSE;
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}
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uint32_t phy_GetSpeed() {
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uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_SPEC_STATUS);
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return ((ret & PHY_BIT_SPEED) >> 14);
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}
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uint32_t phy_GetDuplex() {
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uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_SPEC_STATUS);
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return ((ret & PHY_BIT_DUPLEX) >> 13);
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}
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BOOL phy_Init() {
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phy_AutoMediaSelect();
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phy_AutoNeg();
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if (!phy_PartnerCanAutoNeg()) {
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printf("Warning:: PHY's partner can't do auto-negotiation\n");
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}
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if (!phy_IsLink()) {
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printf("link is down\n");
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return FALSE;
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}
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{
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uint32_t speed = phy_GetSpeed();
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if (speed == PHY_SPEED_10) {
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speed = 10;
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} else if (speed == PHY_SPEED_100) {
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speed = 100;
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} else if (speed == PHY_SPEED_1000) {
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speed = 1000;
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}
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printf("PHY runs in %dM speed %s duplex\n",
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speed, (phy_GetDuplex() == PHY_DUPLEX_HALF) ? "half" : "full");
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}
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// After auto-negcioation, Mawell PHY need some
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// time to initial itself.
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// So we have to delay some time since different
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// connection way, such as direct wire, hub, switch.
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// If not to delay, the first several sent frame
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// may be lost.
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// Please according to actual environment to tune
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// this delay.
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udelay(200000);
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return TRUE;
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}
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@@ -0,0 +1,32 @@
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#ifndef __APP_PHY_H
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#define __APP_PHY_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "cmem7_includes.h"
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#define PHY_SPEED_10 0x0 /*!< SPEED : 10M */
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#define PHY_SPEED_100 0x1 /*!< SPEED : 100M */
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#define PHY_SPEED_1000 0x2 /*!< SPEED : 1000M */
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#define PHY_DUPLEX_HALF 0x0 /*!< DUPLEX : half */
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#define PHY_DUPLEX_FULL 0x1 /*!< DUPLEX : full */
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void phy_Reset(void);
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void phy_AutoNeg(void);
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BOOL phy_IsLink(void);
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BOOL phy_PartnerCanAutoNeg(void);
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uint32_t phy_GetSpeed(void);
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uint32_t phy_GetDuplex(void);
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BOOL phy_Init(void);
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#ifdef __cplusplus
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}
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#endif
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#endif
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@@ -49,7 +49,10 @@ static void idle_hook(void)
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*/
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void rt_hw_board_init()
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{
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rt_thread_idle_sethook(idle_hook);
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//rt_thread_idle_sethook(idle_hook);
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/* Configure the NVIC Preemption Priority Bits */
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
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SysTick_Config(SYSTEM_CLOCK_FREQ / RT_TICK_PER_SECOND);
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File diff suppressed because it is too large
Load Diff
@@ -63,13 +63,15 @@
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#define RT_CONSOLE_DEVICE_NAME "uart2"
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/* SECTION: finsh, a C-Express shell */
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#define RT_USING_FINSH
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//#define RT_USING_FINSH
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/* Using symbol table */
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#define FINSH_USING_SYMTAB
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#define FINSH_USING_DESCRIPTION
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#define FINSH_USING_MSH
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#define FINSH_USING_MSH_ONLY
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//#define RT_USING_NEWLIB
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//#define RT_USING_ARM_LIBC
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#define RT_USING_ARM_LIBC
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/* SECTION: device filesystem */
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/* #define RT_USING_DFS */
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@@ -87,7 +89,7 @@
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#define DFS_FD_MAX 4
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/* SECTION: lwip, a lighwight TCP/IP protocol stack */
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//#define RT_USING_LWIP
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#define RT_USING_LWIP
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/* LwIP uses RT-Thread Memory Management */
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// #define RT_LWIP_USING_RT_MEM
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/* Enable ICMP protocol*/
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