Merge pull request #2034 from liu2guang/master

[BSP][LPC54114-lite] 添加i2c spi romfs spiflash sdcard pct2075驱动.

bsp/lpc54114-lite/Kconfig

@@ -23,5 +23,5 @@ config SOC_LPC54114
     select ARCH_ARM_CORTEX_M4
     default y
 
-source "$BSP_DIR/drivers/Kconfig"
 
+source "$BSP_DIR/drivers/Kconfig"

bsp/lpc54114-lite/Libraries/devices/LPC54114/drivers/fsl_spi.c

@@ -410,7 +410,7 @@ status_t SPI_MasterTransferBlocking(SPI_Type *base, spi_transfer_t *xfer)
     uint32_t fifoDepth;
 
     /* check params */
-    assert(!((NULL == base) || (NULL == xfer) || ((NULL == xfer->txData) && (NULL == xfer->rxData))));
+    // assert(!((NULL == base) || (NULL == xfer) || ((NULL == xfer->txData) && (NULL == xfer->rxData))));
     if ((NULL == base) || (NULL == xfer) || ((NULL == xfer->txData) && (NULL == xfer->rxData)))
     {
         return kStatus_InvalidArgument;

bsp/lpc54114-lite/README.md

@@ -23,7 +23,7 @@ LPC54114-Lite 开发板由万利电子提供，双核高性能，专注语音应
 该开发板常用**板载资源**如下：
 
 - MCU：LPC54114J256BD64 Cortex-M4/M0+ 双核 MCU ，主频 100MHz，256KB FLASH ，192KB RAM
-- 外部 FLASH：型号 MD25D16SIG，16MB
+- 外部 FLASH：型号 MD25D16SIG，16MBIT
 - 常用外设
   - LED：8 个，LD4-LD7（绿色，PIO0_30、PIO0_29、PIO0_26、PIO0_25），LD8-LD11（红色，PIO0_22、PIO0_21、PIO0_19、PIO0_15）
   - 按键：4 个，PB2-PB5（PIO1_8、PIO1_9、PIO1_10、PIO1_11）
@@ -38,22 +38,22 @@ LPC54114-Lite 开发板的更多详细信息请参考万利电子 [开发板用
 
 |**板载外设**     |**支持情况**|**备注**                             |
 | ----------------- | :----------: | ------------------------------------- |
-| SPI Flash | 暂不支持 |                                       |
-| SPI TF 卡 | 暂不支持 |                                       |
-| I2C 温度传感器 <BR>(PCT2075DP) | 暂不支持 |      |
-| I2S 音频输入 / 输出接口 <BR>(WM8904) | 暂不支持 |      |
-| PDM 数字麦克风 <BR>(SPH0641LM4H) | 暂不支持 |      |
+| SPI Flash | 支持 |-                                       |
+| SPI TF 卡 | 支持 |-                                       |
+| I2C 温度传感器 <BR>(PCT2075DP) | 支持 |-      |
+| I2S 音频输入 / 输出接口 <BR>(WM8904) | 暂不支持 |-      |
+| PDM 数字麦克风 <BR>(SPH0641LM4H) | 暂不支持 |-      |
 |**片上外设**     |**支持情况**|**备注**                             |
 | GPIO              |     支持     | PIO0_0 ... PIO1_31 ---> PIN: 0, 1...63 |
 | UART              |     支持     | UART0                            |
-| SPI               |   暂不支持   | 即将支持         |
-| I2C               |   暂不支持   | 即将支持         |
+| SPI               |   支持   | 暂时只支持SPI2         |
+| I2C               |   支持   | 暂时只支持I2C4          |
 | ADC          | 暂不支持 | 即将支持 |
 | PWM               |   暂不支持   | 即将支持                              |
 | USB Device        |   暂不支持   | 即将支持                              |
 | IWG               |   暂不支持   | 即将支持                              |
 |**板外外设**     |**支持情况**|**备注**                             |
-| Arduino 扩展接口 |   暂不支持   |                                      |
+| Arduino 扩展接口 |   暂不支持   |-                                      |
 
 ## 使用说明
 

bsp/lpc54114-lite/applications/main.c

@@ -16,11 +16,10 @@ int main(void)
 {
     /* user app entry */ 
     rt_pin_mode(LED4_PIN, PIN_MODE_OUTPUT);
+    
     while (1)
     {
         rt_pin_write(LED4_PIN, !rt_pin_read(LED4_PIN));
         rt_thread_delay(1000);
     }
-    
-    return 0;
 }

bsp/lpc54114-lite/applications/mnt.c

@@ -9,7 +9,30 @@
 
 #include <rtthread.h>
 
+#if defined(RT_USING_DFS)
+#include <dfs_file.h>
+#include <dfs_posix.h>
+#endif
+
+#define BSP_FLASH_MOUNT_PATH  "/mnt/flash"
+#define BSP_SDCARD_MOUNT_PATH "/mnt/sd"
+
 int mnt_init(void)
 {
+#if defined(BSP_USING_SPIFLASH)
+    if(dfs_mount("flash0", BSP_FLASH_MOUNT_PATH, "elm", 0, 0) != 0)
+    {
+        rt_kprintf("spi flash mount '%s' failed.\n", BSP_FLASH_MOUNT_PATH);
+    }
+#endif 
+    
+#if defined(BSP_USING_SDCARD)
+    if(dfs_mount("sd0", BSP_SDCARD_MOUNT_PATH, "elm", 0, 0) != 0)
+    {
+        rt_kprintf("sdcard mount '%s' failed.\n", BSP_SDCARD_MOUNT_PATH);
+    }
+#endif 
+
     return 0;
 }
+INIT_APP_EXPORT(mnt_init); 

bsp/lpc54114-lite/drivers/Kconfig

@@ -1,4 +1,32 @@
-config RT_USING_UART0
-    bool "Enable UART0"
-    default y
+# LPC54110 bsp Config
+menu "LPC54110 Bsp Config" 
 
+    menu "Select uart drivers"
+        config BSP_USING_UART0
+            bool "Enable UART0"
+            default y
+    endmenu
+
+    menu "Select spi bus drivers"
+        config BSP_USING_SPI2
+            bool "Enable SPI2"
+            default y
+    endmenu
+
+    menu "Select i2c bus drivers"
+        config BSP_USING_I2C4
+            bool "Enable I2C4"
+            default y
+    endmenu
+
+    config BSP_USING_SDCARD
+        bool "Enable SDCARD"
+        select BSP_USING_SPI2
+        default y
+
+    config BSP_USING_SPIFLASH
+        bool "Enable SPI Flash"
+        select BSP_USING_SPI2
+        default y
+
+endmenu

bsp/lpc54114-lite/drivers/SConscript

@@ -1,14 +1,30 @@
 from building import *
 
 cwd = GetCurrentDir()
-src = Glob('*.c')
 
-# remove no need file.
-if GetDepend('RT_USING_LWIP') == False:
-    SrcRemove(src, 'drv_emac.c')
+src = Split("""
+board.c
+clock_config.c
+""")
 
 CPPPATH = [cwd]
 
+# add driver code
+if GetDepend('BSP_USING_UART0'):
+    src = src + ['drv_uart.c'] 
+
+if GetDepend('BSP_USING_SPI2'):
+    src = src + ['drv_spi.c'] 
+
+if GetDepend('BSP_USING_I2C4'):
+    src = src + ['drv_i2c.c'] 
+
+if GetDepend('BSP_USING_SDCARD'):
+    src = src + ['drv_sdcard.c'] 
+
+if GetDepend('BSP_USING_SPIFLASH'):
+    src = src + ['drv_spi_flash.c'] 
+
 group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
 
 Return('group')

bsp/lpc54114-lite/drivers/drv_i2c.c

@@ -0,0 +1,130 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+ 
+#include "drv_i2c.h" 
+
+#include "fsl_common.h" 
+#include "fsl_iocon.h"
+#include "fsl_i2c.h"
+
+struct lpc_i2c
+{
+    struct rt_i2c_bus_device bus; 
+    
+    I2C_Type *base;
+    
+    char *device_name;
+};
+
+static uint32_t get_i2c_freq(I2C_Type *base)
+{
+    uint32_t freq = 0;
+
+#if defined(BSP_USING_I2C4)
+    if(base == I2C4)
+    {
+        freq = CLOCK_GetFreq(kCLOCK_Flexcomm4);
+    }
+#endif 
+
+    return freq; 
+}
+
+static rt_size_t master_xfer(struct rt_i2c_bus_device *bus, struct rt_i2c_msg msgs[], rt_uint32_t num)
+{
+    rt_size_t ret = (0);
+
+    rt_uint32_t index = 0;
+    struct lpc_i2c *lpc_i2c = RT_NULL;
+    struct rt_i2c_msg *msg = RT_NULL;
+    i2c_master_transfer_t xfer = {0};
+
+    RT_ASSERT(bus != RT_NULL); 
+
+    lpc_i2c = (struct lpc_i2c *)bus;
+
+    for(index = 0; index < num; index++)
+    {
+        msg = &msgs[index];
+        
+        xfer.slaveAddress   = msg->addr;
+        xfer.flags          = kI2C_TransferDefaultFlag;
+        xfer.subaddress     = 0;
+        xfer.subaddressSize = 1;
+        xfer.data           = msg->buf;
+        xfer.dataSize       = msg->len;
+
+        if (msg->flags & RT_I2C_RD)
+        {
+            xfer.direction  = kI2C_Read;
+        }
+        else
+        {
+            xfer.direction  = kI2C_Write;
+        }
+        
+        if(I2C_MasterTransferBlocking(lpc_i2c->base, &xfer) != kStatus_Success)
+        {
+            rt_kprintf("i2c bus write failed, i2c bus stop!\n");
+            goto exit;
+        }
+    }
+
+    ret = index;
+
+exit:
+    return ret;
+}
+
+static rt_size_t slave_xfer(struct rt_i2c_bus_device *bus, struct rt_i2c_msg msgs[], rt_uint32_t num)
+{
+    return 0;
+}
+
+static rt_err_t i2c_bus_control(struct rt_i2c_bus_device *bus, rt_uint32_t cmd, rt_uint32_t arg)
+{
+    return RT_EOK;
+}
+
+static const struct rt_i2c_bus_device_ops ops =
+{
+    master_xfer, 
+    slave_xfer,
+    i2c_bus_control,
+}; 
+
+#if defined(BSP_USING_I2C4)
+static struct lpc_i2c i2c4 = {0}; 
+#endif
+
+int rt_hw_i2c_init(void)
+{
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+#if defined(BSP_USING_I2C4)
+    CLOCK_AttachClk(kFRO12M_to_FLEXCOMM4);
+    RESET_PeripheralReset(kFC4_RST_SHIFT_RSTn);
+    
+    i2c4.base = I2C4;
+    i2c4.device_name = "i2c4"; 
+    i2c4.bus.ops = &ops; 
+    
+    IOCON_PinMuxSet(IOCON, 1, 1, IOCON_MODE_PULLUP | IOCON_FUNC5 | IOCON_DIGITAL_EN | IOCON_INPFILT_OFF);
+    IOCON_PinMuxSet(IOCON, 1, 2, IOCON_MODE_PULLUP | IOCON_FUNC5 | IOCON_DIGITAL_EN | IOCON_INPFILT_OFF);
+
+    i2c_master_config_t masterConfig;
+
+    I2C_MasterGetDefaultConfig(&masterConfig);
+    masterConfig.baudRate_Bps = 100*1000U;
+    
+    I2C_MasterInit(I2C4, &masterConfig, get_i2c_freq(I2C4));
+
+    rt_i2c_bus_device_register(&i2c4.bus, i2c4.device_name);
+#endif
+
+    return RT_EOK; 
+}
+INIT_BOARD_EXPORT(rt_hw_i2c_init); 

bsp/lpc54114-lite/drivers/drv_i2c.h

@@ -0,0 +1,15 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+ 
+#ifndef __DRV_I2C_H__ 
+#define __DRV_I2C_H__ 
+
+#include <rtthread.h> 
+#include <rtdevice.h> 
+
+int rt_hw_i2c_init(void);
+
+#endif

bsp/lpc54114-lite/drivers/drv_romfs.c

@@ -0,0 +1,65 @@
+/* Generated by mkromfs. Edit with caution. */
+#include <rtthread.h>
+#include <dfs_romfs.h>
+
+static const rt_uint8_t _romfs_root_license[] = 
+{
+    0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x41, 0x70, 0x61, 0x63, 0x68, 0x65, 0x20, 0x4c, 0x69, 0x63, 0x65, 0x6e, 0x73, 0x65, 0x0d, 0x0a, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x56, 0x65, 0x72, 0x73, 0x69, 0x6f, 0x6e, 0x20, 0x32, 0x2e, 0x30, 0x2c, 0x20, 0x4a, 0x61, 0x6e, 0x75, 0x61, 0x72, 0x79, 0x20, 0x32, 0x30, 0x30, 0x34, 0x0d, 0x0a, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x61, 0x70, 0x61, 0x63, 0x68, 0x65, 0x2e, 0x6f, 0x72, 0x67, 0x2f, 0x6c, 0x69, 0x63, 0x65, 0x6e, 0x73, 0x65, 0x73, 0x2f, 0x0d, 0x0a, 0x0d, 0x0a, 0x20, 0x20, 0x20, 0x54, 0x45, 0x52, 0x4d, 0x53, 0x20, 0x41, 0x4e, 0x44, 0x20, 0x43, 0x4f, 0x4e, 0x44, 0x49, 0x54, 0x49, 0x4f, 0x4e, 0x53, 0x20, 0x46, 0x4f, 0x52, 0x20, 0x55, 0x53, 0x45, 0x2c, 0x20, 0x52, 0x45, 0x50, 0x52, 0x4f, 0x44, 0x55, 0x43, 0x54, 0x49, 0x4f, 0x4e, 0x2c, 0x20, 0x41, 0x4e, 0x44, 0x20, 0x44, 0x49, 0x53, 0x54, 0x52, 0x49, 0x42, 0x55, 0x54, 0x49, 0x4f, 0x4e, 0x0d, 0x0a, 0x0d, 0x0a, 0x20, 0x20, 0x20, 0x31, 0x2e, 0x20, 0x44, 0x65, 0x66, 0x69, 0x6e, 0x69, 0x74, 0x69, 0x6f, 0x6e, 0x73, 0x2e, 0x0d, 0x0a, 0x0d, 0x0a, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22, 0x4c, 0x69, 0x63, 0x65, 0x6e, 0x73, 0x65, 0x22, 0x20, 0x73, 0x68, 0x61, 0x6c, 0x6c, 0x20, 0x6d, 0x65, 0x61, 0x6e, 0x20, 0x74, 0x68, 0x65, 0x20, 0x74, 0x65, 0x72, 0x6d, 0x73, 0x20, 0x61, 0x6e, 0x64, 0x20, 0x63, 0x6f, 0x6e, 0x64, 0x69, 0x74, 0x69, 0x6f, 0x6e, 0x73, 0x20, 0x66, 0x6f, 0x72, 0x20, 0x75, 0x73, 0x65, 0x2c, 0x20, 0x72, 0x65, 0x70, 0x72, 0x6f, 0x64, 0x75, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x2c, 0x0d, 0x0a, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x61, 0x6e, 0x64, 0x20, 0x64, 0x69, 0x73, 0x74, 0x72, 0x69, 0x62, 0x75, 0x74, 0x69, 0x6f, 0x6e, 0x20, 0x61, 0x73, 0x20, 0x64, 0x65, 0x66, 0x69, 0x6e, 0x65, 0x64, 0x20, 0x62, 0x79, 0x20, 0x53, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x73, 0x20, 0x31, 0x20, 0x74, 0x68, 0x72, 0x6f, 0x75, 0x67, 0x68, 0x20, 0x39, 0x20, 0x6f, 0x66, 0x20, 0x74, 0x68, 0x69, 0x73, 0x20, 0x64, 0x6f, 0x63, 0x75, 0x6d, 0x65, 0x6e, 0x74, 0x2e, 0x0d, 0x0a, 0x0d, 0x0a, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22, 0x4c, 0x69, 0x63, 0x65, 0x6e, 0x73, 0x6f, 0x72, 0x22, 0x20, 0x73, 0x68, 0x61, 0x6c, 0x6c, 0x20, 0x6d, 0x65, 0x61, 0x6e, 0x20, 0x74, 0x68, 0x65, 0x20, 0x63, 0x6f, 0x70, 0x79, 0x72, 0x69, 0x67, 0x68, 0x74, 0x20, 0x6f, 0x77, 0x6e, 0x65, 0x72, 0x20, 0x6f, 0x72, 0x20, 0x65, 0x6e, 0x74, 0x69, 0x74, 0x79, 0x20, 0x61, 0x75, 0x74, 0x68, 0x6f, 0x72, 0x69, 0x7a, 0x65, 0x64, 0x20, 0x62, 0x79, 0x0d, 0x0a, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x74, 0x68, 0x65, 0x20, 0x63, 0x6f, 0x70, 0x79, 0x72, 0x69, 0x67, 0x68, 0x74, 0x20, 0x6f, 0x77, 0x6e, 0x65, 0x72, 0x20, 0x74, 0x68, 0x61, 0x74, 0x20, 0x69, 0x73, 0x20, 0x67, 0x72, 0x61, 0x6e, 0x74, 0x69, 0x6e, 0x67, 0x20, 0x74, 0x68, 0x65, 0x20, 0x4c, 0x69, 0x63, 0x65, 0x6e, 0x73, 0x65, 0x2e, 0x0d, 0x0a, 0x0d, 0x0a, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22, 0x4c, 0x65, 0x67, 0x61, 0x6c, 0x20, 0x45, 0x6e, 0x74, 0x69, 0x74, 0x79, 0x22, 0x20, 0x73, 0x68, 0x61, 0x6c, 0x6c, 0x20, 0x6d, 0x65, 0x61, 0x6e, 0x20, 0x74, 0x68, 0x65, 0x20, 0x75, 0x6e, 0x69, 0x6f, 0x6e, 0x20, 0x6f, 0x66, 0x20, 0x74, 0x68, 0x65, 0x20, 0x61, 0x63, 0x74, 0x69, 0x6e, 0x67, 0x20, 0x65, 0x6e, 0x74, 0x69, 0x74, 0x79, 0x20, 0x61, 0x6e, 0x64, 0x20, 0x61, 0x6c, 0x6c, 0x0d, 0x0a, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x6f, 0x74, 0x68, 0x65, 0x72, 0x20, 0x65, 0x6e, 0x74, 0x69, 0x74, 0x69, 0x65, 0x73, 0x20, 0x74, 0x68, 0x61, 0x74, 0x20, 0x63, 0x6f, 0x6e, 0x74, 0x72, 0x6f, 0x6c, 0x2c, 0x20, 0x61, 0x72, 0x65, 0x20, 0x63, 0x6f, 0x6e, 0x74, 0x72, 0x6f, 0x6c, 0x6c, 0x65, 0x64, 0x20, 0x62, 0x79, 0x2c, 0x20, 0x6f, 0x72,Line truncated
+};
+
+static const rt_uint8_t _romfs_root_mnt_flash__keep[] = 
+{
+    0x2e, 0x6b, 0x65, 0x65, 0x70, 0x20, 0x0d, 0x0a
+};
+
+static const struct romfs_dirent _romfs_root_mnt_flash[] = 
+{
+    {ROMFS_DIRENT_FILE, ".keep", (rt_uint8_t *)_romfs_root_mnt_flash__keep, sizeof(_romfs_root_mnt_flash__keep) / sizeof(_romfs_root_mnt_flash__keep[0])}
+};
+
+static const rt_uint8_t _romfs_root_mnt_sd__keep[] = 
+{
+    0x2e, 0x6b, 0x65, 0x65, 0x70, 0x20, 0x0d, 0x0a
+};
+
+static const struct romfs_dirent _romfs_root_mnt_sd[] = 
+{
+    {ROMFS_DIRENT_FILE, ".keep", (rt_uint8_t *)_romfs_root_mnt_sd__keep, sizeof(_romfs_root_mnt_sd__keep) / sizeof(_romfs_root_mnt_sd__keep[0])}
+};
+
+static const rt_uint8_t _romfs_root_mnt_tmp__keep[] = 
+{
+    0x2e, 0x6b, 0x65, 0x65, 0x70, 0x20, 0x0d, 0x0a
+};
+
+static const struct romfs_dirent _romfs_root_mnt_tmp[] = 
+{
+    {ROMFS_DIRENT_FILE, ".keep", (rt_uint8_t *)_romfs_root_mnt_tmp__keep, sizeof(_romfs_root_mnt_tmp__keep) / sizeof(_romfs_root_mnt_tmp__keep[0])}
+};
+
+static const struct romfs_dirent _romfs_root_mnt[] = 
+{
+    {ROMFS_DIRENT_DIR, "flash", (rt_uint8_t *)_romfs_root_mnt_flash, sizeof(_romfs_root_mnt_flash) / sizeof(_romfs_root_mnt_flash[0])},
+    {ROMFS_DIRENT_DIR, "sd", (rt_uint8_t *)_romfs_root_mnt_sd, sizeof(_romfs_root_mnt_sd) / sizeof(_romfs_root_mnt_sd[0])},
+    {ROMFS_DIRENT_DIR, "tmp", (rt_uint8_t *)_romfs_root_mnt_tmp, sizeof(_romfs_root_mnt_tmp) / sizeof(_romfs_root_mnt_tmp[0])}
+};
+
+static const struct romfs_dirent _romfs_root[] = 
+{
+    {ROMFS_DIRENT_FILE, "license", (rt_uint8_t *)_romfs_root_license, sizeof(_romfs_root_license) / sizeof(_romfs_root_license[0])},
+    {ROMFS_DIRENT_DIR, "mnt", (rt_uint8_t *)_romfs_root_mnt, sizeof(_romfs_root_mnt) / sizeof(_romfs_root_mnt[0])}
+};
+
+const struct romfs_dirent romfs_root =
+{
+        ROMFS_DIRENT_DIR, "/", (rt_uint8_t *)_romfs_root, sizeof(_romfs_root) / sizeof(_romfs_root[0])
+};
+
+#include <dfs_fs.h>
+int rt_hw_romfs_init(void)
+{
+    dfs_mount(RT_NULL, "/", "rom", 0, &romfs_root);
+
+    return 0;
+}
+INIT_EXPORT(rt_hw_romfs_init, "4.end");

bsp/lpc54114-lite/drivers/drv_sdcard.c

@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+ 
+#include "drv_sdcard.h"
+#include "drv_spi.h" 
+#include "spi_msd.h"
+
+#define RT_SDCARD_CS_PIN (3)
+
+int rt_hw_sdcard_init(void)
+{
+    rt_err_t ret; 
+    
+    ret = lpc_spi_bus_attach_device("spi2", "spi21", RT_SDCARD_CS_PIN); 
+    if(ret != RT_EOK) 
+    {
+        return ret; 
+    }
+    
+    ret = msd_init("sd0", "spi21");
+
+    return ret; 
+}
+INIT_DEVICE_EXPORT(rt_hw_sdcard_init); 

bsp/lpc54114-lite/drivers/drv_sdcard.h

@@ -0,0 +1,15 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+ 
+#ifndef __DRV_SDCARD_H__ 
+#define __DRV_SDCARD_H__ 
+
+#include <rtthread.h> 
+#include <rtdevice.h> 
+
+int rt_hw_sdcard_init(void);
+
+#endif

bsp/lpc54114-lite/drivers/drv_spi.c

@@ -0,0 +1,194 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "drv_spi.h"
+
+#include "fsl_common.h" 
+#include "fsl_iocon.h"
+#include "fsl_spi.h"
+
+struct lpc_spi
+{
+    SPI_Type *base;
+    struct rt_spi_configuration *cfg;
+};
+
+static uint32_t get_spi_freq(SPI_Type *base)
+{
+    uint32_t freq = 0;
+
+#if defined(BSP_USING_SPI2)
+    if(base == SPI2)
+    {
+        freq = CLOCK_GetFreq(kCLOCK_Flexcomm2);
+    }
+#endif 
+
+    return freq; 
+}
+
+static rt_err_t spi_init(SPI_Type *base, struct rt_spi_configuration *cfg)
+{
+    spi_master_config_t masterConfig = {0};
+
+    RT_ASSERT(cfg != RT_NULL); 
+
+    if(cfg->data_width != 8 && cfg->data_width != 16)
+    {
+        return (-RT_EINVAL); 
+    }
+
+    SPI_MasterGetDefaultConfig(&masterConfig); 
+
+    if(cfg->max_hz > 12*1000*1000)
+    {
+        cfg->max_hz = 12*1000*1000;
+    }
+    masterConfig.baudRate_Bps = cfg->max_hz;
+
+    if(cfg->data_width == 8)
+    {
+        masterConfig.dataWidth = kSPI_Data8Bits; 
+    }
+    else if(cfg->data_width == 16)
+    {
+        masterConfig.dataWidth = kSPI_Data16Bits; 
+    }
+
+    if(cfg->mode & RT_SPI_MSB)
+    {
+        masterConfig.direction = kSPI_MsbFirst; 
+    }
+    else
+    {
+        masterConfig.direction = kSPI_LsbFirst; 
+    }
+
+    if(cfg->mode & RT_SPI_CPHA)
+    {
+        masterConfig.phase = kSPI_ClockPhaseSecondEdge; 
+    }
+    else
+    {
+        masterConfig.phase = kSPI_ClockPhaseFirstEdge; 
+    }
+
+    if(cfg->mode & RT_SPI_CPOL)
+    {
+        masterConfig.polarity = kSPI_ClockPolarityActiveLow; 
+    }
+    else
+    {
+        masterConfig.polarity = kSPI_ClockPolarityActiveHigh; 
+    }
+
+    masterConfig.txWatermark = kSPI_TxFifo0, 
+    masterConfig.rxWatermark = kSPI_RxFifo1, 
+    
+    // masterConfig.sselNum = kSPI_Ssel3; 
+    SPI_MasterInit(base, &masterConfig, get_spi_freq(base)); 
+
+    return RT_EOK; 
+}
+
+rt_err_t lpc_spi_bus_attach_device(const char *bus_name, const char *device_name, rt_uint32_t pin)
+{
+    rt_err_t ret = RT_EOK; 
+    
+    struct rt_spi_device *spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device)); 
+    RT_ASSERT(spi_device != RT_NULL); 
+    
+    struct lpc_sw_spi_cs *cs_pin = (struct lpc_sw_spi_cs *)rt_malloc(sizeof(struct lpc_sw_spi_cs)); 
+    RT_ASSERT(cs_pin != RT_NULL);
+    
+    cs_pin->pin = pin;
+    rt_pin_mode(pin, PIN_MODE_OUTPUT); 
+    rt_pin_write(pin, PIN_HIGH); 
+    
+    ret = rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin); 
+    
+    return ret; 
+}
+
+static rt_err_t configure(struct rt_spi_device *device, struct rt_spi_configuration *cfg)
+{
+    rt_err_t ret = RT_EOK; 
+    struct lpc_spi *spi = RT_NULL; 
+    
+    RT_ASSERT(cfg != RT_NULL);
+    RT_ASSERT(device != RT_NULL);
+    
+    spi = (struct lpc_spi *)(device->bus->parent.user_data); 
+    spi->cfg = cfg; 
+    ret = spi_init(spi->base, cfg); 
+    
+    return ret;
+}
+
+static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
+{
+    spi_transfer_t transfer = {0}; 
+    
+    RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(device->bus != RT_NULL);
+    RT_ASSERT(device->bus->parent.user_data != RT_NULL);
+    
+    struct lpc_spi *spi = (struct lpc_spi *)(device->bus->parent.user_data); 
+    struct lpc_sw_spi_cs *cs = device->parent.user_data; 
+    
+    if(message->cs_take)
+    {
+        rt_pin_write(cs->pin, PIN_LOW);
+    }
+    
+    transfer.dataSize = message->length; 
+    transfer.rxData   = (uint8_t *)(message->recv_buf); 
+    transfer.txData   = (uint8_t *)(message->send_buf); 
+    transfer.configFlags |= kSPI_FrameAssert;
+    
+    SPI_MasterTransferBlocking(spi->base, &transfer); 
+    
+    if(message->cs_release)
+    {
+        rt_pin_write(cs->pin, PIN_HIGH);
+    }
+    
+    return message->length; 
+}
+
+#if defined(BSP_USING_SPI2)
+static struct lpc_spi spi2 = {0}; 
+static struct rt_spi_bus spi2_bus = {0}; 
+#endif
+
+static struct rt_spi_ops lpc_spi_ops = 
+{
+    configure, 
+    spixfer
+}; 
+
+int rt_hw_spi_init(void)
+{
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+#if defined(BSP_USING_SPI2)
+    CLOCK_AttachClk(kFRO12M_to_FLEXCOMM2);
+    RESET_PeripheralReset(kFC2_RST_SHIFT_RSTn);
+
+    spi2.base = SPI2; 
+    spi2.cfg = RT_NULL; 
+    spi2_bus.parent.user_data = &spi2; 
+    
+    IOCON_PinMuxSet(IOCON, 0,  8, (IOCON_FUNC1 | IOCON_MODE_PULLUP | IOCON_GPIO_MODE | IOCON_DIGITAL_EN));  /* SPI2_MOSI */
+    IOCON_PinMuxSet(IOCON, 0,  9, (IOCON_FUNC1 | IOCON_MODE_PULLUP | IOCON_GPIO_MODE | IOCON_DIGITAL_EN));  /* SPI2_MISO */
+    IOCON_PinMuxSet(IOCON, 0, 10, (IOCON_FUNC1 | IOCON_MODE_PULLUP | IOCON_GPIO_MODE | IOCON_DIGITAL_EN));  /* SPI2_SCK  */
+
+    rt_spi_bus_register(&spi2_bus, "spi2", &lpc_spi_ops); 
+#endif
+
+    return RT_EOK; 
+}
+INIT_BOARD_EXPORT(rt_hw_spi_init); 

bsp/lpc54114-lite/drivers/drv_spi.h

@@ -0,0 +1,21 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+ 
+#ifndef __DRV_SPI_H__ 
+#define __DRV_SPI_H__ 
+
+#include <rtthread.h> 
+#include <rtdevice.h> 
+
+struct lpc_sw_spi_cs
+{
+    rt_uint32_t pin;
+}; 
+
+int rt_hw_spi_init(void);
+rt_err_t lpc_spi_bus_attach_device(const char *bus_name, const char *device_name, rt_uint32_t pin); 
+
+#endif

bsp/lpc54114-lite/drivers/drv_spi_flash.c

@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+ 
+#include "drv_spi.h" 
+#include "drv_spi_flash.h"
+
+#include "rtthread.h" 
+#include "rtdevice.h" 
+#include "spi_flash.h"
+#include "spi_flash_sfud.h"
+
+#define RT_SPI_FLASH_CS_PIN (2)
+
+int rt_hw_flash_init(void)
+{
+    rt_err_t result; 
+    
+    result = lpc_spi_bus_attach_device("spi2", "spi20", RT_SPI_FLASH_CS_PIN); 
+    if(result != RT_EOK) 
+    {
+        return result; 
+    }
+    
+    if(rt_sfud_flash_probe("flash0", "spi20") == RT_NULL) 
+    {
+        return RT_ERROR;
+    }
+
+    return RT_EOK; 
+}
+INIT_DEVICE_EXPORT(rt_hw_flash_init); 

bsp/lpc54114-lite/drivers/drv_spi_flash.h

@@ -0,0 +1,15 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author         Notes
+ * 2017-11-08     ZYH            the first version
+ */
+#ifndef __DRV_SPI_FLASH_H_
+#define __DRV_SPI_FLASH_H_
+
+int rt_hw_w25qxx_init(void); 
+
+#endif

bsp/lpc54114-lite/drivers/drv_uart.c

@@ -142,7 +142,7 @@ int rt_hw_uart_init(void)
     struct lpc_uart *uart;
     struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
 
-#ifdef RT_USING_UART0
+#ifdef BSP_USING_UART0
     
     uart = &uart0;
 

bsp/lpc54114-lite/rtconfig.h

@@ -16,9 +16,6 @@
 #define RT_USING_IDLE_HOOK
 #define RT_IDEL_HOOK_LIST_SIZE 4
 #define IDLE_THREAD_STACK_SIZE 256
-#define RT_USING_TIMER_SOFT
-#define RT_TIMER_THREAD_PRIO 4
-#define RT_TIMER_THREAD_STACK_SIZE 512
 #define RT_DEBUG
 
 /* Inter-Thread communication */
@@ -32,7 +29,6 @@
 /* Memory Management */
 
 #define RT_USING_MEMPOOL
-#define RT_USING_MEMHEAP
 #define RT_USING_SMALL_MEM
 #define RT_USING_HEAP
 
@@ -74,13 +70,38 @@
 
 /* Device virtual file system */
 
+#define RT_USING_DFS
+#define DFS_USING_WORKDIR
+#define DFS_FILESYSTEMS_MAX 4
+#define DFS_FILESYSTEM_TYPES_MAX 4
+#define DFS_FD_MAX 16
+#define RT_USING_DFS_ELMFAT
+
+/* elm-chan's FatFs, Generic FAT Filesystem Module */
+
+#define RT_DFS_ELM_CODE_PAGE 437
+#define RT_DFS_ELM_WORD_ACCESS
+#define RT_DFS_ELM_USE_LFN_3
+#define RT_DFS_ELM_USE_LFN 3
+#define RT_DFS_ELM_MAX_LFN 255
+#define RT_DFS_ELM_DRIVES 2
+#define RT_DFS_ELM_MAX_SECTOR_SIZE 4096
+#define RT_DFS_ELM_REENTRANT
+#define RT_USING_DFS_DEVFS
+#define RT_USING_DFS_ROMFS
 
 /* Device Drivers */
 
 #define RT_USING_DEVICE_IPC
 #define RT_PIPE_BUFSZ 512
 #define RT_USING_SERIAL
+#define RT_USING_I2C
+#define RT_USING_I2C_BITOPS
 #define RT_USING_PIN
+#define RT_USING_SPI
+#define RT_USING_SPI_MSD
+#define RT_USING_SFUD
+#define RT_SFUD_USING_FLASH_INFO_TABLE
 
 /* Using WiFi */
 
@@ -91,6 +112,7 @@
 /* POSIX layer and C standard library */
 
 #define RT_USING_LIBC
+#define RT_USING_POSIX
 
 /* Network */
 
@@ -159,7 +181,31 @@
 
 /* example package: hello */
 
+
+/* Privated Packages of RealThread */
+
+
+/* Network Utilities */
+
+
+/* rtpkgs online packages */
+
 #define SOC_LPC54114
-#define RT_USING_UART0
+
+/* LPC54110 Bsp Config */
+
+/* Select uart drivers */
+
+#define BSP_USING_UART0
+
+/* Select spi bus drivers */
+
+#define BSP_USING_SPI2
+
+/* Select i2c bus drivers */
+
+#define BSP_USING_I2C4
+#define BSP_USING_SDCARD
+#define BSP_USING_SPIFLASH
 
 #endif

bsp/lpc54114-lite/template.uvoptx

@@ -117,6 +117,11 @@
         <pMon>BIN\CMSIS_AGDI.dll</pMon>
       </DebugOpt>
       <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>CMSIS_AGDI</Key>
+          <Name>-X"Any" -UAny -O206 -S9 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0LPC5411x_256.FLM -FS00 -FL040000 -FP0($$Device:LPC54114J256BD64$Flash\LPC5411x_256.FLM)</Name>
+        </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
           <Key>UL2CM3</Key>
@@ -168,6 +173,7 @@
       <pMultCmdsp></pMultCmdsp>
       <DebugDescription>
         <Enable>1</Enable>
+        <EnableFlashSeq>0</EnableFlashSeq>
         <EnableLog>0</EnableLog>
         <Protocol>2</Protocol>
         <DbgClock>5000000</DbgClock>

bsp/lpc54114-lite/template.uvprojx

@@ -184,6 +184,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>2</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>1</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>