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Merge pull request #5319 from RT-Thread/master

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【PSE分支】同步master到PSE分支
This commit is contained in:
guo
2021-12-02 10:09:37 +08:00
committed by GitHub
parent 1d4594c6fc 1cf8370b1b
commit fda37d55f8
94 changed files with 2945 additions and 1866 deletions
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48
bsp/bluetrum/ab32vg1-ab-prougen/.config
View File

@@ -23,7 +23,7 @@ CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=512
CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=4
CONFIG_RT_TIMER_THREAD_STACK_SIZE=256
CONFIG_RT_TIMER_THREAD_STACK_SIZE=1024
#
# kservice optimization
@@ -31,6 +31,9 @@ CONFIG_RT_TIMER_THREAD_STACK_SIZE=256
# CONFIG_RT_KSERVICE_USING_STDLIB is not set
# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
# CONFIG_RT_USING_ASM_MEMCPY is not set
# CONFIG_RT_USING_ASM_MEMSET is not set
# CONFIG_RT_USING_TINY_FFS is not set
# CONFIG_RT_PRINTF_LONGLONG is not set
CONFIG_RT_DEBUG=y
# CONFIG_RT_DEBUG_COLOR is not set
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
@@ -76,8 +79,7 @@ CONFIG_RT_USING_DEVICE_OPS=y
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
# CONFIG_RT_PRINTF_LONGLONG is not set
CONFIG_RT_VER_NUM=0x40004
CONFIG_RT_VER_NUM=0x40100
# CONFIG_RT_USING_CPU_FFS is not set
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
@@ -88,6 +90,7 @@ CONFIG_RT_USING_COMPONENTS_INIT=y
CONFIG_RT_USING_USER_MAIN=y
CONFIG_RT_MAIN_THREAD_STACK_SIZE=1024
CONFIG_RT_MAIN_THREAD_PRIORITY=10
# CONFIG_RT_USING_LEGACY is not set
#
# C++ features
@@ -117,6 +120,14 @@ CONFIG_FINSH_ARG_MAX=10
# Device virtual file system
#
# CONFIG_RT_USING_DFS is not set
# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set
# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
# CONFIG_RT_DFS_ELM_USE_LFN_3 is not set
# CONFIG_RT_DFS_ELM_LFN_UNICODE_0 is not set
# CONFIG_RT_DFS_ELM_LFN_UNICODE_1 is not set
# CONFIG_RT_DFS_ELM_LFN_UNICODE_2 is not set
# CONFIG_RT_DFS_ELM_LFN_UNICODE_3 is not set
#
# Device Drivers
@@ -163,10 +174,13 @@ CONFIG_RT_USING_PIN=y
#
# POSIX layer and C standard library
#
# CONFIG_RT_USING_LIBC is not set
# CONFIG_RT_USING_PTHREADS is not set
CONFIG_RT_USING_LIBC=y
CONFIG_RT_LIBC_USING_TIME=y
# CONFIG_RT_LIBC_USING_FILEIO is not set
# CONFIG_RT_USING_MODULE is not set
CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_RT_USING_POSIX is not set
# CONFIG_RT_USING_PTHREADS is not set
#
# Network
@@ -304,6 +318,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set
# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set
# CONFIG_PKG_USING_HM is not set
# CONFIG_PKG_USING_SMALL_MODBUS is not set
#
# security packages
@@ -351,6 +366,12 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_U8G2_OFFICIAL is not set
# CONFIG_PKG_USING_U8G2 is not set
#
# PainterEngine: A cross-platform graphics application framework written in C language
#
# CONFIG_PKG_USING_PAINTERENGINE is not set
# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set
#
# tools packages
#
@@ -392,6 +413,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_MEM_SANDBOX is not set
# CONFIG_PKG_USING_SOLAR_TERMS is not set
# CONFIG_PKG_USING_GAN_ZHI is not set
# CONFIG_PKG_USING_FDT is not set
#
# system packages
@@ -405,6 +427,13 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
# CONFIG_PKG_USING_QFPLIB_M3 is not set
#
# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
#
# CONFIG_PKG_USING_CMSIS_5 is not set
# CONFIG_PKG_USING_CMSIS_5_AUX is not set
# CONFIG_PKG_USING_CMSIS_RTOS2 is not set
#
# Micrium: Micrium software products porting for RT-Thread
#
@@ -422,7 +451,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_FLASHDB is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_CMSIS is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set
# CONFIG_PKG_USING_DFS_JFFS2 is not set
@@ -439,6 +467,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_QBOOT is not set
# CONFIG_PKG_USING_PPOOL is not set
# CONFIG_PKG_USING_OPENAMP is not set
# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
# CONFIG_PKG_USING_LPM is not set
# CONFIG_PKG_USING_TLSF is not set
@@ -599,12 +628,14 @@ CONFIG_PKG_BLUETRUM_SDK_VER="latest"
# Hardware Drivers Config
#
CONFIG_SOC_AB32VG1=y
# CONFIG_PKG_USING_BLUETRUM_NIMBLE is not set
#
# Onboard Peripheral Drivers
#
# CONFIG_BSP_USING_AUDIO is not set
# CONFIG_BSP_USING_SDCARD is not set
# CONFIG_BSP_USING_NIMBLE is not set
#
# On-chip Peripheral Drivers
@@ -622,8 +653,5 @@ CONFIG_BSP_UART0_FIFO_SIZE=10
# CONFIG_BSP_USING_ONCHIP_RTC is not set
# CONFIG_BSP_USING_ADC is not set
# CONFIG_BSP_USING_IRRX is not set
#
# Board extended module Drivers
#
# CONFIG_BSP_USING_ON_CHIP_FLASH is not set
CONFIG_BOARD_BLUETRUM_EVB=y

BIN
bsp/bluetrum/ab32vg1-ab-prougen/.settings/.rtmenus
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Binary file not shown.

2
bsp/bluetrum/ab32vg1-ab-prougen/.settings/language.settings.xml
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@@ -5,7 +5,7 @@
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-309903127852947962" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="530397848961880773" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/>
</provider>

12
bsp/bluetrum/ab32vg1-ab-prougen/.settings/projcfg.ini
View File

@@ -1,19 +1,19 @@
#RT-Thread Studio Project Configuration
#Wed Dec 16 14:30:21 CST 2020
#Wed Nov 24 11:34:07 CST 2021
cfg_version=v3.0
board_name=AB32VG1-AB-PROUGEN
example_name=
hardware_adapter=DAP-LINK
project_type=rt-thread
hardware_adapter=ST-LINK
board_base_nano_proj=False
project_type=rt-thread
chip_name=AB32VG1
selected_rtt_version=latest
bsp_version=1.0.0
bsp_version=1.1.0
os_branch=full
output_project_path=D\:/Softwares/RT-ThreadStudio/workspace
output_project_path=D\:\\code\\rt_thread\\studio\\ab32vg1
is_base_example_project=False
is_use_scons_build=True
project_base_bsp=true
project_name=ab32vg1
os_version=latest
bsp_path=repo/Local/Board_Support_Packages/Bluetrum/AB32VG1-AB-PROUGEN/1.0.0
bsp_path=repo/Extract/Board_Support_Packages/Bluetrum/AB32VG1-AB-PROUGEN/1.1.0

6
bsp/bluetrum/ab32vg1-ab-prougen/README.md
View File

@@ -70,12 +70,12 @@ ab32vg1-prougen 是 中科蓝讯(Bluetrum) 推出的一款基于 RISC-V 内核
| GPIO | 支持 | PA PB PE PF |
| UART | 支持 | UART0/1/2 |
| SDIO | 支持 | |
| ADC | 支持 | 10bit ADC |
| SPI | 即将支持 | 软件 SPI |
| ADC | 支持 | 10bit SRADC 16bit SDADC |
| SPI | 即将支持 | |
| I2C | 支持 | 软件 I2C |
| RTC | 支持 | |
| WDT | 支持 | |
| FLASH | 即将支持 | 对接 FAL |
| FLASH | 支持 | 对接 FAL |
| TIMER | 支持 | |
| PWM | 支持 | LPWM 的 G1 G2 G3 之间是互斥的，只能三选一 |
| FM receive | 支持 | |

5
bsp/bluetrum/ab32vg1-ab-prougen/applications/blehr_app.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2021, Bluetrum Development Team
* Copyright (c) 2021-2021, Bluetrum Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -64,7 +64,8 @@ static int blehr_sample(void)
15,
1);
if (tid != RT_NULL) {
if (tid != RT_NULL)
{
rt_thread_startup(tid);
}
}

2
bsp/bluetrum/ab32vg1-ab-prougen/applications/mnt.c
View File

@@ -26,7 +26,7 @@ void sd_mount(void *parameter)
while (1)
{
rt_thread_mdelay(500);
if(rt_device_find("sd0") != RT_NULL)
if (rt_device_find("sd0") != RT_NULL)
{
if (dfs_mount("sd0", "/", "elm", 0, 0) == RT_EOK)
{

29
bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig
View File

@@ -1,12 +1,12 @@
menu "Hardware Drivers Config"
config SOC_AB32VG1
bool
menuconfig SOC_AB32VG1
bool "SOC_AB32VG1"
select PKG_USING_BLUETRUM_SDK
default y
config PKG_USING_BLUETRUM_NIMBLE
bool
menuconfig PKG_USING_BLUETRUM_NIMBLE
bool "PKG_USING_BLUETRUM_NIMBLE"
default n
menu "Onboard Peripheral Drivers"
@@ -34,6 +34,11 @@ menu "Onboard Peripheral Drivers"
default 24000000
endif
config BSP_USING_NIMBLE
bool "use nimble stack(iot)"
select PKG_USING_BLUETRUM_NIMBLE
default n
endmenu
menu "On-chip Peripheral Drivers"
@@ -233,20 +238,10 @@ menu "On-chip Peripheral Drivers"
default n
endif
config BSP_USING_ON_CHIP_FLASH
bool "Enable on-chip FLASH"
default n
endmenu
choice
prompt "BLE STACK"
default BLE_STACK_USING_NULL
help
Select the ble stack
config BLE_STACK_USING_NULL
bool "not use the ble stack"
config BSP_USING_NIMBLE
bool "use nimble stack(iot)"
select PKG_USING_BLUETRUM_NIMBLE
endchoice
endmenu

4
bsp/bluetrum/ab32vg1-ab-prougen/board/SConscript
View File

@@ -8,10 +8,14 @@ board.c
ab32vg1_hal_msp.c
''')
CPPPATH = [cwd]
CPPPATH += [cwd + '/ports']
if GetDepend(['RT_USING_AUDIO']):
src += Glob('ports/audio/drv_sound.c')
if GetDepend(['BSP_USING_ON_CHIP_FLASH']):
src += Glob('ports/on_chip_flash_init.c')
group = DefineGroup('Board', src, depend = [''], CPPPATH = CPPPATH)
objs = [group]

88
bsp/bluetrum/ab32vg1-ab-prougen/board/board.c
View File

@@ -68,6 +68,28 @@ void hal_printf(const char *fmt, ...)
}
#endif
RT_SECTION(".irq")
void os_interrupt_enter(void)
{
rt_interrupt_enter();
}
RT_SECTION(".irq")
void os_interrupt_leave(void)
{
rt_interrupt_leave();
}
typedef void (*isr_t)(void);
RT_SECTION(".irq")
isr_t register_isr(int vector, isr_t isr)
{
char buf[8] = {0};
rt_snprintf(buf, sizeof(buf), "sys%d", vector);
rt_isr_handler_t handle = (rt_isr_handler_t)isr;
rt_hw_interrupt_install(vector, handle, RT_NULL, buf);
}
RT_SECTION(".irq.timer")
void timer0_isr(int vector, void *param)
{
@@ -94,9 +116,55 @@ void timer0_cfg(uint32_t ticks)
TMR0CON |= BIT(0); // EN
}
void hal_mdelay(uint32_t ms)
uint32_t hal_get_ticks(void)
{
rt_thread_mdelay(ms);
return rt_tick_get();
}
void hal_mdelay(uint32_t nms)
{
rt_thread_mdelay(nms);
}
void hal_udelay(uint32_t nus)
{
rt_hw_us_delay(nus);
}
/**
* The time delay function.
*
* @param us microseconds.
*/
RT_SECTION(".com_text")
void rt_hw_us_delay(rt_uint32_t us)
{
rt_uint32_t ticks;
rt_uint32_t told, tnow, tcnt = 0;
rt_uint32_t reload = TMR0PR;
ticks = us * reload / (1000 / RT_TICK_PER_SECOND);
told = TMR0CNT;
while (1)
{
tnow = TMR0CNT;
if (tnow != told)
{
if (tnow < told)
{
tcnt += told - tnow;
}
else
{
tcnt += reload - tnow + told;
}
told = tnow;
if (tcnt >= ticks)
{
break;
}
}
}
}
void rt_hw_systick_init(void)
@@ -114,7 +182,7 @@ void rt_hw_systick_init(void)
timer0_init();
hal_set_tick_hook(timer0_cfg);
hal_set_ticks(get_sysclk_nhz()/RT_TICK_PER_SECOND);
hal_set_ticks(get_sysclk_nhz() / RT_TICK_PER_SECOND);
PICCON |= 0x10002;
}
@@ -156,7 +224,8 @@ void cache_init(void)
RT_SECTION(".irq.cache")
void os_spiflash_lock(void)
{
if ((rt_thread_self() != RT_NULL) && (rt_interrupt_nest == 0)) {
if ((rt_thread_self() != RT_NULL) && (rt_interrupt_nest == 0))
{
rt_mutex_take(&mutex_spiflash, RT_WAITING_FOREVER);
}
}
@@ -164,7 +233,8 @@ void os_spiflash_lock(void)
RT_SECTION(".irq.cache")
void os_spiflash_unlock(void)
{
if ((rt_thread_self() != RT_NULL) && (rt_interrupt_nest == 0)) {
if ((rt_thread_self() != RT_NULL) && (rt_interrupt_nest == 0))
{
rt_mutex_release(&mutex_spiflash);
}
}
@@ -172,7 +242,8 @@ void os_spiflash_unlock(void)
RT_SECTION(".irq.cache")
void os_cache_lock(void)
{
if ((rt_thread_self() != RT_NULL) && (rt_interrupt_nest == 0)) {
if ((rt_thread_self() != RT_NULL) && (rt_interrupt_nest == 0))
{
rt_mutex_take(&mutex_cache, RT_WAITING_FOREVER);
}
}
@@ -180,7 +251,8 @@ void os_cache_lock(void)
RT_SECTION(".irq.cache")
void os_cache_unlock(void)
{
if ((rt_thread_self() != RT_NULL) && (rt_interrupt_nest == 0)) {
if ((rt_thread_self() != RT_NULL) && (rt_interrupt_nest == 0))
{
rt_mutex_release(&mutex_cache);
}
}
@@ -212,5 +284,5 @@ void exception_isr(void)
rt_kprintf(stack_info, rt_thread_self()->sp, rt_thread_self()->name);
#endif
while(1);
while (1);
}

43
bsp/bluetrum/ab32vg1-ab-prougen/board/ports/fal_cfg.h Normal file
View File

@@ -0,0 +1,43 @@
/*
* Copyright (c) 2006-2021, Bluetrum Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-11-16 greedyhao first version
*/
#ifndef __FAL_CFG_H__
#define __FAL_CFG_H__
#include <rtthread.h>
#if defined(BSP_USING_ON_CHIP_FLASH)
extern const struct fal_flash_dev ab32_onchip_flash;
/* flash device table */
#define FAL_FLASH_DEV_TABLE \
{ \
&ab32_onchip_flash, \
}
/* ====================== Partition Configuration ========================== */
#ifdef FAL_PART_HAS_TABLE_CFG
/* partition table */
#define FAL_PART_TABLE \
{ \
{FAL_PART_MAGIC_WROD, "boot", "onchip_flash", 0, 8 * 1024, 0}, \
{FAL_PART_MAGIC_WROD, "app", "onchip_flash", 8 * 1024, 996 * 1024, 0}, \
{FAL_PART_MAGIC_WROD, "param", "onchip_flash", 1004 * 1024, 20 * 1024, 0}, \
}
#endif /* FAL_PART_HAS_TABLE_CFG */
#else
#define FAL_FLASH_DEV_TABLE { 0 }
#define FAL_PART_TABLE { 0 }
#endif
#endif /* __FAL_CFG_H__ */

21
bsp/bluetrum/ab32vg1-ab-prougen/board/ports/on_chip_flash_init.c Normal file
View File

@@ -0,0 +1,21 @@
/*
* Copyright (c) 2006-2021, Bluetrum Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-11-16 greedyhao first version
*/
#include <rtthread.h>
#include "fal.h"
#if defined(BSP_USING_ON_CHIP_FLASH)
static int rt_hw_on_chip_flash_init(void)
{
fal_init();
return RT_EOK;
}
INIT_COMPONENT_EXPORT(rt_hw_on_chip_flash_init);
#endif

14
bsp/bluetrum/ab32vg1-ab-prougen/rtconfig.h
View File

@@ -18,7 +18,7 @@
#define IDLE_THREAD_STACK_SIZE 512
#define RT_USING_TIMER_SOFT
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 256
#define RT_TIMER_THREAD_STACK_SIZE 1024
/* kservice optimization */
@@ -46,7 +46,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_VER_NUM 0x40004
#define RT_VER_NUM 0x40100
/* RT-Thread Components */
@@ -91,6 +91,7 @@
/* POSIX layer and C standard library */
#define RT_USING_LIBC
#define RT_LIBC_USING_TIME
#define RT_LIBC_DEFAULT_TIMEZONE 8
@@ -147,6 +148,9 @@
/* u8g2: a monochrome graphic library */
/* PainterEngine: A cross-platform graphics application framework written in C language */
/* tools packages */
@@ -155,6 +159,9 @@
/* acceleration: Assembly language or algorithmic acceleration packages */
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
/* Micrium: Micrium software products porting for RT-Thread */
@@ -186,9 +193,6 @@
#define BSP_USING_UART
#define BSP_USING_UART0
#define BSP_UART0_FIFO_SIZE 10
/* Board extended module Drivers */
#define BOARD_BLUETRUM_EVB
#endif

2
bsp/bluetrum/ab32vg1-ab-prougen/rtconfig.py
View File

@@ -40,7 +40,7 @@ if PLATFORM == 'gcc':
OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -mcmodel=medany -march=rv32imc -mabi=ilp32 -msave-restore'
DEVICE = ' -mcmodel=medany -march=rv32imc -mabi=ilp32 -msave-restore -ffunction-sections'
CFLAGS = DEVICE + ' -D_USE_LONG_TIME_T'
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
LFLAGS = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start -T link.lds'

3
bsp/bluetrum/libraries/hal_drivers/SConscript
View File

@@ -38,6 +38,9 @@ if GetDepend('RT_USING_ADC'):
if GetDepend('BSP_USING_IRRX'):
src += ['drv_irrx.c']
if GetDepend('BSP_USING_ON_CHIP_FLASH'):
src += ['drv_flash.c']
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path)
objs = [group]

140
bsp/bluetrum/libraries/hal_drivers/drv_flash.c Normal file
View File

@@ -0,0 +1,140 @@
/*
* Copyright (c) 2006-2021, Bluetrum Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-11-16 greedyhao first version
*/
#include "board.h"
#include "drv_flash.h"
#ifdef BSP_USING_ON_CHIP_FLASH
#if defined(PKG_USING_FAL)
#include "fal.h"
#endif
//#define DRV_DEBUG
#define LOG_TAG "drv.flash"
#include <drv_log.h>
#if defined(PKG_USING_FAL)
#define AB32_FLASH_START_ADDRESS 0x00000000
#define AB32_FLASH_SIZE (1024 * 1024)
#define AB32_FLASH_PAGE_SIZE (0x1000)
static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size);
static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size);
static int fal_flash_erase(long offset, size_t size);
const struct fal_flash_dev ab32_onchip_flash =
{
"onchip_flash",
AB32_FLASH_START_ADDRESS,
AB32_FLASH_SIZE,
AB32_FLASH_PAGE_SIZE,
{NULL, fal_flash_read, fal_flash_write, fal_flash_erase},
256 * 8
};
static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size)
{
return os_spiflash_read(buf, offset, size);
}
static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size)
{
if (size % 256)
{
rt_kprintf("Flash write requires 256 byte alignment\n");
return -1;
}
os_spiflash_program(buf, offset, size);
return 0;
}
static int fal_flash_erase(long offset, size_t size)
{
if (size % 4096)
{
rt_kprintf("Flash erase requires 4096 byte alignment\n");
return -1;
}
while (size > 0)
{
os_spiflash_erase(offset);
offset += 4096;
size -= 4096;
}
return 0;
}
int fal_ops_test(void)
{
int result;
const struct fal_partition *part_dev = fal_partition_find("param");
uint8_t *data = rt_malloc(256);
int i;
int size = 256;
int addr = 0;
for (int i = 0; i < 256; i++)
{
data[i] = i;
}
result = fal_partition_write(part_dev, 0, data, 256);
if (result >= 0)
{
rt_kprintf("Write data success. Start from 0x%08X, size is %ld.\n", addr, size);
rt_kprintf("Write data: ");
for (i = 0; i < size; i++)
{
rt_kprintf("%d ", data[i]);
}
rt_kprintf(".\n");
}
rt_memset(data, 0, 256);
result = fal_partition_read(part_dev, 0, data, 256);
if (result >= 0)
{
rt_kprintf("Read data success. Start from 0x%08X, size is %ld.\n", addr, size);
rt_kprintf("Read data: ");
for (i = 0; i < size; i++)
{
rt_kprintf("%d ", data[i]);
}
rt_kprintf(".\n");
}
result = fal_partition_erase(part_dev, 0, 4096);
if (result >= 0)
{
rt_kprintf("Erase data success.\n");
}
rt_memset(data, 0, 256);
result = fal_partition_read(part_dev, 0, data, 256);
if (result >= 0)
{
rt_kprintf("Read data success. Start from 0x%08X, size is %ld.\n", addr, size);
rt_kprintf("Read data: ");
for (i = 0; i < size; i++)
{
rt_kprintf("%d ", data[i]);
}
rt_kprintf(".\n");
}
rt_free(data);
return 0;
}
MSH_CMD_EXPORT(fal_ops_test, "fal_ops_test");
#endif
#endif

42
bsp/bluetrum/libraries/hal_drivers/drv_flash.h Normal file
View File

@@ -0,0 +1,42 @@
/*
* Copyright (c) 2006-2021, Bluetrum Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-11-16 greedyhao first version
*/
#ifndef __DRV_FLASH_H__
#define __DRV_FLASH_H__
#include <stdint.h>
/**
* @brief Read a block of data
*
* @param buf output data
* @param addr
* @param len less than 512
* @return uint16_t
*/
uint16_t os_spiflash_read(void *buf, uint32_t addr, uint16_t len);
/**
* @brief Write a block of data
*
* @param buf input data
* @param addr 256 alignment
* @param len 256 alignment
*/
void os_spiflash_program(const void *buf, uint32_t addr, uint16_t len);
/**
* @brief Erases a block of data
*
* @param addr 4k alignment
*/
void os_spiflash_erase(uint32_t addr);
#endif /* __DRV_FLASH_H__ */

6
bsp/bluetrum/libraries/hal_drivers/drv_gpio.c
View File

@@ -27,9 +27,9 @@ struct port_info
static const struct port_info port_table[] =
{
{0, 8, 0}, /* PA0-PA7 */
{0, 5, 8}, /* PB0-PB5 */
{0, 5, 8}, /* PB0-PB4 */
{0, 8, 13}, /* PE0-PE7 */
{0, 6, 21}, /* PF0-PF6 */
{0, 6, 21}, /* PF0-PF5 */
};
static const hal_sfr_t port_sfr[] =
@@ -56,8 +56,6 @@ static rt_uint8_t _pin_port(rt_uint32_t pin)
#define PORT_SFR(port) (port_sfr[(port)])
#define PIN_NO(pin) (rt_uint8_t)((pin) & 0xFu)
// #define PIN_ABPIN(pin) (rt_uint8_t)(port_table[PIN_PORT(pin)].total_pin + PIN_NO(pin))
static rt_base_t ab32_pin_get(const char *name)
{
rt_base_t pin = 0;

1
bsp/bluetrum/libraries/hal_drivers/drv_rtc.c
View File

@@ -11,7 +11,6 @@
*/
#include "board.h"
#include <time.h>
#include <sys/time.h>
#ifdef BSP_USING_ONCHIP_RTC

41
bsp/bluetrum/libraries/hal_drivers/drv_soft_i2c.c
View File

@@ -142,41 +142,6 @@ static rt_int32_t ab32_get_scl(void *data)
return rt_pin_read(cfg->scl);
}
/**
* The time delay function.
*
* @param us microseconds.
*/
static void ab32_udelay(rt_uint32_t us)
{
rt_uint32_t ticks;
rt_uint32_t told, tnow, tcnt = 0;
rt_uint32_t reload = TMR0PR;
ticks = us * reload / (1000 / RT_TICK_PER_SECOND);
told = TMR0CNT;
while (1)
{
tnow = TMR0CNT;
if (tnow != told)
{
if (tnow < told)
{
tcnt += told - tnow;
}
else
{
tcnt += reload - tnow + told;
}
told = tnow;
if (tcnt >= ticks)
{
break;
}
}
}
}
static const struct rt_i2c_bit_ops ab32_bit_ops_default =
{
.data = RT_NULL,
@@ -184,7 +149,7 @@ static const struct rt_i2c_bit_ops ab32_bit_ops_default =
.set_scl = ab32_set_scl,
.get_sda = ab32_get_sda,
.get_scl = ab32_get_scl,
.udelay = ab32_udelay,
.udelay = rt_hw_us_delay,
.delay_us = 1,
.timeout = 100
};
@@ -205,9 +170,9 @@ static rt_err_t ab32_i2c_bus_unlock(const struct ab32_soft_i2c_config *cfg)
while (i++ < 9)
{
rt_pin_write(cfg->scl, PIN_HIGH);
ab32_udelay(100);
rt_hw_us_delay(100);
rt_pin_write(cfg->scl, PIN_LOW);
ab32_udelay(100);
rt_hw_us_delay(100);
}
}
if (PIN_LOW == rt_pin_read(cfg->sda))

3
bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal.h
View File

@@ -11,8 +11,9 @@
void hal_set_tick_hook(void (*hook)(uint32_t ticks));
void hal_set_ticks(uint32_t ticks);
uint32_t hal_get_ticks(void);
void hal_mdelay(uint32_t nms);
void hal_udelay(uint16_t nus);
void hal_udelay(uint32_t nus);
void hal_printf(const char *fmt, ...);
#endif

BIN
bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/libhal.a
View File

Binary file not shown.

16
bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/source/ab32vg1_hal.c
View File

@@ -11,26 +11,24 @@ void hal_set_tick_hook(void (*hook)(uint32_t ticks))
void hal_set_ticks(uint32_t ticks)
{
if (ticks != hw_ticks) {
if (ticks != hw_ticks)
{
hw_ticks = ticks;
}
if (tick_cfg_hook != HAL_NULL) {
if (tick_cfg_hook != HAL_NULL)
{
tick_cfg_hook(hw_ticks);
}
}
WEAK void hal_mdelay(uint32_t nms)
{
}
void hal_udelay(uint16_t nus)
WEAK void hal_udelay(uint32_t nus)
{
int i;
for (i = 0; i < nus*10; i++) {
asm("nop");
}
}
WEAK void hal_printf(const char *fmt, ...)
{}
{
}

3
bsp/bluetrum/libraries/hal_libraries/bmsis/source/startup.S
View File

@@ -6,7 +6,6 @@
#include "ab32vg1.h"
.set _memcpy, 0x84044
.global _start
.section .reset, "ax"
_start:
@@ -111,3 +110,5 @@ cpu_irq_comm:
.global _tp
.set _tp, 0x84800
.set _memcpy, 0x84044

2
bsp/ck802/libraries/include/drv_rtc.h
View File

@@ -29,7 +29,7 @@ extern "C" {
#include <stdint.h>
#include <drv_common.h>
#include <time.h>
#include <sys/time.h>
/// definition for rtc handle.
typedef void *rtc_handle_t;

2
bsp/ft2004/libraries/bsp/ft_i2c/ft_i2c_selftest.c
View File

@@ -12,7 +12,7 @@
* ----- ------     --------    --------------------------------------
*/
#include <time.h>
#include <sys/time.h>
#include <string.h>
#include "ft_i2c_hw.h"
#include "ft_i2c.h"

2
bsp/imxrt/libraries/drivers/drv_rtc.c
View File

@@ -20,7 +20,7 @@
#include "drv_rtc.h"
#include "fsl_snvs_hp.h"
#include <time.h>
#include <sys/time.h>
#if defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL
#error "Please don't define 'FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL'!"

2
bsp/lpc5410x/Libraries/lpc_chip/chip_common/rtc_ut.h
View File

@@ -36,7 +36,7 @@
#include "chip.h"
#include <stdlib.h>
#include <time.h>
#include <sys/time.h>
#ifdef __cplusplus
extern "C" {

47
bsp/nrf5x/libraries/drivers/drv_i2c.c
View File

@@ -6,6 +6,7 @@
* Change Logs:
* Date Author Notes
* 2020-11-15 xckhmf First Verison
* 2021-11-27 chenyingchun fix _master_xfer bug
*
*/
@@ -56,36 +57,54 @@ static int twi_master_init(struct rt_i2c_bus_device *bus)
nrfx_twi_twim_bus_recover(config.scl,config.sda);
rtn = nrfx_twim_init(p_instance,&config,NULL,NULL);
if (rtn != NRFX_SUCCESS)
{
return rtn;
}
nrfx_twim_enable(p_instance);
return 0;
}
static rt_size_t _master_xfer(struct rt_i2c_bus_device *bus,
struct rt_i2c_msg msgs[],
rt_uint32_t num)
struct rt_i2c_msg msgs[],
rt_uint32_t num)
{
nrfx_twim_t const * p_instance = &((drv_i2c_cfg_t *)bus->priv)->twi_instance;
struct rt_i2c_msg *msg;
nrfx_twim_t const *p_instance = &((drv_i2c_cfg_t *)bus->priv)->twi_instance;
nrfx_err_t ret = NRFX_ERROR_INTERNAL;
uint32_t no_stop_flag = 0;
rt_int32_t i = 0;
nrfx_twim_xfer_desc_t xfer = NRFX_TWIM_XFER_DESC_TX(msgs->addr,msgs->buf, msgs->len);
if((msgs->flags & 0x01) == RT_I2C_WR)
for (i = 0; i < num; i++)
{
xfer.type = NRFX_TWIM_XFER_TX;
if((msgs->flags & 0x40) == RT_I2C_NO_READ_ACK)
msg = &msgs[i];
nrfx_twim_xfer_desc_t xfer = NRFX_TWIM_XFER_DESC_TX(msg->addr, msg->buf, msg->len);
if (msg->flags & RT_I2C_RD)
{
no_stop_flag = NRFX_TWIM_FLAG_TX_NO_STOP;
xfer.type = NRFX_TWIM_XFER_RX;
}
else
{
xfer.type = NRFX_TWIM_XFER_TX;
if (msg->flags & RT_I2C_NO_READ_ACK)
{
no_stop_flag = NRFX_TWIM_FLAG_TX_NO_STOP;
}
}
ret = nrfx_twim_xfer(p_instance, &xfer, no_stop_flag);
if (ret != NRFX_SUCCESS)
{
goto out;
}
}
else if((msgs->flags & 0x01) == RT_I2C_RD)
{
xfer.type = NRFX_TWIM_XFER_RX;
}
ret = nrfx_twim_xfer(p_instance,&xfer,no_stop_flag);
return (ret == NRFX_SUCCESS) ? msgs->len : 0;
out:
return i;
}
static const struct rt_i2c_bus_device_ops _i2c_ops =
{
_master_xfer,

58
bsp/nrf5x/nrf52840/board/Kconfig
View File

@@ -405,6 +405,64 @@ menu "On-chip Peripheral Drivers"
hex "MCU FLASH PAGE SIZE, please not change,nrfx default is 0x1000"
default 0x1000
endmenu
config BSP_USING_TIM
bool "Enable TIMER"
select RT_USING_HWTIMER
default n
if BSP_USING_TIM
config NRFX_TIMER_ENABLED
int
default 1
config BSP_USING_TIM0
bool "Enable TIMER0"
default n
if BSP_USING_TIM0
config NRFX_TIMER0_ENABLED
int
default 1
endif
config BSP_USING_TIM1
bool "Enable TIMER1"
default n
if BSP_USING_TIM1
config NRFX_TIMER1_ENABLED
int
default 1
endif
config BSP_USING_TIM2
bool "Enable TIMER2"
default n
if BSP_USING_TIM2
config NRFX_TIMER2_ENABLED
int
default 1
endif
config BSP_USING_TIM3
bool "Enable TIMER3"
default n
if BSP_USING_TIM3
config NRFX_TIMER3_ENABLED
int
default 1
endif
config BSP_USING_TIM4
bool "Enable TIMER4"
default n
if BSP_USING_TIM4
config NRFX_TIMER4_ENABLED
int
default 1
endif
endif
if PKG_USING_TINYUSB
config NRFX_POWER_ENABLED
int
default 1
endif
endmenu

42
bsp/nuvoton/libraries/m031/rtt_port/drv_i2c.c
View File

@@ -72,20 +72,32 @@ static nu_i2c_bus_t nu_i2c1 =
static rt_size_t nu_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
struct rt_i2c_msg msgs[],
rt_uint32_t num);
static rt_err_t nu_i2c_bus_control(struct rt_i2c_bus_device *bus,
rt_uint32_t u32Cmd,
rt_uint32_t u32Value);
static const struct rt_i2c_bus_device_ops nu_i2c_ops =
{
.master_xfer = nu_i2c_mst_xfer,
.slave_xfer = NULL,
.i2c_bus_control = NULL,
.i2c_bus_control = nu_i2c_bus_control
};
static rt_err_t nu_i2c_configure(nu_i2c_bus_t *bus)
static rt_err_t nu_i2c_bus_control(struct rt_i2c_bus_device *bus, rt_uint32_t u32Cmd, rt_uint32_t u32Value)
{
RT_ASSERT(bus != RT_NULL);
nu_i2c_bus_t *nu_i2c;
bus->parent.ops = &nu_i2c_ops;
I2C_Open(bus->I2C, 100000);
RT_ASSERT(bus != RT_NULL);
nu_i2c = (nu_i2c_bus_t *) bus;
switch (RT_I2C_DEV_CTRL_CLK)
{
case RT_I2C_DEV_CTRL_CLK:
I2C_SetBusClockFreq(nu_i2c->I2C, u32Value);
break;
default:
return -RT_EIO;
}
return RT_EOK;
}
@@ -290,24 +302,28 @@ static rt_size_t nu_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
int rt_hw_i2c_init(void)
{
rt_err_t ret = RT_ERROR;
#if defined(BSP_USING_I2C0)
SYS_UnlockReg();
SYS_ResetModule(I2C0_RST);
SYS_LockReg();
nu_i2c_configure(&nu_i2c0);
#if defined(BSP_USING_I2C0)
I2C_Close(nu_i2c0.I2C);
I2C_Open(nu_i2c0.I2C, 100000);
nu_i2c0.parent.ops = &nu_i2c_ops;
ret = rt_i2c_bus_device_register(&nu_i2c0.parent, nu_i2c0.device_name);
RT_ASSERT(RT_EOK == ret);
#endif /* BSP_USING_I2C0 */
#if defined(BSP_USING_I2C1)
SYS_UnlockReg();
SYS_ResetModule(I2C1_RST);
SYS_LockReg();
nu_i2c_configure(&nu_i2c1);
I2C_Close(nu_i2c1.I2C);
I2C_Open(nu_i2c1.I2C, 100000);
nu_i2c1.parent.ops = &nu_i2c_ops;
ret = rt_i2c_bus_device_register(&nu_i2c1.parent, nu_i2c1.device_name);
RT_ASSERT(RT_EOK == ret);
#endif /* BSP_USING_I2C1 */
SYS_LockReg();
return ret;
}

7
bsp/nuvoton/libraries/m2354/USBHostLib/src/ohci.c
View File

@@ -1144,6 +1144,9 @@ void USBH_IRQHandler(void)
TD_T *td, *td_prev, *td_next;
uint32_t int_sts;
/* enter interrupt */
rt_interrupt_enter();
int_sts = _ohci->HcInterruptStatus;
//USB_debug("ohci int_sts = 0x%x\n", int_sts);
@@ -1199,6 +1202,10 @@ void USBH_IRQHandler(void)
}
_ohci->HcInterruptStatus = int_sts;
/* leave interrupt */
rt_interrupt_leave();
}
#ifdef ENABLE_DEBUG_MSG

51
bsp/nuvoton/libraries/m2354/rtt_port/drv_i2c.c
View File

@@ -81,20 +81,32 @@ static nu_i2c_bus_t nu_i2c2 =
static rt_size_t nu_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
struct rt_i2c_msg msgs[],
rt_uint32_t num);
static rt_err_t nu_i2c_bus_control(struct rt_i2c_bus_device *bus,
rt_uint32_t u32Cmd,
rt_uint32_t u32Value);
static const struct rt_i2c_bus_device_ops nu_i2c_ops =
{
.master_xfer = nu_i2c_mst_xfer,
.slave_xfer = NULL,
.i2c_bus_control = NULL,
.i2c_bus_control = nu_i2c_bus_control
};
static rt_err_t nu_i2c_configure(nu_i2c_bus_t *bus)
static rt_err_t nu_i2c_bus_control(struct rt_i2c_bus_device *bus, rt_uint32_t u32Cmd, rt_uint32_t u32Value)
{
RT_ASSERT(bus != RT_NULL);
nu_i2c_bus_t *nu_i2c;
bus->parent.ops = &nu_i2c_ops;
I2C_Open(bus->I2C, 100000);
RT_ASSERT(bus != RT_NULL);
nu_i2c = (nu_i2c_bus_t *) bus;
switch (RT_I2C_DEV_CTRL_CLK)
{
case RT_I2C_DEV_CTRL_CLK:
I2C_SetBusClockFreq(nu_i2c->I2C, u32Value);
break;
default:
return -RT_EIO;
}
return RT_EOK;
}
@@ -354,33 +366,38 @@ static rt_size_t nu_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
int rt_hw_i2c_init(void)
{
rt_err_t ret = RT_ERROR;
#if defined(BSP_USING_I2C0)
SYS_UnlockReg();
SYS_ResetModule(I2C0_RST);
SYS_LockReg();
nu_i2c_configure(&nu_i2c0);
#if defined(BSP_USING_I2C0)
I2C_Close(nu_i2c0.I2C);
I2C_Open(nu_i2c0.I2C, 100000);
nu_i2c0.parent.ops = &nu_i2c_ops;
ret = rt_i2c_bus_device_register(&nu_i2c0.parent, nu_i2c0.device_name);
RT_ASSERT(RT_EOK == ret);
#endif /* BSP_USING_I2C0 */
#if defined(BSP_USING_I2C1)
SYS_UnlockReg();
SYS_ResetModule(I2C1_RST);
SYS_LockReg();
nu_i2c_configure(&nu_i2c1);
I2C_Close(nu_i2c1.I2C);
I2C_Open(nu_i2c1.I2C, 100000);
nu_i2c1.parent.ops = &nu_i2c_ops;
ret = rt_i2c_bus_device_register(&nu_i2c1.parent, nu_i2c1.device_name);
RT_ASSERT(RT_EOK == ret);
#endif /* BSP_USING_I2C1 */
#if defined(BSP_USING_I2C2)
SYS_UnlockReg();
SYS_ResetModule(I2C2_RST);
SYS_LockReg();
nu_i2c_configure(&nu_i2c2);
I2C_Close(nu_i2c2.I2C);
I2C_Open(nu_i2c2.I2C, 100000);
nu_i2c2.parent.ops = &nu_i2c_ops;
ret = rt_i2c_bus_device_register(&nu_i2c2.parent, nu_i2c2.device_name);
RT_ASSERT(RT_EOK == ret);
#endif /* BSP_USING_I2C2 */
SYS_LockReg();
return ret;
}

698
bsp/nuvoton/libraries/m2354/rtt_port/drv_usbhost.c
View File

File diff suppressed because it is too large Load Diff

6
bsp/nuvoton/libraries/m480/USBHostLib/src/ehci.c
View File

@@ -1113,6 +1113,9 @@ void EHCI_IRQHandler(void)
{
uint32_t intsts;
/* enter interrupt */
rt_interrupt_enter();
intsts = _ehci->USTSR;
_ehci->USTSR = intsts; /* clear interrupt status */
@@ -1136,6 +1139,9 @@ void EHCI_IRQHandler(void)
{
iaad_remove_qh();
}
/* leave interrupt */
rt_interrupt_leave();
}
static UDEV_T *ehci_find_device_by_port(int port)

6
bsp/nuvoton/libraries/m480/USBHostLib/src/ohci.c
View File

@@ -1154,6 +1154,9 @@ void OHCI_IRQHandler(void)
TD_T *td, *td_prev, *td_next;
uint32_t int_sts;
/* enter interrupt */
rt_interrupt_enter();
int_sts = _ohci->HcInterruptStatus;
//USB_debug("ohci int_sts = 0x%x\n", int_sts);
@@ -1209,6 +1212,9 @@ void OHCI_IRQHandler(void)
}
_ohci->HcInterruptStatus = int_sts;
/* leave interrupt */
rt_interrupt_leave();
}
#ifdef ENABLE_DEBUG_MSG

54
bsp/nuvoton/libraries/m480/rtt_port/drv_i2c.c
View File

@@ -81,20 +81,32 @@ static nu_i2c_bus_t nu_i2c2 =
static rt_size_t nu_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
struct rt_i2c_msg msgs[],
rt_uint32_t num);
static rt_err_t nu_i2c_bus_control(struct rt_i2c_bus_device *bus,
rt_uint32_t u32Cmd,
rt_uint32_t u32Value);
static const struct rt_i2c_bus_device_ops nu_i2c_ops =
{
.master_xfer = nu_i2c_mst_xfer,
.slave_xfer = NULL,
.i2c_bus_control = NULL,
.i2c_bus_control = nu_i2c_bus_control
};
static rt_err_t nu_i2c_configure(nu_i2c_bus_t *bus)
static rt_err_t nu_i2c_bus_control(struct rt_i2c_bus_device *bus, rt_uint32_t u32Cmd, rt_uint32_t u32Value)
{
RT_ASSERT(bus != RT_NULL);
nu_i2c_bus_t *nu_i2c;
bus->parent.ops = &nu_i2c_ops;
I2C_Open(bus->I2C, 100000);
RT_ASSERT(bus != RT_NULL);
nu_i2c = (nu_i2c_bus_t *) bus;
switch (RT_I2C_DEV_CTRL_CLK)
{
case RT_I2C_DEV_CTRL_CLK:
I2C_SetBusClockFreq(nu_i2c->I2C, u32Value);
break;
default:
return -RT_EIO;
}
return RT_EOK;
}
@@ -354,36 +366,38 @@ static rt_size_t nu_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
int rt_hw_i2c_init(void)
{
rt_err_t ret = RT_ERROR;
#if defined(BSP_USING_I2C0)
SYS_UnlockReg();
/* Enable I2C0 clock */
SYS_ResetModule(I2C0_RST);
SYS_LockReg();
nu_i2c_configure(&nu_i2c0);
#if defined(BSP_USING_I2C0)
I2C_Close(nu_i2c0.I2C);
I2C_Open(nu_i2c0.I2C, 100000);
nu_i2c0.parent.ops = &nu_i2c_ops;
ret = rt_i2c_bus_device_register(&nu_i2c0.parent, nu_i2c0.device_name);
RT_ASSERT(RT_EOK == ret);
#endif /* BSP_USING_I2C0 */
#if defined(BSP_USING_I2C1)
SYS_UnlockReg();
/* Enable I2C1 clock */
SYS_ResetModule(I2C1_RST);
SYS_LockReg();
nu_i2c_configure(&nu_i2c1);
I2C_Close(nu_i2c1.I2C);
I2C_Open(nu_i2c1.I2C, 100000);
nu_i2c1.parent.ops = &nu_i2c_ops;
ret = rt_i2c_bus_device_register(&nu_i2c1.parent, nu_i2c1.device_name);
RT_ASSERT(RT_EOK == ret);
#endif /* BSP_USING_I2C1 */
#if defined(BSP_USING_I2C2)
SYS_UnlockReg();
/* Enable I2C2 clock */
SYS_ResetModule(I2C2_RST);
SYS_LockReg();
nu_i2c_configure(&nu_i2c2);
I2C_Close(nu_i2c2.I2C);
I2C_Open(nu_i2c2.I2C, 100000);
nu_i2c2.parent.ops = &nu_i2c_ops;
ret = rt_i2c_bus_device_register(&nu_i2c2.parent, nu_i2c2.device_name);
RT_ASSERT(RT_EOK == ret);
#endif /* BSP_USING_I2C2 */
SYS_LockReg();
return ret;
}

456
bsp/nuvoton/libraries/m480/rtt_port/drv_usbhost.c
View File

File diff suppressed because it is too large Load Diff

33
bsp/nuvoton/libraries/n9h30/Driver/Include/nu_sdh.h
View File

@@ -376,6 +376,7 @@ typedef struct
__IO uint32_t BLEN; /*!< [0x0838] SD Block Length Register */
__IO uint32_t TOUT; /*!< [0x083c] SD Response/Data-in Time-out Register */
__IO uint32_t ECTL; /*!< [0x0840] SD Host Extend Control Register */
} SDH_T;
@@ -450,8 +451,8 @@ typedef struct
#define SDH_CTL_CLK8OEN_Pos (6) /*!< SDH_T::CTL: CLK8OEN Position */
#define SDH_CTL_CLK8OEN_Msk (0x1ul << SDH_CTL_CLK8OEN_Pos) /*!< SDH_T::CTL: CLK8OEN Mask */
#define SDH_CTL_CLKKEEP_Pos (7) /*!< SDH_T::CTL: CLKKEEP Position */
#define SDH_CTL_CLKKEEP_Msk (0x1ul << SDH_CTL_CLKKEEP_Pos) /*!< SDH_T::CTL: CLKKEEP Mask */
#define SDH_CTL_CLKKEEP0_Pos (7) /*!< SDH_T::CTL: CLKKEEP Position */
#define SDH_CTL_CLKKEEP0_Msk (0x1ul << SDH_CTL_CLKKEEP0_Pos) /*!< SDH_T::CTL: CLKKEEP Mask */
#define SDH_CTL_CMDCODE_Pos (8) /*!< SDH_T::CTL: CMDCODE Position */
#define SDH_CTL_CMDCODE_Msk (0x3ful << SDH_CTL_CMDCODE_Pos) /*!< SDH_T::CTL: CMDCODE Mask */
@@ -567,6 +568,12 @@ typedef struct
#define SDH_TOUT_TOUT_Pos (0) /*!< SDH_T::TOUT: TOUT Position */
#define SDH_TOUT_TOUT_Msk (0xfffffful << SDH_TOUT_TOUT_Pos) /*!< SDH_T::TOUT: TOUT Mask */
#define SDH_ECTL_POWEROFF0_Pos (0) /*!< SDH_T::ECTL: POWEROFF0 Position */
#define SDH_ECTL_POWEROFF0_Msk (0x1ul << SDH_ECTL_POWEROFF0_Pos) /*!< SDH_T::ECTL: POWEROFF0 Mask */
#define SDH_ECTL_POWEROFF1_Pos (1) /*!< SDH_T::ECTL: POWEROFF1 Position */
#define SDH_ECTL_POWEROFF1_Msk (0x1ul << SDH_ECTL_POWEROFF1_Pos) /*!< SDH_T::ECTL: POWEROFF1 Mask */
/**@}*/ /* SDH_CONST */
/**@}*/ /* end of SDH register group */
/**@}*/ /* end of REGISTER group */
@@ -645,7 +652,6 @@ typedef struct SDH_info_t
/*@}*/ /* end of group N9H30_SDH_EXPORTED_TYPEDEF */
/// @cond HIDDEN_SYMBOLS
extern SDH_INFO_T SD0, SD1;
/// @endcond HIDDEN_SYMBOLS
@@ -724,7 +730,7 @@ extern SDH_INFO_T SD0, SD1;
* 0: Card removed.
* \hideinitializer
*/
#define SDH_IS_CARD_PRESENT(sdh) (((sdh) == SDH0)? SD0.IsCardInsert : SD1.IsCardInsert)
//#define SDH_IS_CARD_PRESENT(sdh) (((sdh) == SDH0)? SD0.IsCardInsert : SD1.IsCardInsert)
/**
* @brief Get SD Card capacity.
@@ -734,17 +740,18 @@ extern SDH_INFO_T SD0, SD1;
* @return SD Card capacity. (unit: KByte)
* \hideinitializer
*/
#define SDH_GET_CARD_CAPACITY(sdh) (((sdh) == SDH0)? SD0.diskSize : SD1.diskSize)
//#define SDH_GET_CARD_CAPACITY(sdh) (((sdh) == SDH0)? SD0.diskSize : SD1.diskSize)
void SDH_Open(SDH_T *sdh, uint32_t u32CardDetSrc);
uint32_t SDH_Probe(SDH_T *sdh);
uint32_t SDH_Read(SDH_T *sdh, uint8_t *pu8BufAddr, uint32_t u32StartSec, uint32_t u32SecCount);
uint32_t SDH_Write(SDH_T *sdh, uint8_t *pu8BufAddr, uint32_t u32StartSec, uint32_t u32SecCount);
uint32_t SDH_CardDetection(SDH_T *sdh);
void SDH_Open_Disk(SDH_T *sdh, uint32_t u32CardDetSrc);
void SDH_Close_Disk(SDH_T *sdh);
void SDH_Open(SDH_T *sdh, SDH_INFO_T *pSD, uint32_t u32CardDetSrc);
uint32_t SDH_Probe(SDH_T *sdh, SDH_INFO_T *pSD, uint32_t card_num);
uint32_t SDH_Read(SDH_T *sdh, SDH_INFO_T *pSD, uint8_t *pu8BufAddr, uint32_t u32StartSec, uint32_t u32SecCount);
uint32_t SDH_Write(SDH_T *sdh, SDH_INFO_T *pSD, uint8_t *pu8BufAddr, uint32_t u32StartSec, uint32_t u32SecCount);
void SDH_CardSelect(SDH_T *sdh, SDH_INFO_T *pSD, uint32_t u32CardSrc);
uint32_t SDH_CardDetection(SDH_T *sdh, SDH_INFO_T *pSD, uint32_t card_num);
void SDH_Open_Disk(SDH_T *sdh, SDH_INFO_T *pSD, uint32_t u32CardDetSrc);
void SDH_Close_Disk(SDH_T *sdh, SDH_INFO_T *pSD);
uint32_t SDH_WhichCardIsSelected(SDH_T *sdh);
/*@}*/ /* end of group N9H30_SDH_EXPORTED_FUNCTIONS */

414
bsp/nuvoton/libraries/n9h30/Driver/Source/nu_sdh.c
View File

File diff suppressed because it is too large Load Diff

7
bsp/nuvoton/libraries/n9h30/UsbHostLib/src/ehci.c
View File

@@ -297,6 +297,8 @@ static int ehci_init(void)
_ehci->UCFGR = 0x1; /* enable port routing to EHCI */
_ehci->UIENR = HSUSBH_UIENR_USBIEN_Msk | HSUSBH_UIENR_UERRIEN_Msk | HSUSBH_UIENR_HSERREN_Msk | HSUSBH_UIENR_IAAEN_Msk;
_ehci->UASSTR = 0xfff;
usbh_delay_ms(1); /* delay 1 ms */
_ehci->UPSCR[0] = HSUSBH_UPSCR_PP_Msk; /* enable port 1 port power */
@@ -905,7 +907,7 @@ static int visit_qtd(qTD_T *qtd)
return 0;
}
static void scan_asynchronous_list()
void scan_asynchronous_list()
{
QH_T *qh, *qh_tmp;
qTD_T *q_pre, *qtd, *qtd_tmp;
@@ -1094,9 +1096,8 @@ void iaad_remove_qh()
//void EHCI_IRQHandler(void)
void nu_ehci_isr(int vector, void *param)
{
uint32_t intsts;
volatile uint32_t intsts = _ehci->USTSR;
intsts = _ehci->USTSR;
_ehci->USTSR = intsts; /* clear interrupt status */
//USB_debug("ehci int_sts = 0x%x\n", intsts);

164
bsp/nuvoton/libraries/n9h30/UsbHostLib/src/support.c
View File

@@ -50,7 +50,7 @@ static uint32_t _MemoryPoolBase, _MemoryPoolEnd;
void USB_InitializeMemoryPool()
{
_MemoryPoolBase = (UINT32)&_USBMemoryPool[0] | NON_CACHE_MASK;
_MemoryPoolBase = (uint32_t)&_USBMemoryPool[0] | NON_CACHE_MASK;
_MemoryPoolEnd = _MemoryPoolBase + USB_MEMORY_POOL_SIZE;
_FreeMemorySize = _MemoryPoolEnd - _MemoryPoolBase;
_AllocatedMemorySize = 0;
@@ -71,41 +71,30 @@ int USB_allocated_memory()
}
void *USB_malloc(INT wanted_size, INT boundary)
void *USB_malloc(int wanted_size, int boundary)
{
#if 0
void *paddr = rt_malloc_align(wanted_size, 32);
return (void *)((uint32_t)paddr | NON_CACHE_MASK);
#else
USB_MHDR_T *pPrimitivePos = _pCurrent;
USB_MHDR_T *pFound;
INT found_size = -1;
INT i, block_count;
INT wrap = 0;
int disable_ohci_irq, disable_ehci_irq;
int found_size = -1;
int i, block_count;
int wrap = 0;
void *pvBuf = NULL;
rt_base_t level;
if (IS_OHCI_IRQ_ENABLED())
disable_ohci_irq = 1;
else
disable_ohci_irq = 0;
if (IS_EHCI_IRQ_ENABLED())
disable_ehci_irq = 1;
else
disable_ehci_irq = 0;
if (disable_ohci_irq)
DISABLE_OHCI_IRQ();
if (disable_ehci_irq)
DISABLE_EHCI_IRQ();
level = rt_hw_interrupt_disable();
if (wanted_size >= _FreeMemorySize)
{
rt_kprintf("USB_malloc - want=%d, free=%d\n", wanted_size, _FreeMemorySize);
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
return NULL;
goto exit_USB_malloc;
}
if ((UINT32)_pCurrent >= _MemoryPoolEnd)
if ((uint32_t)_pCurrent >= _MemoryPoolEnd)
_pCurrent = (USB_MHDR_T *)_MemoryPoolBase; /* wrapped */
do
@@ -114,26 +103,22 @@ void *USB_malloc(INT wanted_size, INT boundary)
{
if (_pCurrent->magic != USB_MEM_ALLOC_MAGIC)
{
rt_kprintf("\nUSB_malloc - incorrect magic number! C:%x F:%x, wanted:%d, Base:0x%x, End:0x%x\n", (UINT32)_pCurrent, _FreeMemorySize, wanted_size, (UINT32)_MemoryPoolBase, (UINT32)_MemoryPoolEnd);
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
return NULL;
rt_kprintf("\nUSB_malloc - incorrect magic number! C:%x F:%x, wanted:%d, Base:0x%x, End:0x%x\n", (uint32_t)_pCurrent, _FreeMemorySize, wanted_size, (uint32_t)_MemoryPoolBase, (uint32_t)_MemoryPoolEnd);
goto exit_USB_malloc;
}
if (_pCurrent->flag == 0x3)
_pCurrent = (USB_MHDR_T *)((UINT32)_pCurrent + _pCurrent->bcnt * USB_MEM_BLOCK_SIZE);
_pCurrent = (USB_MHDR_T *)((uint32_t)_pCurrent + _pCurrent->bcnt * USB_MEM_BLOCK_SIZE);
else
{
rt_kprintf("USB_malloc warning - not the first block!\n");
_pCurrent = (USB_MHDR_T *)((UINT32)_pCurrent + USB_MEM_BLOCK_SIZE);
_pCurrent = (USB_MHDR_T *)((uint32_t)_pCurrent + USB_MEM_BLOCK_SIZE);
}
if ((UINT32)_pCurrent > _MemoryPoolEnd)
if ((uint32_t)_pCurrent > _MemoryPoolEnd)
rt_kprintf("USB_malloc - behind limit!!\n");
if ((UINT32)_pCurrent == _MemoryPoolEnd)
if ((uint32_t)_pCurrent == _MemoryPoolEnd)
{
//rt_kprintf("USB_alloc - warp!!\n");
wrap = 1;
@@ -161,8 +146,8 @@ void *USB_malloc(INT wanted_size, INT boundary)
* used as a header only.
*/
if ((boundary > BOUNDARY_WORD) &&
((((UINT32)_pCurrent) + USB_MEM_BLOCK_SIZE >= _MemoryPoolEnd) ||
((((UINT32)_pCurrent) + USB_MEM_BLOCK_SIZE) % boundary != 0)))
((((uint32_t)_pCurrent) + USB_MEM_BLOCK_SIZE >= _MemoryPoolEnd) ||
((((uint32_t)_pCurrent) + USB_MEM_BLOCK_SIZE) % boundary != 0)))
found_size = -1; /* violate boundary, reset the accumlator */
}
else /* not the leading block */
@@ -181,34 +166,26 @@ void *USB_malloc(INT wanted_size, INT boundary)
for (i = 0; i < block_count; i++)
{
_pCurrent->flag = 1; /* allocate block */
_pCurrent = (USB_MHDR_T *)((UINT32)_pCurrent + USB_MEM_BLOCK_SIZE);
_pCurrent = (USB_MHDR_T *)((uint32_t)_pCurrent + USB_MEM_BLOCK_SIZE);
}
pFound->flag = 0x3;
if (boundary > BOUNDARY_WORD)
{
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
//rt_kprintf("- 0x%x, %d\n", (int)pFound, wanted_size);
return (void *)((UINT32)pFound + USB_MEM_BLOCK_SIZE);
pvBuf = (void *)((uint32_t)pFound + USB_MEM_BLOCK_SIZE);
goto exit_USB_malloc;
}
else
{
//USB_debug("USB_malloc(%d,%d):%x\tsize:%d, C:0x%x, %d\n", wanted_size, boundary, (UINT32)pFound + sizeof(USB_MHDR_T), block_count * USB_MEM_BLOCK_SIZE, _pCurrent, block_count);
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
//rt_kprintf("- 0x%x, %d\n", (int)pFound, wanted_size);
return (void *)((UINT32)pFound + sizeof(USB_MHDR_T));
//USB_debug("USB_malloc(%d,%d):%x\tsize:%d, C:0x%x, %d\n", wanted_size, boundary, (uint32_t)pFound + sizeof(USB_MHDR_T), block_count * USB_MEM_BLOCK_SIZE, _pCurrent, block_count);
pvBuf = (void *)((uint32_t)pFound + sizeof(USB_MHDR_T));
goto exit_USB_malloc;
}
}
/* advance to the next block */
_pCurrent = (USB_MHDR_T *)((UINT32)_pCurrent + USB_MEM_BLOCK_SIZE);
if ((UINT32)_pCurrent >= _MemoryPoolEnd)
_pCurrent = (USB_MHDR_T *)((uint32_t)_pCurrent + USB_MEM_BLOCK_SIZE);
if ((uint32_t)_pCurrent >= _MemoryPoolEnd)
{
wrap = 1;
_pCurrent = (USB_MHDR_T *)_MemoryPoolBase; /* wrapped */
@@ -219,49 +196,40 @@ void *USB_malloc(INT wanted_size, INT boundary)
while ((wrap == 0) || (_pCurrent < pPrimitivePos));
rt_kprintf("USB_malloc - No free memory!\n");
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
return NULL;
}
exit_USB_malloc:
rt_hw_interrupt_enable(level);
return pvBuf;
#endif
}
void USB_free(void *alloc_addr)
{
#if 0
rt_free_align((void *)((uint32_t)alloc_addr & ~NON_CACHE_MASK));
#else
USB_MHDR_T *pMblk;
UINT32 addr = (UINT32)alloc_addr;
INT i, count;
int disable_ohci_irq, disable_ehci_irq;
if (IS_OHCI_IRQ_ENABLED())
disable_ohci_irq = 1;
else
disable_ohci_irq = 0;
if (IS_EHCI_IRQ_ENABLED())
disable_ehci_irq = 1;
else
disable_ehci_irq = 0;
uint32_t addr = (uint32_t)alloc_addr;
int i, count;
rt_base_t level;
//rt_kprintf("USB_free: 0x%x\n", (int)alloc_addr);
level = rt_hw_interrupt_disable();
if ((addr < _MemoryPoolBase) || (addr >= _MemoryPoolEnd))
{
if (addr)
{
rt_kprintf("[%s]Wrong!!\n", __func__);
//free(alloc_addr);
}
return;
goto Exit_USB_free;
}
if (disable_ohci_irq)
DISABLE_OHCI_IRQ();
if (disable_ehci_irq)
DISABLE_EHCI_IRQ();
//rt_kprintf("USB_free:%x\n", (INT)addr+USB_MEM_BLOCK_SIZE);
//rt_kprintf("USB_free:%x\n", (int32_t)addr+USB_MEM_BLOCK_SIZE);
/* get the leading block address */
if (addr % USB_MEM_BLOCK_SIZE == 0)
@@ -271,32 +239,20 @@ void USB_free(void *alloc_addr)
if (addr % USB_MEM_BLOCK_SIZE != 0)
{
rt_kprintf("USB_free fatal error on address: %x!!\n", (UINT32)alloc_addr);
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
return;
rt_kprintf("USB_free fatal error on address: %x!!\n", (uint32_t)alloc_addr);
goto Exit_USB_free;
}
pMblk = (USB_MHDR_T *)addr;
if (pMblk->flag == 0)
{
rt_kprintf("USB_free(), warning - try to free a free block: %x\n", (UINT32)alloc_addr);
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
return;
rt_kprintf("USB_free(), warning - try to free a free block: %x\n", (uint32_t)alloc_addr);
goto Exit_USB_free;
}
if (pMblk->magic != USB_MEM_ALLOC_MAGIC)
{
rt_kprintf("USB_free(), warning - try to free an unknow block at address:%x.\n", addr);
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
return;
goto Exit_USB_free;
}
//_pCurrent = pMblk;
@@ -307,15 +263,17 @@ void USB_free(void *alloc_addr)
for (i = 0; i < count; i++)
{
pMblk->flag = 0; /* release block */
pMblk = (USB_MHDR_T *)((UINT32)pMblk + USB_MEM_BLOCK_SIZE);
pMblk = (USB_MHDR_T *)((uint32_t)pMblk + USB_MEM_BLOCK_SIZE);
}
_FreeMemorySize += count * USB_MEM_BLOCK_SIZE;
_AllocatedMemorySize -= count * USB_MEM_BLOCK_SIZE;
if (disable_ohci_irq)
ENABLE_OHCI_IRQ();
if (disable_ehci_irq)
ENABLE_EHCI_IRQ();
Exit_USB_free:
rt_hw_interrupt_enable(level);
#endif
return;
}

4
bsp/nuvoton/libraries/n9h30/UsbHostLib/src/usb_core.c
View File

@@ -67,7 +67,7 @@ void usbh_core_init()
#ifdef ENABLE_OHCI
//sysInstallISR(IRQ_LEVEL_1, IRQ_OHCI, (PVOID)OHCI_IRQHandler);
rt_hw_interrupt_install(IRQ_OHCI, nu_ohci_isr, NULL, "ohci");
rt_hw_interrupt_set_priority(IRQ_OHCI, IRQ_LEVEL_1);
//rt_hw_interrupt_set_priority(IRQ_OHCI, IRQ_LEVEL_1);
ohci_driver.init();
ENABLE_OHCI_IRQ();
@@ -76,7 +76,7 @@ void usbh_core_init()
#ifdef ENABLE_EHCI
//sysInstallISR(IRQ_LEVEL_1, IRQ_EHCI, (PVOID)EHCI_IRQHandler);
rt_hw_interrupt_install(IRQ_EHCI, nu_ehci_isr, NULL, "ehci");
rt_hw_interrupt_set_priority(IRQ_EHCI, IRQ_LEVEL_1);
//rt_hw_interrupt_set_priority(IRQ_EHCI, IRQ_LEVEL_1);
ehci_driver.init();
ENABLE_EHCI_IRQ();

8
bsp/nuvoton/libraries/n9h30/rtt_port/Kconfig
View File

@@ -275,11 +275,15 @@ config SOC_SERIES_N9H30
select RT_USING_DFS
if BSP_USING_SDH
config BSP_USING_EMMC
bool "Enable FMI_EMMC"
config BSP_USING_SDH0
bool "Enable SDH0"
bool "Enable SDH_PORT0"
config BSP_USING_SDH1
bool "Enable SDH1"
bool "Enable SDH_PORT1"
config NU_SDH_HOTPLUG
bool "Using HOTPLUG"

2
bsp/nuvoton/libraries/n9h30/rtt_port/drv_ge2d.c
View File

@@ -12,7 +12,7 @@
#include <drv_sys.h>
//#define DEBUG
//#define DEF_COND_WAIT 1
#define DEF_COND_WAIT 1
static unsigned int GFX_BPP;
static unsigned int GFX_WIDTH;

10
bsp/nuvoton/libraries/n9h30/rtt_port/drv_i2s.c
View File

@@ -244,6 +244,11 @@ static rt_err_t nu_i2s_dai_setup(nu_i2s_t psNuI2s, struct rt_audio_configure *pc
i2sIoctl(I2S_SET_I2S_FORMAT, I2S_FORMAT_I2S, 0);
if (psNuI2s->AcodecOps->role == NU_ACODEC_ROLE_MASTER)
{
// Set as slave, source clock is XIN (12MHz)
i2sIoctl(I2S_SET_MODE, I2S_MODE_SLAVE, 0);
}
else
{
if (pconfig->samplerate % 11025)
{
@@ -284,11 +289,6 @@ static rt_err_t nu_i2s_dai_setup(nu_i2s_t psNuI2s, struct rt_audio_configure *pc
// Set as master
i2sIoctl(I2S_SET_MODE, I2S_MODE_MASTER, 0);
}
else
{
// Set as slave, source clock is XIN (12MHz)
i2sIoctl(I2S_SET_MODE, I2S_MODE_SLAVE, 0);
}
LOG_I("Open I2S.");

253
bsp/nuvoton/libraries/n9h30/rtt_port/drv_sdh.c
View File

@@ -28,8 +28,12 @@
#if defined(NU_SDH_MOUNT_ON_ROOT)
#if !defined(NU_SDH_MOUNTPOINT_EMMC)
#define NU_SDH_MOUNTPOINT_EMMC "/"
#endif
#if !defined(NU_SDH_MOUNTPOINT_SDH0)
#define NU_SDH_MOUNTPOINT_SDH0 "/"
#define NU_SDH_MOUNTPOINT_SDH0 NU_SDH_MOUNTPOINT_SDH0"/sd0"
#endif
#if !defined(NU_SDH_MOUNTPOINT_SDH1)
@@ -44,6 +48,10 @@
#endif
#if !defined(NU_SDH_MOUNTPOINT_EMMC)
#define NU_SDH_MOUNTPOINT_EMMC NU_SDH_MOUNTPOINT_ROOT"/emmc"
#endif
#if !defined(NU_SDH_MOUNTPOINT_SDH0)
#define NU_SDH_MOUNTPOINT_SDH0 NU_SDH_MOUNTPOINT_ROOT"/sd0"
#endif
@@ -52,9 +60,16 @@
#define NU_SDH_MOUNTPOINT_SDH1 NU_SDH_MOUNTPOINT_ROOT"/sd1"
#endif
#if defined(BSP_USING_SDH0) && defined(BSP_USING_SDH1)
#define NU_SDH_SHARED 1
#endif
enum
{
SDH_START = -1,
#if defined(BSP_USING_EMMC)
EMMC_IDX,
#endif
#if defined(BSP_USING_SDH0)
SDH0_IDX,
#endif
@@ -71,12 +86,13 @@ enum
#endif
#if defined(NU_SDH_HOTPLUG)
enum
typedef enum
{
NU_SDH_CARD_DETECTED_SD0 = (1 << 0),
NU_SDH_CARD_DETECTED_SD1 = (1 << 1),
NU_SDH_CARD_EVENT_ALL = (NU_SDH_CARD_DETECTED_SD0 | NU_SDH_CARD_DETECTED_SD1)
};
NU_SDH_CARD_DETECTED_EMMC = (1 << 0),
NU_SDH_CARD_DETECTED_SD0 = (1 << 1),
NU_SDH_CARD_DETECTED_SD1 = (1 << 2),
NU_SDH_CARD_EVENT_ALL = (NU_SDH_CARD_DETECTED_EMMC | NU_SDH_CARD_DETECTED_SD0 | NU_SDH_CARD_DETECTED_SD1)
} E_CARD_EVENT;
#endif
/* Private typedef --------------------------------------------------------------*/
@@ -92,6 +108,11 @@ struct nu_sdh
E_SYS_IPRST rstidx;
E_SYS_IPCLK clkidx;
#if defined(NU_SDH_HOTPLUG)
E_CARD_EVENT card_detected_event;
#endif
uint32_t card_num;
uint32_t is_card_inserted;
SDH_INFO_T *info;
struct rt_semaphore lock;
@@ -123,32 +144,75 @@ static int rt_hw_sdh_init(void);
/* Private variables ------------------------------------------------------------*/
#if defined(BSP_USING_EMMC)
static SDH_INFO_T EMMC;
#endif
#if defined(BSP_USING_SDH0)
static SDH_INFO_T SD0;
#endif
#if defined(BSP_USING_SDH1)
static SDH_INFO_T SD1;
#endif
#if defined(NU_SDH_SHARED)
static struct rt_mutex g_shared_lock;
#endif
static struct nu_sdh nu_sdh_arr [] =
{
#if defined(BSP_USING_EMMC)
{
.name = "emmc",
#if defined(NU_SDH_HOTPLUG)
.mounted_point = NU_SDH_MOUNTPOINT_EMMC,
#endif
.irqn = IRQ_FMI,
.base = SDH0,
.card_num = SD_PORT0,
.rstidx = FMIRST,
.clkidx = EMMCCKEN,
.info = &EMMC,
.card_detected_event = NU_SDH_CARD_DETECTED_EMMC,
},
#endif
#if defined(BSP_USING_SDH0)
{
.name = "sdh0",
#if defined(NU_SDH_HOTPLUG)
.mounted_point = NU_SDH_MOUNTPOINT_SDH0,
#endif
.irqn = IRQ_FMI,
.base = SDH0,
.rstidx = FMIRST,
.clkidx = EMMCCKEN,
.irqn = IRQ_SDH,
.base = SDH1,
.card_num = SD_PORT0,
.rstidx = SDIORST,
.clkidx = SDHCKEN,
.info = &SD0,
.card_detected_event = NU_SDH_CARD_DETECTED_SD0,
},
#endif
#if defined(BSP_USING_SDH1)
{
.name = "sdh1",
#if defined(NU_SDH_HOTPLUG)
.mounted_point = NU_SDH_MOUNTPOINT_SDH1,
#endif
.irqn = IRQ_SDH,
.base = SDH1,
.card_num = SD_PORT1,
#if defined(NU_SDH_SHARED)
.irqn = (IRQn_Type)0,
.rstidx = SYS_IPRST_NA,
.clkidx = SYS_IPCLK_NA,
#else
.irqn = IRQ_SDH,
.rstidx = SDIORST,
.clkidx = SDHCKEN,
#endif
.info = &SD1,
.card_detected_event = NU_SDH_CARD_DETECTED_SD1,
},
#endif
}; /* struct nu_sdh nu_sdh_arr [] */
@@ -161,6 +225,11 @@ static void SDH_IRQHandler(int vector, void *param)
unsigned int volatile isr;
SDH_INFO_T *pSD = sdh->info;
#if defined(BSP_USING_SDH1)
if (SDH_WhichCardIsSelected(sdh_base) == SD_PORT1)
pSD = &SD1;
#endif
// FMI data abort interrupt
if (sdh_base->GINTSTS & SDH_GINTSTS_DTAIF_Msk)
{
@@ -177,17 +246,22 @@ static void SDH_IRQHandler(int vector, void *param)
SDH_CLR_INT_FLAG(sdh_base, SDH_INTSTS_BLKDIF_Msk);
}
if (isr & SDH_INTSTS_CDIF_Msk) // card detect
if (isr & SDH_INTSTS_CDIF_Msk) // card number=0 detect
{
#if defined(NU_SDH_HOTPLUG)
if (sdh->base == SDH0)
rt_event_send(&sdh_event, NU_SDH_CARD_DETECTED_SD0);
else if (sdh->base == SDH1)
rt_event_send(&sdh_event, NU_SDH_CARD_DETECTED_SD1);
rt_event_send(&sdh_event, sdh->card_detected_event);
#endif
/* Clear CDIF interrupt flag */
SDH_CLR_INT_FLAG(sdh_base, SDH_INTSTS_CDIF_Msk);
}
else if (isr & SDH_INTSTS_CDIF1_Msk) // card number=1 detect
{
#if defined(NU_SDH_HOTPLUG)
rt_event_send(&sdh_event, NU_SDH_CARD_DETECTED_SD1);
#endif
/* Clear CDIF1 interrupt flag */
SDH_CLR_INT_FLAG(sdh_base, SDH_INTSTS_CDIF1_Msk);
}
// CRC error interrupt
if (isr & SDH_INTSTS_CRCIF_Msk)
@@ -231,10 +305,36 @@ static rt_err_t nu_sdh_init(rt_device_t dev)
static rt_err_t nu_sdh_open(rt_device_t dev, rt_uint16_t oflag)
{
nu_sdh_t sdh = (nu_sdh_t)dev;
rt_err_t result = RT_EOK;
RT_ASSERT(dev != RT_NULL);
return (SDH_Probe(sdh->base) == 0) ? RT_EOK : -(RT_ERROR);
#if defined(NU_SDH_SHARED)
if (sdh->base == SDH1)
{
result = rt_mutex_take(&g_shared_lock, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
}
SDH_CardSelect(sdh->base, sdh->info, sdh->card_num);
#endif
if (SDH_Probe(sdh->base, sdh->info, sdh->card_num) == 0)
{
result = RT_EOK;
}
else
{
result = -RT_ERROR;
}
#if defined(NU_SDH_SHARED)
if (sdh->base == SDH1)
{
rt_mutex_release(&g_shared_lock);
}
#endif
return result;
}
static rt_err_t nu_sdh_close(rt_device_t dev)
@@ -251,6 +351,15 @@ static rt_size_t nu_sdh_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_siz
RT_ASSERT(dev != RT_NULL);
RT_ASSERT(buffer != RT_NULL);
#if defined(NU_SDH_SHARED)
if (sdh->base == SDH1)
{
result = rt_mutex_take(&g_shared_lock, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
}
SDH_CardSelect(sdh->base, sdh->info, sdh->card_num);
#endif
result = rt_sem_take(&sdh->lock, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
@@ -268,7 +377,7 @@ static rt_size_t nu_sdh_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_siz
for (i = 0; i < blk_nb; i++)
{
/* Read to temp buffer from specified sector. */
ret = SDH_Read(sdh->base, (uint8_t *)((uint32_t)&sdh->pbuf[0] | NONCACHEABLE), pos, 1);
ret = SDH_Read(sdh->base, sdh->info, (uint8_t *)((uint32_t)&sdh->pbuf[0] | NONCACHEABLE), pos, 1);
if (ret != Successful)
goto exit_nu_sdh_read;
@@ -286,7 +395,7 @@ static rt_size_t nu_sdh_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_siz
#endif
/* Read to user's buffer from specified sector. */
ret = SDH_Read(sdh->base, (uint8_t *)((uint32_t)buffer | NONCACHEABLE), pos, blk_nb);
ret = SDH_Read(sdh->base, sdh->info, (uint8_t *)((uint32_t)buffer | NONCACHEABLE), pos, blk_nb);
}
exit_nu_sdh_read:
@@ -300,6 +409,13 @@ exit_nu_sdh_read:
result = rt_sem_release(&sdh->lock);
RT_ASSERT(result == RT_EOK);
#if defined(NU_SDH_SHARED)
if (sdh->base == SDH1)
{
rt_mutex_release(&g_shared_lock);
}
#endif
if (ret == Successful)
return blk_nb;
@@ -317,6 +433,15 @@ static rt_size_t nu_sdh_write(rt_device_t dev, rt_off_t pos, const void *buffer,
RT_ASSERT(dev != RT_NULL);
RT_ASSERT(buffer != RT_NULL);
#if defined(NU_SDH_SHARED)
if (sdh->base == SDH1)
{
result = rt_mutex_take(&g_shared_lock, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
}
SDH_CardSelect(sdh->base, sdh->info, sdh->card_num);
#endif
result = rt_sem_take(&sdh->lock, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
@@ -339,7 +464,7 @@ static rt_size_t nu_sdh_write(rt_device_t dev, rt_off_t pos, const void *buffer,
memcpy((void *)&sdh->pbuf[0], copy_buffer, SDH_BLOCK_SIZE);
ret = SDH_Write(sdh->base, (uint8_t *)((uint32_t)&sdh->pbuf[0] | NONCACHEABLE), pos, 1);
ret = SDH_Write(sdh->base, sdh->info, (uint8_t *)((uint32_t)&sdh->pbuf[0] | NONCACHEABLE), pos, 1);
if (ret != Successful)
goto exit_nu_sdh_write;
@@ -354,7 +479,7 @@ static rt_size_t nu_sdh_write(rt_device_t dev, rt_off_t pos, const void *buffer,
#endif
/* Write to device directly. */
ret = SDH_Write(sdh->base, (uint8_t *)((uint32_t)buffer | NONCACHEABLE), pos, blk_nb);
ret = SDH_Write(sdh->base, sdh->info, (uint8_t *)((uint32_t)buffer | NONCACHEABLE), pos, blk_nb);
}
exit_nu_sdh_write:
@@ -368,6 +493,13 @@ exit_nu_sdh_write:
result = rt_sem_release(&sdh->lock);
RT_ASSERT(result == RT_EOK);
#if defined(NU_SDH_SHARED)
if (sdh->base == SDH1)
{
rt_mutex_release(&g_shared_lock);
}
#endif
if (ret == Successful) return blk_nb;
rt_kprintf("write failed: %d, buffer 0x%08x\n", ret, buffer);
@@ -408,6 +540,16 @@ static int rt_hw_sdh_init(void)
ret = rt_event_init(&sdh_event, "sdh_event", RT_IPC_FLAG_FIFO);
RT_ASSERT(ret == RT_EOK);
#if defined(NU_SDH_SHARED)
ret = rt_mutex_init(&g_shared_lock, "sdh_share_lock", RT_IPC_FLAG_PRIO);
RT_ASSERT(ret == RT_EOK);
#endif
#if defined(BSP_USING_EMMC)
nu_sys_ipclk_enable(FMICKEN);
nu_sys_ipclk_enable(NANDCKEN);
#endif
for (i = (SDH_START + 1); i < SDH_CNT; i++)
{
/* Register sdcard device */
@@ -425,12 +567,21 @@ static int rt_hw_sdh_init(void)
ret = rt_sem_init(&nu_sdh_arr[i].lock, "sdhlock", 1, RT_IPC_FLAG_FIFO);
RT_ASSERT(ret == RT_EOK);
rt_hw_interrupt_install(nu_sdh_arr[i].irqn, SDH_IRQHandler, (void *)&nu_sdh_arr[i], nu_sdh_arr[i].name);
rt_hw_interrupt_umask(nu_sdh_arr[i].irqn);
if (nu_sdh_arr[i].irqn != 0)
{
rt_hw_interrupt_install(nu_sdh_arr[i].irqn, SDH_IRQHandler, (void *)&nu_sdh_arr[i], nu_sdh_arr[i].name);
rt_hw_interrupt_umask(nu_sdh_arr[i].irqn);
}
nu_sys_ipclk_enable(nu_sdh_arr[i].clkidx);
if (nu_sdh_arr[i].clkidx != SYS_IPCLK_NA)
{
nu_sys_ipclk_enable(nu_sdh_arr[i].clkidx);
}
nu_sys_ip_reset(nu_sdh_arr[i].rstidx);
if (nu_sdh_arr[i].rstidx != SYS_IPRST_NA)
{
nu_sys_ip_reset(nu_sdh_arr[i].rstidx);
}
nu_sdh_arr[i].pbuf = RT_NULL;
@@ -559,8 +710,10 @@ exit_nu_sdh_hotplug_unmount:
static void nu_card_detector(nu_sdh_t sdh)
{
SDH_T *sdh_base = sdh->base;
uint32_t u32INTSTS_CDSTS_Msk = (sdh->card_num == SD_PORT0) ? SDH_INTSTS_CDSTS_Msk : SDH_INTSTS_CDSTS1_Msk;
unsigned int volatile isr = sdh_base->INTSTS;
if (isr & SDH_INTSTS_CDSTS_Msk)
if (isr & u32INTSTS_CDSTS_Msk)
{
/* Card removed */
sdh->info->IsCardInsert = FALSE; // SDISR_CD_Card = 1 means card remove for GPIO mode
@@ -569,12 +722,27 @@ static void nu_card_detector(nu_sdh_t sdh)
}
else
{
SDH_Open(sdh_base, CardDetect_From_GPIO);
if (!SDH_Probe(sdh_base))
#if defined(NU_SDH_SHARED)
if (sdh_base == SDH1)
{
rt_err_t result = rt_mutex_take(&g_shared_lock, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
}
SDH_CardSelect(sdh->base, sdh->info, sdh->card_num);
#endif
SDH_Open(sdh_base, sdh->info, CardDetect_From_GPIO | sdh->card_num);
if (!SDH_Probe(sdh_base, sdh->info, sdh->card_num))
{
/* Card inserted */
nu_sdh_hotplug_mount(sdh);
}
#if defined(NU_SDH_SHARED)
if (sdh_base == SDH1)
{
rt_mutex_release(&g_shared_lock);
}
#endif
}
}
@@ -585,13 +753,29 @@ static void sdh_hotplugger(void *param)
for (i = (SDH_START + 1); i < SDH_CNT; i++)
{
#if defined(NU_SDH_SHARED)
if (nu_sdh_arr[i].base == SDH1)
{
rt_err_t result = rt_mutex_take(&g_shared_lock, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
}
SDH_CardSelect(nu_sdh_arr[i].base, nu_sdh_arr[i].info, nu_sdh_arr[i].card_num);
#endif
/* Try to detect SD card on selected port. */
SDH_Open(nu_sdh_arr[i].base, CardDetect_From_GPIO);
if (!SDH_Probe(nu_sdh_arr[i].base) &&
SDH_IS_CARD_PRESENT(nu_sdh_arr[i].base))
SDH_Open(nu_sdh_arr[i].base, nu_sdh_arr[i].info, CardDetect_From_GPIO | nu_sdh_arr[i].card_num);
if (!SDH_Probe(nu_sdh_arr[i].base, nu_sdh_arr[i].info, nu_sdh_arr[i].card_num) &&
nu_sdh_arr[i].info->IsCardInsert)
{
nu_sdh_hotplug_mount(&nu_sdh_arr[i]);
}
#if defined(NU_SDH_SHARED)
if (nu_sdh_arr[i].base == SDH1)
{
rt_mutex_release(&g_shared_lock);
}
#endif
}
while (1)
@@ -601,9 +785,14 @@ static void sdh_hotplugger(void *param)
RT_WAITING_FOREVER, &e) == RT_EOK)
{
/* Debounce */
rt_thread_mdelay(200);
rt_thread_mdelay(500);
switch (e)
{
#if defined(BSP_USING_EMMC)
case NU_SDH_CARD_DETECTED_EMMC:
nu_card_detector(&nu_sdh_arr[EMMC_IDX]);
break;
#endif
#if defined(BSP_USING_SDH0)
case NU_SDH_CARD_DETECTED_SD0:
nu_card_detector(&nu_sdh_arr[SDH0_IDX]);

20
bsp/nuvoton/libraries/n9h30/rtt_port/drv_sys.c
View File

@@ -48,19 +48,23 @@ void rt_interrupt_dispatch(rt_uint32_t fiq_irq)
/* Get irq number */
_mIPER = (inpw(REG_AIC_IPER) >> 2) & 0x3f;
_mISNR = inpw(REG_AIC_ISNR) & 0x3f;
if ((_mIPER != _mISNR) || _mISNR == 0)
return;
/* Get interrupt service routine */
isr_func = irq_desc[_mISNR].handler;
param = irq_desc[_mISNR].param;
if (_mISNR != 0)
{
if (_mIPER == _mISNR)
{
/* Get interrupt service routine */
isr_func = irq_desc[_mISNR].handler;
param = irq_desc[_mISNR].param;
#ifdef RT_USING_INTERRUPT_INFO
irq_desc[_mISNR].counter ++;
irq_desc[_mISNR].counter ++;
#endif
/* Turn to interrupt service routine */
isr_func(_mISNR, param);
/* Turn to interrupt service routine */
isr_func(_mISNR, param);
}
}
/* Handled the ISR. */
outpw(REG_AIC_EOSCR, 1);

123
bsp/nuvoton/libraries/n9h30/rtt_port/drv_usbhost.c
View File

@@ -30,6 +30,21 @@
#define NU_MAX_USBH_HUB_PORT_DEV USB_HUB_PORT_NUM
#define NU_USBHOST_MUTEX_INIT() { \
s_sUSBHDev.lock = rt_mutex_create("usbhost_lock", RT_IPC_FLAG_PRIO); \
RT_ASSERT(s_sUSBHDev.lock != RT_NULL); \
}
#define NU_USBHOST_LOCK() { \
rt_err_t result = rt_mutex_take(s_sUSBHDev.lock, RT_WAITING_FOREVER); \
RT_ASSERT(result == RT_EOK); \
}
#define NU_USBHOST_UNLOCK() { \
rt_err_t result = rt_mutex_release(s_sUSBHDev.lock); \
RT_ASSERT(result == RT_EOK); \
}
/* Private typedef --------------------------------------------------------------*/
typedef struct nu_port_dev
{
@@ -59,6 +74,7 @@ struct nu_usbh_dev
E_SYS_IPRST rstidx;
E_SYS_IPCLK clkidx;
rt_thread_t polling_thread;
rt_mutex_t lock;
S_NU_RH_PORT_CTRL asPortCtrl[NU_MAX_USBH_PORT];
};
@@ -165,12 +181,16 @@ static EP_INFO_T *GetFreePipe(
if (i < NU_MAX_USBH_PIPE)
{
EP_INFO_T *psEPInfo = rt_malloc(sizeof(EP_INFO_T));
EP_INFO_T *psEPInfo = (EP_INFO_T *)rt_malloc_align(sizeof(EP_INFO_T), CACHE_LINE_SIZE);
if (psEPInfo != RT_NULL)
{
#if defined(BSP_USING_MMU)
psPortDev->apsEPInfo[i] = (EP_INFO_T *)((uint32_t)psEPInfo | NON_CACHE_MASK);
#else
psPortDev->apsEPInfo[i] = psEPInfo;
#endif
*pu8PipeIndex = i;
return psEPInfo;
return psPortDev->apsEPInfo[i];
}
}
}
@@ -186,7 +206,11 @@ static void FreePipe(
(u8PipeIndex < NU_MAX_USBH_PIPE) &&
(psPortDev->apsEPInfo[u8PipeIndex] != RT_NULL))
{
rt_free(psPortDev->apsEPInfo[u8PipeIndex]);
EP_INFO_T *psEPInfo = psPortDev->apsEPInfo[u8PipeIndex];
#if defined(BSP_USING_MMU)
psEPInfo = (EP_INFO_T *)((uint32_t)psEPInfo & ~NON_CACHE_MASK);
#endif
rt_free_align(psEPInfo);
psPortDev->apsEPInfo[u8PipeIndex] = RT_NULL;
}
}
@@ -298,8 +322,9 @@ static rt_err_t nu_open_pipe(upipe_t pipe)
#if defined(BSP_USING_MMU)
if (!psPortDev->asPipePktBuf[pipe->pipe_index])
{
psPortDev->asPipePktBuf[pipe->pipe_index] = rt_malloc_align(512ul, CACHE_LINE_SIZE);
RT_ASSERT(psPortDev->asPipePktBuf[pipe->pipe_index] != RT_NULL);
void *paddr = rt_malloc_align(512ul, CACHE_LINE_SIZE);
RT_ASSERT(paddr != RT_NULL);
psPortDev->asPipePktBuf[pipe->pipe_index] = (void *)((uint32_t)paddr | NON_CACHE_MASK);
}
#endif
@@ -350,7 +375,9 @@ static rt_err_t nu_close_pipe(upipe_t pipe)
#if defined(BSP_USING_MMU)
if (psPortDev->asPipePktBuf[pipe->pipe_index])
{
rt_free_align(psPortDev->asPipePktBuf[pipe->pipe_index]);
void *paddr = psPortDev->asPipePktBuf[pipe->pipe_index];
paddr = (void *)((uint32_t)paddr & ~NON_CACHE_MASK);
rt_free_align(paddr);
psPortDev->asPipePktBuf[pipe->pipe_index] = RT_NULL;
}
#endif
@@ -398,16 +425,42 @@ static int nu_bulk_xfer(
UTR_T *psUTR,
int timeouts)
{
int ret;
ret = usbh_bulk_xfer(psUTR);
#define TIMEOUT_RETRY 3
int retry = TIMEOUT_RETRY;
int ret = usbh_bulk_xfer(psUTR);
if (ret < 0)
{
rt_kprintf("usbh_bulk_xfer %x\n", ret);
return ret;
}
//wait transfer done
rt_completion_wait(&(psPortDev->utr_completion), timeouts);
return 0;
while ( retry > 0 )
{
if ( rt_completion_wait(&(psPortDev->utr_completion), timeouts) != 0 )
{
rt_uint32_t level;
rt_kprintf("Request %d Timeout in %d ms!!\n", psUTR->data_len, timeouts);
rt_completion_init(&(psPortDev->utr_completion));
rt_thread_mdelay(1);
// Workaround: To fix timeout case, this way is traveling qh's linking-list again.
level = rt_hw_interrupt_disable();
extern void scan_asynchronous_list();
extern void iaad_remove_qh();
scan_asynchronous_list();
iaad_remove_qh();
rt_hw_interrupt_enable(level);
}
else
break;
retry--;
}
return (retry > 0) ? 0 : -1;
}
static int nu_int_xfer(
@@ -477,6 +530,8 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
void *buffer_nonch = buffer;
NU_USBHOST_LOCK();
psPortCtrl = GetRHPortControlFromPipe(pipe);
if (psPortCtrl == RT_NULL)
{
@@ -494,8 +549,10 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
if (buffer_nonch && nbytes)
{
buffer_nonch = psPortDev->asPipePktBuf[pipe->pipe_index];
rt_memcpy(buffer_nonch, buffer, nbytes);
mmu_clean_invalidated_dcache((uint32_t)buffer_nonch, nbytes);
if ((pipe->ep.bEndpointAddress & USB_DIR_MASK) == USB_DIR_OUT)
{
rt_memcpy(buffer_nonch, buffer, nbytes);
}
}
#endif
@@ -503,6 +560,7 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
if (pipe->ep.bmAttributes == USB_EP_ATTR_CONTROL)
{
int ret;
if (token == USBH_PID_SETUP)
{
struct urequest *psSetup = (struct urequest *)buffer_nonch;
@@ -517,7 +575,7 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
else
{
/* Write data to USB device. */
//Trigger USBHostLib Ctril_Xfer
//Trigger USBHostLib Ctrl_Xfer
ret = nu_ctrl_xfer(psPortDev, psSetup, NULL, timeouts);
if (ret != psSetup->wLength)
goto exit_nu_pipe_xfer;
@@ -571,7 +629,7 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
if (nu_bulk_xfer(psPortDev, psUTR, timeouts) < 0)
{
RT_DEBUG_LOG(RT_DEBUG_USB, ("nu_pipe_xfer ERROR: bulk transfer failed\n"));
goto exit_nu_pipe_xfer;
goto failreport_nu_pipe_xfer;
}
}
else if (pipe->ep.bmAttributes == USB_EP_ATTR_INT)
@@ -588,7 +646,7 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
{
i32XferLen = nbytes;
}
return i32XferLen;
goto exit2_nu_pipe_xfer;
}
else if (pipe->ep.bmAttributes == USB_EP_ATTR_ISOC)
{
@@ -599,6 +657,8 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
} //else
failreport_nu_pipe_xfer:
if (psUTR->bIsTransferDone == 0)
{
//Timeout
@@ -628,29 +688,28 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
//Call callback
if (pipe->callback != RT_NULL)
{
struct uhost_msg msg;
msg.type = USB_MSG_CALLBACK;
msg.content.cb.function = pipe->callback;
msg.content.cb.context = pipe->user_data;
rt_usbh_event_signal(&msg);
pipe->callback(pipe);
}
if (pipe->status != UPIPE_STATUS_OK)
goto exit_nu_pipe_xfer;
exit_nu_pipe_xfer:
if (psUTR)
free_utr(psUTR);
exit2_nu_pipe_xfer:
#if defined(BSP_USING_MMU)
if ((nbytes) &&
(buffer_nonch != buffer))
{
mmu_invalidate_dcache((uint32_t)buffer_nonch, nbytes);
rt_memcpy(buffer, buffer_nonch, nbytes);
if ((pipe->ep.bEndpointAddress & USB_DIR_MASK) == USB_DIR_IN)
{
rt_memcpy(buffer, buffer_nonch, nbytes);
}
}
#endif
if (psUTR)
free_utr(psUTR);
NU_USBHOST_UNLOCK();
return i32XferLen;
}
@@ -660,7 +719,10 @@ static void nu_usbh_rh_thread_entry(void *parameter)
{
while (1)
{
NU_USBHOST_LOCK();
usbh_polling_root_hubs();
NU_USBHOST_UNLOCK();
rt_thread_mdelay(NU_USBHOST_HUB_POLLING_INTERVAL);
}
}
@@ -771,7 +833,6 @@ static rt_err_t nu_hcd_init(rt_device_t device)
//install connect/disconnect callback
usbh_install_conn_callback(nu_hcd_connect_callback, nu_hcd_disconnect_callback);
usbh_polling_root_hubs();
//create thread for polling usbh port status
/* create usb hub thread */
@@ -871,6 +932,8 @@ int nu_usbh_register(void)
psUHCD->ops = &nu_uhcd_ops;
psUHCD->num_ports = NU_MAX_USBH_PORT;
NU_USBHOST_MUTEX_INIT();
res = rt_device_register(&psUHCD->parent, "usbh", RT_DEVICE_FLAG_DEACTIVATE);
RT_ASSERT(res == RT_EOK);

59
bsp/nuvoton/libraries/nu_packages/AudioCodec/acodec_nau8822.c
View File

@@ -40,7 +40,7 @@ static rt_err_t nau8822_mixer_query(rt_uint32_t ui32Units, rt_uint32_t *ui32Valu
nu_acodec_ops nu_acodec_ops_nau8822 =
{
.name = "NAU8822",
.role = NU_ACODEC_ROLE_SLAVE,
.role = NU_ACODEC_ROLE_MASTER,
.config = { // Default settings.
.samplerate = 16000,
.channels = 2,
@@ -117,6 +117,20 @@ static int I2C_WriteNAU8822(uint8_t u8addr, uint16_t u16data)
return RT_EOK;
}
static void nau8822_phonejack_set(S_NU_NAU8822_CONFIG *psCodecConfig, int bEnable)
{
rt_pin_mode(psCodecConfig->pin_phonejack_en, PIN_MODE_OUTPUT);
if (bEnable)
{
rt_pin_write(psCodecConfig->pin_phonejack_en, PIN_LOW);
}
else
{
rt_pin_write(psCodecConfig->pin_phonejack_en, PIN_HIGH);
}
}
static rt_err_t nau8822_probe(void)
{
@@ -180,8 +194,6 @@ static rt_err_t nau8822_dsp_config(rt_uint32_t ui32SamplRate, rt_uint8_t u8ChNum
}
u16AudIf = (u16AudIf & 0x19F) | (u8WLEN << 5);
I2C_WriteNAU8822(4, u16AudIf);
if (ui32SamplRate % 11025)
{
I2C_WriteNAU8822(36, 0x008); //12.288Mhz
@@ -189,6 +201,10 @@ static rt_err_t nau8822_dsp_config(rt_uint32_t ui32SamplRate, rt_uint8_t u8ChNum
I2C_WriteNAU8822(38, 0x093);
I2C_WriteNAU8822(39, 0x0E9);
/* FIXME */
if (ui32SamplRate > 48000)
ui32SamplRate = 8000;
mClkDiv = (48000 * 256 * u8ChNum) / (ui32SamplRate * 256);
bClkDiv = (ui32SamplRate * 256) / (ui32SamplRate * u8ChNum * u8SamplBit);
}
@@ -199,6 +215,10 @@ static rt_err_t nau8822_dsp_config(rt_uint32_t ui32SamplRate, rt_uint8_t u8ChNum
I2C_WriteNAU8822(38, 0x161);
I2C_WriteNAU8822(39, 0x026);
/* FIXME */
if (ui32SamplRate > 44100)
ui32SamplRate = 11025;
mClkDiv = (44100 * 256 * u8ChNum) / (ui32SamplRate * 256);
bClkDiv = (ui32SamplRate * 256) / (ui32SamplRate * u8ChNum * u8SamplBit);
}
@@ -258,11 +278,16 @@ static rt_err_t nau8822_dsp_config(rt_uint32_t ui32SamplRate, rt_uint8_t u8ChNum
return -RT_ERROR;
}
u16ClkCtrl = (1 << 8) | (1 << 0); //Use internal PLL, FS/BCLK
if (nu_acodec_ops_nau8822.role == NU_ACODEC_ROLE_MASTER)
{
u16ClkCtrl = (1 << 8) | (1 << 0); //Use internal PLL, FS/BCLK
}
u16ClkCtrl = (u16ClkCtrl & 0x11F) | (mClkDiv << 5);
u16ClkCtrl = (u16ClkCtrl & 0x1E3) | (bClkDiv << 2);
I2C_WriteNAU8822(4, u16AudIf);
I2C_WriteNAU8822(6, u16ClkCtrl);
return RT_EOK;
@@ -271,28 +296,36 @@ static rt_err_t nau8822_dsp_config(rt_uint32_t ui32SamplRate, rt_uint8_t u8ChNum
static rt_err_t nau8822_init(void)
{
//input source is MIC
I2C_WriteNAU8822(1, 0x03F);
if (nu_acodec_ops_nau8822.role == NU_ACODEC_ROLE_MASTER)
{
I2C_WriteNAU8822(1, 0x03F); /* PLLEN, MICBIASEN, ABIASEN, IOBUFEN, REFIMP(3kohm) */
}
else
{
I2C_WriteNAU8822(1, 0x01F); /* MICBIASEN, ABIASEN, IOBUFEN, REFIMP(3kohm) */
}
I2C_WriteNAU8822(2, 0x1BF); /* Enable L/R Headphone, ADC Mix/Boost, ADC */
I2C_WriteNAU8822(3, 0x07F); /* Enable L/R main mixer, DAC */
I2C_WriteNAU8822(4, 0x010); /* 16-bit word length, I2S format, Stereo */
I2C_WriteNAU8822(5, 0x000); /* Companding control and loop back mode (all disable) */
nau8822_delay_ms(30);
if (nu_acodec_ops_nau8822.role == NU_ACODEC_ROLE_SLAVE)
{
I2C_WriteNAU8822(6, 0x1AD); /* Divide by 6, 16K */
I2C_WriteNAU8822(7, 0x006); /* 16K for internal filter coefficients */
}
I2C_WriteNAU8822(6, 0x1AD); /* Divide by 6, 16K */
I2C_WriteNAU8822(7, 0x006); /* 16K for internal filter coefficients */
I2C_WriteNAU8822(10, 0x008); /* DAC soft mute is disabled, DAC oversampling rate is 128x */
I2C_WriteNAU8822(14, 0x108); /* ADC HP filter is disabled, ADC oversampling rate is 128x */
I2C_WriteNAU8822(15, 0x1EF); /* ADC left digital volume control */
I2C_WriteNAU8822(16, 0x1EF); /* ADC right digital volume control */
I2C_WriteNAU8822(44, 0x033); /* LMICN/LMICP is connected to PGA */
I2C_WriteNAU8822(49, 0x042);
I2C_WriteNAU8822(47, 0x100); /* Gain value */
I2C_WriteNAU8822(48, 0x100); /* Gain value */
I2C_WriteNAU8822(50, 0x001); /* Left DAC connected to LMIX */
I2C_WriteNAU8822(51, 0x001); /* Right DAC connected to RMIX */
I2C_WriteNAU8822(0x34, 0x13F);
I2C_WriteNAU8822(0x35, 0x13F);
nu_acodec_ops_nau8822.config.samplerate = 16000;
nu_acodec_ops_nau8822.config.channels = 2;
nu_acodec_ops_nau8822.config.samplebits = 16;
@@ -326,10 +359,12 @@ static rt_err_t nau8822_mixer_control(rt_uint32_t ui32Units, rt_uint32_t ui32Val
if (ui32Value)
{
I2C_WriteNAU8822(10, u16Data | (1 << 6));
nau8822_phonejack_set(g_psCodecConfig, 0);
}
else
{
I2C_WriteNAU8822(10, u16Data & ~(1 << 6));
nau8822_phonejack_set(g_psCodecConfig, 1);
}
}
break;

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