mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2026-03-27 09:32:28 +08:00
在系统启动时复位全部外部芯片,防止工作在不确定状态,同时修正GPIO的配置:只在一处配置FSMC的IO
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@447 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
@@ -113,8 +113,6 @@ int rt_application_init()
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{
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rt_thread_t init_thread;
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rt_hw_lcd_init();
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#if (RT_THREAD_PRIORITY_MAX == 32)
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init_thread = rt_thread_create("init",
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rt_init_thread_entry, RT_NULL,
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@@ -118,6 +118,74 @@ static void all_device_reset(void)
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GPIO_Init(GPIOA,&GPIO_InitStructure);
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GPIO_ResetBits(GPIOA,GPIO_Pin_3);
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/* FSMC GPIO configure */
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_GPIOF
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| RCC_APB2Periph_GPIOG, ENABLE);
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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/*
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FSMC_D0 ~ FSMC_D3
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PD14 FSMC_D0 PD15 FSMC_D1 PD0 FSMC_D2 PD1 FSMC_D3
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*/
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_14 | GPIO_Pin_15;
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GPIO_Init(GPIOD,&GPIO_InitStructure);
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/*
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FSMC_D4 ~ FSMC_D12
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PE7 ~ PE15 FSMC_D4 ~ FSMC_D12
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*/
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10
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| GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
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GPIO_Init(GPIOE,&GPIO_InitStructure);
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/* FSMC_D13 ~ FSMC_D15 PD8 ~ PD10 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10;
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GPIO_Init(GPIOD,&GPIO_InitStructure);
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/*
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FSMC_A0 ~ FSMC_A5 FSMC_A6 ~ FSMC_A9
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PF0 ~ PF5 PF12 ~ PF15
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*/
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3
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| GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
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GPIO_Init(GPIOF,&GPIO_InitStructure);
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/* FSMC_A10 ~ FSMC_A15 PG0 ~ PG5 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5;
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GPIO_Init(GPIOG,&GPIO_InitStructure);
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/* FSMC_A16 ~ FSMC_A18 PD11 ~ PD13 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13;
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GPIO_Init(GPIOD,&GPIO_InitStructure);
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/* RD-PD4 WR-PD5 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5;
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GPIO_Init(GPIOD,&GPIO_InitStructure);
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/* NBL0-PE0 NBL1-PE1 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;
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GPIO_Init(GPIOE,&GPIO_InitStructure);
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/* NE1/NCE2 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;
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GPIO_Init(GPIOD,&GPIO_InitStructure);
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/* NE2 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
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GPIO_Init(GPIOG,&GPIO_InitStructure);
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/* NE3 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
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GPIO_Init(GPIOG,&GPIO_InitStructure);
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/* NE4 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
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GPIO_Init(GPIOG,&GPIO_InitStructure);
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}
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/* FSMC GPIO configure */
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GPIO_SetBits(GPIOE,GPIO_Pin_5); /* DM9000A */
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GPIO_SetBits(GPIOF,GPIO_Pin_10); /* LCD */
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GPIO_SetBits(GPIOA,GPIO_Pin_3); /* SPI_FLASH */
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@@ -129,7 +197,7 @@ static void all_device_reset(void)
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extern void FSMC_SRAM_Init(void);
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void rt_hw_board_init()
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{
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NAND_IDTypeDef NAND_ID;
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//NAND_IDTypeDef NAND_ID;
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/* Configure the system clocks */
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SystemInit();
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@@ -147,11 +215,11 @@ void rt_hw_board_init()
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rt_kprintf("\r\n\r\nSystemInit......\r\n");
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/* FSMC Initialization */
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FSMC_NAND_Init();
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//FSMC_NAND_Init();
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/* NAND read ID command */
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FSMC_NAND_ReadID(&NAND_ID);
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rt_kprintf("Read the NAND ID:%02X%02X%02X%02X",NAND_ID.Maker_ID,NAND_ID.Device_ID,NAND_ID.Third_ID,NAND_ID.Fourth_ID);
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//FSMC_NAND_ReadID(&NAND_ID);
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//rt_kprintf("Read the NAND ID:%02X%02X%02X%02X",NAND_ID.Maker_ID,NAND_ID.Device_ID,NAND_ID.Third_ID,NAND_ID.Fourth_ID);
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/* SRAM init */
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
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@@ -214,7 +282,7 @@ void rt_hw_board_init()
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SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
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SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
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SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
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SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_64;/* 72M/64=1.125M */
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SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8;/* 72M/64=1.125M */
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SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
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SPI_InitStructure.SPI_CRCPolynomial = 7;
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@@ -3,61 +3,61 @@
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#define FSMC_GPIO_CONFIG
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static void delay_ms(unsigned int dt)
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{
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volatile unsigned int u;
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for (u=0;u<dt*30;u++);
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}
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//static void delay_ms(unsigned int dt)
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//{
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// volatile unsigned int u;
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// for (u=0;u<dt*30;u++);
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//}
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static void FSMC_Init(void)
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{
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FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
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FSMC_NORSRAMTimingInitTypeDef p;
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#ifdef FSMC_GPIO_CONFIG
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GPIO_InitTypeDef GPIO_InitStructure;
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOG | RCC_APB2Periph_GPIOE |
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RCC_APB2Periph_GPIOF, ENABLE);
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/*-- GPIO Configuration ------------------------------------------------------*/
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/* SRAM Data lines configuration */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 |
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GPIO_Pin_10 | GPIO_Pin_14 | GPIO_Pin_15;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_10MHz;
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GPIO_Init(GPIOD, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 |
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GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 |
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GPIO_Pin_15;
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GPIO_Init(GPIOE, &GPIO_InitStructure);
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/* SRAM Address lines configuration */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
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GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 |
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GPIO_Pin_14 | GPIO_Pin_15;
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GPIO_Init(GPIOF, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
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GPIO_Pin_4 | GPIO_Pin_5;
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GPIO_Init(GPIOG, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13;
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GPIO_Init(GPIOD, &GPIO_InitStructure);
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/* NOE and NWE configuration */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 |GPIO_Pin_5;
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GPIO_Init(GPIOD, &GPIO_InitStructure);
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/* NE2 configuration */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9 | GPIO_Pin_10;
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GPIO_Init(GPIOG, &GPIO_InitStructure);
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/* NBL0, NBL1 configuration */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;
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GPIO_Init(GPIOE, &GPIO_InitStructure);
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#endif
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//
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//#ifdef FSMC_GPIO_CONFIG
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// GPIO_InitTypeDef GPIO_InitStructure;
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//
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// RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOG | RCC_APB2Periph_GPIOE |
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// RCC_APB2Periph_GPIOF, ENABLE);
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//
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// /*-- GPIO Configuration ------------------------------------------------------*/
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// /* SRAM Data lines configuration */
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// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 |
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// GPIO_Pin_10 | GPIO_Pin_14 | GPIO_Pin_15;
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// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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// GPIO_Init(GPIOD, &GPIO_InitStructure);
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//
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// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 |
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// GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 |
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// GPIO_Pin_15;
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// GPIO_Init(GPIOE, &GPIO_InitStructure);
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//
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// /* SRAM Address lines configuration */
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// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
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// GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 |
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// GPIO_Pin_14 | GPIO_Pin_15;
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// GPIO_Init(GPIOF, &GPIO_InitStructure);
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//
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// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
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// GPIO_Pin_4 | GPIO_Pin_5;
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// GPIO_Init(GPIOG, &GPIO_InitStructure);
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//
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// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13;
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// GPIO_Init(GPIOD, &GPIO_InitStructure);
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//
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// /* NOE and NWE configuration */
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// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 |GPIO_Pin_5;
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// GPIO_Init(GPIOD, &GPIO_InitStructure);
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//
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// /* NE2 configuration */
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// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9 | GPIO_Pin_10;
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// GPIO_Init(GPIOG, &GPIO_InitStructure);
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//
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// /* NBL0, NBL1 configuration */
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// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;
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// GPIO_Init(GPIOE, &GPIO_InitStructure);
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//#endif
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/*-- FSMC Configuration ------------------------------------------------------*/
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p.FSMC_AddressSetupTime = 2; // safe value 2
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@@ -91,14 +91,14 @@ static void FSMC_Init(void)
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void ftm0371_port_init(void)
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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RCC_APB2PeriphClockCmd(LCD_RST_RCC, ENABLE);
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GPIO_InitStructure.GPIO_Pin = LCD_RST_PIN;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_10MHz;
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GPIO_Init(LCD_RST_PORT, &GPIO_InitStructure);
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LCD_RST_0; // reset the lcd
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// GPIO_InitTypeDef GPIO_InitStructure;
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//
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// RCC_APB2PeriphClockCmd(LCD_RST_RCC, ENABLE);
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// GPIO_InitStructure.GPIO_Pin = LCD_RST_PIN;
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// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
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// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_10MHz;
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// GPIO_Init(LCD_RST_PORT, &GPIO_InitStructure);
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// LCD_RST_0; // reset the lcd
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
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FSMC_Init();
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@@ -107,8 +107,8 @@ void ftm0371_port_init(void)
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//初始化函数
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void ftm0371_init(void)
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{
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LCD_RST_1;
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delay_ms(1000);
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// LCD_RST_1;
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// delay_ms(1000);
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//initializing funciton 1
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LCD_WR_REG(0xA1);
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File diff suppressed because it is too large
Load Diff
@@ -34,83 +34,41 @@
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*******************************************************************************/
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void FSMC_SRAM_Init(void)
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{
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FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
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FSMC_NORSRAMTimingInitTypeDef p;
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GPIO_InitTypeDef GPIO_InitStructure;
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FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
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FSMC_NORSRAMTimingInitTypeDef p;
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOG | RCC_APB2Periph_GPIOE |
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RCC_APB2Periph_GPIOF, ENABLE);
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/*-- FSMC Configuration ------------------------------------------------------*/
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p.FSMC_AddressSetupTime = 0;
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p.FSMC_AddressHoldTime = 0;
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p.FSMC_DataSetupTime = 2;
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p.FSMC_BusTurnAroundDuration = 0;
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p.FSMC_CLKDivision = 0;
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p.FSMC_DataLatency = 0;
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p.FSMC_AccessMode = FSMC_AccessMode_A;
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/*-- GPIO Configuration ------------------------------------------------------*/
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/* SRAM Data lines configuration */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 |
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GPIO_Pin_10 | GPIO_Pin_14 | GPIO_Pin_15;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_Init(GPIOD, &GPIO_InitStructure);
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FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;
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FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
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FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
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FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
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FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
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FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
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FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
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FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
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FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
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FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
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FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
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FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
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FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
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FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 |
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GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 |
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GPIO_Pin_15;
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GPIO_Init(GPIOE, &GPIO_InitStructure);
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FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
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/* SRAM Address lines configuration */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
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GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 |
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GPIO_Pin_14 | GPIO_Pin_15;
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GPIO_Init(GPIOF, &GPIO_InitStructure);
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FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM4;
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FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
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GPIO_Pin_4 | GPIO_Pin_5;
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GPIO_Init(GPIOG, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13;
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GPIO_Init(GPIOD, &GPIO_InitStructure);
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/* NOE and NWE configuration */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 |GPIO_Pin_5;
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GPIO_Init(GPIOD, &GPIO_InitStructure);
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/* NE3 NE4 configuration */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_12;
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GPIO_Init(GPIOG, &GPIO_InitStructure);
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/* NBL0, NBL1 configuration */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;
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GPIO_Init(GPIOE, &GPIO_InitStructure);
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/*-- FSMC Configuration ------------------------------------------------------*/
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p.FSMC_AddressSetupTime = 0;
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p.FSMC_AddressHoldTime = 0;
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p.FSMC_DataSetupTime = 2;
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p.FSMC_BusTurnAroundDuration = 0;
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p.FSMC_CLKDivision = 0;
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p.FSMC_DataLatency = 0;
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p.FSMC_AccessMode = FSMC_AccessMode_A;
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FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;
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FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
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FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
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FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
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FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
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FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
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FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
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FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
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FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
|
||||
FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
|
||||
FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
|
||||
FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
|
||||
FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
|
||||
FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
|
||||
|
||||
FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
|
||||
|
||||
FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM4;
|
||||
FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
|
||||
|
||||
/* Enable FSMC Bank1_SRAM Bank */
|
||||
FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
|
||||
FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE);
|
||||
/* Enable FSMC Bank1_SRAM Bank */
|
||||
FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
|
||||
FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE);
|
||||
}
|
||||
|
||||
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/
|
||||
|
||||
@@ -125,44 +125,6 @@
|
||||
|
||||
static u16 DeviceCode;
|
||||
|
||||
static void LCD_CtrlLinesConfig(void)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
|
||||
/* Enable FSMC, GPIOD, GPIOE, GPIOF, GPIOG and AFIO clocks */
|
||||
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
|
||||
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE |
|
||||
RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOG |
|
||||
RCC_APB2Periph_AFIO, ENABLE);
|
||||
|
||||
/* Set PD.00(D2), PD.01(D3), PD.04(NOE), PD.05(NWE), PD.08(D13), PD.09(D14),
|
||||
PD.10(D15), PD.14(D0), PD.15(D1) as alternate
|
||||
function push pull */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 |
|
||||
GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_14 |
|
||||
GPIO_Pin_15;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_Init(GPIOD, &GPIO_InitStructure);
|
||||
|
||||
/* Set PE.07(D4), PE.08(D5), PE.09(D6), PE.10(D7), PE.11(D8), PE.12(D9), PE.13(D10),
|
||||
PE.14(D11), PE.15(D12) as alternate function push pull */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 | GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 |
|
||||
GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 |
|
||||
GPIO_Pin_15;
|
||||
GPIO_Init(GPIOE, &GPIO_InitStructure);
|
||||
|
||||
GPIO_WriteBit(GPIOE, GPIO_Pin_6, Bit_SET);
|
||||
/* Set PF.00(A0 (RS)) as alternate function push pull */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_2;
|
||||
GPIO_Init(GPIOF, &GPIO_InitStructure);
|
||||
|
||||
/* Set NE2(LCD/CS) as alternate function push pull */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
|
||||
GPIO_Init(GPIOG, &GPIO_InitStructure);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LCD_FSMCConfig
|
||||
* Description : Configures the Parallel interface (FSMC) for LCD(Parallel mode)
|
||||
@@ -213,17 +175,6 @@ static void LCD_FSMCConfig(void)
|
||||
FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE);
|
||||
}
|
||||
|
||||
|
||||
static void LCD_X_Init(void)
|
||||
{
|
||||
/* Configure the LCD Control pins --------------------------------------------*/
|
||||
LCD_CtrlLinesConfig();
|
||||
|
||||
/* Configure the FSMC Parallel interface -------------------------------------*/
|
||||
LCD_FSMCConfig();
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : ili9325_WriteReg
|
||||
* Description : Writes to the selected LCD register.
|
||||
@@ -295,19 +246,7 @@ unsigned short ili9325_ReadGRAM(unsigned short x,unsigned short y)
|
||||
void ili9325_Initializtion(void)
|
||||
{
|
||||
volatile unsigned int i;
|
||||
LCD_X_Init();
|
||||
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOF,ENABLE);
|
||||
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_10MHz;
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
|
||||
GPIO_Init(GPIOF,&GPIO_InitStructure);
|
||||
}
|
||||
GPIO_SetBits(GPIOF, GPIO_Pin_10);
|
||||
LCD_FSMCConfig();
|
||||
|
||||
DeviceCode = LCD_ReadReg(0x0000);
|
||||
if (DeviceCode==0x9325||DeviceCode==0x9328)
|
||||
|
||||
Reference in New Issue
Block a user