mirror of
https://github.com/RT-Thread/rt-thread.git
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1.Add scons support
2.Add Kconfig file 3.Delete some unnecessary files and directories
This commit is contained in:
whik
@@ -0,0 +1,17 @@
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from building import *
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import rtconfig
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cwd = GetCurrentDir()
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src = Glob('*.c')
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if rtconfig.CROSS_TOOL == 'gcc':
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src += ['startup_gcc/startup_m2sxxx.s']
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elif rtconfig.CROSS_TOOL == 'keil':
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src += ['startup_arm/startup_m2sxxx.s']
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CPPPATH = [cwd]
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group = DefineGroup('CMSIS', src, depend = [''], CPPPATH = CPPPATH)
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Return('group')
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@@ -1,206 +0,0 @@
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/***************************************************************************//**
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* (c) Copyright 2007-2013 Microsemi SoC Products Group. All rights reserved.
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*
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* Hardware abstraction layer functions.
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*
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* SVN $Revision: 5258 $
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* SVN $Date: 2013-03-21 18:11:02 +0530 (Thu, 21 Mar 2013) $
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*/
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#ifndef HAL_H_
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#define HAL_H_
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#include "cpu_types.h"
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#include "hw_reg_access.h"
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/***************************************************************************//**
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* Enable all interrupts at the processor level.
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*/
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void HAL_enable_interrupts( void );
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/***************************************************************************//**
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* Disable all interrupts at the processor core level.
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* Return the interrupts enable state before disabling occured so that it can
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* later be restored.
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*/
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psr_t HAL_disable_interrupts( void );
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/***************************************************************************//**
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* Restore the interrupts enable state at the processor core level.
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* This function is normally passed the value returned from a previous call to
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* HAL_disable_interrupts().
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*/
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void HAL_restore_interrupts( psr_t saved_psr );
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/***************************************************************************//**
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*/
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#define FIELD_OFFSET(FIELD_NAME) (FIELD_NAME##_OFFSET)
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#define FIELD_SHIFT(FIELD_NAME) (FIELD_NAME##_SHIFT)
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#define FIELD_MASK(FIELD_NAME) (FIELD_NAME##_MASK)
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/***************************************************************************//**
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* The macro HAL_set_32bit_reg() allows writing a 32 bits wide register.
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*
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* BASE_ADDR: A variable of type addr_t specifying the base address of the
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* peripheral containing the register.
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* REG_NAME: A string identifying the register to write. These strings are
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* specified in a header file associated with the peripheral.
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* VALUE: A variable of type uint32_t containing the value to write.
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*/
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#define HAL_set_32bit_reg(BASE_ADDR, REG_NAME, VALUE) \
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(HW_set_32bit_reg( ((BASE_ADDR) + (REG_NAME##_REG_OFFSET)), (VALUE) ))
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/***************************************************************************//**
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* The macro HAL_get_32bit_reg() is used to read the value of a 32 bits wide
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* register.
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*
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* BASE_ADDR: A variable of type addr_t specifying the base address of the
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* peripheral containing the register.
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* REG_NAME: A string identifying the register to read. These strings are
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* specified in a header file associated with the peripheral.
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* RETURN: This function-like macro returns a uint32_t value.
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*/
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#define HAL_get_32bit_reg(BASE_ADDR, REG_NAME) \
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(HW_get_32bit_reg( ((BASE_ADDR) + (REG_NAME##_REG_OFFSET)) ))
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/***************************************************************************//**
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* The macro HAL_set_32bit_reg_field() is used to write a field within a
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* 32 bits wide register. The field written can be one or more bits.
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*
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* BASE_ADDR: A variable of type addr_t specifying the base address of the
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* peripheral containing the register.
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* FIELD_NAME: A string identifying the register field to write. These strings
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* are specified in a header file associated with the peripheral.
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* VALUE: A variable of type uint32_t containing the field value to write.
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*/
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#define HAL_set_32bit_reg_field(BASE_ADDR, FIELD_NAME, VALUE) \
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(HW_set_32bit_reg_field(\
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(BASE_ADDR) + FIELD_OFFSET(FIELD_NAME),\
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FIELD_SHIFT(FIELD_NAME),\
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FIELD_MASK(FIELD_NAME),\
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(VALUE)))
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/***************************************************************************//**
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* The macro HAL_get_32bit_reg_field() is used to read a register field from
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* within a 32 bit wide peripheral register. The field can be one or more bits.
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*
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* BASE_ADDR: A variable of type addr_t specifying the base address of the
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* peripheral containing the register.
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* FIELD_NAME: A string identifying the register field to write. These strings
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* are specified in a header file associated with the peripheral.
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* RETURN: This function-like macro returns a uint32_t value.
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*/
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#define HAL_get_32bit_reg_field(BASE_ADDR, FIELD_NAME) \
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(HW_get_32bit_reg_field(\
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(BASE_ADDR) + FIELD_OFFSET(FIELD_NAME),\
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FIELD_SHIFT(FIELD_NAME),\
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FIELD_MASK(FIELD_NAME)))
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/***************************************************************************//**
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* The macro HAL_set_16bit_reg() allows writing a 16 bits wide register.
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*
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* BASE_ADDR: A variable of type addr_t specifying the base address of the
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* peripheral containing the register.
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* REG_NAME: A string identifying the register to write. These strings are
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* specified in a header file associated with the peripheral.
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* VALUE: A variable of type uint_fast16_t containing the value to write.
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*/
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#define HAL_set_16bit_reg(BASE_ADDR, REG_NAME, VALUE) \
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(HW_set_16bit_reg( ((BASE_ADDR) + (REG_NAME##_REG_OFFSET)), (VALUE) ))
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/***************************************************************************//**
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* The macro HAL_get_16bit_reg() is used to read the value of a 16 bits wide
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* register.
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*
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* BASE_ADDR: A variable of type addr_t specifying the base address of the
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* peripheral containing the register.
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* REG_NAME: A string identifying the register to read. These strings are
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* specified in a header file associated with the peripheral.
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* RETURN: This function-like macro returns a uint16_t value.
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*/
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#define HAL_get_16bit_reg(BASE_ADDR, REG_NAME) \
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(HW_get_16bit_reg( (BASE_ADDR) + (REG_NAME##_REG_OFFSET) ))
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/***************************************************************************//**
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* The macro HAL_set_16bit_reg_field() is used to write a field within a
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* 16 bits wide register. The field written can be one or more bits.
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*
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* BASE_ADDR: A variable of type addr_t specifying the base address of the
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* peripheral containing the register.
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* FIELD_NAME: A string identifying the register field to write. These strings
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* are specified in a header file associated with the peripheral.
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* VALUE: A variable of type uint16_t containing the field value to write.
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*/
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#define HAL_set_16bit_reg_field(BASE_ADDR, FIELD_NAME, VALUE) \
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(HW_set_16bit_reg_field(\
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(BASE_ADDR) + FIELD_OFFSET(FIELD_NAME),\
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FIELD_SHIFT(FIELD_NAME),\
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FIELD_MASK(FIELD_NAME),\
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(VALUE)))
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/***************************************************************************//**
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* The macro HAL_get_16bit_reg_field() is used to read a register field from
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* within a 8 bit wide peripheral register. The field can be one or more bits.
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*
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* BASE_ADDR: A variable of type addr_t specifying the base address of the
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* peripheral containing the register.
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* FIELD_NAME: A string identifying the register field to write. These strings
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* are specified in a header file associated with the peripheral.
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* RETURN: This function-like macro returns a uint16_t value.
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*/
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#define HAL_get_16bit_reg_field(BASE_ADDR, FIELD_NAME) \
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(HW_get_16bit_reg_field(\
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(BASE_ADDR) + FIELD_OFFSET(FIELD_NAME),\
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FIELD_SHIFT(FIELD_NAME),\
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FIELD_MASK(FIELD_NAME)))
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/***************************************************************************//**
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* The macro HAL_set_8bit_reg() allows writing a 8 bits wide register.
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*
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* BASE_ADDR: A variable of type addr_t specifying the base address of the
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* peripheral containing the register.
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* REG_NAME: A string identifying the register to write. These strings are
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* specified in a header file associated with the peripheral.
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* VALUE: A variable of type uint_fast8_t containing the value to write.
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*/
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#define HAL_set_8bit_reg(BASE_ADDR, REG_NAME, VALUE) \
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(HW_set_8bit_reg( ((BASE_ADDR) + (REG_NAME##_REG_OFFSET)), (VALUE) ))
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/***************************************************************************//**
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* The macro HAL_get_8bit_reg() is used to read the value of a 8 bits wide
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* register.
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*
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* BASE_ADDR: A variable of type addr_t specifying the base address of the
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* peripheral containing the register.
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* REG_NAME: A string identifying the register to read. These strings are
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* specified in a header file associated with the peripheral.
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* RETURN: This function-like macro returns a uint8_t value.
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*/
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#define HAL_get_8bit_reg(BASE_ADDR, REG_NAME) \
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(HW_get_8bit_reg( (BASE_ADDR) + (REG_NAME##_REG_OFFSET) ))
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/***************************************************************************//**
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*/
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#define HAL_set_8bit_reg_field(BASE_ADDR, FIELD_NAME, VALUE) \
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(HW_set_8bit_reg_field(\
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(BASE_ADDR) + FIELD_OFFSET(FIELD_NAME),\
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FIELD_SHIFT(FIELD_NAME),\
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FIELD_MASK(FIELD_NAME),\
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(VALUE)))
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/***************************************************************************//**
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* The macro HAL_get_8bit_reg_field() is used to read a register field from
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* within a 8 bit wide peripheral register. The field can be one or more bits.
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*
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* BASE_ADDR: A variable of type addr_t specifying the base address of the
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* peripheral containing the register.
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* FIELD_NAME: A string identifying the register field to write. These strings
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* are specified in a header file associated with the peripheral.
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* RETURN: This function-like macro returns a uint8_t value.
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*/
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#define HAL_get_8bit_reg_field(BASE_ADDR, FIELD_NAME) \
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(HW_get_8bit_reg_field(\
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(BASE_ADDR) + FIELD_OFFSET(FIELD_NAME),\
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FIELD_SHIFT(FIELD_NAME),\
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FIELD_MASK(FIELD_NAME)))
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#endif /*HAL_H_*/
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@@ -1,34 +0,0 @@
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/*******************************************************************************
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* (c) Copyright 2008-2013 Microsemi SoC Products Group. All rights reserved.
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*
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* SVN $Revision: 7375 $
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* SVN $Date: 2015-05-01 19:27:40 +0530 (Fri, 01 May 2015) $
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*/
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#ifndef HAL_ASSERT_HEADER
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#define HAL_ASSERT_HEADER
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#ifdef MSCC_NO_RELATIVE_PATHS
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#include "mss_assert.h"
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#else
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#include "../CMSIS/mss_assert.h"
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#endif
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#if defined(NDEBUG)
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/***************************************************************************//**
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* HAL_ASSERT() is defined out when the NDEBUG symbol is used.
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******************************************************************************/
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#define HAL_ASSERT(CHECK)
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#else
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/***************************************************************************//**
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* Default behaviour for HAL_ASSERT() macro:
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*------------------------------------------------------------------------------
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* Using the HAL_ASSERT() macro is the same as directly using the SmartFusion2
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* CMSIS ASSERT() macro. The behaviour is toolchain specific and project
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* setting specific.
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******************************************************************************/
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#define HAL_ASSERT(CHECK) ASSERT(CHECK);
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#endif /* NDEBUG */
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#endif /* HAL_ASSERT_HEADER */
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@@ -1,227 +0,0 @@
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/***************************************************************************//**
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* (c) Copyright 2007-2013 Microsemi SoC Products Group. All rights reserved.
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*
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* Hardware registers access functions.
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* The implementation of these function is platform and toolchain specific.
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* The functions declared here are implemented using assembler as part of the
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* processor/toolchain specific HAL.
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*
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* SVN $Revision: 5258 $
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* SVN $Date: 2013-03-21 18:11:02 +0530 (Thu, 21 Mar 2013) $
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*/
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#ifndef HW_REG_ACCESS
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#define HW_REG_ACCESS
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/***************************************************************************//**
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* HW_set_32bit_reg is used to write the content of a 32 bits wide peripheral
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* register.
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*
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* @param reg_addr Address in the processor's memory map of the register to
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* write.
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* @param value Value to be written into the peripheral register.
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*/
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void
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HW_set_32bit_reg
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(
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addr_t reg_addr,
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uint32_t value
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);
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/***************************************************************************//**
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* HW_get_32bit_reg is used to read the content of a 32 bits wide peripheral
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* register.
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*
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* @param reg_addr Address in the processor's memory map of the register to
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* read.
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* @return 32 bits value read from the peripheral register.
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*/
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uint32_t
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HW_get_32bit_reg
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(
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addr_t reg_addr
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);
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/***************************************************************************//**
|
||||
* HW_set_32bit_reg_field is used to set the content of a field in a 32 bits
|
||||
* wide peripheral register.
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*
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* @param reg_addr Address in the processor's memory map of the register to
|
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* be written.
|
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* @param shift Bit offset of the register field to be read within the
|
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* register.
|
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* @param mask Bit mask to be applied to the raw register value to filter
|
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* out the other register fields values.
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* @param value Value to be written in the specified field.
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*/
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void
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HW_set_32bit_reg_field
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(
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addr_t reg_addr,
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int_fast8_t shift,
|
||||
uint32_t mask,
|
||||
uint32_t value
|
||||
);
|
||||
|
||||
/***************************************************************************//**
|
||||
* HW_get_32bit_reg_field is used to read the content of a field out of a
|
||||
* 32 bits wide peripheral register.
|
||||
*
|
||||
* @param reg_addr Address in the processor's memory map of the register to
|
||||
* read.
|
||||
* @param shift Bit offset of the register field to be written within the
|
||||
* register.
|
||||
* @param mask Bit mask to be applied to the raw register value to filter
|
||||
* out the other register fields values.
|
||||
*
|
||||
* @return 32 bits value containing the register field value specified
|
||||
* as parameter.
|
||||
*/
|
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uint32_t
|
||||
HW_get_32bit_reg_field
|
||||
(
|
||||
addr_t reg_addr,
|
||||
int_fast8_t shift,
|
||||
uint32_t mask
|
||||
);
|
||||
|
||||
/***************************************************************************//**
|
||||
* HW_set_16bit_reg is used to write the content of a 16 bits wide peripheral
|
||||
* register.
|
||||
*
|
||||
* @param reg_addr Address in the processor's memory map of the register to
|
||||
* write.
|
||||
* @param value Value to be written into the peripheral register.
|
||||
*/
|
||||
void
|
||||
HW_set_16bit_reg
|
||||
(
|
||||
addr_t reg_addr,
|
||||
uint_fast16_t value
|
||||
);
|
||||
|
||||
/***************************************************************************//**
|
||||
* HW_get_16bit_reg is used to read the content of a 16 bits wide peripheral
|
||||
* register.
|
||||
*
|
||||
* @param reg_addr Address in the processor's memory map of the register to
|
||||
* read.
|
||||
* @return 16 bits value read from the peripheral register.
|
||||
*/
|
||||
uint16_t
|
||||
HW_get_16bit_reg
|
||||
(
|
||||
addr_t reg_addr
|
||||
);
|
||||
|
||||
/***************************************************************************//**
|
||||
* HW_set_16bit_reg_field is used to set the content of a field in a 16 bits
|
||||
* wide peripheral register.
|
||||
*
|
||||
* @param reg_addr Address in the processor's memory map of the register to
|
||||
* be written.
|
||||
* @param shift Bit offset of the register field to be read within the
|
||||
* register.
|
||||
* @param mask Bit mask to be applied to the raw register value to filter
|
||||
* out the other register fields values.
|
||||
* @param value Value to be written in the specified field.
|
||||
*/
|
||||
void HW_set_16bit_reg_field
|
||||
(
|
||||
addr_t reg_addr,
|
||||
int_fast8_t shift,
|
||||
uint_fast16_t mask,
|
||||
uint_fast16_t value
|
||||
);
|
||||
|
||||
/***************************************************************************//**
|
||||
* HW_get_16bit_reg_field is used to read the content of a field from a
|
||||
* 16 bits wide peripheral register.
|
||||
*
|
||||
* @param reg_addr Address in the processor's memory map of the register to
|
||||
* read.
|
||||
* @param shift Bit offset of the register field to be written within the
|
||||
* register.
|
||||
* @param mask Bit mask to be applied to the raw register value to filter
|
||||
* out the other register fields values.
|
||||
*
|
||||
* @return 16 bits value containing the register field value specified
|
||||
* as parameter.
|
||||
*/
|
||||
uint16_t HW_get_16bit_reg_field
|
||||
(
|
||||
addr_t reg_addr,
|
||||
int_fast8_t shift,
|
||||
uint_fast16_t mask
|
||||
);
|
||||
|
||||
/***************************************************************************//**
|
||||
* HW_set_8bit_reg is used to write the content of a 8 bits wide peripheral
|
||||
* register.
|
||||
*
|
||||
* @param reg_addr Address in the processor's memory map of the register to
|
||||
* write.
|
||||
* @param value Value to be written into the peripheral register.
|
||||
*/
|
||||
void
|
||||
HW_set_8bit_reg
|
||||
(
|
||||
addr_t reg_addr,
|
||||
uint_fast8_t value
|
||||
);
|
||||
|
||||
/***************************************************************************//**
|
||||
* HW_get_8bit_reg is used to read the content of a 8 bits wide peripheral
|
||||
* register.
|
||||
*
|
||||
* @param reg_addr Address in the processor's memory map of the register to
|
||||
* read.
|
||||
* @return 8 bits value read from the peripheral register.
|
||||
*/
|
||||
uint8_t
|
||||
HW_get_8bit_reg
|
||||
(
|
||||
addr_t reg_addr
|
||||
);
|
||||
|
||||
/***************************************************************************//**
|
||||
* HW_set_8bit_reg_field is used to set the content of a field in a 8 bits
|
||||
* wide peripheral register.
|
||||
*
|
||||
* @param reg_addr Address in the processor's memory map of the register to
|
||||
* be written.
|
||||
* @param shift Bit offset of the register field to be read within the
|
||||
* register.
|
||||
* @param mask Bit mask to be applied to the raw register value to filter
|
||||
* out the other register fields values.
|
||||
* @param value Value to be written in the specified field.
|
||||
*/
|
||||
void HW_set_8bit_reg_field
|
||||
(
|
||||
addr_t reg_addr,
|
||||
int_fast8_t shift,
|
||||
uint_fast8_t mask,
|
||||
uint_fast8_t value
|
||||
);
|
||||
|
||||
/***************************************************************************//**
|
||||
* HW_get_8bit_reg_field is used to read the content of a field from a
|
||||
* 8 bits wide peripheral register.
|
||||
*
|
||||
* @param reg_addr Address in the processor's memory map of the register to
|
||||
* read.
|
||||
* @param shift Bit offset of the register field to be written within the
|
||||
* register.
|
||||
* @param mask Bit mask to be applied to the raw register value to filter
|
||||
* out the other register fields values.
|
||||
*
|
||||
* @return 16 bits value containing the register field value specified
|
||||
* as parameter.
|
||||
*/
|
||||
uint8_t HW_get_8bit_reg_field
|
||||
(
|
||||
addr_t reg_addr,
|
||||
int_fast8_t shift,
|
||||
uint_fast8_t mask
|
||||
);
|
||||
|
||||
#endif /* HW_REG_ACCESS */
|
||||
@@ -1,175 +0,0 @@
|
||||
;******************************************************************************
|
||||
; (c) Copyright 2008-2013 Microsemi SoC Products Group. All rights reserved.
|
||||
;
|
||||
; SVN $Revision: 5258 $
|
||||
; SVN $Date: 2013-03-21 18:11:02 +0530 (Thu, 21 Mar 2013) $
|
||||
;
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
EXPORT HW_set_32bit_reg
|
||||
EXPORT HW_get_32bit_reg
|
||||
EXPORT HW_set_32bit_reg_field
|
||||
EXPORT HW_get_32bit_reg_field
|
||||
EXPORT HW_set_16bit_reg
|
||||
EXPORT HW_get_16bit_reg
|
||||
EXPORT HW_set_16bit_reg_field
|
||||
EXPORT HW_get_16bit_reg_field
|
||||
EXPORT HW_set_8bit_reg
|
||||
EXPORT HW_get_8bit_reg
|
||||
EXPORT HW_set_8bit_reg_field
|
||||
EXPORT HW_get_8bit_reg_field
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; R0: addr_t reg_addr
|
||||
; R1: uint32_t value
|
||||
;
|
||||
HW_set_32bit_reg \
|
||||
PROC
|
||||
STR R1, [R0]
|
||||
BX LR
|
||||
ENDP
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; R0: addr_t reg_addr
|
||||
;
|
||||
HW_get_32bit_reg \
|
||||
PROC
|
||||
LDR R0, [R0]
|
||||
BX LR
|
||||
ENDP
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; R0: addr_t reg_addr
|
||||
; R1: int_fast8_t shift
|
||||
; R2: uint32_t mask
|
||||
; R3: uint32_t value
|
||||
;
|
||||
HW_set_32bit_reg_field \
|
||||
PROC
|
||||
PUSH {R1,R2,R3,LR}
|
||||
LSL.W R3, R3, R1
|
||||
AND.W R3, R3, R2
|
||||
LDR R1, [R0]
|
||||
MVN.W R2, R2
|
||||
AND.W R1, R1, R2
|
||||
ORR.W R1, R1, R3
|
||||
STR R1, [R0]
|
||||
POP {R1,R2,R3,PC}
|
||||
ENDP
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; R0: addr_t reg_addr
|
||||
; R1: int_fast8_t shift
|
||||
; R2: uint32_t mask
|
||||
;
|
||||
HW_get_32bit_reg_field \
|
||||
PROC
|
||||
LDR R0, [R0]
|
||||
AND.W R0, R0, R2
|
||||
LSR.W R0, R0, R1
|
||||
BX LR
|
||||
ENDP
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; R0: addr_t reg_addr
|
||||
; R1: uint_fast16_t value
|
||||
;
|
||||
HW_set_16bit_reg \
|
||||
PROC
|
||||
STRH R1, [R0]
|
||||
BX LR
|
||||
ENDP
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; R0: addr_t reg_addr
|
||||
;
|
||||
HW_get_16bit_reg \
|
||||
PROC
|
||||
LDRH R0, [R0]
|
||||
BX LR
|
||||
ENDP
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; R0: addr_t reg_addr
|
||||
; R1: int_fast8_t shift
|
||||
; R2: uint_fast16_t mask
|
||||
; R3: uint_fast16_t value
|
||||
;
|
||||
HW_set_16bit_reg_field \
|
||||
PROC
|
||||
PUSH {R1,R2,R3,LR}
|
||||
LSL.W R3, R3, R1
|
||||
AND.W R3, R3, R2
|
||||
LDRH R1, [R0]
|
||||
MVN.W R2, R2
|
||||
AND.W R1, R1, R2
|
||||
ORR.W R1, R1, R3
|
||||
STRH R1, [R0]
|
||||
POP {R1,R2,R3,PC}
|
||||
ENDP
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; R0: addr_t reg_addr
|
||||
; R1: int_fast8_t shift
|
||||
; R2: uint_fast16_t mask
|
||||
;
|
||||
HW_get_16bit_reg_field \
|
||||
PROC
|
||||
LDRH R0, [R0]
|
||||
AND.W R0, R0, R2
|
||||
LSR.W R0, R0, R1
|
||||
BX LR
|
||||
ENDP
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; R0: addr_t reg_addr
|
||||
; R1: uint_fast8_t value
|
||||
;
|
||||
HW_set_8bit_reg \
|
||||
PROC
|
||||
STRB R1, [R0]
|
||||
BX LR
|
||||
ENDP
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; R0: addr_t reg_addr
|
||||
;
|
||||
HW_get_8bit_reg \
|
||||
PROC
|
||||
LDRB R0, [R0]
|
||||
BX LR
|
||||
ENDP
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; R0: addr_t reg_addr,
|
||||
; R1: int_fast8_t shift
|
||||
; R2: uint_fast8_t mask
|
||||
; R3: uint_fast8_t value
|
||||
;
|
||||
HW_set_8bit_reg_field \
|
||||
PROC
|
||||
PUSH {R1,R2,R3,LR}
|
||||
LSL.W R3, R3, R1
|
||||
AND.W R3, R3, R2
|
||||
LDRB R1, [R0]
|
||||
MVN.W R2, R2
|
||||
AND.W R1, R1, R2
|
||||
ORR.W R1, R1, R3
|
||||
STRB R1, [R0]
|
||||
POP {R1,R2,R3,PC}
|
||||
ENDP
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; R0: addr_t reg_addr
|
||||
; R1: int_fast8_t shift
|
||||
; R2: uint_fast8_t mask
|
||||
;
|
||||
HW_get_8bit_reg_field \
|
||||
PROC
|
||||
LDRB R0, [R0]
|
||||
AND.W R0, R0, R2
|
||||
LSR.W R0, R0, R1
|
||||
BX LR
|
||||
ENDP
|
||||
|
||||
END
|
||||
@@ -0,0 +1,44 @@
|
||||
/*******************************************************************************
|
||||
* (c) Copyright 2014 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* Keil-MDK specific system initialization.
|
||||
*
|
||||
* SVN $Revision: 7375 $
|
||||
* SVN $Date: 2015-05-01 14:57:40 +0100 (Fri, 01 May 2015) $
|
||||
*/
|
||||
#ifdef MSCC_NO_RELATIVE_PATHS
|
||||
#include "m2sxxx.h"
|
||||
#else
|
||||
#include "..\m2sxxx.h"
|
||||
#endif
|
||||
|
||||
#define ENVM_BASE_ADDRESS 0x60000000U
|
||||
#define MDDR_BASE_ADDRESS 0xA0000000U
|
||||
|
||||
//extern unsigned int Image$$ER_RW$$Base;
|
||||
//extern unsigned int Image$$ER_RO$$Base;
|
||||
|
||||
/*==============================================================================
|
||||
* The __low_level_init() function is called after SystemInit. Therefore, the
|
||||
* external RAM should be configured at this stage if it is used.
|
||||
*/
|
||||
/* void low_level_init(void)
|
||||
{
|
||||
volatile unsigned int rw_region_base;
|
||||
volatile unsigned int readonly_region_base;
|
||||
|
||||
rw_region_base = (unsigned int)&Image$$ER_RW$$Base;
|
||||
if (rw_region_base >= MDDR_BASE_ADDRESS)
|
||||
{
|
||||
/ --------------------------------------------------------------------------
|
||||
* Remap MDDR to address 0x00000000.
|
||||
/
|
||||
SYSREG->ESRAM_CR = 0u;
|
||||
SYSREG->ENVM_REMAP_BASE_CR = 0u;
|
||||
SYSREG->DDR_CR = 1u;
|
||||
}
|
||||
|
||||
readonly_region_base = (unsigned int)&Image$$ER_RO$$Base;
|
||||
SCB->VTOR = readonly_region_base;
|
||||
} */
|
||||
|
||||
@@ -0,0 +1,150 @@
|
||||
/*******************************************************************************
|
||||
* (c) Copyright 2013 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* Redirection of the standard library I/O to one of the SmartFusion2
|
||||
* MMUART.
|
||||
*
|
||||
* SVN $Revision: 7375 $
|
||||
* SVN $Date: 2015-05-01 14:57:40 +0100 (Fri, 01 May 2015) $
|
||||
*/
|
||||
|
||||
/*==============================================================================
|
||||
* The content of this source file will only be compiled if either one of the
|
||||
* following two defined symbols are defined in the project settings:
|
||||
* - MICROSEMI_STDIO_THRU_MMUART0
|
||||
* - MICROSEMI_STDIO_THRU_MMUART1
|
||||
*
|
||||
*/
|
||||
#ifdef MICROSEMI_STDIO_THRU_MMUART0
|
||||
#ifndef MICROSEMI_STDIO_THRU_UART
|
||||
#define MICROSEMI_STDIO_THRU_UART
|
||||
#endif
|
||||
#endif /* MICROSEMI_STDIO_THRU_MMUART0 */
|
||||
|
||||
#ifdef MICROSEMI_STDIO_THRU_MMUART1
|
||||
#ifndef MICROSEMI_STDIO_THRU_UART
|
||||
#define MICROSEMI_STDIO_THRU_UART
|
||||
#endif
|
||||
#endif /* MICROSEMI_STDIO_THRU_MMUART1 */
|
||||
|
||||
/*==============================================================================
|
||||
* Actual implementation.
|
||||
*/
|
||||
#ifdef MICROSEMI_STDIO_THRU_UART
|
||||
|
||||
#include <stdio.h>
|
||||
#include <rt_misc.h>
|
||||
|
||||
#include "m2sxxx.h"
|
||||
#include "mss_uart.h"
|
||||
#include "core_uart_apb.h"
|
||||
|
||||
|
||||
/*
|
||||
* The baud rate will default to 57600 baud if no baud rate is specified though the
|
||||
* MICROSEMI_STDIO_BAUD_RATE define.
|
||||
*/
|
||||
#ifndef MICROSEMI_STDIO_BAUD_RATE
|
||||
#define MICROSEMI_STDIO_BAUD_RATE MSS_UART_115200_BAUD
|
||||
#endif
|
||||
|
||||
#ifdef MICROSEMI_STDIO_THRU_MMUART0
|
||||
static mss_uart_instance_t * const gp_my_uart = &g_mss_uart0;
|
||||
#else
|
||||
static mss_uart_instance_t * const gp_my_uart = &g_mss_uart1;
|
||||
#endif
|
||||
|
||||
/*==============================================================================
|
||||
* Flag used to indicate if the UART driver needs to be initialized.
|
||||
*/
|
||||
static int g_stdio_uart_init_done = 0;
|
||||
|
||||
|
||||
#define LSR_THRE_MASK 0x20u
|
||||
|
||||
/*
|
||||
* Disable semihosting apis
|
||||
*/
|
||||
#pragma import(__use_no_semihosting_swi)
|
||||
|
||||
/*==============================================================================
|
||||
* sendchar()
|
||||
*/
|
||||
int sendchar(int ch)
|
||||
{
|
||||
uint32_t tx_ready;
|
||||
//第一次调用时，初始化串口
|
||||
if(!g_stdio_uart_init_done)
|
||||
{
|
||||
MSS_UART_init(gp_my_uart,
|
||||
MICROSEMI_STDIO_BAUD_RATE,
|
||||
MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY);
|
||||
g_stdio_uart_init_done = 1;
|
||||
}
|
||||
do {
|
||||
tx_ready = gp_my_uart->hw_reg->LSR & LSR_THRE_MASK;
|
||||
} while(!tx_ready);
|
||||
gp_my_uart->hw_reg->THR = ch;
|
||||
return (ch);
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
*
|
||||
*/
|
||||
struct __FILE { int handle; /* Add whatever you need here */ };
|
||||
FILE __stdout;
|
||||
FILE __stdin;
|
||||
|
||||
|
||||
/*==============================================================================
|
||||
* fputc()
|
||||
*/
|
||||
int fputc(int ch, FILE *f)
|
||||
{
|
||||
return (sendchar(ch));
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
* fgetc()
|
||||
*/
|
||||
int fgetc(FILE *f)
|
||||
{
|
||||
uint8_t rx_size;
|
||||
uint8_t rx_byte;
|
||||
|
||||
do {
|
||||
rx_size = MSS_UART_get_rx(gp_my_uart, &rx_byte, 1);
|
||||
} while(0u == rx_size);
|
||||
|
||||
return rx_byte;
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
* ferror()
|
||||
*/
|
||||
int ferror(FILE *f)
|
||||
{
|
||||
/* Your implementation of ferror */
|
||||
return EOF;
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
* _ttywrch()
|
||||
*/
|
||||
void _ttywrch(int ch)
|
||||
{
|
||||
sendchar(ch);
|
||||
}
|
||||
|
||||
/*==============================================================================
|
||||
* _sys_exit()
|
||||
*/
|
||||
void _sys_exit(int return_code)
|
||||
{
|
||||
for(;;)
|
||||
{
|
||||
; /* endless loop */
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* MICROSEMI_STDIO_THRU_UART */
|
||||
@@ -0,0 +1,249 @@
|
||||
/*******************************************************************************
|
||||
* (c) Copyright 2015 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* file name : debug-in-microsemi-smartfusion2-envm.ld
|
||||
* SmartFusion2 Cortex-M3 linker script for creating a SoftConsole downloadable
|
||||
* debug image executing in SmartFusion2 internal eNVM.
|
||||
*
|
||||
* Some current (April 2015) dev kit memory map possibilities are
|
||||
* --Type-------Device-----------address start---address end----size---Dbus--RAM IC-------SF2--Comment---------------
|
||||
* --eNVM-------M2S010-----------0x60000000------0x6007FFFF-----256KB---------------------010------------------------
|
||||
* --eNVM-------M2S090-----------0x60000000------0x6007FFFF-----512KB---------------------090------------------------
|
||||
* --eSRAM------M2Sxxx-----------0x20000000------0x2000FFFF-----64KB----------------------xxx--All have same amount--
|
||||
* --eSRAM------M2Sxxx-----------0x20000000------0x20013FFF-----80KB----------------------xxx--If ECC/SECDED not used
|
||||
* --Fabric-----M2S010-----------0x30000000------0x6007FFFF-----400Kb---------------------010--note-K bits-----------
|
||||
* --Fabric-----M2S090-----------0x30000000------0x6007FFFF-----2074Kb--------------------090--note-K bits-----------
|
||||
* --LPDDR------STARTER-KIT------0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----050------------------------
|
||||
* --LPDDR------484-STARTER-KIT--0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----010------------------------
|
||||
* --LPDDR------SEC-EVAL-KIT-----0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16LF---090--Security eval kit-----
|
||||
* --DDR3-------ADevKit----------0xA0000000------0xBFFFFFFF-----1GB----32--MT41K256M8DA---150------------------------
|
||||
* --Some older physical memory map possibilities are
|
||||
* --Type-------location---------address start---address end----size---Dbus---RAM IC------SF2--Comment--------------
|
||||
* --LPDDR------EVAL KIT---------0xA0000000------0xA3FFFFFF-----64MB-=-16--MT46H32M16LF---025--Eval Kit--------------
|
||||
* --DDR3-------DevKit-----------0xA0000000------0xAFFFFFFF-----512MB--16--MT41K256M8DA---050------------------------
|
||||
*
|
||||
* Example linker scripts use lowest practicl values so will work accross dev kits
|
||||
* eNVM=256KB eRAM=64KB External memory = 64MB
|
||||
*
|
||||
* On reset, the eNVM region is mapped to 0x00000000
|
||||
* This is changed below by setting the __smartfusion2_memory_remap variable as required.
|
||||
* Options are detailed below.
|
||||
*
|
||||
* SVN $Revision: 7419 $
|
||||
* SVN $Date: 2015-05-15 21:20:21 +0530 (Fri, 15 May 2015) $
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
|
||||
GROUP(-lc -lgcc -lm)
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(Reset_Handler)
|
||||
SEARCH_DIR(.)
|
||||
__DYNAMIC = 0;
|
||||
|
||||
/*******************************************************************************
|
||||
* Start of board customization.
|
||||
*******************************************************************************/
|
||||
MEMORY
|
||||
{
|
||||
/*
|
||||
* In general, example LD scripts use lowest common memory footprint
|
||||
* so will work with all devices.
|
||||
*/
|
||||
/*
|
||||
* WARNING: The words "SOFTCONSOLE", "FLASH", and "USE", the colon ":", and
|
||||
* the name of the type of flash memory are all in a specific order.
|
||||
* Please do not modify that comment line, in order to ensure
|
||||
* debugging of your application will use the flash memory correctly.
|
||||
*/
|
||||
|
||||
/* SOFTCONSOLE FLASH USE: microsemi-smartfusion2-envm */
|
||||
rom (rx) : ORIGIN = 0x60000000, LENGTH = 256k
|
||||
|
||||
/* SmartFusion2 internal eNVM mirrored to 0x00000000 */
|
||||
romMirror (rx) : ORIGIN = 0x00000000, LENGTH = 256k
|
||||
|
||||
/* SmartFusion2 internal eSRAM */
|
||||
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
|
||||
}
|
||||
|
||||
RAM_START_ADDRESS = 0x20000000; /* Must be the same value MEMORY region ram ORIGIN above. */
|
||||
RAM_SIZE = 64k; /* Must be the same value MEMORY region ram LENGTH above. */
|
||||
MAIN_STACK_SIZE = 4k; /* Cortex main stack size. */
|
||||
MIN_SIZE_HEAP = 4k; /* needs to be calculated for your application */
|
||||
|
||||
/*******************************************************************************
|
||||
* End of board customization.
|
||||
*******************************************************************************/
|
||||
|
||||
PROVIDE (__main_stack_start = RAM_START_ADDRESS + RAM_SIZE);
|
||||
PROVIDE (_estack = __main_stack_start);
|
||||
PROVIDE (__mirrored_nvm = 1); /* Indicate to startup code that NVM is mirrored to VMA address and no text copy is required. */
|
||||
|
||||
/*
|
||||
* Remap instruction for startup code and debugger.
|
||||
* set __smartfusion2_memory_remap to one of the following:
|
||||
* 0: remap eNVM to address 0x00000000 Production mode or debugging from eNVM
|
||||
* 1: remap eSRAM to address 0x00000000 Debugging from eSRAM
|
||||
* 2: remap external DDR memory to address 0x00000000 Debugging from DDR memory
|
||||
*/
|
||||
PROVIDE (__smartfusion2_memory_remap = 0);
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.vector_table : ALIGN(0x10)
|
||||
{
|
||||
__vector_table_load = LOADADDR(.vector_table);
|
||||
__vector_table_start = .;
|
||||
__vector_table_vma_base_address = .; /* required by debugger for start address */
|
||||
KEEP(*(.isr_vector))
|
||||
. = ALIGN(0x10);
|
||||
_evector_table = .;
|
||||
} >romMirror AT>rom
|
||||
|
||||
/* all data and code run/used before reloaction must be located here */
|
||||
/* When all code in NVRAM, no requirement for this section- but adds clarity when looking at .lst file */
|
||||
.boot_code : ALIGN(0x10)
|
||||
{
|
||||
*(.boot_code) /* reset handler */
|
||||
*system_m2sxxx.o(.text*) /* SystemInit() - called before relocation to RAM so keep in ROM */
|
||||
*sys_config.o(.rodata*)
|
||||
. = ALIGN(0x10);
|
||||
} >romMirror AT>rom
|
||||
|
||||
.text : ALIGN(0x10)
|
||||
{
|
||||
CREATE_OBJECT_SYMBOLS
|
||||
__text_load = LOADADDR(.text); /* required when copying to RAM */
|
||||
__text_start = .; /* required when copying to RAM */
|
||||
*(.text .text.* .gnu.linkonce.t.*)
|
||||
*(.plt)
|
||||
*(.gnu.warning)
|
||||
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* These are for running static constructors and destructors under ELF. */
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*crtend.o(.ctors))
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*crtend.o(.dtors))
|
||||
|
||||
*(.rodata .rodata.* .gnu.linkonce.r.*)
|
||||
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
*(.gcc_except_table)
|
||||
*(.eh_frame_hdr)
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.vector_table))
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(.fini_array))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(0x10);
|
||||
} >romMirror AT>rom
|
||||
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} >ram AT>rom
|
||||
__exidx_end = .;
|
||||
_etext = .; /* required when copying to RAM */
|
||||
|
||||
.data : ALIGN(0x10)
|
||||
{
|
||||
__data_load = LOADADDR(.data); /* used when copying to RAM */
|
||||
_sidata = LOADADDR (.data);
|
||||
__data_start = .; /* used when copying to RAM */
|
||||
_sdata = .;
|
||||
KEEP(*(.jcr))
|
||||
*(.got.plt) *(.got)
|
||||
*(.shdata)
|
||||
*(.data .data.* .gnu.linkonce.d.*)
|
||||
. = ALIGN (0x10);
|
||||
_edata = .; /* used when copying to RAM */
|
||||
} >ram AT>rom
|
||||
|
||||
.bss : ALIGN(0x10)
|
||||
{
|
||||
__bss_start__ = . ;
|
||||
_sbss = .;
|
||||
*(.shbss)
|
||||
*(.bss .bss.* .gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(0x10);
|
||||
__bss_end__ = .;
|
||||
_end = .;
|
||||
__end = _end;
|
||||
_ebss = .;
|
||||
PROVIDE(end = .);
|
||||
} >ram AT>rom
|
||||
|
||||
.heap : ALIGN(0x10)
|
||||
{
|
||||
__heap_start__ = .;
|
||||
. += MIN_SIZE_HEAP; /* will generate error if this minimum size not available */
|
||||
. += ((ABSOLUTE(RAM_START_ADDRESS) + RAM_SIZE - MAIN_STACK_SIZE) - .); /* assumes stack starts after heap */
|
||||
_eheap = .;
|
||||
} >ram
|
||||
|
||||
.stack : ALIGN(0x10)
|
||||
{
|
||||
__stack_start__ = .;
|
||||
. += MAIN_STACK_SIZE;
|
||||
_estack = .;
|
||||
} >ram
|
||||
|
||||
.stab 0 (NOLOAD) :
|
||||
{
|
||||
*(.stab)
|
||||
}
|
||||
|
||||
.stabstr 0 (NOLOAD) :
|
||||
{
|
||||
*(.stabstr)
|
||||
}
|
||||
/* DWARF debug sections.
|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
|
||||
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
@@ -0,0 +1,248 @@
|
||||
/*******************************************************************************
|
||||
* (c) Copyright 2015 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* file name : debug-in-microsemi-smartfusion2-esram.ld
|
||||
* SmartFusion2 Cortex-M3 linker script for creating a SoftConsole downloadable
|
||||
* debug image executing in SmartFusion2 internal eSRAM.
|
||||
*
|
||||
* Some current (April 2015) dev kit memory map possibilities are
|
||||
* --Type-------Device-----------address start---address end----size---Dbus--RAM IC-------SF2--Comment---------------
|
||||
* --eNVM-------M2S010-----------0x60000000------0x6007FFFF-----256KB---------------------010------------------------
|
||||
* --eNVM-------M2S090-----------0x60000000------0x6007FFFF-----512KB---------------------090------------------------
|
||||
* --eSRAM------M2Sxxx-----------0x20000000------0x2000FFFF-----64KB----------------------xxx--All have same amount--
|
||||
* --eSRAM------M2Sxxx-----------0x20000000------0x20013FFF-----80KB----------------------xxx--If ECC/SECDED not used
|
||||
* --Fabric-----M2S010-----------0x30000000------0x6007FFFF-----400Kb---------------------010--note-K bits-----------
|
||||
* --Fabric-----M2S090-----------0x30000000------0x6007FFFF-----2074Kb--------------------090--note-K bits-----------
|
||||
* --LPDDR------STARTER-KIT------0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----050------------------------
|
||||
* --LPDDR------484-STARTER-KIT--0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----010------------------------
|
||||
* --LPDDR------SEC-EVAL-KIT-----0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16LF---090--Security eval kit-----
|
||||
* --DDR3-------ADevKit----------0xA0000000------0xBFFFFFFF-----1GB----32--MT41K256M8DA---150------------------------
|
||||
* --Some older physical memory map possibilities are
|
||||
* --Type-------location---------address start---address end----size---Dbus---RAM IC------SF2--Comment--------------
|
||||
* --LPDDR------EVAL KIT---------0xA0000000------0xA3FFFFFF-----64MB-=-16--MT46H32M16LF---025--Eval Kit--------------
|
||||
* --DDR3-------DevKit-----------0xA0000000------0xAFFFFFFF-----512MB--16--MT41K256M8DA---050------------------------
|
||||
*
|
||||
* Example linker scripts use lowest practicl values so will work accross dev kits
|
||||
* eNVM=256KB eRAM=64KB External memory = 64MB
|
||||
*
|
||||
* On reset, the eNVM region is mapped to 0x00000000
|
||||
* This is changed below by setting the __smartfusion2_memory_remap variable as required.
|
||||
* Options are detailed below.
|
||||
*
|
||||
* SVN $Revision: 7478 $
|
||||
* SVN $Date: 2015-06-18 21:48:18 +0530 (Thu, 18 Jun 2015) $
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
|
||||
GROUP(-lc -lgcc -lm)
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(Reset_Handler)
|
||||
SEARCH_DIR(.)
|
||||
__DYNAMIC = 0;
|
||||
|
||||
/*******************************************************************************
|
||||
* Start of board customization.
|
||||
*******************************************************************************/
|
||||
MEMORY
|
||||
{
|
||||
/*
|
||||
* In general, example LD scripts use lowest common memory footprint
|
||||
* so will work with all devices.
|
||||
*/
|
||||
/*
|
||||
* WARNING: The words "SOFTCONSOLE", "FLASH", and "USE", the colon ":", and
|
||||
* the name of the type of flash memory are all in a specific order.
|
||||
* Please do not modify that comment line, in order to ensure
|
||||
* debugging of your application will use the flash memory correctly.
|
||||
*/
|
||||
/* SmartFusion2 internal eSRAM */
|
||||
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
|
||||
}
|
||||
|
||||
RAM_START_ADDRESS = 0x20000000; /* Must be the same value MEMORY region ram ORIGIN above. */
|
||||
RAM_SIZE = 64k; /* Must be the same value MEMORY region ram LENGTH above. */
|
||||
MAIN_STACK_SIZE = 4k; /* Cortex main stack size. */
|
||||
MIN_SIZE_HEAP = 4k; /* needs to be calculated for your application */
|
||||
|
||||
/* Please note that unassigned RAM will be allocated to the .heap section. */
|
||||
|
||||
/*******************************************************************************
|
||||
* End of board customization.
|
||||
*******************************************************************************/
|
||||
|
||||
PROVIDE (__main_stack_start = RAM_START_ADDRESS + RAM_SIZE);
|
||||
PROVIDE (_estack = __main_stack_start);
|
||||
PROVIDE (__mirrored_nvm = 0); /* Indicate to startup code that NVM is not mirrored to VMA address .text copy is required. */
|
||||
|
||||
/*
|
||||
* Remap instruction for start-up code and debugger.
|
||||
* set __smartfusion2_memory_remap to one of the following:
|
||||
* 0: remap eNVM to address 0x00000000 Production mode or debugging from eNVM
|
||||
* 1: remap eSRAM to address 0x00000000 See note 1 below.
|
||||
* 2: remap external DDR memory to address 0x00000000 Debugging from or production relocate to DDR memory
|
||||
* note 1: This option should only be used in production mode if required. When debugging using eSRAM, code is not
|
||||
* relocated and __smartfusion2_memory_remap should be set to option 0. In revision 7419 and below of
|
||||
* this file, __smartfusion2_memory_remap was set to option 1. This remap was not required and could lead to an issue
|
||||
* when displaying some invalid memory locations in the debugger using some Libero designs.
|
||||
*
|
||||
*/
|
||||
|
||||
PROVIDE (__smartfusion2_memory_remap = 0);
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.vector_table : ALIGN(0x10)
|
||||
{
|
||||
__vector_table_load = LOADADDR(.vector_table);
|
||||
__vector_table_start = .;
|
||||
__vector_table_vma_base_address = .;
|
||||
KEEP(*(.isr_vector))
|
||||
. = ALIGN(0x10);
|
||||
_evector_table = .;
|
||||
} >ram
|
||||
|
||||
.boot_code : ALIGN(0x10) /* When all code in RAM, no requirement for this section- but adds clarity when looking at .lst file */
|
||||
{
|
||||
*(.boot_code)
|
||||
. = ALIGN(0x10);
|
||||
} >ram
|
||||
|
||||
.text :
|
||||
ALIGN(0x10)
|
||||
{
|
||||
CREATE_OBJECT_SYMBOLS
|
||||
__text_load = LOADADDR(.text);
|
||||
__text_start = .;
|
||||
*(.text .text.* .gnu.linkonce.t.*)
|
||||
*(.plt)
|
||||
*(.gnu.warning)
|
||||
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
|
||||
|
||||
. = ALIGN(0x4);
|
||||
/* These are for running static constructors and destructors under ELF. */
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*crtend.o(.ctors))
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*crtend.o(.dtors))
|
||||
|
||||
*(.rodata .rodata.* .gnu.linkonce.r.*)
|
||||
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
*(.gcc_except_table)
|
||||
*(.eh_frame_hdr)
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.vector_table))
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(.fini_array))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(0x10);
|
||||
} >ram
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} >ram
|
||||
__exidx_end = .;
|
||||
_etext = .;
|
||||
PROVIDE(__text_end = .);
|
||||
|
||||
.data :
|
||||
ALIGN(0x10)
|
||||
{
|
||||
__data_load = LOADADDR (.data);
|
||||
_sidata = LOADADDR (.data);
|
||||
__data_start = .;
|
||||
_sdata = .;
|
||||
KEEP(*(.jcr))
|
||||
*(.got.plt) *(.got)
|
||||
*(.shdata)
|
||||
*(.data .data.* .gnu.linkonce.d.*)
|
||||
. = ALIGN(0x10);
|
||||
_edata = .;
|
||||
} >ram
|
||||
|
||||
.bss : ALIGN(0x10)
|
||||
{
|
||||
__bss_start__ = . ;
|
||||
_sbss = .;
|
||||
*(.shbss)
|
||||
*(.bss .bss.* .gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(0x10);
|
||||
__bss_end__ = .;
|
||||
_end = .;
|
||||
__end = _end;
|
||||
_ebss = .;
|
||||
PROVIDE(end = .);
|
||||
} >ram
|
||||
|
||||
.heap : ALIGN(0x10)
|
||||
{
|
||||
__heap_start__ = .;
|
||||
. += MIN_SIZE_HEAP; /* will generate error if this minimum size not available */
|
||||
. += ((ABSOLUTE(RAM_START_ADDRESS) + RAM_SIZE - MAIN_STACK_SIZE) - .); /* assumes stack starts after heap */
|
||||
_eheap = .;
|
||||
} >ram
|
||||
|
||||
.stack : ALIGN(0x10)
|
||||
{
|
||||
__stack_start__ = .;
|
||||
. += MAIN_STACK_SIZE;
|
||||
_estack = .;
|
||||
} >ram
|
||||
|
||||
.stab 0 (NOLOAD) :
|
||||
{
|
||||
*(.stab)
|
||||
}
|
||||
|
||||
.stabstr 0 (NOLOAD) :
|
||||
{
|
||||
*(.stabstr)
|
||||
}
|
||||
/* DWARF debug sections.
|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
|
||||
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) *(.isr_vector) }
|
||||
}
|
||||
@@ -0,0 +1,238 @@
|
||||
/*******************************************************************************
|
||||
* (c) Copyright 2015 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* file name : debug-in-microsemi-smartfusion2-external-ram.ld
|
||||
* SmartFusion2 Cortex-M3 linker script for creating a SoftConsole downloadable
|
||||
* debug image executing in external eRAM.
|
||||
*
|
||||
* Some current (April 2015) dev kit memory map possibilities are
|
||||
* --Type-------Device-----------address start---address end----size---Dbus--RAM IC-------SF2--Comment---------------
|
||||
* --eNVM-------M2S010-----------0x60000000------0x6007FFFF-----256KB---------------------010------------------------
|
||||
* --eNVM-------M2S090-----------0x60000000------0x6007FFFF-----512KB---------------------090------------------------
|
||||
* --eSRAM------M2Sxxx-----------0x20000000------0x2000FFFF-----64KB----------------------xxx--All have same amount--
|
||||
* --eSRAM------M2Sxxx-----------0x20000000------0x20013FFF-----80KB----------------------xxx--If ECC/SECDED not used
|
||||
* --Fabric-----M2S010-----------0x30000000------0x6007FFFF-----400Kb---------------------010--note-K bits-----------
|
||||
* --Fabric-----M2S090-----------0x30000000------0x6007FFFF-----2074Kb--------------------090--note-K bits-----------
|
||||
* --LPDDR------STARTER-KIT------0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----050------------------------
|
||||
* --LPDDR------484-STARTER-KIT--0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----010------------------------
|
||||
* --LPDDR------SEC-EVAL-KIT-----0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16LF---090--Security eval kit-----
|
||||
* --DDR3-------ADevKit----------0xA0000000------0xBFFFFFFF-----1GB----32--MT41K256M8DA---150------------------------
|
||||
* --Some older physical memory map possibilities are
|
||||
* --Type-------location---------address start---address end----size---Dbus---RAM IC------SF2--Comment--------------
|
||||
* --LPDDR------EVAL KIT---------0xA0000000------0xA3FFFFFF-----64MB-=-16--MT46H32M16LF---025--Eval Kit--------------
|
||||
* --DDR3-------DevKit-----------0xA0000000------0xAFFFFFFF-----512MB--16--MT41K256M8DA---050------------------------
|
||||
*
|
||||
* Example linker scripts use lowest practical values so will work accross dev kits
|
||||
* eNVM=256KB eRAM=64KB External memory = 64MB
|
||||
*
|
||||
* On reset, the eNVM region is mapped to 0x00000000
|
||||
* This is changed below by setting the __smartfusion2_memory_remap variable as required.
|
||||
* Options are detailed below.
|
||||
*
|
||||
* SVN $Revision: 7419 $
|
||||
* SVN $Date: 2015-05-15 21:20:21 +0530 (Fri, 15 May 2015) $
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
|
||||
GROUP(-lc -lgcc -lm)
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(Reset_Handler)
|
||||
SEARCH_DIR(.)
|
||||
__DYNAMIC = 0;
|
||||
|
||||
/*******************************************************************************
|
||||
* Start of board customization.
|
||||
*******************************************************************************/
|
||||
MEMORY
|
||||
{
|
||||
/*
|
||||
* In general, example LD scripts use lowest common memory footprint
|
||||
* accross dev boards so will work with all devices. Currently this is 64MB
|
||||
* Program and data space is split evenly in this example 32MB each
|
||||
*/
|
||||
/* SmartFusion2 internal eSRAM */
|
||||
esram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
|
||||
|
||||
/* SmartFusion2 development board external RAM */
|
||||
external_ram (rwx) : ORIGIN = 0x00000000, LENGTH = 32m
|
||||
|
||||
/* External MDDR RAM used for data section. */
|
||||
/* Must be enough room allocated for data section between 0xA0000000 and data_external_ram */
|
||||
data_external_ram (rw) : ORIGIN = 0xA2000000, LENGTH = 32m
|
||||
}
|
||||
|
||||
ESRAM_START_ADDRESS = 0x20000000; /* Must be the same value MEMORY region ram ORIGIN above. */
|
||||
ESRAM_SIZE = 64k; /* Must be the same value MEMORY region ram LENGTH above. */
|
||||
MAIN_STACK_SIZE = 64k; /* Cortex main stack size. */
|
||||
MIN_SIZE_HEAP = 64k; /* needs to be calculated for your application */
|
||||
TOP_OF_MDDR = 0xA4000000; /* Top address of the external MDDR memory. */
|
||||
|
||||
/*******************************************************************************
|
||||
* End of board customization.
|
||||
*******************************************************************************/
|
||||
/*PROVIDE (__main_ram_size = ESRAM_SIZE); */
|
||||
PROVIDE (__main_stack_start = ESRAM_START_ADDRESS + ESRAM_SIZE);
|
||||
PROVIDE (__process_stack_start = __main_stack_start - MAIN_STACK_SIZE);
|
||||
PROVIDE (_estack = __main_stack_start);
|
||||
PROVIDE (__mirrored_nvm = 0); /* Indicate to startup code that NVM is not mirrored to VMA address .text copy is required. */
|
||||
|
||||
/*
|
||||
* Remap instruction for startup code and debugger.
|
||||
* set __smartfusion2_memory_remap to one of the following:
|
||||
* 0: remap eNVM to address 0x00000000 Production mode or debugging from eNVM
|
||||
* 1: remap eSRAM to address 0x00000000 Debugging from eSRAM
|
||||
* 2: remap external DDR memory to address 0x00000000 Debugging from DDR memory
|
||||
*/
|
||||
PROVIDE (__smartfusion2_memory_remap = 2);
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.vector_table : ALIGN(0x10)
|
||||
{
|
||||
__vector_table_load = LOADADDR(.vector_table);
|
||||
__vector_table_start = .;
|
||||
__vector_table_vma_base_address = .; /* required by debugger for start address */
|
||||
KEEP(*(.isr_vector))
|
||||
. = ALIGN(0x10);
|
||||
_evector_table = .;
|
||||
} >external_ram
|
||||
|
||||
.text : ALIGN(0x10)
|
||||
{
|
||||
CREATE_OBJECT_SYMBOLS
|
||||
__text_load = LOADADDR(.text);
|
||||
__text_start = .;
|
||||
*(.text .text.* .gnu.linkonce.t.*)
|
||||
*(.plt)
|
||||
*(.gnu.warning)
|
||||
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
|
||||
|
||||
. = ALIGN(0x4);
|
||||
/* These are for running static constructors and destructors under ELF. */
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*crtend.o(.ctors))
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*crtend.o(.dtors))
|
||||
|
||||
*(.rodata .rodata.* .gnu.linkonce.r.*)
|
||||
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
*(.gcc_except_table)
|
||||
*(.eh_frame_hdr)
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.vector_table))
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(.fini_array))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(0x10);
|
||||
} >external_ram
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} >external_ram
|
||||
__exidx_end = .;
|
||||
_etext = .;
|
||||
PROVIDE(__text_end = .);
|
||||
|
||||
.data : ALIGN(0x10)
|
||||
{
|
||||
__data_load = LOADADDR (.data);
|
||||
_sidata = LOADADDR (.data);
|
||||
__data_start = .;
|
||||
_sdata = .;
|
||||
KEEP(*(.jcr))
|
||||
*(.got.plt) *(.got)
|
||||
*(.shdata)
|
||||
*(.data .data.* .gnu.linkonce.d.*)
|
||||
. = ALIGN(0x10);
|
||||
_edata = .;
|
||||
} >data_external_ram
|
||||
|
||||
.bss : ALIGN(0x10)
|
||||
{
|
||||
__bss_start__ = . ;
|
||||
_sbss = .;
|
||||
*(.shbss)
|
||||
*(.bss .bss.* .gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(0x10);
|
||||
__bss_end__ = .;
|
||||
_end = .;
|
||||
__end = _end;
|
||||
_ebss = .;
|
||||
PROVIDE(end = .);
|
||||
} >data_external_ram
|
||||
|
||||
.heap : ALIGN(0x10)
|
||||
{
|
||||
__heap_start__ = .;
|
||||
. += MIN_SIZE_HEAP; /* will generate error if this minimum size not available */
|
||||
. += (ABSOLUTE(TOP_OF_MDDR) - . );
|
||||
. = ALIGN(0x10);
|
||||
_eheap = .;
|
||||
} >data_external_ram
|
||||
|
||||
.stack : ALIGN(0x10)
|
||||
{
|
||||
__stack_start__ = .;
|
||||
. += MAIN_STACK_SIZE;
|
||||
. = ALIGN(0x10);
|
||||
_estack = .;
|
||||
} >esram
|
||||
|
||||
.stab 0 (NOLOAD) :
|
||||
{
|
||||
*(.stab)
|
||||
}
|
||||
|
||||
.stabstr 0 (NOLOAD) :
|
||||
{
|
||||
*(.stabstr)
|
||||
}
|
||||
/* DWARF debug sections.
|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
|
||||
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) *(.isr_vector) }
|
||||
}
|
||||
@@ -0,0 +1,241 @@
|
||||
/*******************************************************************************
|
||||
* (c) Copyright 2015 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* file name : production-smartfusion2-execute-in-place.ld
|
||||
* SmartFusion2 Cortex-M3 linker script for creating a SoftConsole downloadable
|
||||
* image executing in SmartFusion2 internal eNVM.
|
||||
*
|
||||
* Some current (April 2015) dev kit memory map possibilities are
|
||||
* --Type-------Device-----------address start---address end----size---Dbus--RAM IC-------SF2--Comment---------------
|
||||
* --eNVM-------M2S010-----------0x60000000------0x6007FFFF-----256KB---------------------010------------------------
|
||||
* --eNVM-------M2S090-----------0x60000000------0x6007FFFF-----512KB---------------------090------------------------
|
||||
* --eSRAM------M2Sxxx-----------0x20000000------0x2000FFFF-----64KB----------------------xxx--All have same amount--
|
||||
* --eSRAM------M2Sxxx-----------0x20000000------0x20013FFF-----80KB----------------------xxx--If ECC/SECDED not used
|
||||
* --Fabric-----M2S010-----------0x30000000------0x6007FFFF-----400Kb---------------------010--note-K bits-----------
|
||||
* --Fabric-----M2S090-----------0x30000000------0x6007FFFF-----2074Kb--------------------090--note-K bits-----------
|
||||
* --LPDDR------STARTER-KIT------0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----050------------------------
|
||||
* --LPDDR------484-STARTER-KIT--0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----010------------------------
|
||||
* --LPDDR------SEC-EVAL-KIT-----0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16LF---090--Security eval kit-----
|
||||
* --DDR3-------ADevKit----------0xA0000000------0xBFFFFFFF-----1GB----32--MT41K256M8DA---150------------------------
|
||||
* --Some older physical memory map possibilities are
|
||||
* --Type-------location---------address start---address end----size---Dbus---RAM IC------SF2--Comment--------------
|
||||
* --LPDDR------EVAL KIT---------0xA0000000------0xA3FFFFFF-----64MB-=-16--MT46H32M16LF---025--Eval Kit--------------
|
||||
* --DDR3-------DevKit-----------0xA0000000------0xAFFFFFFF-----512MB--16--MT41K256M8DA---050------------------------
|
||||
*
|
||||
* Example linker scripts use lowest practicl values so will work accross dev kits
|
||||
* eNVM=256KB eRAM=64KB External memory = 64MB
|
||||
*
|
||||
* On reset, the eNVM region is mapped to 0x00000000
|
||||
* This is changed below by setting the __smartfusion2_memory_remap variable as required.
|
||||
* Options are detailed below.
|
||||
*
|
||||
* SVN $Revision: 7454 $
|
||||
* SVN $Date: 2015-06-08 20:28:07 +0530 (Mon, 08 Jun 2015) $
|
||||
*/
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
|
||||
GROUP(-lc -lgcc -lm)
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(Reset_Handler)
|
||||
SEARCH_DIR(.)
|
||||
__DYNAMIC = 0;
|
||||
|
||||
/*******************************************************************************
|
||||
* Start of board customization.
|
||||
*******************************************************************************/
|
||||
MEMORY
|
||||
{
|
||||
/*
|
||||
* In general, example LD scripts use lowest common memory footprint
|
||||
* so will work with all devices.
|
||||
*/
|
||||
/*
|
||||
* WARNING: The words "SOFTCONSOLE", "FLASH", and "USE", the colon ":", and
|
||||
* the name of the type of flash memory are all in a specific order.
|
||||
* Please do not modify that comment line, in order to ensure
|
||||
* debugging of your application will use the flash memory correctly.
|
||||
*/
|
||||
|
||||
/* SOFTCONSOLE FLASH USE: microsemi-smartfusion2-envm */
|
||||
rom (rx) : ORIGIN = 0x00000000, LENGTH = 256k
|
||||
|
||||
/* SmartFusion2 internal eSRAM */
|
||||
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
|
||||
}
|
||||
|
||||
RAM_START_ADDRESS = 0x20000000; /* Must be the same value MEMORY region ram ORIGIN above. */
|
||||
RAM_SIZE = 64k; /* Must be the same value MEMORY region ram LENGTH above. */
|
||||
MAIN_STACK_SIZE = 4k; /* Cortex main stack size. */
|
||||
MIN_SIZE_HEAP = 4k; /* needs to be calculated for your application */
|
||||
|
||||
/*******************************************************************************
|
||||
* End of board customization.
|
||||
*******************************************************************************/
|
||||
|
||||
PROVIDE (__main_stack_start = RAM_START_ADDRESS + RAM_SIZE);
|
||||
PROVIDE (__process_stack_start = __main_stack_start - MAIN_STACK_SIZE);
|
||||
PROVIDE (_estack = __main_stack_start);
|
||||
PROVIDE (__mirrored_nvm = 0); /* Indicate to startup code that NVM is not mirrored to VMA address .text copy is required. */
|
||||
|
||||
/*
|
||||
* Remap instruction for startup code and debugger:
|
||||
* 0: remap eNVM to address 0x00000000
|
||||
* 1: remap eSRAM to address 0x00000000
|
||||
* 2: remap external DDR memory to address 0x00000000
|
||||
*/
|
||||
PROVIDE (__smartfusion2_memory_remap = 0);
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.vector_table :
|
||||
{
|
||||
__vector_table_load = LOADADDR(.vector_table);
|
||||
__vector_table_start = .;
|
||||
__vector_table_vma_base_address = .;
|
||||
KEEP(*(.isr_vector))
|
||||
. = ALIGN(0x10);
|
||||
_evector_table = .;
|
||||
} >rom
|
||||
|
||||
.boot_code : ALIGN(0x10) /* When all code in NVRAM, no requirement for this section- but adds clarity when looking at .lst file */
|
||||
{
|
||||
*(.boot_code)
|
||||
. = ALIGN(0x10);
|
||||
} >rom
|
||||
|
||||
.text : ALIGN(0x10)
|
||||
{
|
||||
CREATE_OBJECT_SYMBOLS
|
||||
__text_load = LOADADDR(.text);
|
||||
__text_start = .;
|
||||
|
||||
*(.text .text.* .gnu.linkonce.t.*)
|
||||
*(.plt)
|
||||
*(.gnu.warning)
|
||||
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
|
||||
|
||||
. = ALIGN(0x4);
|
||||
/* These are for running static constructors and destructors under ELF. */
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*crtend.o(.ctors))
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*crtend.o(.dtors))
|
||||
|
||||
*(.rodata .rodata.* .gnu.linkonce.r.*)
|
||||
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
*(.gcc_except_table)
|
||||
*(.eh_frame_hdr)
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.vector_table))
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(.fini_array))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(0x10);
|
||||
} >rom
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} >rom
|
||||
__exidx_end = .;
|
||||
_etext = .;
|
||||
|
||||
.data : ALIGN(0x10)
|
||||
{
|
||||
__data_load = LOADADDR(.data);
|
||||
_sidata = LOADADDR (.data);
|
||||
__data_start = .;
|
||||
_sdata = .;
|
||||
KEEP(*(.jcr))
|
||||
*(.got.plt) *(.got)
|
||||
*(.shdata)
|
||||
*(.data .data.* .gnu.linkonce.d.*)
|
||||
. = ALIGN(0x10);
|
||||
_edata = .;
|
||||
} >ram AT>rom
|
||||
|
||||
.bss : ALIGN(0x10)
|
||||
{
|
||||
__bss_start__ = . ;
|
||||
_sbss = .;
|
||||
*(.shbss)
|
||||
*(.bss .bss.* .gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(0x10);
|
||||
__bss_end__ = .;
|
||||
_end = .;
|
||||
__end = _end;
|
||||
_ebss = .;
|
||||
PROVIDE(end = .);
|
||||
} >ram AT>rom
|
||||
|
||||
.heap : ALIGN(0x10)
|
||||
{
|
||||
__heap_start__ = .;
|
||||
. += MIN_SIZE_HEAP; /* will generate error if this minimum size not available */
|
||||
. += ((ABSOLUTE(RAM_START_ADDRESS) + RAM_SIZE - MAIN_STACK_SIZE) - .); /* assumes stack starts after heap */
|
||||
_eheap = .;
|
||||
} >ram
|
||||
|
||||
.stack : ALIGN(0x10)
|
||||
{
|
||||
__stack_start__ = .;
|
||||
. += MAIN_STACK_SIZE;
|
||||
_estack = .;
|
||||
} >ram
|
||||
|
||||
.stab 0 (NOLOAD) :
|
||||
{
|
||||
*(.stab)
|
||||
}
|
||||
|
||||
.stabstr 0 (NOLOAD) :
|
||||
{
|
||||
*(.stabstr)
|
||||
}
|
||||
/* DWARF debug sections.
|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
|
||||
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
+260
@@ -0,0 +1,260 @@
|
||||
/*******************************************************************************
|
||||
* (c) Copyright 2015 Microsemi SoC Products Group. All rights reserved.
|
||||
*
|
||||
* file name : production-smartfusion2-relocate-to-external-ram.ld
|
||||
* SmartFusion2 Cortex-M3 linker script for creating a SoftConsole downloadable
|
||||
* image which is copied from internal eNVM to external RAM during boot-up.
|
||||
*
|
||||
* Some current (April 2015) dev kit memory map possibilities are
|
||||
* --Type-------Device-----------address start---address end----size---Dbus--RAM IC-------SF2--Comment---------------
|
||||
* --eNVM-------M2S010-----------0x60000000------0x6007FFFF-----256KB---------------------010------------------------
|
||||
* --eNVM-------M2S090-----------0x60000000------0x6007FFFF-----512KB---------------------090------------------------
|
||||
* --eSRAM------M2Sxxx-----------0x20000000------0x2000FFFF-----64KB----------------------xxx--All have same amount--
|
||||
* --eSRAM------M2Sxxx-----------0x20000000------0x20013FFF-----80KB----------------------xxx--If ECC/SECDED not used
|
||||
* --Fabric-----M2S010-----------0x30000000------0x6007FFFF-----400Kb---------------------010--note-K bits-----------
|
||||
* --Fabric-----M2S090-----------0x30000000------0x6007FFFF-----2074Kb--------------------090--note-K bits-----------
|
||||
* --LPDDR------STARTER-KIT------0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----050------------------------
|
||||
* --LPDDR------484-STARTER-KIT--0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----010------------------------
|
||||
* --LPDDR------SEC-EVAL-KIT-----0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16LF---090--Security eval kit-----
|
||||
* --DDR3-------ADevKit----------0xA0000000------0xBFFFFFFF-----1GB----32--MT41K256M8DA---150------------------------
|
||||
* --Some older physical memory map possibilities are
|
||||
* --Type-------location---------address start---address end----size---Dbus---RAM IC------SF2--Comment--------------
|
||||
* --LPDDR------EVAL KIT---------0xA0000000------0xA3FFFFFF-----64MB-=-16--MT46H32M16LF---025--Eval Kit--------------
|
||||
* --DDR3-------DevKit-----------0xA0000000------0xAFFFFFFF-----512MB--16--MT41K256M8DA---050------------------------
|
||||
*
|
||||
* Example linker scripts use lowest practicl values so will work accross dev kits
|
||||
* eNVM=256KB eRAM=64KB External memory = 64MB
|
||||
*
|
||||
* On reset, the eNVM region is mapped to 0x00000000
|
||||
* This is changed below by setting the __smartfusion2_memory_remap variable as required.
|
||||
* Options are detailed below.
|
||||
*
|
||||
* SVN $Revision: 7419 $
|
||||
* SVN $Date: 2015-05-15 21:20:21 +0530 (Fri, 15 May 2015) $
|
||||
*/
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
|
||||
GROUP(-lc -lgcc -lm)
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(Reset_Handler)
|
||||
SEARCH_DIR(.)
|
||||
__DYNAMIC = 0;
|
||||
|
||||
/*******************************************************************************
|
||||
* Start of board customization.
|
||||
*******************************************************************************/
|
||||
MEMORY
|
||||
{
|
||||
/*
|
||||
* In general, example LD scripts use lowest common memory footprint
|
||||
* so will work with all devices.
|
||||
*/
|
||||
/*
|
||||
* WARNING: The words "SOFTCONSOLE", "FLASH", and "USE", the colon ":", and
|
||||
* the name of the type of flash memory are all in a specific order.
|
||||
* Please do not modify that comment line, in order to ensure
|
||||
* debugging of your application will use the flash memory correctly.
|
||||
*/
|
||||
|
||||
/* SOFTCONSOLE FLASH USE: microsemi-smartfusion2-envm */
|
||||
rom (rx) : ORIGIN = 0x60000000, LENGTH = 256k
|
||||
|
||||
/* External MDDR RAM used for data section. */
|
||||
/* 0xA0000000 where external memory starts */
|
||||
/* first 0x00FFFFF reserved for relocated progam */
|
||||
/* Locate external RX data above reserved program area */
|
||||
/* !!! This must not overlap with external_ram when MDDR is remapped to 0x00000000.!!! */
|
||||
data_external_ram (rw) : ORIGIN = 0xA2000000, LENGTH = 32m
|
||||
/* SmartFusion2 development board external RAM */
|
||||
external_ram (rwx) : ORIGIN = 0x00000000, LENGTH = 32m
|
||||
|
||||
/* SmartFusion2 internal eSRAM */
|
||||
esram (rwx) : ORIGIN = 0x20000000, LENGTH = 64k
|
||||
|
||||
}
|
||||
|
||||
ESRAM_START_ADDRESS = 0x20000000; /* Must be the same value as MEMORY region esram ORIGIN above. */
|
||||
ESRAM_SIZE = 64k; /* Must be the same value as MEMORY region esram LENGTH above. */
|
||||
MAIN_STACK_SIZE = 64k; /* Cortex main stack size. */
|
||||
MIN_SIZE_HEAP = 64k; /* needs to be calculated for your application */
|
||||
TOP_OF_MDDR = 0xA4000000; /* Top address of the external MDDR memory. */
|
||||
|
||||
/*******************************************************************************
|
||||
* End of board customization.
|
||||
*******************************************************************************/
|
||||
|
||||
PROVIDE (__main_stack_start = ESRAM_START_ADDRESS + ESRAM_SIZE);
|
||||
PROVIDE (__process_stack_start = __main_stack_start - MAIN_STACK_SIZE);
|
||||
PROVIDE (_estack = __main_stack_start);
|
||||
PROVIDE (__mirrored_nvm = 0); /* Indicate to startup code that NVM is not mirrored to VMA address .text copy is required. */
|
||||
|
||||
/*
|
||||
* Remap instruction for startup code and debugger.
|
||||
* set __smartfusion2_memory_remap to one of the following:
|
||||
* 0: remap eNVM to address 0x00000000 Production mode or debugging from eNVM
|
||||
* 1: remap eSRAM to address 0x00000000 Debugging from eSRAM
|
||||
* 2: remap external DDR memory to address 0x00000000 Debugging from DDR memory
|
||||
*/
|
||||
PROVIDE (__smartfusion2_memory_remap = 2);
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.vector_table : ALIGN(0x10)
|
||||
{
|
||||
__vector_table_load = LOADADDR(.vector_table);
|
||||
__vector_table_start = .;
|
||||
__vector_table_vma_base_address = .;
|
||||
KEEP(*(.isr_vector))
|
||||
. = ALIGN(0x10);
|
||||
_evector_table = .;
|
||||
} >external_ram AT>rom
|
||||
|
||||
/* all data and code run/used before reloaction must be located here */
|
||||
.boot_code : ALIGN(0x10)
|
||||
{
|
||||
*(.boot_code) /* reset handler */
|
||||
*system_m2sxxx.o(.text*) /* SystemInit() - called before relocation to RAM so keep in ROM */
|
||||
*sys_config.o(.rodata*)
|
||||
*sys_config_SERDESIF_?.o(.rodata*) /* data- used to configure external memeory before use */
|
||||
/* note ? is a wildcard, can be upto 4 instances */
|
||||
*mscc_post_hw_cfg_init.o /* used on startup */
|
||||
*ecc_error_handler.o(.text*) /* do we need this???? */
|
||||
. = ALIGN(0x10);
|
||||
} >rom
|
||||
|
||||
.text : ALIGN(0x10)
|
||||
{
|
||||
CREATE_OBJECT_SYMBOLS
|
||||
__text_load = LOADADDR(.text);
|
||||
__text_start = .;
|
||||
|
||||
*(.text .text.* .gnu.linkonce.t.*)
|
||||
*(.plt)
|
||||
*(.gnu.warning)
|
||||
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
|
||||
|
||||
. = ALIGN(0x4);
|
||||
/* These are for running static constructors and destructors under ELF. */
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*crtend.o(.ctors))
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*crtend.o(.dtors))
|
||||
|
||||
*(.rodata .rodata.* .gnu.linkonce.r.*)
|
||||
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
*(.gcc_except_table)
|
||||
*(.eh_frame_hdr)
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.vector_table))
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(.fini_array))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(0x10);
|
||||
} >external_ram AT>rom
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} >external_ram AT>rom
|
||||
__exidx_end = .;
|
||||
_etext = .;
|
||||
|
||||
.data : ALIGN(0x10)
|
||||
{
|
||||
__data_load = LOADADDR(.data);
|
||||
_sidata = LOADADDR (.data);
|
||||
__data_start = .;
|
||||
_sdata = .;
|
||||
KEEP(*(.jcr))
|
||||
*(.got.plt) *(.got)
|
||||
*(.shdata)
|
||||
*(.data .data.* .gnu.linkonce.d.*)
|
||||
. = ALIGN(0x10);
|
||||
_edata = .;
|
||||
} >data_external_ram AT>rom
|
||||
|
||||
.bss : ALIGN(0x10)
|
||||
{
|
||||
__bss_start__ = . ;
|
||||
_sbss = .;
|
||||
*(.shbss)
|
||||
*(.bss .bss.* .gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(0x10);
|
||||
__bss_end__ = .;
|
||||
_end = .;
|
||||
__end = _end;
|
||||
_ebss = .;
|
||||
PROVIDE(end = .);
|
||||
} >data_external_ram AT>rom
|
||||
|
||||
.heap : ALIGN(0x10)
|
||||
{
|
||||
__heap_start__ = .;
|
||||
. += MIN_SIZE_HEAP; /* will generate error if this minimum size not available */
|
||||
. += (ABSOLUTE(TOP_OF_MDDR) - . );
|
||||
_eheap = .;
|
||||
} >data_external_ram
|
||||
|
||||
.stack : ALIGN(0x10)
|
||||
{
|
||||
__stack_start__ = .;
|
||||
. += MAIN_STACK_SIZE;
|
||||
_estack = .;
|
||||
} >esram
|
||||
|
||||
.stab 0 (NOLOAD) :
|
||||
{
|
||||
*(.stab)
|
||||
}
|
||||
|
||||
.stabstr 0 (NOLOAD) :
|
||||
{
|
||||
*(.stabstr)
|
||||
}
|
||||
/* DWARF debug sections.
|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
|
||||
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
@@ -10,7 +10,7 @@
|
||||
#if MSCC_NO_RELATIVE_PATHS
|
||||
#include "sys_config.h"
|
||||
#else
|
||||
#include "../drivers_config/sys_config/sys_config.h"
|
||||
#include "sys_config.h"
|
||||
#endif
|
||||
#include "sys_init_cfg_types.h"
|
||||
/*------------------------------------------------------------------------------
|
||||
|
||||
@@ -1,9 +0,0 @@
|
||||
<?xml version="1.0" encoding="utf-8"?>
|
||||
|
||||
<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
|
||||
|
||||
<component name="EventRecorderStub" version="1.0.0"/> <!--name and version of the component-->
|
||||
<events>
|
||||
</events>
|
||||
|
||||
</component_viewer>
|
||||
@@ -1,39 +0,0 @@
|
||||
[BREAKPOINTS]
|
||||
ForceImpTypeAny = 0
|
||||
ShowInfoWin = 1
|
||||
EnableFlashBP = 2
|
||||
BPDuringExecution = 0
|
||||
[CFI]
|
||||
CFISize = 0x00
|
||||
CFIAddr = 0x00
|
||||
[CPU]
|
||||
MonModeVTableAddr = 0xFFFFFFFF
|
||||
MonModeDebug = 0
|
||||
MaxNumAPs = 0
|
||||
LowPowerHandlingMode = 0
|
||||
OverrideMemMap = 0
|
||||
AllowSimulation = 1
|
||||
ScriptFile=""
|
||||
[FLASH]
|
||||
CacheExcludeSize = 0x00
|
||||
CacheExcludeAddr = 0x00
|
||||
MinNumBytesFlashDL = 0
|
||||
SkipProgOnCRCMatch = 1
|
||||
VerifyDownload = 1
|
||||
AllowCaching = 1
|
||||
EnableFlashDL = 2
|
||||
Override = 0
|
||||
Device="ARM7"
|
||||
[GENERAL]
|
||||
WorkRAMSize = 0x00
|
||||
WorkRAMAddr = 0x00
|
||||
RAMUsageLimit = 0x00
|
||||
[SWO]
|
||||
SWOLogFile=""
|
||||
[MEM]
|
||||
RdOverrideOrMask = 0x00
|
||||
RdOverrideAndMask = 0xFFFFFFFF
|
||||
RdOverrideAddr = 0xFFFFFFFF
|
||||
WrOverrideOrMask = 0x00
|
||||
WrOverrideAndMask = 0xFFFFFFFF
|
||||
WrOverrideAddr = 0xFFFFFFFF
|
||||
@@ -0,0 +1,26 @@
|
||||
mainmenu "RT-Thread Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config RTT_DIR
|
||||
string
|
||||
option env="RTT_ROOT"
|
||||
default "../.."
|
||||
|
||||
config PKGS_DIR
|
||||
string
|
||||
option env="PKGS_ROOT"
|
||||
default "packages"
|
||||
|
||||
source "$RTT_DIR/Kconfig"
|
||||
source "$PKGS_DIR/Kconfig"
|
||||
source "drivers/Kconfig"
|
||||
|
||||
config SOC_SF2_M2S010
|
||||
bool
|
||||
select RT_USING_COMPONENTS_INIT
|
||||
select RT_USING_USER_MAIN
|
||||
default y
|
||||
+28
-17
@@ -14,29 +14,40 @@ SmartFusion2 内部框图
|
||||
|
||||
移植了 RT-Thread 内核，支持线程调度、线程间同步和通信等，目前已经完成了PIN、Serial设备驱动，FinSH组件默认使用uart0设备。
|
||||
|
||||
| **片上外设** | **支持情况** | **备注** |
|
||||
| :----------------- | :----------: | :------------------------------------- |
|
||||
| GPIO | 支持 | GPIO_0/1输出，GPIO_2/3输入 |
|
||||
| UART | 支持 | MMUART0 & MMUART1|
|
||||
| SPI | 暂不支持 | |
|
||||
| I2C | 暂不支持 | |
|
||||
| RTC | 暂不支持 | |
|
||||
| PWM | 暂不支持 | |
|
||||
| USB | 暂不支持 | |
|
||||
| **片上外设** | **支持情况** |
|
||||
| :----------------- | :----------: |
|
||||
| GPIO | 支持 |
|
||||
| UART | 支持 |
|
||||
| SPI | 暂不支持 |
|
||||
| I2C | 暂不支持 |
|
||||
| RTC | 暂不支持 |
|
||||
| USB | 暂不支持 |
|
||||
|
||||
### 3. 使用说明
|
||||
### 3. scons构建系统
|
||||
|
||||
#### 3.1 FPGA 工程设计
|
||||
通过加入`rtconfig.py`，`SConstruct`，`SConscript`文件，可支持scons构建系统，可以输入`scons`调用env工具中包含的arm-gcc编译器构建工程，支持以下scons命令：
|
||||
|
||||
- `scons`：使用arm-gcc编译BSP
|
||||
- `scons -c`：清除执行 scons 时生成的临时文件和目标文件。
|
||||
- `scons --target=mdk4`：重新生成Keil MDK4环境下的工程。
|
||||
- `scons --target=mdk5`：重新生成Keil MDK5环境下的工程。
|
||||
- `scons --dist`：打包BSP工程，包括RT-Thread源码及BSP相关工程文件。
|
||||
|
||||
添加Kconfig文件，用于生成rtconfig.h。
|
||||
|
||||
### 4. 使用说明
|
||||
|
||||
#### 4.1 FPGA 工程设计
|
||||
|
||||
FPGA 部分使用 SmartDesign 图形化设计，不需要写 HDL 代码，时钟来自外部 50M 晶体输入，PLL 倍频 100M 提供给 MCU 使用，顶层配置如下图所示：
|
||||
|
||||
|
||||
|
||||
MSS 部分仅使用到了GPIO 和UART，GPIO_0和GPIO_1配置成输出输出模式用于驱动LED，GPIO_2和GPIO_3配置成输入模式，用于读取按键输入。
|
||||
MSS 部分仅使用到了GPIO 和UART，GPIO_0配置成输出输出模式用于驱动LED。
|
||||
|
||||
配置完成的 FPGA 工程文件下载：[sf2_fpga_prj.rar](https://wcc-blog.oss-cn-beijing.aliyuncs.com/Libero/RT-Thread/sf2_fpga_prj.rar)
|
||||
|
||||
#### 3.2 ARM 程序设计
|
||||
#### 4.2 ARM 程序设计
|
||||
|
||||
ARM 程序使用 Keil MDK 5.26 开发，需要安装 M2S 系列芯片支持包：[Microsemi.M2Sxxx.1.0.64.pack](http://www.actel-ip.com/repositories/CMSIS-Pack/Microsemi.M2Sxxx.1.0.64.pack)
|
||||
|
||||
@@ -46,7 +57,7 @@ ARM 程序使用 Keil MDK 5.26 开发，需要安装 M2S 系列芯片支持包
|
||||
|
||||
|
||||
|
||||
### 4. 下载和运行
|
||||
### 5. 下载和运行
|
||||
|
||||
为了能使用 ARM 调试器连接到 ARM 内核，而不是 FPGA，需要把 JTAG_SEL 引脚置为低电平。使用 ARM 调试器，如 JLink，对应连接 JTAG 口的 TMS、TCK、GND 引脚，如果连接正常，可以检测到 ARM 芯片，如下图所示：
|
||||
|
||||
@@ -72,7 +83,7 @@ msh >
|
||||
|
||||
|
||||
|
||||
### 5. 注意事项
|
||||
### 6. 注意事项
|
||||
|
||||
- FPGA 开发环境基于 Libero V11.8.2.4，向上兼容，不支持低版本 IDE。
|
||||
- ARM 开发环境基于 Keil MDK 5.26，如果使用SoftConsole IDE ，需要修改 `libcpu` 内的文件。
|
||||
@@ -80,12 +91,12 @@ msh >
|
||||
- 使用 SoftConsole 开发环境可以直接使用官方的 Flash Pro 调试器进行 ARM 程序的调试。
|
||||
- 内核时钟需要和 FPGA 中 MSS 配置的对应，Libero 自动生成的时钟文件，可以直接替换`bsp\smartfusion2\libraries\sys_config`文件夹下的文件 。
|
||||
|
||||
### 6. 参考资料
|
||||
### 7. 参考资料
|
||||
|
||||
- [学习路线 - RT-Thread 文档中心](https://www.rt-thread.org/document/site/)
|
||||
- [Microsemi Libero系列中文教程](https://blog.csdn.net/whik1194/article/details/102901710)
|
||||
|
||||
### 7. 联系我
|
||||
### 8. 联系我
|
||||
|
||||
- Github：[whik](https://github.com/whik)
|
||||
- E-Mail：wangchao149@foxmail.com
|
||||
|
||||
@@ -0,0 +1,15 @@
|
||||
# for module compiling
|
||||
import os
|
||||
Import('RTT_ROOT')
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
objs = []
|
||||
list = os.listdir(cwd)
|
||||
|
||||
for d in list:
|
||||
path = os.path.join(cwd, d)
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||
objs = objs + SConscript(os.path.join(d, 'SConscript'))
|
||||
|
||||
Return('objs')
|
||||
@@ -0,0 +1,35 @@
|
||||
import os
|
||||
import sys
|
||||
import rtconfig
|
||||
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
else:
|
||||
RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
|
||||
|
||||
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||
try:
|
||||
from building import *
|
||||
except:
|
||||
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
|
||||
print(RTT_ROOT)
|
||||
exit(-1)
|
||||
|
||||
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
|
||||
|
||||
DefaultEnvironment(tools=[])
|
||||
env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
|
||||
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||
|
||||
Export('RTT_ROOT')
|
||||
Export('rtconfig')
|
||||
|
||||
# prepare building environment
|
||||
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
|
||||
|
||||
# make a building
|
||||
DoBuilding(TARGET, objs)
|
||||
@@ -0,0 +1,10 @@
|
||||
from building import *
|
||||
import rtconfig
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
CPPPATH = [cwd]
|
||||
src = Glob('*.c')
|
||||
|
||||
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
|
||||
@@ -0,0 +1,16 @@
|
||||
; *************************************************************
|
||||
; *** Scatter-Loading Description File generated by uVision ***
|
||||
; *************************************************************
|
||||
|
||||
LR_IROM1 0x00000000 0x00040000 { ; load region size_region
|
||||
ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
.ANY (+XO)
|
||||
}
|
||||
RW_IRAM1 0x20000000 0x00010000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
@@ -0,0 +1,32 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-08-06 whik first version
|
||||
*/
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
|
||||
#define LED_PIN 0
|
||||
|
||||
int main(void)
|
||||
{
|
||||
int count = 1;
|
||||
|
||||
rt_pin_mode(LED_PIN, PIN_MODE_OUTPUT);
|
||||
|
||||
while(count++)
|
||||
{
|
||||
rt_pin_write(LED_PIN, PIN_HIGH);
|
||||
rt_thread_mdelay(500);
|
||||
|
||||
rt_pin_write(LED_PIN, PIN_LOW);
|
||||
rt_thread_mdelay(500);
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
@@ -1,38 +0,0 @@
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
|
||||
#define LED0_PIN 0
|
||||
#define LED1_PIN 1
|
||||
#define SW0_PIN 2
|
||||
#define SW1_PIN 3
|
||||
|
||||
extern void sw0_isr(void *args);
|
||||
extern void sw1_isr(void *args);
|
||||
|
||||
int main(void)
|
||||
{
|
||||
int count = 1;
|
||||
|
||||
rt_pin_attach_irq(SW0_PIN, PIN_IRQ_MODE_RISING, sw0_isr, RT_NULL);
|
||||
rt_pin_attach_irq(SW1_PIN, PIN_IRQ_MODE_RISING, sw1_isr, RT_NULL);
|
||||
|
||||
rt_pin_irq_enable(SW0_PIN, PIN_IRQ_ENABLE);
|
||||
rt_pin_irq_enable(SW1_PIN, PIN_IRQ_ENABLE);
|
||||
|
||||
rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
|
||||
rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT);
|
||||
|
||||
while(count++)
|
||||
{
|
||||
rt_pin_write(LED0_PIN, PIN_HIGH);
|
||||
rt_pin_write(LED1_PIN, PIN_HIGH);
|
||||
rt_thread_mdelay(100);
|
||||
|
||||
rt_pin_write(LED0_PIN, PIN_LOW);
|
||||
rt_pin_write(LED1_PIN, PIN_LOW);
|
||||
rt_thread_mdelay(100);
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
@@ -0,0 +1,10 @@
|
||||
from building import *
|
||||
import rtconfig
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
CPPPATH = [cwd]
|
||||
src = Glob('*.c')
|
||||
|
||||
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
|
||||
@@ -1,12 +1,11 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2019, RT-Thread Development Team
|
||||
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2017-07-24 Tanek the first version
|
||||
* 2018-11-12 Ernest Chen modify copyright
|
||||
* 2020-08-06 whik first version
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
@@ -1,16 +1,14 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-08-06 whik first version
|
||||
*/
|
||||
#include "config.h"
|
||||
|
||||
void sw0_isr(void *args)
|
||||
{
|
||||
rt_kprintf("sw_0 is trigger \r\n");
|
||||
rt_thread_mdelay(400);
|
||||
}
|
||||
|
||||
void sw1_isr(void *args)
|
||||
{
|
||||
rt_kprintf("sw_1 is trigger \r\n");
|
||||
rt_thread_mdelay(400);
|
||||
}
|
||||
/* hardware initialization */
|
||||
void boardInit(void)
|
||||
{
|
||||
|
||||
@@ -1,3 +1,12 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-08-06 whik first version
|
||||
*/
|
||||
#ifndef __CONFIG_H__
|
||||
#define __CONFIG_H__
|
||||
|
||||
|
||||
@@ -1,22 +0,0 @@
|
||||
%删除obj目录下的多余文件%
|
||||
del *.lnp /s
|
||||
::del *.opt /s ::不允许删除JLINK的设置
|
||||
del *.__i /s
|
||||
del *.crf /s
|
||||
del *.o /s
|
||||
del *.d /s
|
||||
del *.htm /s
|
||||
|
||||
%删除USER目录下的多余文件%
|
||||
del *.map /s
|
||||
del *.lst /s
|
||||
del *.dep /s
|
||||
del *.build_log.htm /s
|
||||
del *.bak /s
|
||||
del *.sct /s
|
||||
del *.axf /s
|
||||
|
||||
del JLinkLog.txt /s
|
||||
del SConscript /s
|
||||
|
||||
echo 编译产生的其他文件已经删除
|
||||
@@ -0,0 +1,35 @@
|
||||
menu "Hardware Drivers Config"
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
|
||||
menu "UART Drivers"
|
||||
config BSP_USING_UART0
|
||||
bool "Enable MSS_UART0"
|
||||
select RT_USING_SERIAL
|
||||
default y
|
||||
help
|
||||
config MSS_UART0
|
||||
|
||||
config BSP_USING_UART1
|
||||
bool "Enable MSS_UART1"
|
||||
select RT_USING_SERIAL
|
||||
default y
|
||||
help
|
||||
config MSS_UART1
|
||||
|
||||
config RT_CONSOLE_DEVICE_NAME
|
||||
string "the device name for console"
|
||||
default "uart0"
|
||||
endmenu
|
||||
|
||||
menu "GPIO Drivers"
|
||||
config BSP_USING_GPIO
|
||||
bool "Enable MSS_GPIO"
|
||||
select RT_USING_PIN
|
||||
default y
|
||||
help
|
||||
config MSS_GPIO
|
||||
endmenu
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
@@ -0,0 +1,16 @@
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = []
|
||||
|
||||
# add serial driver code
|
||||
if GetDepend('BSP_USING_UART0') or GetDepend('BSP_USING_UART1'):
|
||||
src += ['drv_uart.c']
|
||||
if GetDepend('BSP_USING_GPIO'):
|
||||
src += ['drv_gpio.c']
|
||||
|
||||
CPPPATH = [cwd]
|
||||
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
|
||||
@@ -1,8 +1,16 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-07-09 whik first version
|
||||
*/
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include <rthw.h>
|
||||
|
||||
#include "mss_gpio.h"
|
||||
#include "drv_gpio.h"
|
||||
|
||||
#ifdef BSP_USING_GPIO
|
||||
@@ -132,7 +140,7 @@ static rt_err_t sf2_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
|
||||
|
||||
static rt_err_t sf2_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled)
|
||||
{
|
||||
uint32_t mode;
|
||||
uint32_t mode = 0;
|
||||
rt_base_t level;
|
||||
|
||||
if (enabled == PIN_IRQ_ENABLE)
|
||||
|
||||
@@ -1,6 +1,17 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-08-06 whik first version
|
||||
*/
|
||||
#ifndef __DRV_GPIO_H__
|
||||
#define __DRV_GPIO_H__
|
||||
|
||||
#include "mss_gpio.h"
|
||||
|
||||
int rt_hw_pin_init(void);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -1,3 +1,12 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-08-06 whik first version
|
||||
*/
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
@@ -41,6 +50,7 @@ void uart1_rx_handler(mss_uart_instance_t *this_uart)
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
static rt_err_t sf2_uart_configure(struct rt_serial_device *serial,
|
||||
struct serial_configure *cfg)
|
||||
{
|
||||
@@ -151,7 +161,6 @@ static const struct rt_uart_ops sf2_uart_ops =
|
||||
sf2_uart_getc,
|
||||
};
|
||||
|
||||
|
||||
int rt_hw_uart_init(void)
|
||||
{
|
||||
rt_err_t result = RT_EOK;
|
||||
|
||||
@@ -1,3 +1,12 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-08-06 whik first version
|
||||
*/
|
||||
#ifndef __DRV_UART_H__
|
||||
#define __DRV_UART_H__
|
||||
|
||||
|
||||
@@ -0,0 +1,16 @@
|
||||
from building import *
|
||||
import rtconfig
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
src = [cwd + '/sys_config/sys_config.c']
|
||||
src += [cwd + '/mss_gpio/mss_gpio.c']
|
||||
src += [cwd + '/mss_uart/mss_uart.c']
|
||||
|
||||
CPPPATH = [cwd+'/sys_config']
|
||||
CPPPATH += [cwd+'/mss_gpio']
|
||||
CPPPATH += [cwd+'/mss_uart']
|
||||
|
||||
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
|
||||
File diff suppressed because one or more lines are too long
File diff suppressed because it is too large
Load Diff
+344
-517
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
+140
-203
@@ -18,7 +18,7 @@
|
||||
<Vendor>Microsemi</Vendor>
|
||||
<PackID>Microsemi.M2Sxxx.1.0.64</PackID>
|
||||
<PackURL>http://cores.actel-ip.com/CMSIS-Pack</PackURL>
|
||||
<Cpu>IROM(0x00000000,0x40000) IRAM(0x20000000,0x10000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE</Cpu>
|
||||
<Cpu>IRAM(0x20000000,0x10000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0M2Sxxx_256 -FS00 -FL040000 -FP0($$Device:M2S010$Flash\M2Sxxx_256.FLM))</FlashDriverDll>
|
||||
@@ -49,7 +49,7 @@
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\obj\</OutputDirectory>
|
||||
<OutputName>project</OutputName>
|
||||
<OutputName>rtthread</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>1</CreateHexFile>
|
||||
@@ -72,7 +72,7 @@
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name>..\BAT\del_hex.bat</UserProg1Name>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
@@ -134,11 +134,11 @@
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4096</DriverSelection>
|
||||
<DriverSelection>-1</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>BIN\UL2CM3.DLL</Flash2>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash3></Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
@@ -199,7 +199,7 @@
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi4>1</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
@@ -327,18 +327,18 @@
|
||||
<uC99>0</uC99>
|
||||
<uGnu>0</uGnu>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>3</v6Lang>
|
||||
<v6LangP>3</v6LangP>
|
||||
<vShortEn>0</vShortEn>
|
||||
<vShortWch>0</vShortWch>
|
||||
<v6Lang>1</v6Lang>
|
||||
<v6LangP>1</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Define>RT_USING_ARM_LIBC</Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath>..\smartfusion2;.\board;.\drivers;.\CMSIS;.\CMSIS\startup_arm;.\libraries\mss_gpio;.\libraries\mss_uart;.\libraries\sys_config;..\..\include;..\..\include\libc;..\..\components\finsh;..\..\components\drivers\include;..\..\components\drivers\include\drivers;..\..\components\drivers\include\ipc</IncludePath>
|
||||
<IncludePath>.;..\..\include;applications;board;CMSIS;drivers;libraries\sys_config;libraries\mss_gpio;libraries\mss_uart;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m3;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\finsh;..\..\components\libc\compilers\armlibc;..\..\components\libc\compilers\common</IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
@@ -360,7 +360,7 @@
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>1</umfTarg>
|
||||
<umfTarg>0</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
@@ -369,7 +369,7 @@
|
||||
<TextAddressRange>0x00000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile>..\OBJ\project.sct</ScatterFile>
|
||||
<ScatterFile>.\applications\link.sct</ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
@@ -379,81 +379,6 @@
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>Applications</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>main.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\applicatons\main.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>board.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\board\board.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>config.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\board\config.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>rtconfig.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>.\rtconfig.h</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Libraries</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>mss_gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\libraries\mss_gpio\mss_gpio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mss_uart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\libraries\mss_uart\mss_uart.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>sys_config.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\libraries\sys_config\sys_config.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>sys_config_mss_clocks.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>.\libraries\sys_config\sys_config_mss_clocks.h</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>CMSIS</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>core_cm3.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\CMSIS\core_cm3.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>system_m2sxxx.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\CMSIS\system_m2sxxx.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>startup_m2sxxx.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>.\CMSIS\startup_arm\startup_m2sxxx.s</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>hw_reg_access.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>.\CMSIS\hal\hw_reg_access.s</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Kernel</GroupName>
|
||||
<Files>
|
||||
@@ -467,11 +392,6 @@
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\components.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>cpu.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\cpu.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>device.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
@@ -502,11 +422,6 @@
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\mem.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>memheap.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\memheap.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mempool.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
@@ -527,11 +442,6 @@
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\signal.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>slab.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\slab.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>thread.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
@@ -544,18 +454,108 @@
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Applications</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>main.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>applications\main.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>board.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>board\board.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>config.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>board\config.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>CMSIS</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>core_cm3.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>CMSIS\core_cm3.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>system_m2sxxx.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>CMSIS\system_m2sxxx.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>startup_m2sxxx.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>CMSIS\startup_arm\startup_m2sxxx.s</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Drivers</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>drv_gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\drivers\drv_gpio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>drv_uart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\drivers\drv_uart.c</FilePath>
|
||||
<FilePath>drivers\drv_uart.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>drv_gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>drivers\drv_gpio.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Libraries</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>sys_config.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>libraries\sys_config\sys_config.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mss_gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>libraries\mss_gpio\mss_gpio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mss_uart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>libraries\mss_uart\mss_uart.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>cpu</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>backtrace.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>div0.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\libcpu\arm\common\div0.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>showmem.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\libcpu\arm\common\showmem.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>cpuport.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\libcpu\arm\cortex-m3\cpuport.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>context_rvds.S</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\..\libcpu\arm\cortex-m3\context_rvds.S</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
@@ -567,6 +567,11 @@
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\misc\pin.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>serial.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\serial\serial.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>completion.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
@@ -602,105 +607,50 @@
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\src\workqueue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>serial.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\drivers\serial\serial.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>finish</GroupName>
|
||||
<GroupName>finsh</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>cmd.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\cmd.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_compiler.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_compiler.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_error.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_error.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_heap.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_heap.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_init.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_init.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_node.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_node.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_ops.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_ops.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_parser.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_parser.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_token.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_token.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_var.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_var.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_vm.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_vm.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>msh.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\msh.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>msh_file.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\msh_file.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>shell.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\shell.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>symbol.c</FileName>
|
||||
<FileName>cmd.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\symbol.c</FilePath>
|
||||
<FilePath>..\..\components\finsh\cmd.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>msh.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\msh.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>cpu</GroupName>
|
||||
<GroupName>libc</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>cpuport.c</FileName>
|
||||
<FileName>libc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\libcpu\arm\cortex-m3\cpuport.c</FilePath>
|
||||
<FilePath>..\..\components\libc\compilers\armlibc\libc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>context_rvds.S</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\..\libcpu\arm\cortex-m3\context_rvds.S</FilePath>
|
||||
<FileName>mem_std.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\libc\compilers\armlibc\mem_std.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stubs.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\libc\compilers\armlibc\stubs.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>time.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\libc\compilers\common\time.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
@@ -711,20 +661,7 @@
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components/>
|
||||
<files>
|
||||
<file attr="config" category="source" name="bsp\board.c" version="3.1.3">
|
||||
<instance index="0" removed="1">RTE\RTOS\board.c</instance>
|
||||
<component Cbundle="RT-Thread" Cclass="RTOS" Cgroup="kernel" Cvendor="RealThread" Cversion="3.1.3" condition="CMSIS Core with RTOS"/>
|
||||
<package license="License.txt" name="RT-Thread" schemaVersion="1.4" supportContact="https://www.rt-thread.org" url="https://www.rt-thread.org/download/mdk/" vendor="RealThread" version="3.1.3"/>
|
||||
<targetInfos/>
|
||||
</file>
|
||||
<file attr="config" category="header" name="bsp\rtconfig.h" version="3.1.3">
|
||||
<instance index="0" removed="1">RTE\RTOS\rtconfig.h</instance>
|
||||
<component Cbundle="RT-Thread" Cclass="RTOS" Cgroup="kernel" Cvendor="RealThread" Cversion="3.1.3" condition="CMSIS Core with RTOS"/>
|
||||
<package license="License.txt" name="RT-Thread" schemaVersion="1.4" supportContact="https://www.rt-thread.org" url="https://www.rt-thread.org/download/mdk/" vendor="RealThread" version="3.1.3"/>
|
||||
<targetInfos/>
|
||||
</file>
|
||||
</files>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
</Project>
|
||||
|
||||
+149
-33
@@ -1,49 +1,165 @@
|
||||
/* RT-Thread config file */
|
||||
#ifndef __RTTHREAD_CFG_H__
|
||||
#define __RTTHREAD_CFG_H__
|
||||
#ifndef RT_CONFIG_H__
|
||||
#define RT_CONFIG_H__
|
||||
|
||||
#define RT_THREAD_PRIORITY_MAX 8
|
||||
#define RT_TICK_PER_SECOND 1000
|
||||
#define RT_ALIGN_SIZE 4
|
||||
#define RT_NAME_MAX 8
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* RT-Thread Configuration */
|
||||
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
#define RT_USING_USER_MAIN
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_PIN
|
||||
#define RT_USING_SERIAL
|
||||
/* RT-Thread Kernel */
|
||||
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart1"
|
||||
#define RT_NAME_MAX 8
|
||||
#define RT_ALIGN_SIZE 4
|
||||
#define RT_THREAD_PRIORITY_32
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
#define RT_TICK_PER_SECOND 100
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
#define RT_USING_HOOK
|
||||
#define RT_USING_IDLE_HOOK
|
||||
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||
#define IDLE_THREAD_STACK_SIZE 256
|
||||
#define RT_USING_TIMER_SOFT
|
||||
#define RT_TIMER_THREAD_PRIO 4
|
||||
#define RT_TIMER_THREAD_STACK_SIZE 512
|
||||
#define RT_DEBUG
|
||||
|
||||
#define BSP_USING_GPIO
|
||||
#define BSP_USING_UART0
|
||||
#define BSP_USING_UART1
|
||||
|
||||
#define RT_MAIN_THREAD_STACK_SIZE 512
|
||||
#define RT_DEBUG_INIT 0
|
||||
|
||||
#define RT_TIMER_THREAD_PRIO 4
|
||||
#define RT_TIMER_THREAD_STACK_SIZE 512
|
||||
/* Inter-Thread communication */
|
||||
|
||||
#define RT_USING_SEMAPHORE
|
||||
#define RT_USING_MUTEX
|
||||
#define RT_USING_EVENT
|
||||
#define RT_USING_MAILBOX
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
#define RT_USING_HEAP
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define RT_USING_MEMPOOL
|
||||
#define RT_USING_SMALL_MEM
|
||||
#define RT_USING_HEAP
|
||||
|
||||
/* Kernel Device Object */
|
||||
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart0"
|
||||
#define RT_VER_NUM 0x40003
|
||||
|
||||
/* RT-Thread Components */
|
||||
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
#define RT_USING_USER_MAIN
|
||||
#define RT_MAIN_THREAD_STACK_SIZE 2048
|
||||
#define RT_MAIN_THREAD_PRIORITY 10
|
||||
|
||||
/* C++ features */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define RT_USING_FINSH
|
||||
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_USING_MSH_ONLY
|
||||
#define __FINSH_THREAD_PRIORITY 5
|
||||
#define FINSH_THREAD_PRIORITY (RT_THREAD_PRIORITY_MAX / 8 * __FINSH_THREAD_PRIORITY + 1)
|
||||
#define FINSH_THREAD_STACK_SIZE 1024
|
||||
#define FINSH_HISTORY_LINES 5
|
||||
#define FINSH_THREAD_NAME "tshell"
|
||||
#define FINSH_USING_HISTORY
|
||||
#define FINSH_HISTORY_LINES 5
|
||||
#define FINSH_USING_SYMTAB
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
#define FINSH_THREAD_PRIORITY 20
|
||||
#define FINSH_THREAD_STACK_SIZE 1024
|
||||
#define FINSH_CMD_SIZE 80
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_USING_MSH_DEFAULT
|
||||
#define FINSH_USING_MSH_ONLY
|
||||
#define FINSH_ARG_MAX 10
|
||||
|
||||
/* Device virtual file system */
|
||||
|
||||
|
||||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_PIPE_BUFSZ 512
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_SERIAL_USING_DMA
|
||||
#define RT_SERIAL_RB_BUFSZ 64
|
||||
#define RT_USING_PIN
|
||||
|
||||
/* Using USB */
|
||||
|
||||
|
||||
/* POSIX layer and C standard library */
|
||||
|
||||
#define RT_USING_LIBC
|
||||
|
||||
/* Network */
|
||||
|
||||
/* Socket abstraction layer */
|
||||
|
||||
|
||||
/* Network interface device */
|
||||
|
||||
|
||||
/* light weight TCP/IP stack */
|
||||
|
||||
|
||||
/* AT commands */
|
||||
|
||||
|
||||
/* VBUS(Virtual Software BUS) */
|
||||
|
||||
|
||||
/* Utilities */
|
||||
|
||||
|
||||
/* RT-Thread online packages */
|
||||
|
||||
/* IoT - internet of things */
|
||||
|
||||
|
||||
/* Wi-Fi */
|
||||
|
||||
/* Marvell WiFi */
|
||||
|
||||
|
||||
/* Wiced WiFi */
|
||||
|
||||
|
||||
/* IoT Cloud */
|
||||
|
||||
|
||||
/* security packages */
|
||||
|
||||
|
||||
/* language packages */
|
||||
|
||||
|
||||
/* multimedia packages */
|
||||
|
||||
|
||||
/* tools packages */
|
||||
|
||||
|
||||
/* system packages */
|
||||
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
|
||||
/* samples: kernel and components samples */
|
||||
|
||||
|
||||
/* Hardware Drivers Config */
|
||||
|
||||
/* On-chip Peripheral Drivers */
|
||||
|
||||
/* UART Drivers */
|
||||
|
||||
#define BSP_USING_UART0
|
||||
#define BSP_USING_UART1
|
||||
|
||||
/* GPIO Drivers */
|
||||
|
||||
#define BSP_USING_GPIO
|
||||
#define SOC_SF2_M2S010
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@@ -0,0 +1,82 @@
|
||||
import os
|
||||
import sys
|
||||
|
||||
CROSS_TOOL = 'gcc'
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
# device options
|
||||
ARCH = 'arm'
|
||||
CPU = 'cortex-m3'
|
||||
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = 'D:/Program/env/tools/gnu_gcc/arm_gcc/mingw/bin'
|
||||
elif CROSS_TOOL == 'keil':
|
||||
PLATFORM = 'armcc'
|
||||
EXEC_PATH = 'D:/Program/Keil_v5'
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
# BUILD = 'debug'
|
||||
BUILD = 'release'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
PREFIX = 'arm-none-eabi-'
|
||||
CC = PREFIX + 'gcc'
|
||||
CXX = PREFIX + 'g++'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -mcpu=cortex-m3 -mthumb -ffunction-sections -fdata-sections -Wall'
|
||||
CFLAGS = DEVICE + ' -std=c99'
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
|
||||
# link script file path
|
||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T CMSIS/startup_gcc/debug-in-microsemi-smartfusion2-envm.ld'
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O0 -gdwarf-2 -g'
|
||||
AFLAGS += ' -gdwarf-2'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + OBJCPY + ' -O ihex $TARGET rtthread.hex\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
elif PLATFORM == 'armcc':
|
||||
# toolchains
|
||||
CC = 'armcc'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
|
||||
DEVICE = ' --cpu ' + CPU
|
||||
CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
|
||||
AFLAGS = DEVICE + ' --apcs=interwork '
|
||||
# link scatter file path
|
||||
LFLAGS = DEVICE + ' --scatter "applications/link.sct" --info sizes --info totals --info unused --info veneers --list rtthread.map --strict'
|
||||
|
||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/INC'
|
||||
LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/ARMCC/LIB'
|
||||
|
||||
CFLAGS += ' -D__MICROLIB '
|
||||
AFLAGS += ' --pd "__MICROLIB SETA 1" '
|
||||
LFLAGS += ' --library_type=microlib '
|
||||
EXEC_PATH += '/arm/armcc/bin/'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O0'
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
|
||||
@@ -0,0 +1,187 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>project</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>20000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>1</RunSim>
|
||||
<RunTarget>0</RunTarget>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\obj\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>255</CpuCode>
|
||||
<Books>
|
||||
<Book>
|
||||
<Number>0</Number>
|
||||
<Title>Datasheet</Title>
|
||||
<Path>DATASHTS\Actel\M2Sxxx\SmartFusion2_DS.pdf</Path>
|
||||
</Book>
|
||||
<Book>
|
||||
<Number>1</Number>
|
||||
<Title>Technical Reference Manual</Title>
|
||||
<Path>datashts\arm\cortex_m3\r2p1\DDI0337I_CORTEXM3_R2P1_TRM.PDF</Path>
|
||||
</Book>
|
||||
<Book>
|
||||
<Number>2</Number>
|
||||
<Title>Generic User Guide</Title>
|
||||
<Path>datashts\arm\cortex_m3\r2p1\DUI0552A_CORTEX_M3_DGUG.PDF</Path>
|
||||
</Book>
|
||||
</Books>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<tPdscDbg>0</tPdscDbg>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<nTsel>6</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>Segger\JL2CM3.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>JL2CM3</Key>
|
||||
<Name>-U10000387 -O207 -S8 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0M2Sxxx_256 -FS00 -FL040000</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-O207 -O207 -S9 -C0 -FO7 -FN1 -FC800 -FD20000000 -FF0M2Sxxx_256 -FL040000 -FS00</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>1</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>Source Group 1</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
</Group>
|
||||
|
||||
</ProjectOpt>
|
||||
@@ -0,0 +1,185 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj; *.o</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
<nMigrate>0</nMigrate>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>project</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
<RunAbUc>0</RunAbUc>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\obj\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>255</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>0</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<tRtrace>1</tRtrace>
|
||||
<sRSysVw>1</sRSysVw>
|
||||
<tRSysVw>1</tRSysVw>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>4</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
<sDlgPa></sDlgPa>
|
||||
<sIfile></sIfile>
|
||||
<tDll></tDll>
|
||||
<tDllPa></tDllPa>
|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>Segger\JL2CM3.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>JL2CM3</Key>
|
||||
<Name>-U10000387 -O78 -S8 -ZTIFSpeedSel50000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0M2Sxxx_256.FLM -FS00 -FL040000 -FP0($$Device:M2S010$Flash\M2Sxxx_256.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>UL2CM3</Key>
|
||||
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0M2Sxxx_256 -FS00 -FL040000 -FP0($$Device:M2S010$Flash\M2Sxxx_256.FLM))</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<Breakpoint/>
|
||||
<Tracepoint>
|
||||
<THDelay>0</THDelay>
|
||||
</Tracepoint>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>1</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>Source Group 1</GroupName>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<cbSel>0</cbSel>
|
||||
<RteFlg>0</RteFlg>
|
||||
</Group>
|
||||
|
||||
</ProjectOpt>
|
||||
@@ -0,0 +1,412 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
|
||||
|
||||
<SchemaVersion>1.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>project</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>M2S010</Device>
|
||||
<Vendor>Microsemi</Vendor>
|
||||
<Cpu>IRAM(0x20000000-0x2000FFFF) IROM(0x0-0x3FFFF) CLOCK(20000000) CPUTYPE("Cortex-M3")</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll>UL2CM3(-O207 -S9 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0M2Sxxx_256 -FS00 -FL040000)</FlashDriverDll>
|
||||
<DeviceId>6800</DeviceId>
|
||||
<RegisterFile></RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile></SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\obj\</OutputDirectory>
|
||||
<OutputName>rtthread</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>1</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<ListingPath>.\obj\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>1</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name>fromelf --bin -o "$L@L.bin" "#L"</UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>1</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments>-MPU</SimDllArguments>
|
||||
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM3</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments>-MPU</TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
<Simulator>
|
||||
<UseSimulator>0</UseSimulator>
|
||||
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||
<RunToMain>1</RunToMain>
|
||||
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||
<RestoreFunctions>1</RestoreFunctions>
|
||||
<RestoreToolbox>1</RestoreToolbox>
|
||||
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
|
||||
<RestoreSysVw>1</RestoreSysVw>
|
||||
</Simulator>
|
||||
<Target>
|
||||
<UseTarget>1</UseTarget>
|
||||
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||
<RunToMain>1</RunToMain>
|
||||
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||
<RestoreFunctions>0</RestoreFunctions>
|
||||
<RestoreToolbox>1</RestoreToolbox>
|
||||
<RestoreTracepoints>1</RestoreTracepoints>
|
||||
<RestoreSysVw>1</RestoreSysVw>
|
||||
<UsePdscDebugDescription>0</UsePdscDebugDescription>
|
||||
</Target>
|
||||
<RunDebugAfterBuild>0</RunDebugAfterBuild>
|
||||
<TargetSelection>6</TargetSelection>
|
||||
<SimDlls>
|
||||
<CpuDll></CpuDll>
|
||||
<CpuDllArguments></CpuDllArguments>
|
||||
<PeripheralDll></PeripheralDll>
|
||||
<PeripheralDllArguments></PeripheralDllArguments>
|
||||
<InitializationFile></InitializationFile>
|
||||
</SimDlls>
|
||||
<TargetDlls>
|
||||
<CpuDll></CpuDll>
|
||||
<CpuDllArguments></CpuDllArguments>
|
||||
<PeripheralDll></PeripheralDll>
|
||||
<PeripheralDllArguments></PeripheralDllArguments>
|
||||
<InitializationFile></InitializationFile>
|
||||
<Driver>Segger\JL2CM3.dll</Driver>
|
||||
</TargetDlls>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>0</Capability>
|
||||
<DriverSelection>-1</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>BIN\UL2CM3.DLL</Flash2>
|
||||
<Flash3></Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M3"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>0</RvdsVP>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>0</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x10000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x10000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>0</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>0</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>0</uC99>
|
||||
<useXO>0</useXO>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>0</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x00000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile>.\applications\link.sct</ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>Source Group 1</GroupName>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
</Project>
|
||||
@@ -0,0 +1,395 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>project</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>M2S010</Device>
|
||||
<Vendor>Microsemi</Vendor>
|
||||
<PackID>Microsemi.M2Sxxx.1.0.64</PackID>
|
||||
<PackURL>http://cores.actel-ip.com/CMSIS-Pack</PackURL>
|
||||
<Cpu>IRAM(0x20000000,0x10000) IROM(0x00000000,0x40000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0M2Sxxx_256 -FS00 -FL040000 -FP0($$Device:M2S010$Flash\M2Sxxx_256.FLM))</FlashDriverDll>
|
||||
<DeviceId>0</DeviceId>
|
||||
<RegisterFile>$$Device:M2S010$CMSIS\m2sxxx.h</RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:M2S010$SVD\M2Sxxx.svd</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\obj\</OutputDirectory>
|
||||
<OutputName>rtthread</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>1</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<ListingPath>.\obj\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>1</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name>fromelf --bin -o "$L@L.bin" "#L"</UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>1</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments> </SimDllArguments>
|
||||
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM3</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments></TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>-1</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>BIN\UL2CM3.DLL</Flash2>
|
||||
<Flash3></Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M3"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>0</RvdsVP>
|
||||
<RvdsMve>0</RvdsMve>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>0</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>1</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x10000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x10000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>2</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>0</uC99>
|
||||
<uGnu>0</uGnu>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>1</v6Lang>
|
||||
<v6LangP>1</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<uClangAs>0</uClangAs>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>0</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x00000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile>.\applications\link.sct</ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>Source Group 1</GroupName>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components/>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
</Project>
|
||||
Reference in New Issue
Block a user