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Merge pull request #4287 from OpenNuvoton/nuvoton

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[bsp/nuvoton] Sync and update.
This commit is contained in:
Bernard Xiong authored and GitHub committed 2021-02-02 05:44:51 +08:00
2 parents 12dfa670ac 9a37920a69
commit f2a091e2ad
75 files changed
+11213 -564
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bsp/nuvoton/libraries/m480/rtt_port/drv_crc.c
+11 -3
View File
@@ -44,8 +44,10 @@ static rt_uint32_t nu_crc_run(
{
uint32_t u32CalChecksum = 0;
uint32_t i = 0;
rt_err_t result;
rt_mutex_take(&s_CRC_mutex, RT_WAITING_FOREVER);
result = rt_mutex_take(&s_CRC_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
/* Configure CRC controller */
CRC_Open(u32OpMode, u32Attr, u32Seed, CRC_CPU_WDATA_8);
@@ -85,16 +87,22 @@ static rt_uint32_t nu_crc_run(
/* Get checksum value */
u32CalChecksum = CRC_GetChecksum();
rt_mutex_release(&s_CRC_mutex);
result = rt_mutex_release(&s_CRC_mutex);
RT_ASSERT(result == RT_EOK);
return u32CalChecksum;
}
rt_err_t nu_crc_init(void)
{
rt_err_t result;
SYS_ResetModule(CRC_RST);
rt_mutex_init(&s_CRC_mutex, NU_CRYPTO_CRC_NAME, RT_IPC_FLAG_FIFO);
result = rt_mutex_init(&s_CRC_mutex, NU_CRYPTO_CRC_NAME, RT_IPC_FLAG_FIFO);
RT_ASSERT(result == RT_EOK);
return RT_EOK;
}
bsp/nuvoton/libraries/m480/rtt_port/drv_crypto.c
+52 -16
View File
@@ -81,6 +81,8 @@ static volatile int s_SHA_done;
static rt_err_t nu_crypto_init(void)
{
rt_err_t result;
/* Enable Crypto engine interrupt */
NVIC_EnableIRQ(CRPT_IRQn);
@@ -89,12 +91,19 @@ static rt_err_t nu_crypto_init(void)
SHA_ENABLE_INT(CRPT);
//init cipher mutex
rt_mutex_init(&s_AES_mutex, NU_HWCRYPTO_AES_NAME, RT_IPC_FLAG_FIFO);
rt_mutex_init(&s_TDES_mutex, NU_HWCRYPTO_TDES_NAME, RT_IPC_FLAG_FIFO);
rt_mutex_init(&s_SHA_mutex, NU_HWCRYPTO_SHA_NAME, RT_IPC_FLAG_FIFO);
result = rt_mutex_init(&s_AES_mutex, NU_HWCRYPTO_AES_NAME, RT_IPC_FLAG_FIFO);
RT_ASSERT(result == RT_EOK);
result = rt_mutex_init(&s_TDES_mutex, NU_HWCRYPTO_TDES_NAME, RT_IPC_FLAG_FIFO);
RT_ASSERT(result == RT_EOK);
result = rt_mutex_init(&s_SHA_mutex, NU_HWCRYPTO_SHA_NAME, RT_IPC_FLAG_FIFO);
RT_ASSERT(result == RT_EOK);
#if !defined(BSP_USING_TRNG)
PRNG_ENABLE_INT(CRPT);
rt_mutex_init(&s_PRNG_mutex, NU_HWCRYPTO_PRNG_NAME, RT_IPC_FLAG_FIFO);
result = rt_mutex_init(&s_PRNG_mutex, NU_HWCRYPTO_PRNG_NAME, RT_IPC_FLAG_FIFO);
RT_ASSERT(result == RT_EOK);
#endif
return RT_EOK;
@@ -146,6 +155,8 @@ static rt_err_t nu_aes_crypt_run(
uint32_t u32DataLen
)
{
rt_err_t result;
uint32_t au32SwapKey[8];
uint32_t au32SwapIV[4];
@@ -171,7 +182,8 @@ static rt_err_t nu_aes_crypt_run(
au32SwapIV[2] = nu_get32_be(&pu8IV[8]);
au32SwapIV[3] = nu_get32_be(&pu8IV[12]);
rt_mutex_take(&s_AES_mutex, RT_WAITING_FOREVER);
result = rt_mutex_take(&s_AES_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
//Using Channel 0
AES_Open(CRPT, 0, bEncrypt, u32OpMode, u32KeySize, AES_IN_OUT_SWAP);
@@ -186,7 +198,8 @@ static rt_err_t nu_aes_crypt_run(
AES_Start(CRPT, 0, CRYPTO_DMA_ONE_SHOT);
while (!s_AES_done) {};
rt_mutex_release(&s_AES_mutex);
result = rt_mutex_release(&s_AES_mutex);
RT_ASSERT(result == RT_EOK);
return RT_EOK;
}
@@ -195,19 +208,26 @@ static rt_err_t nu_aes_crypt_run(
//Using PRNG instead of TRNG
static void nu_prng_open(uint32_t u32Seed)
{
rt_mutex_take(&s_PRNG_mutex, RT_WAITING_FOREVER);
rt_err_t result;
result = rt_mutex_take(&s_PRNG_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
//Open PRNG 64 bits. But always return 32 bits
PRNG_Open(CRPT, PRNG_KEY_SIZE_64, PRNG_SEED_RELOAD, u32Seed);
rt_mutex_release(&s_PRNG_mutex);
result = rt_mutex_release(&s_PRNG_mutex);
RT_ASSERT(result == RT_EOK);
}
static rt_uint32_t nu_prng_run(void)
{
rt_err_t result;
uint32_t au32RNGValue[2];
rt_mutex_take(&s_PRNG_mutex, RT_WAITING_FOREVER);
result = rt_mutex_take(&s_PRNG_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
s_PRNG_done = 0;
PRNG_Start(CRPT);
@@ -215,7 +235,9 @@ static rt_uint32_t nu_prng_run(void)
PRNG_Read(CRPT, au32RNGValue);
rt_mutex_release(&s_PRNG_mutex);
result = rt_mutex_release(&s_PRNG_mutex);
RT_ASSERT(result == RT_EOK);
return au32RNGValue[0];
}
@@ -356,6 +378,8 @@ static rt_err_t nu_des_crypt_run(
uint32_t u32DataLen
)
{
rt_err_t result;
uint32_t au32SwapKey[3][2];
uint32_t au32SwapIV[2];
@@ -373,7 +397,8 @@ static rt_err_t nu_des_crypt_run(
au32SwapIV[0] = nu_get32_be(&pu8IV[0]);
au32SwapIV[1] = nu_get32_be(&pu8IV[4]);
rt_mutex_take(&s_TDES_mutex, RT_WAITING_FOREVER);
result = rt_mutex_take(&s_TDES_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
//Using Channel 0
TDES_Open(CRPT, 0, bEncrypt, (u32OpMode & CRPT_TDES_CTL_TMODE_Msk), u32KeySize, u32OpMode, TDES_IN_OUT_WHL_SWAP);
@@ -388,7 +413,8 @@ static rt_err_t nu_des_crypt_run(
TDES_Start(CRPT, 0, CRYPTO_DMA_ONE_SHOT);
while (!s_TDES_done) {};
rt_mutex_release(&s_TDES_mutex);
result = rt_mutex_release(&s_TDES_mutex);
RT_ASSERT(result == RT_EOK);
return RT_EOK;
}
@@ -534,7 +560,10 @@ static rt_err_t nu_sha_hash_run(
uint32_t u32DataLen
)
{
rt_mutex_take(&s_SHA_mutex, RT_WAITING_FOREVER);
rt_err_t result;
result = rt_mutex_take(&s_SHA_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
uint8_t *pu8SrcAddr = (uint8_t *)pu8InData;
uint32_t u32CopyLen = 0;
@@ -574,7 +603,10 @@ static rt_err_t nu_sha_hash_run(
if (psSHACtx->pu8SHATempBuf == RT_NULL)
{
LOG_E("fun[%s] memory allocate %d bytes failed!", __FUNCTION__, psSHACtx->u32BlockSize);
rt_mutex_release(&s_SHA_mutex);
result = rt_mutex_release(&s_SHA_mutex);
RT_ASSERT(result == RT_EOK);
return -RT_ENOMEM;
}
@@ -602,7 +634,10 @@ static rt_err_t nu_sha_hash_run(
if (psSHACtx->pu8SHATempBuf == RT_NULL)
{
LOG_E("fun[%s] memory allocate %d bytes failed!", __FUNCTION__, psSHACtx->u32BlockSize);
rt_mutex_release(&s_SHA_mutex);
result = rt_mutex_release(&s_SHA_mutex);
RT_ASSERT(result == RT_EOK);
return -RT_ENOMEM;
}
@@ -613,7 +648,8 @@ static rt_err_t nu_sha_hash_run(
psSHACtx->u32SHATempBufLen += u32DataLen;
}
rt_mutex_release(&s_SHA_mutex);
result = rt_mutex_release(&s_SHA_mutex);
RT_ASSERT(result == RT_EOK);
return RT_EOK;
}
bsp/nuvoton/libraries/m480/rtt_port/drv_emac.c
+15 -5
View File
@@ -242,6 +242,8 @@ static void link_monitor(void *param)
static rt_err_t nu_emac_init(rt_device_t dev)
{
rt_err_t result;
nu_emac_t psNuEMAC = (nu_emac_t)dev;
EMAC_Close();
@@ -254,9 +256,12 @@ static rt_err_t nu_emac_init(rt_device_t dev)
NVIC_SetPriority(EMAC_RX_IRQn, 1);
NVIC_EnableIRQ(EMAC_RX_IRQn);
rt_sem_init(&psNuEMAC->eth_sem, "eth_sem", 0, RT_IPC_FLAG_FIFO);
result = rt_sem_init(&psNuEMAC->eth_sem, "eth_sem", 0, RT_IPC_FLAG_FIFO);
RT_ASSERT(result == RT_EOK);
result = rt_thread_init(&eth_tid, "eth", link_monitor, (void *)psNuEMAC, eth_stack, sizeof(eth_stack), RT_THREAD_PRIORITY_MAX - 2, 10);
RT_ASSERT(result == RT_EOK);
rt_thread_init(&eth_tid, "eth", link_monitor, (void *)psNuEMAC, eth_stack, sizeof(eth_stack), RT_THREAD_PRIORITY_MAX - 2, 10);
rt_thread_startup(&eth_tid);
#if defined(LWIP_IPV4) && defined(LWIP_IGMP)
@@ -310,6 +315,7 @@ static rt_err_t nu_emac_control(rt_device_t dev, int cmd, void *args)
static rt_err_t nu_emac_tx(rt_device_t dev, struct pbuf *p)
{
rt_err_t result;
nu_emac_t psNuEMAC = (nu_emac_t)dev;
struct pbuf *q;
rt_uint32_t offset = 0;
@@ -319,14 +325,15 @@ static rt_err_t nu_emac_tx(rt_device_t dev, struct pbuf *p)
/* Get free TX buffer */
if (buf == RT_NULL)
{
rt_sem_control(&psNuEMAC->eth_sem, RT_IPC_CMD_RESET, 0);
result = rt_sem_control(&psNuEMAC->eth_sem, RT_IPC_CMD_RESET, 0);
RT_ASSERT(result == RT_EOK);
EMAC_CLEAR_INT_FLAG(EMAC, EMAC_INTSTS_TXCPIF_Msk);
EMAC_ENABLE_INT(EMAC, EMAC_INTEN_TXCPIEN_Msk);
do
{
rt_sem_take(&psNuEMAC->eth_sem, 1);
while (rt_sem_take(&psNuEMAC->eth_sem, 10) != RT_EOK) ;
buf = (rt_uint8_t *)EMAC_ClaimFreeTXBuf();
}
while (buf == RT_NULL);
@@ -440,8 +447,11 @@ void EMAC_TX_IRQHandler(void)
/* Wake-up suspended process to send */
if (EMAC_GET_INT_FLAG(EMAC, EMAC_INTSTS_TXCPIF_Msk))
{
rt_err_t result;
EMAC_DISABLE_INT(EMAC, EMAC_INTEN_TXCPIEN_Msk);
rt_sem_release(&nu_emac_dev.eth_sem);
result = rt_sem_release(&nu_emac_dev.eth_sem);
RT_ASSERT(result == RT_EOK);
}
if (EMAC_GET_INT_FLAG(EMAC, EMAC_INTSTS_TXBEIF_Msk))
bsp/nuvoton/libraries/m480/rtt_port/drv_epwm.c
-37
View File
@@ -228,41 +228,4 @@ int rt_hw_epwm_init(void)
INIT_DEVICE_EXPORT(rt_hw_epwm_init);
#ifdef RT_USING_FINSH
#include <finsh.h>
#ifdef FINSH_USING_MSH
static int pwm_get(int argc, char **argv)
{
int result = 0;
struct rt_device_pwm *device = RT_NULL;
struct rt_pwm_configuration configuration = {0};
if (argc != 3)
{
rt_kprintf("Usage: pwm_get pwm1 1\n");
result = -RT_ERROR;
goto _exit;
}
device = (struct rt_device_pwm *)rt_device_find(argv[1]);
if (!device)
{
result = -RT_EIO;
goto _exit;
}
configuration.channel = atoi(argv[2]);
result = rt_device_control(&device->parent, PWM_CMD_GET, &configuration);
_exit:
return result;
}
MSH_CMD_EXPORT(pwm_get, pwm_get epwm1 1);
#endif /* FINSH_USING_MSH */
#endif /* RT_USING_FINSH */
#endif
bsp/nuvoton/libraries/m480/rtt_port/drv_fmc.c
+25 -7
View File
@@ -54,10 +54,15 @@ const struct fal_flash_dev Onchip_ldrom_flash = { "OnChip_LDROM", FMC_LDROM_BASE
int nu_fmc_read(long addr, uint8_t *buf, size_t size)
{
rt_err_t result;
size_t read_size = 0;
uint32_t addr_end = addr + size;
uint32_t isp_rdata = 0;
rt_mutex_take(g_mutex_fmc, RT_WAITING_FOREVER);
result = rt_mutex_take(g_mutex_fmc, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
SYS_UnlockReg();
if (NU_GET_LSB2BIT(addr))
@@ -87,7 +92,9 @@ int nu_fmc_read(long addr, uint8_t *buf, size_t size)
}
SYS_LockReg();
rt_mutex_release(g_mutex_fmc);
result = rt_mutex_release(g_mutex_fmc);
RT_ASSERT(result == RT_EOK);
return read_size;
}
@@ -97,8 +104,11 @@ int nu_fmc_write(long addr, const uint8_t *buf, size_t size)
size_t write_size = 0;
uint32_t addr_end = addr + size;
uint32_t isp_rdata = 0;
rt_err_t result;
result = rt_mutex_take(g_mutex_fmc, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
rt_mutex_take(g_mutex_fmc, RT_WAITING_FOREVER);
SYS_UnlockReg();
if (addr < FMC_APROM_END)
@@ -144,9 +154,12 @@ int nu_fmc_write(long addr, const uint8_t *buf, size_t size)
FMC_DISABLE_AP_UPDATE();
FMC_DISABLE_LD_UPDATE();
Exit2:
SYS_LockReg();
rt_mutex_release(g_mutex_fmc);
result = rt_mutex_release(g_mutex_fmc);
RT_ASSERT(result == RT_EOK);
return write_size;
@@ -157,12 +170,12 @@ int nu_fmc_erase(long addr, size_t size)
size_t erased_size = 0;
uint32_t addrptr;
uint32_t addr_end = addr + size;
rt_err_t result;
#if defined(NU_SUPPORT_NONALIGN)
uint8_t *page_sdtemp = RT_NULL;
uint8_t *page_edtemp = RT_NULL;
addrptr = addr & (FMC_FLASH_PAGE_SIZE - 1);
if (addrptr)
{
@@ -205,7 +218,9 @@ int nu_fmc_erase(long addr, size_t size)
}
#endif
rt_mutex_take(g_mutex_fmc, RT_WAITING_FOREVER);
result = rt_mutex_take(g_mutex_fmc, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
SYS_UnlockReg();
if (addr <= FMC_APROM_END)
@@ -233,7 +248,9 @@ Exit1:
FMC_DISABLE_LD_UPDATE();
Exit2:
SYS_LockReg();
rt_mutex_release(g_mutex_fmc);
result = rt_mutex_release(g_mutex_fmc);
RT_ASSERT(result == RT_EOK);
#if defined(NU_SUPPORT_NONALIGN)
@@ -315,6 +332,7 @@ static int nu_fmc_init(void)
SYS_LockReg();
g_mutex_fmc = rt_mutex_create("nu_fmc_lock", RT_IPC_FLAG_FIFO);
RT_ASSERT(g_mutex_fmc != RT_NULL);
/* PKG_USING_FAL */
#if defined(PKG_USING_FAL)
bsp/nuvoton/libraries/m480/rtt_port/drv_pdma.c
+45 -15
View File
@@ -256,11 +256,13 @@ void nu_pdma_channel_terminate(int i32ChannID)
int i;
uint32_t u32EnabledChans;
int ch_mask = 0;
rt_err_t result;
if (!(nu_pdma_chn_mask & (1 << i32ChannID)))
goto exit_pdma_channel_terminate;
rt_mutex_take(g_mutex_res, RT_WAITING_FOREVER);
result = rt_mutex_take(g_mutex_res, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
// Suspend all channels.
u32EnabledChans = nu_pdma_chn_mask & NU_PDMA_CH_Msk;
@@ -299,7 +301,8 @@ void nu_pdma_channel_terminate(int i32ChannID)
u32EnabledChans &= ~ch_mask;
}
rt_mutex_release(g_mutex_res);
result = rt_mutex_release(g_mutex_res);
RT_ASSERT(result == RT_EOK);
exit_pdma_channel_terminate:
@@ -552,7 +555,7 @@ rt_err_t nu_pdma_desc_setup(int i32ChannID, nu_pdma_desc_t dma_desc, uint32_t u3
goto exit_nu_pdma_desc_setup;
else if ((u32AddrSrc % (u32DataWidth / 8)) || (u32AddrDst % (u32DataWidth / 8)))
goto exit_nu_pdma_desc_setup;
else if ( i32TransferCnt > NU_PDMA_MAX_TXCNT )
else if (i32TransferCnt > NU_PDMA_MAX_TXCNT)
goto exit_nu_pdma_desc_setup;
psPeriphCtl = &nu_pdma_chn_arr[i32ChannID - NU_PDMA_CH_Pos].m_spPeripCtl;
@@ -625,11 +628,13 @@ static void nu_pdma_sgtbls_token_free(nu_pdma_desc_t psSgtbls)
rt_err_t nu_pdma_sgtbls_allocate(nu_pdma_desc_t *ppsSgtbls, int num)
{
int i, j, idx;
rt_err_t result;
RT_ASSERT(ppsSgtbls != NULL);
RT_ASSERT(num <= NU_PDMA_SG_TBL_MAXSIZE);
rt_mutex_take(g_mutex_sg, RT_WAITING_FOREVER);
result = rt_mutex_take(g_mutex_sg, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
for (i = 0; i < num; i++)
{
@@ -644,7 +649,8 @@ rt_err_t nu_pdma_sgtbls_allocate(nu_pdma_desc_t *ppsSgtbls, int num)
ppsSgtbls[i] = (nu_pdma_desc_t)&nu_pdma_sgtbl_arr[idx];
}
rt_mutex_release(g_mutex_sg);
result = rt_mutex_release(g_mutex_sg);
RT_ASSERT(result == RT_EOK);
return RT_EOK;
@@ -660,18 +666,22 @@ fail_nu_pdma_sgtbls_allocate:
ppsSgtbls[j] = NULL;
}
rt_mutex_release(g_mutex_sg);
result = rt_mutex_release(g_mutex_sg);
RT_ASSERT(result == RT_EOK);
return -RT_ERROR;
}
void nu_pdma_sgtbls_free(nu_pdma_desc_t *ppsSgtbls, int num)
{
int i;
rt_err_t result;
RT_ASSERT(ppsSgtbls != NULL);
RT_ASSERT(num <= NU_PDMA_SG_TBL_MAXSIZE);
rt_mutex_take(g_mutex_sg, RT_WAITING_FOREVER);
result = rt_mutex_take(g_mutex_sg, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
for (i = 0; i < num; i++)
{
@@ -682,7 +692,8 @@ void nu_pdma_sgtbls_free(nu_pdma_desc_t *ppsSgtbls, int num)
ppsSgtbls[i] = NULL;
}
rt_mutex_release(g_mutex_sg);
result = rt_mutex_release(g_mutex_sg);
RT_ASSERT(result == RT_EOK);
}
static rt_err_t nu_pdma_sgtbls_valid(nu_pdma_desc_t head)
@@ -870,6 +881,7 @@ static void nu_pdma_memfun_actor_init(void)
if (-(RT_ERROR) != (nu_pdma_memfun_actor_arr[i].m_i32ChannID = nu_pdma_channel_allocate(PDMA_MEM)))
{
nu_pdma_memfun_actor_arr[i].m_psSemMemFun = rt_sem_create("memactor_sem", 0, RT_IPC_FLAG_FIFO);
RT_ASSERT(nu_pdma_memfun_actor_arr[i].m_psSemMemFun != RT_NULL);
}
else
break;
@@ -878,16 +890,23 @@ static void nu_pdma_memfun_actor_init(void)
{
nu_pdma_memfun_actor_maxnum = i;
nu_pdma_memfun_actor_mask = ~(((1 << i) - 1));
nu_pdma_memfun_actor_pool_sem = rt_sem_create("mempool_sem", nu_pdma_memfun_actor_maxnum, RT_IPC_FLAG_FIFO);
RT_ASSERT(nu_pdma_memfun_actor_pool_sem != RT_NULL);
nu_pdma_memfun_actor_pool_lock = rt_mutex_create("mempool_lock", RT_IPC_FLAG_FIFO);
RT_ASSERT(nu_pdma_memfun_actor_pool_lock != RT_NULL);
}
}
static void nu_pdma_memfun_cb(void *pvUserData, uint32_t u32Events)
{
rt_err_t result;
nu_pdma_memfun_actor_t psMemFunActor = (nu_pdma_memfun_actor_t)pvUserData;
psMemFunActor->m_u32Result = u32Events;
rt_sem_release(psMemFunActor->m_psSemMemFun);
result = rt_sem_release(psMemFunActor->m_psSemMemFun);
RT_ASSERT(result == RT_EOK);
}
static int nu_pdma_memfun_employ(void)
@@ -897,7 +916,10 @@ static int nu_pdma_memfun_employ(void)
/* Headhunter */
if (nu_pdma_memfun_actor_pool_sem && (rt_sem_take(nu_pdma_memfun_actor_pool_sem, RT_WAITING_FOREVER) == RT_EOK))
{
rt_mutex_take(nu_pdma_memfun_actor_pool_lock, RT_WAITING_FOREVER);
rt_err_t result;
result = rt_mutex_take(nu_pdma_memfun_actor_pool_lock, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
/* Find the position of first '0' in nu_pdma_memfun_actor_mask. */
idx = nu_cto(nu_pdma_memfun_actor_mask);
if (idx != 32)
@@ -908,7 +930,8 @@ static int nu_pdma_memfun_employ(void)
{
idx = -1;
}
rt_mutex_release(nu_pdma_memfun_actor_pool_lock);
result = rt_mutex_release(nu_pdma_memfun_actor_pool_lock);
RT_ASSERT(result == RT_EOK);
}
return idx;
@@ -924,6 +947,8 @@ static rt_size_t nu_pdma_memfun(void *dest, void *src, uint32_t u32DataWidth, un
while (1)
{
rt_err_t result;
/* Employ actor */
if ((idx = nu_pdma_memfun_employ()) < 0)
continue;
@@ -952,7 +977,8 @@ static rt_size_t nu_pdma_memfun(void *dest, void *src, uint32_t u32DataWidth, un
0);
/* Wait it done. */
rt_sem_take(psMemFunActor->m_psSemMemFun, RT_WAITING_FOREVER);
result = rt_sem_take(psMemFunActor->m_psSemMemFun, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
/* Give result if get NU_PDMA_EVENT_TRANSFER_DONE.*/
if (psMemFunActor->m_u32Result & NU_PDMA_EVENT_TRANSFER_DONE)
@@ -976,12 +1002,16 @@ static rt_size_t nu_pdma_memfun(void *dest, void *src, uint32_t u32DataWidth, un
}
while (u32TransferCnt > 0);
rt_mutex_take(nu_pdma_memfun_actor_pool_lock, RT_WAITING_FOREVER);
result = rt_mutex_take(nu_pdma_memfun_actor_pool_lock, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
nu_pdma_memfun_actor_mask &= ~(1 << idx);
rt_mutex_release(nu_pdma_memfun_actor_pool_lock);
result = rt_mutex_release(nu_pdma_memfun_actor_pool_lock);
RT_ASSERT(result == RT_EOK);
/* Fire actor */
rt_sem_release(nu_pdma_memfun_actor_pool_sem);
result = rt_sem_release(nu_pdma_memfun_actor_pool_sem);
RT_ASSERT(result == RT_EOK);
break;
}
bsp/nuvoton/libraries/m480/rtt_port/drv_qspi.c
+2 -2
View File
@@ -61,7 +61,7 @@ static struct nu_spi nu_qspi_arr [] =
.name = "qspi0",
.spi_base = (SPI_T *)QSPI0,
#if defined(BSP_USING_QSPI_PDMA)
#if defined(BSP_USING_SPI_PDMA)
#if defined(BSP_USING_QSPI0_PDMA)
.pdma_perp_tx = PDMA_QSPI0_TX,
.pdma_perp_rx = PDMA_QSPI0_RX,
@@ -77,7 +77,7 @@ static struct nu_spi nu_qspi_arr [] =
.name = "qspi1",
.spi_base = (SPI_T *)QSPI1,
#if defined(BSP_USING_QSPI_PDMA)
#if defined(BSP_USING_SPI_PDMA)
#if defined(BSP_USING_QSPI1_PDMA)
.pdma_perp_tx = PDMA_QSPI1_TX,
.pdma_perp_rx = PDMA_QSPI1_RX,
bsp/nuvoton/libraries/m480/rtt_port/drv_sdh.c
+18 -6
View File
@@ -270,11 +270,13 @@ static rt_size_t nu_sdh_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_siz
{
rt_uint32_t ret = 0;
nu_sdh_t sdh = (nu_sdh_t)dev;
rt_err_t result;
RT_ASSERT(dev != RT_NULL);
RT_ASSERT(buffer != RT_NULL);
rt_sem_take(&sdh->lock, RT_WAITING_FOREVER);
result = rt_sem_take(&sdh->lock, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
/* Check alignment. */
if (((uint32_t)buffer & 0x03) != 0)
@@ -315,7 +317,8 @@ exit_nu_sdh_read:
sdh->pbuf = RT_NULL;
}
rt_sem_release(&sdh->lock);
result = rt_sem_release(&sdh->lock);
RT_ASSERT(result == RT_EOK);
if (ret == Successful)
return blk_nb;
@@ -329,11 +332,13 @@ static rt_size_t nu_sdh_write(rt_device_t dev, rt_off_t pos, const void *buffer,
{
rt_uint32_t ret = 0;
nu_sdh_t sdh = (nu_sdh_t)dev;
rt_err_t result;
RT_ASSERT(dev != RT_NULL);
RT_ASSERT(buffer != RT_NULL);
rt_sem_take(&sdh->lock, RT_WAITING_FOREVER);
result = rt_sem_take(&sdh->lock, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
/* Check alignment. */
if (((uint32_t)buffer & 0x03) != 0)
@@ -372,7 +377,8 @@ exit_nu_sdh_write:
sdh->pbuf = RT_NULL;
}
rt_sem_release(&sdh->lock);
result = rt_sem_release(&sdh->lock);
RT_ASSERT(result == RT_EOK);
if (ret == Successful) return blk_nb;
@@ -427,11 +433,13 @@ static int rt_hw_sdh_init(void)
/* Private */
nu_sdh_arr[i].dev.user_data = (void *)&nu_sdh_arr[i];
rt_sem_init(&nu_sdh_arr[i].lock, "sdhlock", 1, RT_IPC_FLAG_FIFO);
ret = rt_sem_init(&nu_sdh_arr[i].lock, "sdhlock", 1, RT_IPC_FLAG_FIFO);
RT_ASSERT(ret == RT_EOK);
SDH_Open(nu_sdh_arr[i].base, CardDetect_From_GPIO);
nu_sdh_arr[i].pbuf = RT_NULL;
ret = rt_device_register(&nu_sdh_arr[i].dev, nu_sdh_arr[i].name, flags);
RT_ASSERT(ret == RT_EOK);
}
@@ -620,7 +628,11 @@ static void sdh_hotplugger(void *param)
int mnt_init_sdcard_hotplug(void)
{
rt_thread_init(&sdh_tid, "hotplug", sdh_hotplugger, NULL, sdh_stack, sizeof(sdh_stack), RT_THREAD_PRIORITY_MAX - 2, 10);
rt_err_t result;
result = rt_thread_init(&sdh_tid, "hotplug", sdh_hotplugger, NULL, sdh_stack, sizeof(sdh_stack), RT_THREAD_PRIORITY_MAX - 2, 10);
RT_ASSERT(result == RT_EOK);
rt_thread_startup(&sdh_tid);
return 0;
bsp/nuvoton/libraries/m480/rtt_port/drv_spi.c
+6 -2
View File
@@ -241,11 +241,13 @@ exit_nu_spi_bus_configure:
#if defined(BSP_USING_SPI_PDMA)
static void nu_pdma_spi_rx_cb(void *pvUserData, uint32_t u32EventFilter)
{
rt_err_t result;
struct nu_spi *spi_bus = (struct nu_spi *)pvUserData;
RT_ASSERT(spi_bus != RT_NULL);
rt_sem_release(spi_bus->m_psSemBus);
result = rt_sem_release(spi_bus->m_psSemBus);
RT_ASSERT(result == RT_EOK);
}
static rt_err_t nu_pdma_spi_rx_config(struct nu_spi *spi_bus, uint8_t *pu8Buf, int32_t i32RcvLen, uint8_t bytes_per_word)
{
@@ -362,7 +364,8 @@ static rt_size_t nu_spi_pdma_transmit(struct nu_spi *spi_bus, const uint8_t *sen
SPI_TRIGGER_TX_RX_PDMA(spi_base);
/* Wait RX-PDMA transfer done */
rt_sem_take(spi_bus->m_psSemBus, RT_WAITING_FOREVER);
result = rt_sem_take(spi_bus->m_psSemBus, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
/* Stop TX/RX DMA transfer. */
SPI_DISABLE_TX_RX_PDMA(spi_base);
@@ -391,6 +394,7 @@ rt_err_t nu_hw_spi_pdma_allocate(struct nu_spi *spi_bus)
}
spi_bus->m_psSemBus = rt_sem_create("spibus_sem", 0, RT_IPC_FLAG_FIFO);
RT_ASSERT(spi_bus->m_psSemBus != RT_NULL);
return RT_EOK;
bsp/nuvoton/libraries/m480/rtt_port/drv_spii2s.c
+26 -30
View File
@@ -243,10 +243,11 @@ exit_nu_spii2s_capacity_check:
static rt_err_t nu_spii2s_dai_setup(nu_i2s_t psNuSPII2s, struct rt_audio_configure *pconfig)
{
rt_err_t result = RT_EOK;
nu_acodec_ops_t pNuACodecOps = RT_NULL;
nu_acodec_ops_t pNuACodecOps;
SPI_T *spii2s_base = (SPI_T *)psNuSPII2s->i2s_base;
RT_ASSERT(psNuSPII2s->AcodecOps != RT_NULL);
pNuACodecOps = psNuSPII2s->AcodecOps;
SPI_T *spii2s_base = (SPI_T *)psNuSPII2s->i2s_base;
/* Open SPII2S */
if (nu_spii2s_capacity_check(pconfig) == RT_TRUE)
@@ -283,7 +284,7 @@ static rt_err_t nu_spii2s_dai_setup(nu_i2s_t psNuSPII2s, struct rt_audio_configu
/* Set MCLK and enable MCLK */
SPII2S_EnableMCLK(spii2s_base, __HXT);
/* Set unmute */
/* Set un-mute */
if (pNuACodecOps->nu_acodec_mixer_control)
pNuACodecOps->nu_acodec_mixer_control(AUDIO_MIXER_MUTE, RT_FALSE);
}
@@ -298,14 +299,11 @@ exit_nu_spii2s_dai_setup:
static rt_err_t nu_spii2s_getcaps(struct rt_audio_device *audio, struct rt_audio_caps *caps)
{
rt_err_t result = RT_EOK;
nu_i2s_t psNuSPII2s;
nu_acodec_ops_t pNuACodecOps = RT_NULL;
nu_i2s_t psNuSPII2s = (nu_i2s_t)audio;
nu_acodec_ops_t pNuACodecOps;
RT_ASSERT(audio != RT_NULL);
RT_ASSERT(caps != RT_NULL);
psNuSPII2s = (nu_i2s_t)audio;
RT_ASSERT(psNuSPII2s->AcodecOps != RT_NULL);
pNuACodecOps = psNuSPII2s->AcodecOps;
@@ -367,6 +365,10 @@ static rt_err_t nu_spii2s_getcaps(struct rt_audio_device *audio, struct rt_audio
} // switch (caps->sub_type)
break;
default:
result = -RT_ERROR;
break;
} // switch (caps->main_type)
return result;
@@ -375,16 +377,14 @@ static rt_err_t nu_spii2s_getcaps(struct rt_audio_device *audio, struct rt_audio
static rt_err_t nu_spii2s_configure(struct rt_audio_device *audio, struct rt_audio_caps *caps)
{
rt_err_t result = RT_EOK;
nu_i2s_t psNuSPII2s;
nu_acodec_ops_t pNuACodecOps = RT_NULL;
nu_i2s_t psNuSPII2s = (nu_i2s_t)audio;
nu_acodec_ops_t pNuACodecOps;
int stream = -1;
RT_ASSERT(audio != RT_NULL);
RT_ASSERT(caps != RT_NULL);
psNuSPII2s = (nu_i2s_t)audio;
RT_ASSERT(psNuSPII2s->AcodecOps != RT_NULL);
pNuACodecOps = psNuSPII2s->AcodecOps;
switch (caps->main_type)
@@ -394,7 +394,6 @@ static rt_err_t nu_spii2s_configure(struct rt_audio_device *audio, struct rt_aud
psNuSPII2s->AcodecOps->nu_acodec_mixer_control(caps->sub_type, caps->udata.value);
break;
case AUDIO_TYPE_INPUT:
stream = AUDIO_STREAM_RECORD;
case AUDIO_TYPE_OUTPUT:
@@ -445,6 +444,7 @@ static rt_err_t nu_spii2s_configure(struct rt_audio_device *audio, struct rt_aud
}
}
break;
default:
result = -RT_ERROR;
break;
@@ -456,12 +456,10 @@ static rt_err_t nu_spii2s_configure(struct rt_audio_device *audio, struct rt_aud
static rt_err_t nu_spii2s_init(struct rt_audio_device *audio)
{
rt_err_t result = RT_EOK;
nu_i2s_t psNuSPII2s;
nu_i2s_t psNuSPII2s = (nu_i2s_t)audio;
RT_ASSERT(audio != RT_NULL);
psNuSPII2s = (nu_i2s_t)audio;
/* Reset this module */
SYS_ResetModule(psNuSPII2s->i2s_rst);
@@ -470,13 +468,12 @@ static rt_err_t nu_spii2s_init(struct rt_audio_device *audio)
static rt_err_t nu_spii2s_start(struct rt_audio_device *audio, int stream)
{
nu_i2s_t psNuSPII2s;
nu_i2s_t psNuSPII2s = (nu_i2s_t)audio;
SPI_T *spii2s_base;
RT_ASSERT(audio != RT_NULL);
psNuSPII2s = (nu_i2s_t)audio;
SPI_T *spii2s_base = (SPI_T *)psNuSPII2s->i2s_base;
spii2s_base = (SPI_T *)psNuSPII2s->i2s_base;
/* Restart all: SPII2S and codec. */
nu_spii2s_stop(audio, stream);
@@ -512,6 +509,8 @@ static rt_err_t nu_spii2s_start(struct rt_audio_device *audio, int stream)
LOG_I("Start record.");
}
break;
default:
return -RT_ERROR;
}
return RT_EOK;
@@ -519,14 +518,13 @@ static rt_err_t nu_spii2s_start(struct rt_audio_device *audio, int stream)
static rt_err_t nu_spii2s_stop(struct rt_audio_device *audio, int stream)
{
nu_i2s_t psNuSPII2s;
nu_i2s_t psNuSPII2s = (nu_i2s_t)audio;
nu_i2s_dai_t psNuSPII2sDai = RT_NULL;
SPI_T *spii2s_base;
RT_ASSERT(audio != RT_NULL);
psNuSPII2s = (nu_i2s_t)audio;
SPI_T *spii2s_base = (SPI_T *)psNuSPII2s->i2s_base;
spii2s_base = (SPI_T *)psNuSPII2s->i2s_base;
switch (stream)
{
@@ -574,13 +572,11 @@ static rt_err_t nu_spii2s_stop(struct rt_audio_device *audio, int stream)
static void nu_spii2s_buffer_info(struct rt_audio_device *audio, struct rt_audio_buf_info *info)
{
nu_i2s_t psNuSPII2s;
nu_i2s_t psNuSPII2s = (nu_i2s_t)audio;
RT_ASSERT(audio != RT_NULL);
RT_ASSERT(info != RT_NULL);
psNuSPII2s = (nu_i2s_t)audio;
info->buffer = (rt_uint8_t *)psNuSPII2s->i2s_dais[NU_I2S_DAI_PLAYBACK].fifo ;
info->total_size = NU_I2S_DMA_FIFO_SIZE;
info->block_size = NU_I2S_DMA_BUF_BLOCK_SIZE;
@@ -618,12 +614,12 @@ nu_hw_spii2s_pdma_allocate:
int rt_hw_spii2s_init(void)
{
int i = 0, j = 0;
int j = 0;
nu_i2s_dai_t psNuSPII2sDai;
for (j = (SPII2S_START + 1); j < SPII2S_CNT; j++)
{
int i = 0;
for (i = 0; i < NU_I2S_DAI_CNT; i++)
{
uint8_t *pu8ptr = rt_malloc(NU_I2S_DMA_FIFO_SIZE);
bsp/nuvoton/libraries/m480/rtt_port/drv_timer_capture.c
+1 -1
View File
@@ -72,7 +72,7 @@ void timer_interrupt_handler(nu_capture_t *nu_timer_capture)
{
TIMER_ClearCaptureIntFlag(nu_timer_capture->timer);
/* Frist event is rising edge */
/* First event is rising edge */
if (nu_timer_capture->first_edge == RT_TRUE)
{
nu_timer_capture->first_edge = RT_FALSE;
bsp/nuvoton/libraries/m480/rtt_port/drv_trng.c
+10 -3
View File
@@ -27,8 +27,10 @@ static int s_i32TRNGEnable = 0;
static rt_uint32_t nu_trng_run(void)
{
uint32_t u32RNGValue;
rt_err_t result;
rt_mutex_take(&s_TRNG_mutex, RT_WAITING_FOREVER);
result = rt_mutex_take(&s_TRNG_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
TRNG_Open();
@@ -38,13 +40,18 @@ static rt_uint32_t nu_trng_run(void)
u32RNGValue = rand();
}
rt_mutex_release(&s_TRNG_mutex);
result = rt_mutex_release(&s_TRNG_mutex);
RT_ASSERT(result == RT_EOK);
return u32RNGValue;
}
rt_err_t nu_trng_init(void)
{
rt_mutex_init(&s_TRNG_mutex, NU_CRYPTO_TRNG_NAME, RT_IPC_FLAG_FIFO);
rt_err_t result;
result = rt_mutex_init(&s_TRNG_mutex, NU_CRYPTO_TRNG_NAME, RT_IPC_FLAG_FIFO);
RT_ASSERT(result == RT_EOK);
if ((SYS->CSERVER & SYS_CSERVER_VERSION_Msk) == 0x0)
{
bsp/nuvoton/libraries/m480/rtt_port/drv_ui2c.c
+2 -1
View File
@@ -22,6 +22,7 @@
#define DBG_ENABLE
#define DBG_SECTION_NAME LOG_TAG
#define DBG_LEVEL DBG_INFO
#define DBG_COLOR
#include <rtdbg.h>
#define SLV_10BIT_ADDR (0x1E<<2) //1111+0xx+r/w
@@ -382,4 +383,4 @@ int rt_hw_ui2c_init(void)
INIT_DEVICE_EXPORT(rt_hw_ui2c_init);
#endif //#if (defined(BSP_USING_UI2C) && defined(RT_USING_I2C))
#endif //#if defined(BSP_USING_UI2C)
bsp/nuvoton/libraries/m480/rtt_port/drv_usbd.c
+2 -3
View File
@@ -288,7 +288,7 @@ __STATIC_INLINE void _USBD_IRQHandler(void)
}
else
{
/* USB Un-plug */
/* USB Unplug */
USBD_DISABLE_USB();
rt_usbd_disconnect_handler(&_rt_obj_udc);
}
@@ -447,7 +447,6 @@ void USBD_IRQHandler(void)
_USBD_IRQHandler();
/* leave interrupt */
rt_interrupt_leave();
}
@@ -523,7 +522,7 @@ int nu_usbd_register(void)
_rt_obj_udc.parent.user_data = &nu_usbd;
_rt_obj_udc.ops = &_udc_ops;
/* Register endpoint infomation */
/* Register endpoint information */
_rt_obj_udc.ep_pool = _ep_pool;
_rt_obj_udc.ep0.id = &_ep_pool[0];
bsp/nuvoton/libraries/m480/rtt_port/drv_usbhost.c
+18 -14
View File
@@ -446,7 +446,6 @@ static void int_xfer_done_cb(UTR_T *psUTR)
free_utr(psUTR);
}
static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes, int timeouts)
{
S_NU_RH_PORT_CTRL *psPortCtrl;
@@ -505,7 +504,6 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes
}
}
//others xfer
rt_completion_init(&(psPortDev->utr_completion));
@@ -694,7 +692,6 @@ static void nu_hcd_disconnect_callback(
rt_usbh_root_hub_disconnect_handler(s_sUSBHDev.uhcd, port_index);
}
/* USB host operations -----------------------------------------------------------*/
static struct uhcd_ops nu_uhcd_ops =
{
@@ -706,7 +703,7 @@ static struct uhcd_ops nu_uhcd_ops =
static rt_err_t nu_hcd_init(rt_device_t device)
{
struct nu_usbh_dev * pNuUSBHDev = (struct nu_usbh_dev *)device;
struct nu_usbh_dev *pNuUSBHDev = (struct nu_usbh_dev *)device;
usbh_core_init();
//install connect/disconnect callback
@@ -716,11 +713,11 @@ static rt_err_t nu_hcd_init(rt_device_t device)
//create thread for polling usbh port status
/* create usb hub thread */
pNuUSBHDev->polling_thread = rt_thread_create("usbh_drv", nu_usbh_rh_thread_entry, RT_NULL,
NU_USBH_THREAD_STACK_SIZE, 8, 20);
if ( pNuUSBHDev->polling_thread != RT_NULL)
NU_USBH_THREAD_STACK_SIZE, 8, 20);
if (pNuUSBHDev->polling_thread != RT_NULL)
{
/* startup usb host thread */
rt_thread_startup( pNuUSBHDev->polling_thread );
rt_thread_startup(pNuUSBHDev->polling_thread);
}
else
{
@@ -751,15 +748,20 @@ uint32_t usbh_tick_from_millisecond(uint32_t msec)
/* device pm suspend() entry. */
static int usbhost_pm_suspend(const struct rt_device *device, rt_uint8_t mode)
{
struct nu_usbh_dev * pNuUSBHDev = (struct nu_usbh_dev *)device;
rt_err_t result;
RT_ASSERT(pNuUSBHDev!=RT_NULL);
struct nu_usbh_dev *pNuUSBHDev = (struct nu_usbh_dev *)device;
RT_ASSERT(pNuUSBHDev != RT_NULL);
switch (mode)
{
case PM_SLEEP_MODE_LIGHT:
case PM_SLEEP_MODE_DEEP:
pNuUSBHDev->polling_thread->stat = RT_THREAD_READY;
rt_thread_suspend(pNuUSBHDev->polling_thread);
result = rt_thread_suspend(pNuUSBHDev->polling_thread);
RT_ASSERT(result == RT_EOK);
break;
default:
@@ -772,14 +774,16 @@ static int usbhost_pm_suspend(const struct rt_device *device, rt_uint8_t mode)
/* device pm resume() entry. */
static void usbhost_pm_resume(const struct rt_device *device, rt_uint8_t mode)
{
struct nu_usbh_dev * pNuUSBHDev = (struct nu_usbh_dev *)device;
RT_ASSERT(pNuUSBHDev!=RT_NULL);
rt_err_t result;
struct nu_usbh_dev *pNuUSBHDev = (struct nu_usbh_dev *)device;
RT_ASSERT(pNuUSBHDev != RT_NULL);
switch (mode)
{
case PM_SLEEP_MODE_LIGHT:
case PM_SLEEP_MODE_DEEP:
rt_thread_resume(pNuUSBHDev->polling_thread);
result = rt_thread_resume(pNuUSBHDev->polling_thread);
RT_ASSERT(result == RT_EOK);
break;
default:
@@ -846,7 +850,7 @@ int nu_usbh_register(void)
#if defined(RT_USING_PM)
rt_pm_device_register(&uhcd->parent, &device_pm_ops);
#endif
return RT_EOK;
}
INIT_DEVICE_EXPORT(nu_usbh_register);
bsp/nuvoton/libraries/m480/rtt_port/drv_uspi.c
+43 -28
View File
File diff suppressed because it is too large. Load diff
bsp/nuvoton/libraries/m480/rtt_port/drv_uuart.c
+1 -1
View File
@@ -484,7 +484,7 @@ static int nu_hw_uuart_dma_allocate(nu_uuart_t puuart)
static rt_err_t nu_uuart_control(struct rt_serial_device *serial, int cmd, void *arg)
{
rt_err_t result = RT_EOK;
rt_uint32_t flag;
rt_uint32_t flag = 0;
rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
RT_ASSERT(serial != RT_NULL);
bsp/nuvoton/libraries/nu_packages/AudioCodec/audio_test.c
+4 -2
View File
@@ -23,10 +23,10 @@
- For record function: Run it w/o parameter.
- For replay function: Run it with parameter.
*/
static void audio_test(int argc, char **argv)
static int audio_test(int argc, char **argv)
{
#define DEF_MAX_ARGV_NUM 8
int smplrate[] = {8000, 11025, 16000, 22050, 32000, 44100, 48000};
int smplrate[] = {8000, 16000, 44100, 48000};
int smplbit[] = {16};
int chnum[] = {1, 2};
struct wavrecord_info info;
@@ -74,6 +74,8 @@ static void audio_test(int argc, char **argv)
} // k
} // j
} // i
return 0;
}
#ifdef FINSH_USING_MSH
bsp/nuvoton/libraries/nu_packages/Demo/usbd_cdc_vcom_echo.c
+37 -15
View File
@@ -1,3 +1,15 @@
/**************************************************************************//**
*
* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-1-10 Wayne First version
*
******************************************************************************/
#include <rtthread.h>
#if defined(RT_USB_DEVICE_CDC) && (defined(BSP_USING_USBD) || defined(BSP_USING_HSUSBD))
@@ -6,7 +18,11 @@ static struct rt_semaphore rx_sem;
static rt_err_t uart_input(rt_device_t dev, rt_size_t size)
{
rt_sem_release(&rx_sem);
rt_err_t result = 0;
result = rt_sem_release(&rx_sem);
RT_ASSERT(result == RT_EOK);
return RT_EOK;
}
@@ -21,10 +37,8 @@ static void serial_thread_entry(void *parameter)
{
if (rt_sem_take(&rx_sem, 3 * RT_TICK_PER_SECOND) == -RT_ETIMEOUT)
{
time_t now;
/* output current time */
now = time(RT_NULL);
rt_snprintf(szStr, sizeof(szStr), "%.*s\n", 25, ctime(&now));
/* output current tick */
rt_snprintf(szStr, sizeof(szStr), "%d\n", rt_tick_get());
rt_device_write(serial, 0, &szStr[0], rt_strlen(szStr));
continue;
}
@@ -35,7 +49,7 @@ static void serial_thread_entry(void *parameter)
static int vcom_echo_init(void)
{
int err = 0;
rt_err_t result = 0;
rt_thread_t thread;
rt_device_t serial;
@@ -45,25 +59,33 @@ static int vcom_echo_init(void)
rt_kprintf("find failed!\n");
return RT_ERROR;
}
err = rt_device_init(serial);
if (err)
result = rt_device_init(serial);
if (result)
{
rt_kprintf("find failed!\n");
return -RT_ERROR;
rt_kprintf("init failed!\n");
return -1;
}
result = rt_device_open(serial, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX/* | RT_DEVICE_FLAG_DMA_TX */);
if (result)
{
rt_kprintf("open failed!\n");
return -1;
}
err = rt_device_open(serial, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX/* | RT_DEVICE_FLAG_DMA_TX */);
rt_sem_init(&rx_sem, "rx_sem", 0, RT_IPC_FLAG_FIFO);
result = rt_sem_init(&rx_sem, "rx_sem", 0, RT_IPC_FLAG_FIFO);
RT_ASSERT(result == RT_EOK);
rt_device_set_rx_indicate(serial, uart_input);
result = rt_device_set_rx_indicate(serial, uart_input);
RT_ASSERT(result == RT_EOK);
thread = rt_thread_create("serial", serial_thread_entry, (void *)serial, 1024, 25, 10);
if (thread != RT_NULL)
{
rt_thread_startup(thread);
result = rt_thread_startup(thread);
RT_ASSERT(result == RT_EOK);
}
return RT_EOK;
return 0;
}
INIT_APP_EXPORT(vcom_echo_init);
bsp/nuvoton/libraries/nu_packages/Demo/usbd_hid_dance_mouse.c
+10 -8
View File
@@ -35,15 +35,17 @@ static void usb_thread_entry(void *parameter)
{
int8_t i8MouseTable[] = { -16, -16, -16, 0, 16, 16, 16, 0};
uint8_t u8MouseIdx = 0;
uint8_t u8MoveLen=0, u8MouseMode = 1;
uint8_t u8MoveLen = 0, u8MouseMode = 1;
uint8_t pu8Buf[4];
rt_err_t result = RT_EOK;
rt_device_t device = (rt_device_t)parameter;
rt_sem_init(&tx_sem_complete, "tx_complete_sem_hid", 1, RT_IPC_FLAG_FIFO);
result = rt_sem_init(&tx_sem_complete, "tx_complete_sem_hid", 1, RT_IPC_FLAG_FIFO);
RT_ASSERT(result == RT_EOK);
rt_device_set_tx_complete(device, event_hid_in);
result = rt_device_set_tx_complete(device, event_hid_in);
RT_ASSERT(result == RT_EOK);
LOG_I("Ready.\n");
@@ -79,7 +81,7 @@ static void usb_thread_entry(void *parameter)
{
/* Wait it done. */
result = rt_sem_take(&tx_sem_complete, RT_WAITING_FOREVER);
RT_ASSERT( result== RT_EOK );
RT_ASSERT(result == RT_EOK);
}
} // while(1)
@@ -96,10 +98,10 @@ static int dance_mouse_init(void)
RT_ASSERT(ret == RT_EOK);
ret = rt_thread_init(&usb_thread,
"hidd",
usb_thread_entry, device,
usb_thread_stack, sizeof(usb_thread_stack),
10, 20);
"hidd",
usb_thread_entry, device,
usb_thread_stack, sizeof(usb_thread_stack),
10, 20);
RT_ASSERT(ret == RT_EOK);
ret = rt_thread_startup(&usb_thread);
bsp/nuvoton/libraries/nu_packages/Kconfig
+6
View File
@@ -62,4 +62,10 @@ menu "Nuvoton Packages Config"
endif
config NU_PKG_USING_SPINAND
bool "SPI NAND flash."
select BSP_USING_QSPI
select RT_USING_MTD_NAND
default n
endmenu
bsp/nuvoton/libraries/nu_packages/SPINAND/SConscript
+12
View File
@@ -0,0 +1,12 @@
# RT-Thread building script for component
from building import *
cwd = GetCurrentDir()
group = []
if GetDepend('NU_PKG_USING_SPINAND'):
src = Glob('*.c') + Glob('*.cpp')
CPPPATH = [cwd]
group = DefineGroup('nu_pkgs_spinand', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
bsp/nuvoton/libraries/nu_packages/SPINAND/drv_spinand.c
+912
View File
File diff suppressed because it is too large. Load diff
bsp/nuvoton/libraries/nu_packages/SPINAND/spinand.c
+693
View File
File diff suppressed because it is too large. Load diff
bsp/nuvoton/libraries/nu_packages/SPINAND/spinand.h
+95
View File
@@ -0,0 +1,95 @@
/**************************************************************************//**
*
* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-1-13 Wayne First version
*
******************************************************************************/
#ifndef __SPINAND_H__
#define __SPINAND_H__
#include <rtthread.h>
#include <drivers/mtd_nand.h>
#include "drv_spi.h"
#include <board.h>
/* SPI NAND flash information */
struct nu_spinand_info
{
uint32_t u32JEDECID;
uint16_t u16PageSize;
uint16_t u16OOBSize;
uint8_t u8QuadReadCmdId;
uint8_t u8ReadStatusCmdId;
uint8_t u8WriteStatusCmdid;
uint8_t u8StatusValue;
uint8_t u8DummyByte;
uint32_t u32BlockPerFlash;
uint32_t u32PagePerBlock;
uint8_t u8IsDieSelect;
const char *szDescription;
};
typedef struct nu_spinand_info *nu_spinand_info_t;
struct spinand_ops
{
rt_err_t (*block_erase)(struct rt_qspi_device *qspi, uint8_t u8Addr2, uint8_t u8Addr1, uint8_t u8Addr0);
uint8_t (*block_isbad)(struct rt_qspi_device *qspi, uint32_t u32PageAddr);
rt_err_t (*block_markbad)(struct rt_qspi_device *qspi, uint32_t u32PageAddr);
rt_err_t (*die_select)(struct rt_qspi_device *qspi, uint8_t select_die);
rt_err_t (*jedecid_get)(struct rt_qspi_device *qspi, uint32_t *pu32ID);
rt_err_t (*program_dataload)(struct rt_qspi_device *qspi, uint8_t u8AddrH, uint8_t u8AddrL, uint8_t *pu8DataBuff,
uint32_t u32DataCount, uint8_t *pu8SpareBuff, uint32_t u32SpareCount);
rt_err_t (*program_execute)(struct rt_qspi_device *qspi, uint8_t u8Addr2, uint8_t u8Addr1, uint8_t u8Addr0);
rt_err_t (*read_dataload)(struct rt_qspi_device *qspi, uint8_t u8Addr2, uint8_t u8Addr1, uint8_t u8Addr0);
rt_err_t (*read_quadoutput)(struct rt_qspi_device *qspi, uint8_t u8AddrH, uint8_t u8AddrL, uint8_t *pu8DataBuff, uint32_t u32DataCount);
};
typedef struct spinand_ops *nu_spinand_ops_t;
struct nu_spinand
{
struct nu_spinand_info info;
struct rt_qspi_device *qspi_device;
nu_spinand_ops_t ops;
struct rt_mutex lock;
};
typedef struct nu_spinand *nu_spinand_t;
#define SPINAND_FLASH_JEDECID g_spinandflash_dev.info.u32JEDECID
#define SPINAND_FLASH_PAGE_SIZE g_spinandflash_dev.info.u16PageSize
#define SPINAND_FLASH_OOB_SIZE g_spinandflash_dev.info.u16OOBSize
#define SPINAND_FLASH_QUADREAD_CMDID g_spinandflash_dev.info.u8QuadReadCmdId
#define SPINAND_FLASH_DUMMYBYTE g_spinandflash_dev.info.u8DummyByte
#define SPINAND_FLASH_BLOCK_NUM g_spinandflash_dev.info.u32BlockPerFlash
#define SPINAND_FLASH_PAGE_PER_BLOCK_NUM g_spinandflash_dev.info.u32PagePerBlock
#define SPINAND_FLASH_DESCRIPTION g_spinandflash_dev.info.szDescription
#define SPINAND_FLASH_MCP g_spinandflash_dev.info.u8IsDieSelect
#define SPINAND_FLASH_INFO &g_spinandflash_dev.info
#define SPINAND_FLASH_QSPI g_spinandflash_dev.qspi_device
#define SPINAND_FLASH_LOCK &g_spinandflash_dev.lock
#define SPINAND_FLASH_OPS g_spinandflash_dev.ops
#define SPINAND_DIE_ID0 (0)
#define SPINAND_DIE_ID1 (1)
#define SPINAND_SPARE_LAYOUT_SIZE 16
rt_err_t rt_hw_mtd_spinand_register(const char *device_name);
rt_size_t nu_qspi_transfer_message(struct rt_qspi_device *device, struct rt_qspi_message *message);
rt_err_t nu_qspi_send_then_recv(struct rt_qspi_device *device, const void *send_buf, rt_size_t send_length, void *recv_buf, rt_size_t recv_length);
rt_err_t nu_qspi_send(struct rt_qspi_device *device, const void *send_buf, rt_size_t length);
rt_err_t spinand_flash_init(struct rt_qspi_device *qspi);
extern struct nu_spinand g_spinandflash_dev;
extern rt_uint8_t spinand_flash_data_layout[SPINAND_SPARE_LAYOUT_SIZE];
extern rt_uint8_t spinand_flash_ecc_layout[SPINAND_SPARE_LAYOUT_SIZE];
#endif /* __SPINAND_H__ */
bsp/nuvoton/libraries/nuc980/Driver/Include/nu_can.h
+35 -35
View File
@@ -46,45 +46,45 @@
typedef struct
{
uint32_t CREQ; /*!< [0x0020] IFn Command Request Register */
uint32_t CMASK; /*!< [0x0024] IFn Command Mask Register */
uint32_t MASK1; /*!< [0x0028] IFn Mask 1 Register */
uint32_t MASK2; /*!< [0x002c] IFn Mask 2 Register */
uint32_t ARB1; /*!< [0x0030] IFn Arbitration 1 Register */
uint32_t ARB2; /*!< [0x0034] IFn Arbitration 2 Register */
uint32_t MCON; /*!< [0x0038] IFn Message Control Register */
uint32_t DAT_A1; /*!< [0x003c] IFn Data A1 Register */
uint32_t DAT_A2; /*!< [0x0040] IFn Data A2 Register */
uint32_t DAT_B1; /*!< [0x0044] IFn Data B1 Register */
uint32_t DAT_B2; /*!< [0x0048] IFn Data B2 Register */
uint32_t RESERVE0[13];
__IO uint32_t CREQ; /*!< [0x0020] IFn Command Request Register */
__IO uint32_t CMASK; /*!< [0x0024] IFn Command Mask Register */
__IO uint32_t MASK1; /*!< [0x0028] IFn Mask 1 Register */
__IO uint32_t MASK2; /*!< [0x002c] IFn Mask 2 Register */
__IO uint32_t ARB1; /*!< [0x0030] IFn Arbitration 1 Register */
__IO uint32_t ARB2; /*!< [0x0034] IFn Arbitration 2 Register */
__IO uint32_t MCON; /*!< [0x0038] IFn Message Control Register */
__IO uint32_t DAT_A1; /*!< [0x003c] IFn Data A1 Register */
__IO uint32_t DAT_A2; /*!< [0x0040] IFn Data A2 Register */
__IO uint32_t DAT_B1; /*!< [0x0044] IFn Data B1 Register */
__IO uint32_t DAT_B2; /*!< [0x0048] IFn Data B2 Register */
__I uint32_t RESERVE0[13];
} CAN_IF_T;
typedef struct
{
uint32_t CON; /*!< [0x0000] Control Register */
uint32_t STATUS; /*!< [0x0004] Status Register */
uint32_t ERR; /*!< [0x0008] Error Counter Register */
uint32_t BTIME; /*!< [0x000c] Bit Timing Register */
uint32_t IIDR; /*!< [0x0010] Interrupt Identifier Register */
uint32_t TEST; /*!< [0x0014] Test Register */
uint32_t BRPE; /*!< [0x0018] Baud Rate Prescaler Extension Register */
uint32_t RESERVE0[1];
CAN_IF_T IF[2];
uint32_t RESERVE2[8];
uint32_t TXREQ1; /*!< [0x0100] Transmission Request Register 1 */
uint32_t TXREQ2; /*!< [0x0104] Transmission Request Register 2 */
uint32_t RESERVE3[6];
uint32_t NDAT1; /*!< [0x0120] New Data Register 1 */
uint32_t NDAT2; /*!< [0x0124] New Data Register 2 */
uint32_t RESERVE4[6];
uint32_t IPND1; /*!< [0x0140] Interrupt Pending Register 1 */
uint32_t IPND2; /*!< [0x0144] Interrupt Pending Register 2 */
uint32_t RESERVE5[6];
uint32_t MVLD1; /*!< [0x0160] Message Valid Register 1 */
uint32_t MVLD2; /*!< [0x0164] Message Valid Register 2 */
uint32_t WU_EN; /*!< [0x0168] Wake-up Enable Control Register */
uint32_t WU_STATUS; /*!< [0x016c] Wake-up Status Register */
__IO uint32_t CON; /*!< [0x0000] Control Register */
__IO uint32_t STATUS; /*!< [0x0004] Status Register */
__I uint32_t ERR; /*!< [0x0008] Error Counter Register */
__IO uint32_t BTIME; /*!< [0x000c] Bit Timing Register */
__I uint32_t IIDR; /*!< [0x0010] Interrupt Identifier Register */
__IO uint32_t TEST; /*!< [0x0014] Test Register */
__IO uint32_t BRPE; /*!< [0x0018] Baud Rate Prescaler Extension Register */
__I uint32_t RESERVE0[1];
__IO CAN_IF_T IF[2];
__I uint32_t RESERVE2[8];
__I uint32_t TXREQ1; /*!< [0x0100] Transmission Request Register 1 */
__I uint32_t TXREQ2; /*!< [0x0104] Transmission Request Register 2 */
__I uint32_t RESERVE3[6];
__I uint32_t NDAT1; /*!< [0x0120] New Data Register 1 */
__I uint32_t NDAT2; /*!< [0x0124] New Data Register 2 */
__I uint32_t RESERVE4[6];
__I uint32_t IPND1; /*!< [0x0140] Interrupt Pending Register 1 */
__I uint32_t IPND2; /*!< [0x0144] Interrupt Pending Register 2 */
__I uint32_t RESERVE5[6];
__I uint32_t MVLD1; /*!< [0x0160] Message Valid Register 1 */
__I uint32_t MVLD2; /*!< [0x0164] Message Valid Register 2 */
__IO uint32_t WU_EN; /*!< [0x0168] Wake-up Enable Control Register */
__IO uint32_t WU_STATUS; /*!< [0x016c] Wake-up Status Register */
} CAN_T;
bsp/nuvoton/libraries/nuc980/Driver/Include/nu_etimer.h
+36
View File
@@ -647,6 +647,42 @@ static __inline void ETIMER_ClearCaptureIntFlag(UINT timer)
}
}
/**
* @brief This function gets the Timer capture falling edge flag.
* @param[in] timer ETIMER number. Range from 0 ~ 5
* @return None
*/
static __inline UINT8 ETIMER_GetCaptureFallingEdgeFlag(UINT timer)
{
UINT ret;
if (timer == 0)
{
ret = inpw(REG_ETMR0_ISR);
}
else if (timer == 1)
{
ret = inpw(REG_ETMR1_ISR);
}
else if (timer == 2)
{
ret = inpw(REG_ETMR2_ISR);
}
else if (timer == 3)
{
ret = inpw(REG_ETMR3_ISR);
}
else if (timer == 4)
{
ret = inpw(REG_ETMR4_ISR);
}
else
{
ret = inpw(REG_ETMR5_ISR);
}
return (ret & (1 << 6)) >> 6;
}
/**
* @brief This function indicates Timer has waked up system or not.
* @param[in] timer ETIMER number. Range from 0 ~ 5
bsp/nuvoton/libraries/nuc980/Driver/Include/nu_rtc.h
+17 -17
View File
@@ -110,23 +110,23 @@ typedef struct
typedef struct
{
uint32_t INIT; /*!< [0x0000] RTC Initiation Register */
uint32_t RWEN; /*!< [0x0004] RTC Access Enable Register */
uint32_t FREQADJ; /*!< [0x0008] RTC Frequency Compensation Register */
uint32_t TIME; /*!< [0x000c] RTC Time Loading Register */
uint32_t CAL; /*!< [0x0010] RTC Calendar Loading Register */
uint32_t CLKFMT; /*!< [0x0014] RTC Time Scale Selection Register */
uint32_t WEEKDAY; /*!< [0x0018] RTC Day of the Week Register */
uint32_t TALM; /*!< [0x001c] RTC Time Alarm Register */
uint32_t CALM; /*!< [0x0020] RTC Calendar Alarm Register */
uint32_t LEAPYEAR; /*!< [0x0024] RTC Leap Year Indicator Register */
uint32_t INTEN; /*!< [0x0028] RTC Interrupt Enable Register */
uint32_t INTSTS; /*!< [0x002c] RTC Interrupt Status Register */
uint32_t TICK; /*!< [0x0030] RTC Time Tick Register */
uint32_t PWRCTL; /*!< [0x0034] RTC Power Control Register */
uint32_t PWRCNT; /*!< [0x0038] RTC Power Control Counter Register */
uint32_t RESERVE0; /*!< [0x003c] RTC Spare Functional Control Register */
uint32_t SPR[16]; /*!< [0x0040] ~ [0x007c] RTC Spare Register 0 ~ 15 */
__IO uint32_t INIT; /*!< [0x0000] RTC Initiation Register */
__IO uint32_t RWEN; /*!< [0x0004] RTC Access Enable Register */
__IO uint32_t FREQADJ; /*!< [0x0008] RTC Frequency Compensation Register */
__IO uint32_t TIME; /*!< [0x000c] RTC Time Loading Register */
__IO uint32_t CAL; /*!< [0x0010] RTC Calendar Loading Register */
__IO uint32_t CLKFMT; /*!< [0x0014] RTC Time Scale Selection Register */
__IO uint32_t WEEKDAY; /*!< [0x0018] RTC Day of the Week Register */
__IO uint32_t TALM; /*!< [0x001c] RTC Time Alarm Register */
__IO uint32_t CALM; /*!< [0x0020] RTC Calendar Alarm Register */
__I uint32_t LEAPYEAR; /*!< [0x0024] RTC Leap Year Indicator Register */
__IO uint32_t INTEN; /*!< [0x0028] RTC Interrupt Enable Register */
__IO uint32_t INTSTS; /*!< [0x002c] RTC Interrupt Status Register */
__IO uint32_t TICK; /*!< [0x0030] RTC Time Tick Register */
__IO uint32_t PWRCTL; /*!< [0x0034] RTC Power Control Register */
__IO uint32_t PWRCNT; /*!< [0x0038] RTC Power Control Counter Register */
__IO uint32_t RESERVE0; /*!< [0x003c] RTC Spare Functional Control Register */
__I uint32_t SPR[16]; /*!< [0x0040] ~ [0x007c] RTC Spare Register 0 ~ 15 */
} RTC_T;
#define RTC_INIT_ACTIVE_Pos (0) /*!< RTC_T::INIT: INIT_ACTIVE Position */
bsp/nuvoton/libraries/nuc980/Driver/Include/nu_uart.h
+19 -19
View File
@@ -116,25 +116,25 @@
typedef struct
{
uint32_t DAT; /*!< [0x0000] UART Receive/Transmit Buffer Register */
uint32_t INTEN; /*!< [0x0004] UART Interrupt Enable Register */
uint32_t FIFO; /*!< [0x0008] UART FIFO Control Register */
uint32_t LINE; /*!< [0x000c] UART Line Control Register */
uint32_t MODEM; /*!< [0x0010] UART Modem Control Register */
uint32_t MODEMSTS; /*!< [0x0014] UART Modem Status Register */
uint32_t FIFOSTS; /*!< [0x0018] UART FIFO Status Register */
uint32_t INTSTS; /*!< [0x001c] UART Interrupt Status Register */
uint32_t TOUT; /*!< [0x0020] UART Time-out Register */
uint32_t BAUD; /*!< [0x0024] UART Baud Rate Divider Register */
uint32_t IRDA; /*!< [0x0028] UART IrDA Control Register */
uint32_t ALTCTL; /*!< [0x002c] UART Alternate Control/Status Register */
uint32_t FUNCSEL; /*!< [0x0030] UART Function Select Register */
uint32_t LINCTL; /*!< [0x0034] UART LIN Control Register */
uint32_t LINSTS; /*!< [0x0038] UART LIN Status Register */
uint32_t BRCOMP; /*!< [0x003c] UART Baud Rate Compensation Register */
uint32_t WKCTL; /*!< [0x0040] UART Wake-up Control Register */
uint32_t WKSTS; /*!< [0x0044] UART Wake-up Status Register */
uint32_t DWKCOMP; /*!< [0x0048] UART Incoming Data Wake-up Compensation Register */
__IO uint32_t DAT; /*!< [0x0000] UART Receive/Transmit Buffer Register */
__IO uint32_t INTEN; /*!< [0x0004] UART Interrupt Enable Register */
__IO uint32_t FIFO; /*!< [0x0008] UART FIFO Control Register */
__IO uint32_t LINE; /*!< [0x000c] UART Line Control Register */
__IO uint32_t MODEM; /*!< [0x0010] UART Modem Control Register */
__IO uint32_t MODEMSTS; /*!< [0x0014] UART Modem Status Register */
__IO uint32_t FIFOSTS; /*!< [0x0018] UART FIFO Status Register */
__IO uint32_t INTSTS; /*!< [0x001c] UART Interrupt Status Register */
__IO uint32_t TOUT; /*!< [0x0020] UART Time-out Register */
__IO uint32_t BAUD; /*!< [0x0024] UART Baud Rate Divider Register */
__IO uint32_t IRDA; /*!< [0x0028] UART IrDA Control Register */
__IO uint32_t ALTCTL; /*!< [0x002c] UART Alternate Control/Status Register */
__IO uint32_t FUNCSEL; /*!< [0x0030] UART Function Select Register */
__IO uint32_t LINCTL; /*!< [0x0034] UART LIN Control Register */
__IO uint32_t LINSTS; /*!< [0x0038] UART LIN Status Register */
__IO uint32_t BRCOMP; /*!< [0x003c] UART Baud Rate Compensation Register */
__IO uint32_t WKCTL; /*!< [0x0040] UART Wake-up Control Register */
__IO uint32_t WKSTS; /*!< [0x0044] UART Wake-up Status Register */
__IO uint32_t DWKCOMP; /*!< [0x0048] UART Incoming Data Wake-up Compensation Register */
} UART_T;
bsp/nuvoton/libraries/nuc980/Driver/SConscript
+2 -2
View File
@@ -18,9 +18,9 @@ if not GetDepend('BSP_USE_STDDRIVER_SOURCE'):
libs += ['libstddriver_gcc']
if not libs:
group = DefineGroup('nuc980_driver', src, depend = [''], CPPPATH = cpppath)
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = cpppath)
else:
src = []
group = DefineGroup('nuc980_driver', src, depend = [''], CPPPATH = cpppath, LIBS = libs, LIBPATH = libpath)
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = cpppath, LIBS = libs, LIBPATH = libpath)
Return('group')
bsp/nuvoton/libraries/nuc980/README.md
+1
View File
@@ -16,6 +16,7 @@
| QSPI | RT_Device_Class_SPIBUS | ***qspi[0]*** |
| RTC | RT_Device_Class_RTC | ***rtc*** |
| PWM | RT_Device_Class_Miscellaneous (PWM) | ***pwm[0-1]*** |
| USBH | RT_Device_Class_USBHost | ***usbh*** |
| USBD | RT_Device_Class_USBDevice | ***usbd*** |
| SC (UART function) | RT_Device_Class_Char | ***scuart[0-1]*** |
| SDH | RT_Device_Class_Block | ***sdh[0-1]*** |
bsp/nuvoton/libraries/nuc980/UsbHostLib/SConscript
+12
View File
@@ -0,0 +1,12 @@
# RT-Thread building script for component
from building import *
cwd = GetCurrentDir()
group = []
if GetDepend('BSP_USING_HSUSBH') or GetDepend('BSP_USING_USBH'):
src = Glob('*src/*.c') + Glob('src/*.cpp')
CPPPATH = [cwd + '/inc']
group = DefineGroup('nuc980_usbhostlib', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
bsp/nuvoton/libraries/nuc980/UsbHostLib/inc/config.h
+1566
View File
File diff suppressed because it is too large. Load diff
bsp/nuvoton/libraries/nuc980/UsbHostLib/inc/ehci.h
+279
View File
File diff suppressed because it is too large. Load diff
bsp/nuvoton/libraries/nuc980/UsbHostLib/inc/hub.h
+124
View File
@@ -0,0 +1,124 @@
/**************************************************************************//**
* @file hub.h
* @version V1.00
* @brief USB Host hub class driver header file.
* @note
* SPDX-License-Identifier: Apache-2.0
* Copyright (C) 2017 Nuvoton Technology Corp. All rights reserved.
*****************************************************************************/
#ifndef _USBH_HUB_H_
#define _USBH_HUB_H_
/// @cond HIDDEN_SYMBOLS
/*--------------------------------------------------------------------------*/
/* Hub class feature selectors (Table 11-17) */
/*--------------------------------------------------------------------------*/
#define FS_C_HUB_LOCAL_POWER 0
#define FS_C_HUB_OVER_CURRENT 1
#define FS_PORT_CONNECTION 0
#define FS_PORT_ENABLE 1
#define FS_PORT_SUSPEND 2
#define FS_PORT_OVER_CURRENT 3
#define FS_PORT_RESET 4
#define FS_PORT_POWER 8
#define FS_C_PORT_CONNECTION 16
#define FS_C_PORT_ENABLE 17
#define FS_C_PORT_SUSPEND 18
#define FS_C_PORT_OVER_CURRENT 19
#define FS_C_PORT_RESET 20
/*--------------------------------------------------------------------------*/
/* Hub/Port staus and change bits */
/*--------------------------------------------------------------------------*/
#define HUB_S_LOCAL_POWER (1UL << 0)
#define HUB_S_OVERCURRENT (1UL << 1)
#define HUB_C_LOCAL_POWER (1UL << 0)
#define HUB_C_OVERCURRENT (1UL << 1)
#define PORT_S_CONNECTION (1UL << 0)
#define PORT_S_ENABLE (1UL << 1)
#define PORT_S_SUSPEND (1UL << 2)
#define PORT_S_OVERCURRENT (1UL << 3)
#define PORT_S_RESET (1UL << 4)
#define PORT_S_PORT_POWER (1UL << 8)
#define PORT_S_LOW_SPEED (1UL << 9)
#define PORT_S_HIGH_SPEED (1UL << 10)
#define PORT_S_TEST (1UL << 11)
#define PORT_S_INDICATOR (1UL << 12)
#define PORT_C_CONNECTION (1UL << 0)
#define PORT_C_ENABLE (1UL << 1)
#define PORT_C_SUSPEND (1UL << 2)
#define PORT_C_OVERCURRENT (1UL << 3)
#define PORT_C_RESET (1UL << 4)
/*--------------------------------------------------------------------------*/
/* Hub descriptor */
/*--------------------------------------------------------------------------*/
typedef struct __attribute__((__packed__))
{
uint8_t bDescLength;
uint8_t bDescriptorType;
uint8_t bNbrPorts;
uint16_t wHubCharacteristics;
uint8_t bPwrOn2PwrGood;
uint8_t bHubContrCurrent;
uint8_t bDeviceRemovble;
uint8_t PortPwrCtrlMask[16];
}
DESC_HUB_T;
/*
* wHubCharacteristics bit field mask
*/
#define HUB_CHAR_LPSM 0x0003 /* 00b: global port power, 01b: per port power, 1x: reserved */
#define HUB_CHAR_COMPOUND 0x0004 /* 1: is part of a compond device, 0: is not. */
#define HUB_CHAR_OCPM 0x0018 /* 00b: global over-current protection, 01b: per port, 1x: reserved */
#define HUB_CHAR_TTTT 0x0060 /* TT think time. 00b: 8FS, 01b: 16FS, 10b: 24FS, 11b: 32FS */
#define HUB_CHAR_PORTIND 0x0080 /* 1: port indicator (LED) supported, 0: not */
/* port indicator status selectors */
#define HUB_LED_AUTO 0
#define HUB_LED_AMBER 1
#define HUB_LED_GREEN 2
#define HUB_LED_OFF 3
/*--------------------------------------------------------------------------*/
/* Port reset retry and time-out settings */
/*--------------------------------------------------------------------------*/
#define HUB_DEBOUNCE_TIME 800 /* Hub connect/disconnect de-bounce time in ms */
#define PORT_RESET_RETRY 3 /* port reset retry times */
#define PORT_RESET_TIME_MS 50 /* port reset time (ms) */
#define PORT_RESET_RETRY_INC_MS 250 /* increased reset time (ms) after reset failed */
#define HUB_STATUS_MAX_BYTE 2 /* maximum number of interrupt-in status bytes */
/* 2 can support up to 16 port hubs */
/* 4 can support up to 32 port hubs */
/* Note!! If modeifed to 4, "uint16_t sc_bitmap" */
/* MUST be changed as "uint32_t sc_bitmap" */
typedef struct hub_dev_t
{
IFACE_T *iface; /*!< Interface device of this hub \hideinitializer */
UTR_T *utr; /*!< Interrupt in UTR of this hub \hideinitializer */
// uint8_t buff[HUB_STATUS_MAX_BYTE]; /*!< Interrupt in buffer \hideinitializer */
uint16_t sc_bitmap; /*!< Hub and Port Status Change Bitmap \hideinitializer */
uint8_t bNbrPorts; /*!< Number of ports \hideinitializer */
uint8_t bPwrOn2PwrGood; /*!< Hub power on to power good time \hideinitializer */
char pos_id[MAX_HUB_DEVICE + 1]; /*!< Hub position identifier \hideinitializer */
int (*port_reset)(struct hub_dev_t *hub, int port); /*!< Port reset function \hideinitializer */
UDEV_T *children; /*!< Child device list. \hideinitializer */
} HUB_DEV_T;
/// @endcond
#endif /* _USBH_HUB_H_ */
bsp/nuvoton/libraries/nuc980/UsbHostLib/inc/ohci.h
+147
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@@ -0,0 +1,147 @@
/**************************************************************************//**
* @file ohci.h
* @version V1.00
* @brief USB OHCI host controller driver header file.
* @note
* SPDX-License-Identifier: Apache-2.0
* Copyright (C) 2017 Nuvoton Technology Corp. All rights reserved.
*****************************************************************************/
#ifndef _USBH_OHCI_H_
#define _USBH_OHCI_H_
/// @cond HIDDEN_SYMBOLS
struct utr_t;
struct udev_t;
/* OHCI CONTROL AND STATUS REGISTER MASKS */
/*
* Host controller functional state.
* for HCFS(HcControl[7:6])
*/
#define HCFS_RESET (0UL << USBH_HcControl_HCFS_Pos)
#define HCFS_RESUME (1UL << USBH_HcControl_HCFS_Pos)
#define HCFS_OPER (2UL << USBH_HcControl_HCFS_Pos)
#define HCFS_SUSPEND (3UL << USBH_HcControl_HCFS_Pos)
/*----------------------------------------------------------------------------------------*/
/* Endpoint descriptor */
/*----------------------------------------------------------------------------------------*/
typedef struct ed_t
{
/* OHCI spec. Endpoint descriptor */
uint32_t Info;
uint32_t TailP;
uint32_t HeadP;
uint32_t NextED;
/* The following members are used by USB Host libary. */
uint8_t bInterval;
uint16_t next_sf; /* for isochronous transfer, recording the next SF */
struct ed_t *next; /* point to the next ED in remove list */
} ED_T;
#define ED_CTRL_FA_Pos 0 /* Info[6:0] - Function address */
#define ED_CTRL_EN_Pos 7 /* Info[10:7] - Endpoint number */
#define ED_CTRL_DIR_Pos 11 /* Info[12:11] - Direction */
#define ED_CTRL_MPS_Pos 16 /* Info[26:16] - Maximum packet size */
#define ED_FUNC_ADDR_Msk (0x7f)
#define ED_EP_ADDR_Msk (0xf<<7)
#define ED_DIR_Msk (0x3<<11)
#define ED_SPEED_Msk (1<<13)
#define ED_MAX_PK_SIZE_Msk (0x7ff<<16)
#define ED_DIR_BY_TD (0<<ED_CTRL_DIR_Pos)
#define ED_DIR_OUT (1<<ED_CTRL_DIR_Pos)
#define ED_DIR_IN (2<<ED_CTRL_DIR_Pos)
#define ED_SPEED_FULL (0<<13) /* Info[13] - 0: is full speed device */
#define ED_SPEED_LOW (1<<13) /* Info[13] - 1: is low speed device */
#define ED_SKIP (1<<14) /* Info[14] - 1: HC skip this ED */
#define ED_FORMAT_GENERAL (0<<15) /* Info[15] - 0: is a general TD */
#define ED_FORMAT_ISO (1<<15) /* Info[15] - 1: is an isochronous TD */
#define ED_HEADP_HALT (1<<0) /* HeadP[0] - 1: Halt; 0: Not */
/*----------------------------------------------------------------------------------------*/
/* Transfer descriptor */
/*----------------------------------------------------------------------------------------*/
/* general transfer descriptor */
typedef struct td_t
{
uint32_t Info;
uint32_t CBP; /* Current Buffer Pointer */
uint32_t NextTD; /* Next TD */
uint32_t BE; /* Buffer End */
uint32_t PSW[4]; /* PSW 0~7 */
/* The following members are used by USB Host libary. */
uint32_t buff_start; /* Buffer Start */
ED_T *ed; /* The ED that this TD belong to. */
struct utr_t *utr; /* associated UTR */
struct td_t *next; /* point to next TD of the same UTR */
} TD_T;
#define TD_ADDR_MASK 0xFFFFFFFC
/* Completion codes */
enum OCHI_CC_CODE
{
/* mapping of the OHCI CC status to error codes */
CC_NOERROR, /* No Error */
CC_CRC, /* CRC Error */
CC_BITSTUFF, /* Bit Stuff */
CC_DATA_TOGGLE, /* Data Toggle */
CC_STALL, /* Stall */
CC_NOTRESPONSE, /* DevNotResp */
CC_PID_CHECK, /* PIDCheck */
CC_UNEXPECTED_PID, /* UnExpPID */
CC_DATA_OVERRUN, /* DataOver */
CC_DATA_UNDERRUN, /* DataUnder */
CC_RESERVED1, /* reserved */
CC_RESERVED2, /* reserved */
CC_BUFFER_OVERRUN, /* BufferOver */
CC_BUFFER_UNDERRUN, /* BuffUnder */
CC_NOT_ACCESS /* Not Access */
};
/* TD control field */
#define TD_CC 0xF0000000
#define TD_CC_GET(td) ((td >>28) & 0x0F)
#define TD_CC_SET(td, cc) (td) = ((td) & 0x0FFFFFFF) | (((cc) & 0x0F) << 28)
#define TD_T_DATA0 0x02000000
#define TD_T_DATA1 0x03000000
#define TD_R 0x00040000
#define TD_DP 0x00180000
#define TD_DP_IN 0x00100000
#define TD_DP_OUT 0x00080000
#define MAXPSW 8
/* steel TD reserved bits to keep driver data */
#define TD_TYPE_Msk (0x3<<16)
#define TD_TYPE_CTRL (0x0<<16)
#define TD_TYPE_BULK (0x1<<16)
#define TD_TYPE_INT (0x2<<16)
#define TD_TYPE_ISO (0x3<<16)
#define TD_CTRL_Msk (0x7<<15)
#define TD_CTRL_DATA (1<<15)
/*
* The HCCA (Host Controller Communications Area) is a 256 byte
* structure defined in the OHCI spec. that the host controller is
* told the base address of. It must be 256-byte aligned.
*/
typedef struct
{
uint32_t int_table[32]; /* Interrupt ED table */
uint16_t frame_no; /* current frame number */
uint16_t pad1; /* set to 0 on each frame_no change */
uint32_t done_head; /* info returned for an interrupt */
uint8_t reserved_for_hc[116];
} HCCA_T;
/// @endcond
#endif /* _USBH_OHCI_H_ */
bsp/nuvoton/libraries/nuc980/UsbHostLib/inc/usb.h
+394
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bsp/nuvoton/libraries/nuc980/UsbHostLib/inc/usbh_lib.h
+188
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@@ -0,0 +1,188 @@
/**************************************************************************//**
* @file usbh_lib.h
* @version V1.10
* $Revision: 4 $
* $Date: 15/06/10 2:06p $
* @brief USB Host library exported header file.
*
* @note
* SPDX-License-Identifier: Apache-2.0
* Copyright (C) 2017 Nuvoton Technology Corp. All rights reserved.
******************************************************************************/
#ifndef _USBH_LIB_H_
#define _USBH_LIB_H_
#include "nuc980.h"
#ifdef __cplusplus
extern "C"
{
#endif
/** @addtogroup Library Library
@{
*/
/** @addtogroup USBH_Library USB Host Library
@{
*/
/** @addtogroup USBH_EXPORTED_CONSTANTS USB Host Exported Constants
@{
*/
#define USBH_OK 0 /*!< No error. */
#define USBH_ERR_MEMORY_OUT -10 /*!< Out of memory. */
#define USBH_ERR_IF_ALT_LIMIT -11 /*!< Number of alternative interface > MAX_ALT_PER_IFACE */
#define USBH_ERR_IF_EP_LIMIT -15 /*!< Number of endpoints > MAX_EP_PER_IFACE */
#define USBH_ERR_NOT_SUPPORTED -101 /*!< Device/Class/Transfer not supported */
#define USBH_ERR_NOT_MATCHED -103 /*!< Not macthed */
#define USBH_ERR_NOT_EXPECTED -104 /*!< Unknown or unexpected */
#define USBH_ERR_INVALID_PARAM -105 /*!< Invalid parameter */
#define USBH_ERR_NOT_FOUND -106 /*!< Device or interface not found */
#define USBH_ERR_EP_NOT_FOUND -107 /*!< Endpoint not found */
#define USBH_ERR_DESCRIPTOR -137 /*!< Failed to parse USB descriptors */
#define USBH_ERR_SET_DEV_ADDR -139 /*!< Failed to set device address */
#define USBH_ERR_SET_CONFIG -151 /*!< Failed to set device configuration */
#define USBH_ERR_TRANSFER -201 /*!< USB transfer error */
#define USBH_ERR_TIMEOUT -203 /*!< USB transfer time-out */
#define USBH_ERR_ABORT -205 /*!< USB transfer aborted due to disconnect or reset */
#define USBH_ERR_PORT_RESET -255 /*!< Hub port reset failed */
#define USBH_ERR_SCH_OVERRUN -257 /*!< USB isochronous schedule overrun */
#define USBH_ERR_DISCONNECTED -259 /*!< USB device was disconnected */
#define USBH_ERR_TRANSACTION -271 /*!< USB transaction timeout, CRC, Bad PID, etc. */
#define USBH_ERR_BABBLE_DETECTED -272 /*!< A ¡§babble¡¨ is detected during the transaction */
#define USBH_ERR_DATA_BUFF -274 /*!< Data buffer overrun or underrun */
#define USBH_ERR_CC_NO_ERR -280 /*!< OHCI CC code - no error */
#define USBH_ERR_CRC -281 /*!< USB trasfer CRC error */
#define USBH_ERR_BIT_STUFF -282 /*!< USB transfer bit stuffing error */
#define USBH_ERR_DATA_TOGGLE -283 /*!< USB trasfer data toggle error */
#define USBH_ERR_STALL -284 /*!< USB trasfer STALL error */
#define USBH_ERR_DEV_NO_RESP -285 /*!< USB trasfer device no response error */
#define USBH_ERR_PID_CHECK -286 /*!< USB trasfer PID check failure */
#define USBH_ERR_UNEXPECT_PID -287 /*!< USB trasfer unexpected PID error */
#define USBH_ERR_DATA_OVERRUN -288 /*!< USB trasfer data overrun error */
#define USBH_ERR_DATA_UNDERRUN -289 /*!< USB trasfer data underrun error */
#define USBH_ERR_BUFF_OVERRUN -292 /*!< USB trasfer buffer overrun error */
#define USBH_ERR_BUFF_UNDERRUN -293 /*!< USB trasfer buffer underrun error */
#define USBH_ERR_NOT_ACCESS0 -294 /*!< USB trasfer not accessed error */
#define USBH_ERR_NOT_ACCESS1 -295 /*!< USB trasfer not accessed error */
#define USBH_ERR_OHCI_INIT -301 /*!< Failed to initialize OHIC controller. */
#define USBH_ERR_OHCI_EP_BUSY -303 /*!< The endpoint is under transfer. */
#define USBH_ERR_EHCI_INIT -501 /*!< Failed to initialize EHCI controller. */
#define USBH_ERR_EHCI_QH_BUSY -503 /*!< the Queue Head is busy. */
#define UMAS_OK 0 /*!< No error. */
#define UMAS_ERR_NO_DEVICE -1031 /*!< No Mass Stroage Device found. */
#define UMAS_ERR_IO -1033 /*!< Device read/write failed. */
#define UMAS_ERR_INIT_DEVICE -1035 /*!< failed to init MSC device */
#define UMAS_ERR_CMD_STATUS -1037 /*!< SCSI command status failed */
#define UMAS_ERR_IVALID_PARM -1038 /*!< Invalid parameter. */
#define UMAS_ERR_DRIVE_NOT_FOUND -1039 /*!< drive not found */
#define HID_RET_OK 0 /*!< Return with no errors. */
#define HID_RET_DEV_NOT_FOUND -1081 /*!< HID device not found or removed. */
#define HID_RET_IO_ERR -1082 /*!< USB transfer failed. */
#define HID_RET_INVALID_PARAMETER -1083 /*!< Invalid parameter. */
#define HID_RET_OUT_OF_MEMORY -1084 /*!< Out of memory. */
#define HID_RET_NOT_SUPPORTED -1085 /*!< Function not supported. */
#define HID_RET_EP_NOT_FOUND -1086 /*!< Endpoint not found. */
#define HID_RET_PARSING -1087 /*!< Failed to parse HID descriptor */
#define HID_RET_XFER_IS_RUNNING -1089 /*!< The transfer has been enabled. */
#define HID_RET_REPORT_NOT_FOUND -1090 /*!< The transfer has been enabled. */
#define UAC_RET_OK 0 /*!< Return with no errors. */
#define UAC_RET_DEV_NOT_FOUND -2001 /*!< Audio Class device not found or removed. */
#define UAC_RET_FUNC_NOT_FOUND -2002 /*!< Audio device has no this function. */
#define UAC_RET_IO_ERR -2003 /*!< USB transfer failed. */
#define UAC_RET_DATA_LEN -2004 /*!< Unexpected transfer length */
#define UAC_RET_INVALID -2005 /*!< Invalid parameter or usage. */
#define UAC_RET_OUT_OF_MEMORY -2007 /*!< Out of memory. */
#define UAC_RET_DRV_NOT_SUPPORTED -2009 /*!< Function not supported by this UAC driver. */
#define UAC_RET_DEV_NOT_SUPPORTED -2011 /*!< Function not supported by the UAC device. */
#define UAC_RET_PARSER -2013 /*!< Failed to parse UAC descriptor */
#define UAC_RET_IS_STREAMING -2015 /*!< Audio pipe is on streaming. */
/*@}*/ /* end of group USBH_EXPORTED_CONSTANTS */
/** @addtogroup USBH_EXPORTED_TYPEDEF USB Host Typedef
@{
*/
struct udev_t;
typedef void (CONN_FUNC)(struct udev_t *udev, int param);
struct line_coding_t;
struct cdc_dev_t;
typedef void (CDC_CB_FUNC)(struct cdc_dev_t *cdev, uint8_t *rdata, int data_len);
struct usbhid_dev;
typedef void (HID_IR_FUNC)(struct usbhid_dev *hdev, uint16_t ep_addr, int status, uint8_t *rdata, uint32_t data_len); /*!< interrupt in callback function \hideinitializer */
typedef void (HID_IW_FUNC)(struct usbhid_dev *hdev, uint16_t ep_addr, int status, uint8_t *wbuff, uint32_t *data_len); /*!< interrupt out callback function \hideinitializer */
struct uac_dev_t;
typedef int (UAC_CB_FUNC)(struct uac_dev_t *dev, uint8_t *data, int len); /*!< audio in callback function \hideinitializer */
/*@}*/ /* end of group USBH_EXPORTED_STRUCT */
/** @addtogroup USBH_EXPORTED_FUNCTIONS USB Host Exported Functions
@{
*/
/*------------------------------------------------------------------*/
/* */
/* USB Core Library APIs */
/* */
/*------------------------------------------------------------------*/
extern void usbh_core_init(void);
extern int usbh_polling_root_hubs(void);
extern void usbh_install_conn_callback(CONN_FUNC *conn_func, CONN_FUNC *disconn_func);
extern void usbh_suspend(void);
extern void usbh_resume(void);
extern struct udev_t *usbh_find_device(char *hub_id, int port);
/**
* @brief A function return current tick count.
* @return Current tick.
* @details User application must provide this function to return current tick.
* The tick should increase by 1 for every 10 ms.
*/
extern uint32_t usbh_get_ticks(void); /* This function must be provided by user application. */
extern uint32_t usbh_tick_from_millisecond(uint32_t msec); /* This function must be provided by user application. */
/// @cond HIDDEN_SYMBOLS
extern void dump_ohci_regs(void);
extern void dump_ehci_regs(void);
extern void dump_ohci_ports(void);
extern void dump_ehci_ports(void);
extern uint32_t usbh_memory_used(void);
/// @endcond HIDDEN_SYMBOLS
/*@}*/ /* end of group USBH_EXPORTED_FUNCTIONS */
/*@}*/ /* end of group USBH_Library */
/*@}*/ /* end of group LIBRARY */
#ifdef __cplusplus
}
#endif
#endif /* _USBH_LIB_H_ */
/*** (C) COPYRIGHT 2017 Nuvoton Technology Corp. ***/
bsp/nuvoton/libraries/nuc980/UsbHostLib/src/ehci.c
+1288
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bsp/nuvoton/libraries/nuc980/UsbHostLib/src/ehci_iso.c
+918
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bsp/nuvoton/libraries/nuc980/UsbHostLib/src/mem_alloc.c
+540
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bsp/nuvoton/libraries/nuc980/UsbHostLib/src/ohci.c
+1301
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bsp/nuvoton/libraries/nuc980/UsbHostLib/src/support.c
+324
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bsp/nuvoton/libraries/nuc980/UsbHostLib/src/usb_core.c
+312
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bsp/nuvoton/libraries/nuc980/rtt_port/Kconfig
+1 -41
View File
@@ -114,13 +114,6 @@ config SOC_SERIES_NUC980
help
Choose this option if you need TIMER function mode.
config BSP_USING_TPWM0
select BSP_USING_TPWM
select RT_USING_PWM
bool "TIMER PWM"
help
Choose this option if you need PWM function mode.
config BSP_USING_TIMER0_CAPTURE
select BSP_USING_TIMER_CAPTURE
select RT_USING_INPUT_CAPTURE
@@ -146,13 +139,6 @@ config SOC_SERIES_NUC980
help
Choose this option if you need TIMER function mode.
config BSP_USING_TPWM1
select BSP_USING_TPWM
select RT_USING_PWM
bool "TIMER PWM"
help
Choose this option if you need PWM function mode.
config BSP_USING_TIMER1_CAPTURE
select BSP_USING_TIMER_CAPTURE
select RT_USING_INPUT_CAPTURE
@@ -177,13 +163,6 @@ config SOC_SERIES_NUC980
help
Choose this option if you need TIMER function mode.
config BSP_USING_TPWM2
select BSP_USING_TPWM
select RT_USING_PWM
bool "TIMER PWM"
help
Choose this option if you need PWM function mode.
config BSP_USING_TIMER2_CAPTURE
select BSP_USING_TIMER_CAPTURE
select RT_USING_INPUT_CAPTURE
@@ -208,13 +187,6 @@ config SOC_SERIES_NUC980
help
Choose this option if you need TIMER function mode.
config BSP_USING_TPWM3
select BSP_USING_TPWM
select RT_USING_PWM
bool "TIMER PWM"
help
Choose this option if you need PWM function mode.
config BSP_USING_TIMER3_CAPTURE
select BSP_USING_TIMER_CAPTURE
select RT_USING_INPUT_CAPTURE
@@ -239,13 +211,6 @@ config SOC_SERIES_NUC980
help
Choose this option if you need TIMER function mode.
config BSP_USING_TPWM4
select BSP_USING_TPWM
select RT_USING_PWM
bool "TIMER PWM"
help
Choose this option if you need PWM function mode.
config BSP_USING_TIMER4_CAPTURE
select BSP_USING_TIMER_CAPTURE
select RT_USING_INPUT_CAPTURE
@@ -634,9 +599,4 @@ config SOC_SERIES_NUC980
config BSP_USING_USBH
bool "Enable USB Host Controller(USBH)"
select RT_USING_USB_HOST
select RT_USBH_MSTORAGE
config BSP_USING_OTG
bool "Enable USB On-The-Go(OTG)"
select BSP_USING_USBH
select BSP_USING_USBD
select RT_USBH_MSTORAGE
bsp/nuvoton/libraries/nuc980/rtt_port/SConscript
+1 -1
View File
@@ -9,6 +9,6 @@ CPPPATH = [cwd]
group = []
# USB driver constrain
group = DefineGroup('nuc980_rttport', src, depend = [''], CPPPATH = CPPPATH)
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
bsp/nuvoton/libraries/nuc980/rtt_port/drv_common.c
+8 -16
View File
@@ -22,22 +22,11 @@ static struct mem_desc hw_mem_desc[] =
{ 0x00000000, 0xFFFFFFFF, 0x00000000, RW_NCNB }, /* None cached for 4G memory */
{ 0x00000000, BOARD_SDRAM_SIZE - 1, 0x00000000, RW_CB }, /* 64M cached DDR memory */
{ BIT31, (BIT31 | BOARD_SDRAM_SIZE) - 1, BIT31, RW_NCNB }, /* Shadow DDR Map */
{ 0x3C000000, 0x3C00E000 - 1, 0x3C000000, RW_NCNB }, /* 56K SRAM memory */
{ 0xBC000000, 0xBC00E000 - 1, 0xBC000000, RW_NCNB } /* 56K Shadow memory */
{ 0x3C000000, 0x3C004000 - 1, 0x3C000000, RW_NCNB }, /* 16K SRAM memory */
{ 0xBC000000, 0xBC004000 - 1, 0xBC000000, RW_NCNB } /* 16K Shadow memory */
};
#endif
void nu_clock_base_dump(void)
{
rt_kprintf("SYS_UPLL = %d\n", sysGetClock(SYS_UPLL));
rt_kprintf("SYS_APLL = %d\n", sysGetClock(SYS_APLL));
rt_kprintf("SYS_SYSTEM = %d\n", sysGetClock(SYS_SYSTEM));
rt_kprintf("SYS_HCLK = %d\n", sysGetClock(SYS_HCLK));
rt_kprintf("SYS_PCLK01 = %d\n", sysGetClock(SYS_PCLK01));
rt_kprintf("SYS_PCLK2 = %d\n", sysGetClock(SYS_PCLK2));
rt_kprintf("SYS_CPU = %d\n", sysGetClock(SYS_CPU));
}
/**
* This function will initial M487 board.
*/
@@ -52,6 +41,12 @@ RT_WEAK void rt_hw_board_init(void)
#if defined(BSP_USING_MMU)
/* initialize mmu */
rt_hw_mmu_init(&hw_mem_desc[0], sizeof(hw_mem_desc) / sizeof(hw_mem_desc[0]));
#else
/* disable I/D cache */
mmu_disable_dcache();
mmu_disable_icache();
mmu_disable();
mmu_invalidate_tlb();
#endif
/* initialize hardware interrupt */
@@ -72,9 +67,6 @@ RT_WEAK void rt_hw_board_init(void)
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
nu_clock_base_dump();
rt_kprintf("HEAP_START=0x%08x, HEAP_END=0x%08x\n", BOARD_HEAP_START, BOARD_HEAP_END);
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
bsp/nuvoton/libraries/nuc980/rtt_port/drv_crypto.c
+26 -10
View File
@@ -75,6 +75,7 @@ static rt_err_t nu_aes_crypt_run(
{
uint32_t au32SwapKey[8];
uint32_t au32SwapIV[4];
rt_err_t result;
au32SwapKey[0] = nu_get32_be(&pu8Key[0]);
au32SwapKey[1] = nu_get32_be(&pu8Key[4]);
@@ -98,7 +99,8 @@ static rt_err_t nu_aes_crypt_run(
au32SwapIV[2] = nu_get32_be(&pu8IV[8]);
au32SwapIV[3] = nu_get32_be(&pu8IV[12]);
rt_mutex_take(&s_AES_mutex, RT_WAITING_FOREVER);
result = rt_mutex_take(&s_AES_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
AES_Open(CRPT, bEncrypt, u32OpMode, u32KeySize, AES_IN_OUT_SWAP);
AES_SetKey(CRPT, (uint32_t *)&au32SwapKey[0], u32KeySize);
@@ -137,7 +139,8 @@ static rt_err_t nu_aes_crypt_run(
/* Clear AES interrupt status */
AES_CLR_INT_FLAG(CRPT);
rt_mutex_release(&s_AES_mutex);
result = rt_mutex_release(&s_AES_mutex);
RT_ASSERT(result == RT_EOK);
return RT_EOK;
}
@@ -145,19 +148,25 @@ static rt_err_t nu_aes_crypt_run(
//Using PRNG instead of TRNG
static void nu_prng_open(uint32_t u32Seed)
{
rt_mutex_take(&s_PRNG_mutex, RT_WAITING_FOREVER);
rt_err_t result;
result = rt_mutex_take(&s_PRNG_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
//Open PRNG 64 bits. But always return 32 bits
PRNG_Open(CRPT, PRNG_KEY_SIZE_64, PRNG_SEED_RELOAD, u32Seed);
rt_mutex_release(&s_PRNG_mutex);
result = rt_mutex_release(&s_PRNG_mutex);
RT_ASSERT(result == RT_EOK);
}
static rt_uint32_t nu_prng_run(void)
{
uint32_t au32RNGValue[2];
rt_err_t result;
rt_mutex_take(&s_PRNG_mutex, RT_WAITING_FOREVER);
result = rt_mutex_take(&s_PRNG_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
PRNG_Start(CRPT);
while ((CRPT->PRNG_CTL & CRPT_PRNG_CTL_BUSY_Msk)) {};
@@ -167,7 +176,8 @@ static rt_uint32_t nu_prng_run(void)
PRNG_Read(CRPT, &au32RNGValue[0]);
rt_mutex_release(&s_PRNG_mutex);
result = rt_mutex_release(&s_PRNG_mutex);
RT_ASSERT(result == RT_EOK);
return au32RNGValue[0];
}
@@ -340,10 +350,13 @@ static rt_err_t nu_sha_hash_run(
uint32_t u32DataLen
)
{
rt_err_t result;
RT_ASSERT(psSHACtx != RT_NULL);
RT_ASSERT(pu8InData != RT_NULL);
rt_mutex_take(&s_SHA_mutex, RT_WAITING_FOREVER);
result = rt_mutex_take(&s_SHA_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
uint8_t *pu8SrcAddr = (uint8_t *)pu8InData;
uint32_t u32CopyLen = 0;
@@ -383,7 +396,8 @@ static rt_err_t nu_sha_hash_run(
if (psSHACtx->pu8SHATempBuf == RT_NULL)
{
LOG_E("fun[%s] memory allocate %d bytes failed!", __FUNCTION__, psSHACtx->u32BlockSize);
rt_mutex_release(&s_SHA_mutex);
result = rt_mutex_release(&s_SHA_mutex);
RT_ASSERT(result == RT_EOK);
return -RT_ENOMEM;
}
@@ -411,7 +425,8 @@ static rt_err_t nu_sha_hash_run(
if (psSHACtx->pu8SHATempBuf == RT_NULL)
{
LOG_E("fun[%s] memory allocate %d bytes failed!", __FUNCTION__, psSHACtx->u32BlockSize);
rt_mutex_release(&s_SHA_mutex);
result = rt_mutex_release(&s_SHA_mutex);
RT_ASSERT(result == RT_EOK);
return -RT_ENOMEM;
}
@@ -422,7 +437,8 @@ static rt_err_t nu_sha_hash_run(
psSHACtx->u32SHATempBufLen += u32DataLen;
}
rt_mutex_release(&s_SHA_mutex);
result = rt_mutex_release(&s_SHA_mutex);
RT_ASSERT(result == RT_EOK);
return RT_EOK;
}
bsp/nuvoton/libraries/nuc980/rtt_port/drv_emac.c
+7 -15
View File
@@ -232,7 +232,6 @@ static void link_monitor(void *param)
nu_emac_t psNuEmac = (nu_emac_t)param;
EMAC_T *EMAC = psNuEmac->memmgr.psEmac;
uint32_t LinkStatus_Last = EMAC_LINK_DOWN;
rt_err_t result = RT_EOK;
EMAC_PhyInit(EMAC);
@@ -274,9 +273,6 @@ static void link_monitor(void *param)
else
{
eth_device_linkchange(&psNuEmac->eth, RT_TRUE);
result = rt_sem_release(&psNuEmac->eth_sem);
RT_ASSERT(result == RT_EOK);
}
LinkStatus_Last = LinkStatus_Current;
@@ -317,7 +313,8 @@ static rt_err_t nu_emac_init(rt_device_t dev)
snprintf(szTmp, sizeof(szTmp), "%sphy", psNuEmac->name);
rt_sem_init(&psNuEmac->eth_sem, "eth_sem", 0, RT_IPC_FLAG_FIFO);
ret = rt_sem_init(&psNuEmac->eth_sem, "eth_sem", 0, RT_IPC_FLAG_FIFO);
RT_ASSERT(ret == RT_EOK);
EMAC_Reset(EMAC);
@@ -402,26 +399,21 @@ static rt_err_t nu_emac_tx(rt_device_t dev, struct pbuf *p)
rt_uint32_t offset = 0;
rt_uint8_t *buf;
if (psNuEmac->eth.link_status == RT_FALSE)
{
rt_kprintf("[%s]Stand here.\n", psNuEmac->name);
while (rt_sem_take(&psNuEmac->eth_sem, RT_WAITING_FOREVER) != RT_EOK);
rt_kprintf("[%s]Leave.\n", psNuEmac->name);
}
buf = (rt_uint8_t *)EMAC_ClaimFreeTXBuf(&psNuEmac->memmgr);
/* Get free TX buffer */
if (buf == RT_NULL)
{
rt_sem_control(&psNuEmac->eth_sem, RT_IPC_CMD_RESET, 0);
rt_err_t result;
result = rt_sem_control(&psNuEmac->eth_sem, RT_IPC_CMD_RESET, 0);
RT_ASSERT(result != RT_EOK);
EMAC_CLEAR_INT_FLAG(EMAC, EMAC_INTSTS_TXCPIF_Msk);
EMAC_ENABLE_INT(EMAC, EMAC_INTEN_TXCPIEN_Msk);
do
{
rt_sem_take(&psNuEmac->eth_sem, 1);
result = rt_sem_take(&psNuEmac->eth_sem, 10);
buf = (rt_uint8_t *)EMAC_ClaimFreeTXBuf(&psNuEmac->memmgr);
}
while (buf == RT_NULL);
bsp/nuvoton/libraries/nuc980/rtt_port/drv_etimer_capture.c
+240
View File
File diff suppressed because it is too large. Load diff
bsp/nuvoton/libraries/nuc980/rtt_port/drv_pdma.c
+10 -4
View File
@@ -968,8 +968,12 @@ static void nu_pdma_memfun_actor_init(void)
{
nu_pdma_memfun_actor_maxnum = i;
nu_pdma_memfun_actor_mask = ~(((1 << i) - 1));
nu_pdma_memfun_actor_pool_sem = rt_sem_create("mempool_sem", nu_pdma_memfun_actor_maxnum, RT_IPC_FLAG_FIFO);
RT_ASSERT(nu_pdma_memfun_actor_pool_sem != RT_NULL);
nu_pdma_memfun_actor_pool_lock = rt_mutex_create("mempool_lock", RT_IPC_FLAG_FIFO);
RT_ASSERT(nu_pdma_memfun_actor_pool_lock != RT_NULL);
}
}
@@ -987,13 +991,15 @@ static void nu_pdma_memfun_cb(void *pvUserData, uint32_t u32Events)
static int nu_pdma_memfun_employ(void)
{
int idx = -1 ;
rt_err_t result = 0;
rt_err_t result = RT_EOK;
/* Headhunter */
if (nu_pdma_memfun_actor_pool_sem &&
((result = rt_sem_take(nu_pdma_memfun_actor_pool_sem, RT_WAITING_FOREVER)) == RT_EOK))
{
rt_mutex_take(nu_pdma_memfun_actor_pool_lock, RT_WAITING_FOREVER);
result = rt_mutex_take(nu_pdma_memfun_actor_pool_lock, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
/* Find the position of first '0' in nu_pdma_memfun_actor_mask. */
idx = nu_cto(nu_pdma_memfun_actor_mask);
if (idx != 32)
@@ -1004,9 +1010,9 @@ static int nu_pdma_memfun_employ(void)
{
idx = -1;
}
rt_mutex_release(nu_pdma_memfun_actor_pool_lock);
result = rt_mutex_release(nu_pdma_memfun_actor_pool_lock);
RT_ASSERT(result == RT_EOK);
}
RT_ASSERT(result == RT_EOK);
return idx;
}
bsp/nuvoton/libraries/nuc980/rtt_port/drv_pwm.c
-38
View File
@@ -301,42 +301,4 @@ int rt_hw_pwm_init(void)
INIT_DEVICE_EXPORT(rt_hw_pwm_init);
#if defined(RT_USING_FINSH)
#include <finsh.h>
#ifdef FINSH_USING_MSH
static int pwm_get(int argc, char **argv)
{
int result = 0;
struct rt_device_pwm *device = RT_NULL;
struct rt_pwm_configuration configuration = {0};
if (argc != 3)
{
rt_kprintf("Usage: pwm_get pwm1 1\n");
result = -RT_ERROR;
goto _exit;
}
device = (struct rt_device_pwm *)rt_device_find(argv[1]);
if (!device)
{
result = -RT_EIO;
goto _exit;
}
configuration.channel = atoi(argv[2]);
result = rt_device_control(&device->parent, PWM_CMD_GET, &configuration);
_exit:
return result;
}
MSH_CMD_EXPORT(pwm_get, pwm_get pwm1 1);
#endif /* FINSH_USING_MSH */
#endif /* RT_USING_FINSH */
#endif
bsp/nuvoton/libraries/nuc980/rtt_port/drv_qspi.c
+37 -13
View File
@@ -60,7 +60,7 @@ static struct nu_spi nu_qspi_arr [] =
.rstidx = QSPI0RST,
.clkidx = QSPI0CKEN,
#if defined(BSP_USING_QSPI_PDMA)
#if defined(BSP_USING_SPI_PDMA)
#if defined(BSP_USING_QSPI0_PDMA)
.pdma_perp_tx = PDMA_QSPI0_TX,
.pdma_perp_rx = PDMA_QSPI0_RX,
@@ -153,7 +153,6 @@ exit_nu_qspi_bus_configure:
return -(ret);
}
#if defined(RT_SFUD_USING_QSPI)
static int nu_qspi_mode_config(struct nu_spi *qspi_bus, rt_uint8_t *tx, rt_uint8_t *rx, int qspi_lines)
{
QSPI_T *qspi_base = (QSPI_T *)qspi_bus->spi_base;
@@ -197,16 +196,13 @@ static int nu_qspi_mode_config(struct nu_spi *qspi_bus, rt_uint8_t *tx, rt_uint8
}
return qspi_lines;
}
#endif
static rt_uint32_t nu_qspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_message *message)
{
struct nu_spi *qspi_bus;
struct rt_qspi_configuration *qspi_configuration;
#if defined(RT_SFUD_USING_QSPI)
struct rt_qspi_message *qspi_message;
rt_uint8_t u8last = 1;
#endif
rt_uint8_t bytes_per_word;
QSPI_T *qspi_base;
rt_uint32_t u32len = 0;
@@ -232,7 +228,6 @@ static rt_uint32_t nu_qspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_
}
}
#if defined(RT_SFUD_USING_QSPI)
qspi_message = (struct rt_qspi_message *)message;
/* Command + Address + Dummy + Data */
@@ -248,7 +243,7 @@ static rt_uint32_t nu_qspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_
}
/* Address stage */
if (qspi_message->address.size != 0)
if (qspi_message->address.size > 0)
{
rt_uint32_t u32ReversedAddr = 0;
rt_uint32_t u32AddrNumOfByte = qspi_message->address.size / 8;
@@ -278,8 +273,39 @@ static rt_uint32_t nu_qspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_
1);
}
/* alternate_bytes stage */
if ((qspi_message->alternate_bytes.size > 0) && (qspi_message->alternate_bytes.size <= 4))
{
rt_uint32_t u32AlternateByte = 0;
rt_uint32_t u32NumOfByte = qspi_message->alternate_bytes.size / 8;
switch (u32NumOfByte)
{
case 1:
u32AlternateByte = (qspi_message->alternate_bytes.content & 0xff);
break;
case 2:
nu_set16_be((rt_uint8_t *)&u32AlternateByte, qspi_message->alternate_bytes.content);
break;
case 3:
nu_set24_be((rt_uint8_t *)&u32AlternateByte, qspi_message->alternate_bytes.content);
break;
case 4:
nu_set32_be((rt_uint8_t *)&u32AlternateByte, qspi_message->alternate_bytes.content);
break;
default:
RT_ASSERT(0);
break;
}
u8last = nu_qspi_mode_config(qspi_bus, (rt_uint8_t *)&u32AlternateByte, RT_NULL, qspi_message->alternate_bytes.qspi_lines);
nu_spi_transfer((struct nu_spi *)qspi_bus,
(rt_uint8_t *) &u32AlternateByte,
RT_NULL,
u32NumOfByte,
1);
}
/* Dummy_cycles stage */
if (qspi_message->dummy_cycles != 0)
if (qspi_message->dummy_cycles > 0)
{
qspi_bus->dummy = 0x00;
@@ -291,12 +317,10 @@ static rt_uint32_t nu_qspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_
1);
}
/* Data stage */
nu_qspi_mode_config(qspi_bus, (rt_uint8_t *) message->send_buf, (rt_uint8_t *) message->recv_buf, qspi_message->qspi_data_lines);
#endif //#if defined(RT_SFUD_USING_QSPI)
if (message->length != 0)
if (message->length > 0)
{
/* Data stage */
nu_qspi_mode_config(qspi_bus, (rt_uint8_t *) message->send_buf, (rt_uint8_t *) message->recv_buf, qspi_message->qspi_data_lines);
nu_spi_transfer((struct nu_spi *)qspi_bus,
(rt_uint8_t *) message->send_buf,
(rt_uint8_t *) message->recv_buf,
bsp/nuvoton/libraries/nuc980/rtt_port/drv_sdh.c
+9 -5
View File
@@ -412,7 +412,8 @@ static int rt_hw_sdh_init(void)
rt_err_t ret = RT_EOK;
rt_uint32_t flags = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE;
rt_event_init(&sdh_event, "sdh_event", RT_IPC_FLAG_FIFO);
ret = rt_event_init(&sdh_event, "sdh_event", RT_IPC_FLAG_FIFO);
RT_ASSERT(ret == RT_EOK);
for (i = (SDH_START + 1); i < SDH_CNT; i++)
{
@@ -428,7 +429,8 @@ static int rt_hw_sdh_init(void)
/* Private */
nu_sdh_arr[i].dev.user_data = (void *)&nu_sdh_arr[i];
rt_sem_init(&nu_sdh_arr[i].lock, "sdhlock", 1, RT_IPC_FLAG_FIFO);
ret = rt_sem_init(&nu_sdh_arr[i].lock, "sdhlock", 1, RT_IPC_FLAG_FIFO);
RT_ASSERT(ret == RT_EOK);
rt_hw_interrupt_install(nu_sdh_arr[i].irqn, SDH_IRQHandler, (void *)&nu_sdh_arr[i], nu_sdh_arr[i].name);
rt_hw_interrupt_umask(nu_sdh_arr[i].irqn);
@@ -437,9 +439,8 @@ static int rt_hw_sdh_init(void)
nu_sys_ip_reset(nu_sdh_arr[i].rstidx);
SDH_Open(nu_sdh_arr[i].base, CardDetect_From_GPIO);
nu_sdh_arr[i].pbuf = RT_NULL;
ret = rt_device_register(&nu_sdh_arr[i].dev, nu_sdh_arr[i].name, flags);
RT_ASSERT(ret == RT_EOK);
}
@@ -591,7 +592,10 @@ static void sdh_hotplugger(void *param)
for (i = (SDH_START + 1); i < SDH_CNT; i++)
{
if (SDH_IS_CARD_PRESENT(nu_sdh_arr[i].base))
/* Try to detect SD card on selected port. */
SDH_Open(nu_sdh_arr[i].base, CardDetect_From_GPIO);
if (!SDH_Probe(nu_sdh_arr[i].base) &&
SDH_IS_CARD_PRESENT(nu_sdh_arr[i].base))
{
nu_sdh_hotplug_mount(&nu_sdh_arr[i]);
}
bsp/nuvoton/libraries/nuc980/rtt_port/drv_sys.c
+38
View File
@@ -287,6 +287,18 @@ void nu_sys_ipclk_disable(E_SYS_IPCLK eIPClkIdx)
_nu_sys_ipclk(eIPClkIdx, 0);
}
E_SYS_USB0_ID nu_sys_usb0_role(void)
{
/* Check Role on USB0 dual-role port. */
/*
[17] USB0_IDS
USB0_ID Status
0 = USB port 0 used as a USB device port.
1 = USB port 0 used as a USB host port.
*/
return ((inpw(REG_SYS_MISCISR) & (1 << 17)) > 0) ? USB0_ID_HOST : USB0_ID_DEVICE;
}
#ifdef RT_USING_FINSH
#include <finsh.h>
@@ -308,6 +320,32 @@ int cmd_shutdown(int argc, char **argv)
FINSH_FUNCTION_EXPORT_ALIAS(cmd_reset, __cmd_reset, restart the system.);
FINSH_FUNCTION_EXPORT_ALIAS(cmd_shutdown, __cmd_shutdown, shutdown the system.);
int nu_clocks(int argc, char **argv)
{
rt_kprintf("SYS_UPLL = %d MHz\n", sysGetClock(SYS_UPLL));
rt_kprintf("SYS_APLL = %d MHz\n", sysGetClock(SYS_APLL));
rt_kprintf("SYS_SYSTEM = %d MHz\n", sysGetClock(SYS_SYSTEM));
rt_kprintf("SYS_HCLK = %d MHz\n", sysGetClock(SYS_HCLK));
rt_kprintf("SYS_PCLK01 = %d MHz\n", sysGetClock(SYS_PCLK01));
rt_kprintf("SYS_PCLK2 = %d MHz\n", sysGetClock(SYS_PCLK2));
rt_kprintf("SYS_CPU = %d MHz\n", sysGetClock(SYS_CPU));
rt_kprintf("CLK_HCLKEN = %08X\n", inpw(REG_CLK_HCLKEN));
rt_kprintf("CLK_PCLKEN0 = %08X\n", inpw(REG_CLK_PCLKEN0));
rt_kprintf("CLK_PCLKEN1 = %08X\n", inpw(REG_CLK_PCLKEN1));
rt_kprintf("AIC_INTMSK0 = %08X\n", inpw(REG_AIC_INTMSK0));
rt_kprintf("AIC_INTMSK1 = %08X\n", inpw(REG_AIC_INTMSK1));
rt_kprintf("AIC_INTEN0 = %08X\n", inpw(REG_AIC_INTEN0));
rt_kprintf("AIC_INTEN1 = %08X\n", inpw(REG_AIC_INTEN1));
rt_kprintf("AIC_INTDIS0 = %08X\n", inpw(REG_AIC_INTDIS0));
rt_kprintf("AIC_INTDIS1 = %08X\n", inpw(REG_AIC_INTDIS1));
return 0;
}
MSH_CMD_EXPORT(nu_clocks, Get all system clocks);
#endif
#endif
bsp/nuvoton/libraries/nuc980/rtt_port/drv_sys.h
+8
View File
@@ -243,6 +243,13 @@ typedef enum
} E_SYS_IPCLK;
typedef enum
{
USB0_ID_DEVICE,
USB0_ID_HOST,
USB0_ID_CNT
} E_SYS_USB0_ID;
void rt_hw_interrupt_init(void);
void rt_hw_interrupt_set_priority(int vector, int priority);
void rt_hw_interrupt_set_type(int vector, int type);
@@ -255,5 +262,6 @@ void nu_systick_udelay(uint32_t delay_us);
void nu_sys_ip_reset(E_SYS_IPRST eIPRstIdx);
void nu_sys_ipclk_enable(E_SYS_IPCLK eIPClkIdx);
void nu_sys_ipclk_disable(E_SYS_IPCLK eIPClkIdx);
E_SYS_USB0_ID nu_sys_usb0_role(void);
#endif
bsp/nuvoton/libraries/nuc980/rtt_port/drv_uart.c
+3 -1
View File
@@ -572,7 +572,6 @@ static void nu_pdma_uart_rx_cb(void *pvOwner, uint32_t u32Events)
struct rt_serial_device *serial = (struct rt_serial_device *)pvOwner;
nu_uart_t puart = (nu_uart_t)serial;
RT_ASSERT(serial != RT_NULL);
struct rt_serial_rx_fifo *rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
/* Get base address of uart register */
UART_T *uart_base = puart->uart_base;
@@ -581,6 +580,9 @@ static void nu_pdma_uart_rx_cb(void *pvOwner, uint32_t u32Events)
if (u32Events & (NU_PDMA_EVENT_TRANSFER_DONE | NU_PDMA_EVENT_TIMEOUT))
{
#if defined(BSP_USING_MMU)
struct rt_serial_rx_fifo *rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
#endif
if (u32Events & NU_PDMA_EVENT_TRANSFER_DONE)
{
transferred_rxbyte = puart->rxdma_trigger_len;
bsp/nuvoton/libraries/nuc980/rtt_port/drv_usbd.c
+54 -30
View File
@@ -23,9 +23,9 @@
#include "drv_sys.h"
#define LOG_TAG "drv.usbd"
#define DBG_ENABLE
//#define DBG_ENABLE
#define DBG_SECTION_NAME "drv.usbd"
#define DBG_LEVEL DBG_INFO
//#define DBG_LEVEL DBG_ERROR
#define DBG_COLOR
#include <rtdbg.h>
@@ -124,7 +124,8 @@ typedef struct _nu_usbd_t
IRQn_Type irqn;
E_SYS_IPRST rstidx;
E_SYS_IPCLK clkidx;
uint8_t address_tmp; /* Keep assigned address for flow control */
uint8_t address_tmp; /* Keep assigned address for flow control */
uint8_t plugging_status; /* For debounce, 0: Unplug, 1: plug-in */
} nu_usbd_t;
@@ -149,6 +150,7 @@ static nu_usbd_t nu_usbd =
.rstidx = USBDRST,
.clkidx = USBDCKEN,
.address_tmp = 0,
.plugging_status = 0,
};
static struct udcd _rt_obj_udc;
@@ -278,6 +280,27 @@ static void NU_SetupStageCallback(nu_usbd_t *nu_udc)
rt_usbd_ep0_setup_handler(&_rt_obj_udc, (struct urequest *)&setup_packet);
}
__STATIC_INLINE void nu_udc_enable(void)
{
USBD_ENABLE_USB();
}
__STATIC_INLINE void nu_udc_disable(void)
{
int i;
USBD_ENABLE_CEP_INT(0);
USBD_CLR_CEP_INT_FLAG(0xffff);
USBD_SET_CEP_STATE(inpw(REG_USBD_CEPCTL) | USB_CEPCTL_FLUSH);
for (i = 0; i < USBD_MAX_EP; i++)
USBD->EP[i].EPRSPCTL = USB_EP_RSPCTL_FLUSH | USB_EP_RSPCTL_TOGGLE;
USBD_DISABLE_USB();
}
static rt_err_t _ep_set_stall(rt_uint8_t address)
{
@@ -543,6 +566,9 @@ static void nu_usbd_isr(int vector, void *param)
int i;
int IrqStAllEP;
/* Igrone event if role is USBH*/
if (nu_sys_usb0_role() != USB0_ID_DEVICE) return;
IrqStL = USBD->GINTSTS & USBD->GINTEN; /* get interrupt status */
if (!IrqStL) return;
@@ -635,17 +661,25 @@ static void nu_usbd_isr(int vector, void *param)
{
if (USBD_IS_ATTACHED())
{
LOG_I("PLUG IN");
/* USB Plug In */
USBD_ENABLE_USB();
rt_usbd_connect_handler(&_rt_obj_udc);
if (!nu_usbd.plugging_status)
{
LOG_I("PLUG IN");
/* USB Plug In */
nu_udc_enable();
rt_usbd_connect_handler(&_rt_obj_udc);
nu_usbd.plugging_status = 1;
}
}
else
{
LOG_I("Un-Plug");
/* USB Un-plug */
USBD_DISABLE_USB();
rt_usbd_disconnect_handler(&_rt_obj_udc);
if (nu_usbd.plugging_status)
{
LOG_I("Un-Plug");
/* USB Un-plug */
nu_udc_disable();
rt_usbd_disconnect_handler(&_rt_obj_udc);
nu_usbd.plugging_status = 0;
}
}
USBD_CLR_BUS_INT_FLAG(USBD_BUSINTSTS_VBUSDETIF_Msk);
}
@@ -791,29 +825,15 @@ static void nu_usbd_isr(int vector, void *param)
static rt_err_t _init(rt_device_t device)
{
#if !defined(BSP_USING_OTG)
uint32_t volatile i;
/* Initialize USB PHY */
SYS_UnlockReg();
SYS->USBPHY &= ~SYS_USBPHY_HSUSBROLE_Msk; /* select USBD */
/* Enable USB PHY */
SYS->USBPHY = (SYS->USBPHY & ~(SYS_USBPHY_HSUSBROLE_Msk | SYS_USBPHY_HSUSBACT_Msk)) | SYS_USBPHY_HSUSBEN_Msk;
for (i = 0; i < 0x1000; i++)
__NOP(); // delay > 10 us
SYS->USBPHY |= SYS_USBPHY_HSUSBACT_Msk;
SYS_LockReg();
#endif
nu_sys_ipclk_enable(nu_usbd.clkidx);
nu_sys_ip_reset(nu_usbd.rstidx);
nu_systick_udelay(1000);
/* USBD Open */
USBD->PHYCTL |= (USBD_PHYCTL_PHYEN_Msk | USBD_PHYCTL_DPPUEN_Msk);
USBD_ENABLE_USB();
while (1)
{
USBD->EP[EPA].EPMPS = 0x20ul;
@@ -842,7 +862,11 @@ static rt_err_t _init(rt_device_t device)
rt_hw_interrupt_umask(nu_usbd.irqn);
/* Start transaction */
USBD_Start();
USBD_CLR_SE0();
/* Get currect cable status */
nu_usbd.plugging_status = USBD_IS_ATTACHED() >> USBD_PHYCTL_VBUSDET_Pos;
return RT_EOK;
}
bsp/nuvoton/libraries/nuc980/rtt_port/drv_usbhost.c
+893
View File
File diff suppressed because it is too large. Load diff
bsp/nuvoton/nk-980iot/.config
+23 -36
View File
@@ -125,6 +125,11 @@ CONFIG_RT_DFS_ELM_WORD_ACCESS=y
# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
CONFIG_RT_DFS_ELM_USE_LFN_3=y
CONFIG_RT_DFS_ELM_USE_LFN=3
CONFIG_RT_DFS_ELM_LFN_UNICODE_0=y
# CONFIG_RT_DFS_ELM_LFN_UNICODE_1 is not set
# CONFIG_RT_DFS_ELM_LFN_UNICODE_2 is not set
# CONFIG_RT_DFS_ELM_LFN_UNICODE_3 is not set
CONFIG_RT_DFS_ELM_LFN_UNICODE=0
CONFIG_RT_DFS_ELM_MAX_LFN=255
CONFIG_RT_DFS_ELM_DRIVES=8
CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=4096
@@ -133,7 +138,12 @@ CONFIG_RT_DFS_ELM_REENTRANT=y
CONFIG_RT_USING_DFS_DEVFS=y
# CONFIG_RT_USING_DFS_ROMFS is not set
# CONFIG_RT_USING_DFS_RAMFS is not set
# CONFIG_RT_USING_DFS_UFFS is not set
CONFIG_RT_USING_DFS_UFFS=y
# CONFIG_RT_UFFS_ECC_MODE_0 is not set
# CONFIG_RT_UFFS_ECC_MODE_1 is not set
# CONFIG_RT_UFFS_ECC_MODE_2 is not set
CONFIG_RT_UFFS_ECC_MODE_3=y
CONFIG_RT_UFFS_ECC_MODE=3
# CONFIG_RT_USING_DFS_JFFS2 is not set
# CONFIG_RT_USING_DFS_NFS is not set
@@ -162,7 +172,8 @@ CONFIG_RT_USING_ADC=y
# CONFIG_RT_USING_DAC is not set
CONFIG_RT_USING_PWM=y
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
CONFIG_RT_USING_MTD_NAND=y
CONFIG_RT_MTD_NAND_DEBUG=y
# CONFIG_RT_USING_PM is not set
CONFIG_RT_USING_RTC=y
CONFIG_RT_USING_ALARM=y
@@ -174,12 +185,7 @@ CONFIG_RTC_NTP_SYNC_PERIOD=3600
CONFIG_RT_USING_SPI=y
CONFIG_RT_USING_QSPI=y
# CONFIG_RT_USING_SPI_MSD is not set
CONFIG_RT_USING_SFUD=y
CONFIG_RT_SFUD_USING_SFDP=y
CONFIG_RT_SFUD_USING_FLASH_INFO_TABLE=y
CONFIG_RT_SFUD_USING_QSPI=y
CONFIG_RT_SFUD_SPI_MAX_HZ=50000000
# CONFIG_RT_DEBUG_SFUD is not set
# CONFIG_RT_USING_SFUD is not set
# CONFIG_RT_USING_ENC28J60 is not set
# CONFIG_RT_USING_SPI_WIFI is not set
CONFIG_RT_USING_WDT=y
@@ -222,7 +228,7 @@ CONFIG_RT_HWCRYPTO_USING_RNG=y
#
CONFIG_RT_USING_USB_HOST=y
CONFIG_RT_USBH_MSTORAGE=y
CONFIG_UDISK_MOUNTPOINT="/"
CONFIG_UDISK_MOUNTPOINT="/mnt/udisk"
CONFIG_RT_USING_USB_DEVICE=y
CONFIG_RT_USBD_THREAD_STACK_SZ=4096
CONFIG_USB_VENDOR_ID=0x0FFE
@@ -264,6 +270,7 @@ CONFIG_RT_USING_POSIX=y
# Socket abstraction layer
#
CONFIG_RT_USING_SAL=y
CONFIG_SAL_INTERNET_CHECK=y
#
# protocol stack implement
@@ -523,21 +530,7 @@ CONFIG_PKG_NETUTILS_VER="v1.2.0"
# CONFIG_PKG_USING_PIXMAN is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
CONFIG_PKG_USING_FAL=y
CONFIG_PKG_FAL_PATH="/packages/system/fal"
CONFIG_FAL_DEBUG_CONFIG=y
CONFIG_FAL_DEBUG=1
CONFIG_FAL_PART_HAS_TABLE_CFG=y
CONFIG_FAL_USING_SFUD_PORT=y
CONFIG_FAL_USING_NOR_FLASH_DEV_NAME="norflash0"
# CONFIG_PKG_USING_FAL_V00500 is not set
# CONFIG_PKG_USING_FAL_V00400 is not set
# CONFIG_PKG_USING_FAL_V00300 is not set
# CONFIG_PKG_USING_FAL_V00200 is not set
# CONFIG_PKG_USING_FAL_V00100 is not set
CONFIG_PKG_USING_FAL_LATEST_VERSION=y
CONFIG_PKG_FAL_VER="latest"
CONFIG_PKG_FAL_VER_NUM=0x99999
# CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_FLASHDB is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
@@ -707,6 +700,7 @@ CONFIG_NU_PKG_USING_DEMO=y
# CONFIG_NU_PKG_USING_NAU88L25 is not set
CONFIG_NU_PKG_USING_NAU8822=y
# CONFIG_NU_PKG_USING_ILI9341 is not set
CONFIG_NU_PKG_USING_SPINAND=y
#
# Hardware Drivers Config
@@ -734,23 +728,18 @@ CONFIG_BSP_USING_TMR=y
CONFIG_BSP_USING_TIMER=y
CONFIG_BSP_USING_TMR0=y
CONFIG_BSP_USING_TIMER0=y
# CONFIG_BSP_USING_TPWM0 is not set
# CONFIG_BSP_USING_TIMER0_CAPTURE is not set
CONFIG_BSP_USING_TMR1=y
CONFIG_BSP_USING_TIMER1=y
# CONFIG_BSP_USING_TPWM1 is not set
# CONFIG_BSP_USING_TIMER1_CAPTURE is not set
CONFIG_BSP_USING_TMR2=y
CONFIG_BSP_USING_TIMER2=y
# CONFIG_BSP_USING_TPWM2 is not set
# CONFIG_BSP_USING_TIMER2_CAPTURE is not set
CONFIG_BSP_USING_TMR3=y
CONFIG_BSP_USING_TIMER3=y
# CONFIG_BSP_USING_TPWM3 is not set
# CONFIG_BSP_USING_TIMER3_CAPTURE is not set
CONFIG_BSP_USING_TMR4=y
CONFIG_BSP_USING_TIMER4=y
# CONFIG_BSP_USING_TPWM4 is not set
# CONFIG_BSP_USING_TIMER4_CAPTURE is not set
CONFIG_BSP_USING_UART=y
CONFIG_BSP_USING_UART0=y
@@ -793,7 +782,7 @@ CONFIG_BSP_USING_I2S=y
CONFIG_NU_I2S_DMA_FIFO_SIZE=4096
CONFIG_BSP_USING_QSPI=y
CONFIG_BSP_USING_QSPI0=y
# CONFIG_BSP_USING_QSPI0_PDMA is not set
CONFIG_BSP_USING_QSPI0_PDMA=y
# CONFIG_BSP_USING_SCUART is not set
CONFIG_BSP_USING_CRYPTO=y
# CONFIG_NU_PRNG_USE_SEED is not set
@@ -802,7 +791,6 @@ CONFIG_BSP_USING_WDT=y
# CONFIG_BSP_USING_EBI is not set
CONFIG_BSP_USING_USBD=y
CONFIG_BSP_USING_USBH=y
CONFIG_BSP_USING_OTG=y
#
# On-board Peripheral Drivers
@@ -811,11 +799,10 @@ CONFIG_BSP_USING_CONSOLE=y
CONFIG_BOARD_USING_IP101GR=y
CONFIG_BOARD_USING_NAU8822=y
CONFIG_BOARD_USING_STORAGE_SDCARD=y
CONFIG_BOARD_USING_STORAGE_SPIFLASH=y
# CONFIG_BOARD_USING_USB_NONE is not set
# CONFIG_BOARD_USING_USB_HOST is not set
# CONFIG_BOARD_USING_USB_OTG is not set
CONFIG_BOARD_USING_USB_OTG_HOST=y
# CONFIG_BOARD_USING_STORAGE_SPIFLASH is not set
CONFIG_BOARD_USING_STORAGE_SPINAND=y
CONFIG_BOARD_USING_USB0_DEVICE_HOST=y
CONFIG_BOARD_USING_USB1_HOST=y
#
# Board extended module drivers
bsp/nuvoton/nk-980iot/README.md
+39 -2
View File
@@ -43,8 +43,8 @@ Nuvoton Technology provides industrial IoT development platform using NUC980DK61
|LEDs | | Supported |
|Audio Codec | NAU8822, Supports MIC and earphone | Supported |
|USB Device | VCOM + MStorage | Supported |
|2xUSB Host | MStorage | Not ready |
|SPI NAND flash | W25N01GVZE1G | Not ready |
|2xUSB Host | MStorage | Supported |
|SPI NAND flash | W25N01GVZE1G | Supported |
|VCOM | For console | Ready.(Need to install VCOM driver) |
## 2. Supported compiler
@@ -88,6 +88,43 @@ Execute Address: 0x0<br>
Enjoy!! <br>
<br>
### 3.3 SPI NAND flash using NuWriter
You can use NuWriter to program rtthread.bin into SPI NAND flash.
[![SPI NAND flash](https://i.imgur.com/p9LudBK.gif "SPI NAND flash")](https://i.imgur.com/p9LudBK.gif "SPI NAND flash using NuWriter")
<br>
Choose type: SPINAND<br>
<< Press Re-Connect >><br>
<< Press Erase >><br>
<< Select Erase All >><br>
<< Press OK >><br>
Choose file: Specify your uboot-spl.bin file.<br>
Image Type: Loader<br>
Execute Address: 0x200<br>
<< Press Program >><br>
Choose file: Specify your uboot.bin file.<br>
Image Type: Data<br>
Image start address: 0x100000<br>
<< Press Program >><br>
Choose file: Specify your rtthread.bin file.<br>
Image Type: Data<br>
Image start address: 0x200000<br>
<< Press Program >><br>
Choose file: Specify your env.txt file.<br>
Image Type: Environment<br>
Image start address: 0x80000<br>
<< Press Program >><br>
<< Press OK & Wait it down >><br>
<< Set Power-on setting to SPI NAND booting >><br>
<< Press Reset button on board >><br>
Enjoy!! <br>
<br>
## 4. Test
You can use Tera Term terminate emulator (or other software) to type commands of RTT. All parameters of serial communication are shown in below image. Here, you can find out the corresponding port number of Nuvoton Virtual Com Port in window device manager.
bsp/nuvoton/nk-980iot/applications/main.c
+5
View File
@@ -22,6 +22,7 @@
/* defined the LED_Y pin: PB8 */
#define LED_Y NU_GET_PININDEX(NU_PB, 8)
#if !defined(BSP_USING_USBH)
/* defined the Key1 pin: PE10 */
#define KEY_1 NU_GET_PININDEX(NU_PE, 10)
@@ -47,6 +48,8 @@ void nu_button_cb(void *args)
}
#endif
#endif
int main(int argc, char **argv)
{
#if defined(RT_USING_PIN)
@@ -58,6 +61,7 @@ int main(int argc, char **argv)
/* set LED_Y pin mode to output */
rt_pin_mode(LED_Y, PIN_MODE_OUTPUT);
#if !defined(BSP_USING_USBH)
/* set KEY_1 pin mode to input */
rt_pin_mode(KEY_1, PIN_MODE_INPUT_PULLUP);
@@ -69,6 +73,7 @@ int main(int argc, char **argv)
rt_pin_attach_irq(KEY_2, PIN_IRQ_MODE_FALLING, nu_button_cb, &u32Key2);
rt_pin_irq_enable(KEY_2, PIN_IRQ_ENABLE);
#endif
while (counter--)
{
bsp/nuvoton/nk-980iot/applications/mnt.c
+6 -7
View File
@@ -53,7 +53,10 @@ const void *data;
const struct dfs_mount_tbl mount_table[] =
{
{ RAMDISK_UDC, "/ramdisk_udc", "elm", 0, RT_NULL },
{ RAMDISK_UDC, "/mnt/ram_usbd", "elm", 0, RT_NULL },
#if defined(RT_USING_DFS_UFFS)
{ "nand1", "/mnt/filesystem", "uffs", 0, RT_NULL },
#endif
{0},
};
#endif
@@ -171,10 +174,11 @@ int filesystem_init(void)
LOG_I("ramdisk mounted on \"/\".");
/* now you can create dir dynamically. */
mkdir_p("/ramdisk_udc", 0x777);
mkdir_p("/mnt", 0x777);
mkdir_p("/cache", 0x777);
mkdir_p("/download", 0x777);
mkdir_p("/mnt/ram_usbd", 0x777);
mkdir_p("/mnt/filesystem", 0x777);
#if defined(RT_USBH_MSTORAGE) && defined(UDISK_MOUNTPOINT)
mkdir_p(UDISK_MOUNTPOINT, 0x777);
#endif
@@ -219,11 +223,6 @@ int mnt_init_spiflash0(void)
rt_kprintf("Failed to create block device for %s.\n", PARTITION_NAME_FILESYSTEM);
goto exit_mnt_init_spiflash0;
}
else if (mkdir(MOUNT_POINT_SPIFLASH0, 0x777) < 0)
{
rt_kprintf("Failed to make folder for %s.\n", MOUNT_POINT_SPIFLASH0);
goto exit_mnt_init_spiflash0;
}
else if (dfs_mount(psNorFlash->parent.name, MOUNT_POINT_SPIFLASH0, "elm", 0, 0) != 0)
{
rt_kprintf("Failed to mount elm on %s.\n", MOUNT_POINT_SPIFLASH0);
bsp/nuvoton/nk-980iot/board/Kconfig
+20 -28
View File
@@ -33,39 +33,31 @@ menu "Hardware Drivers Config"
default y
config BOARD_USING_STORAGE_SPIFLASH
bool "SPIFLASH supporting(over qspi0)"
bool "SPI NOR FLASH supporting(over qspi0)"
select BSP_USING_QSPI
select BSP_USING_QSPI0
default n
config BOARD_USING_STORAGE_SPINAND
bool "SPI NAND FLASH supporting(over qspi0)"
select BSP_USING_QSPI
select BSP_USING_QSPI0
select NU_PKG_USING_SPINAND
default y
choice
prompt "Select HS USB Ports"
config BOARD_USING_USB0_DEVICE_HOST
select BSP_USING_USBH
select BSP_USING_USBD
bool "Enable USB0 Device/Host"
help
Choose this option if you need USB device or host function mode.
If you need USB host, please remember short to ground on JP1 jumper.
config BOARD_USING_USB_NONE
bool "Without any USB function"
help
Choose this option if you need not USB functions.
config BOARD_USING_USB_HOST
select BSP_USING_USBH
bool "Enable USBH"
help
Choose this option if you need USB HOST function mode.
config BOARD_USING_USB_OTG
select BSP_USING_OTG
bool "Enable OTG"
help
Choose this option if you need USB HOST function mode.
config BOARD_USING_USB_OTG_HOST
select BSP_USING_USBH
select BSP_USING_OTG
bool "Enable OTG AND USBH"
help
Choose this option if you need both USB ports function mode.
endchoice
config BOARD_USING_USB1_HOST
select BSP_USING_USBH
bool "Enable USB1 Host"
help
Choose this option if you need USB1 HOST.
endmenu
bsp/nuvoton/nk-980iot/board/board.h
+6
View File
@@ -28,6 +28,12 @@
#define BOARD_SDRAM_SIZE 0x04000000
#define BOARD_HEAP_END ((void*)BOARD_SDRAM_SIZE)
#if defined(RT_USING_MTD_NAND)
#include <drivers/mtd_nand.h>
#define MTD_SPINAND_PARTITION_NUM 3
extern struct rt_mtd_nand_device mtd_partitions[MTD_SPINAND_PARTITION_NUM];
#endif
extern void rt_hw_board_init(void);
extern void nu_clock_init(void);
extern void nu_clock_deinit(void);
bsp/nuvoton/nk-980iot/board/board_dev.c
+100 -15
View File
@@ -30,8 +30,11 @@
static rt_uint8_t SpiFlash_ReadStatusReg(struct rt_qspi_device *qspi_device)
{
rt_uint8_t u8Val;
rt_err_t result = RT_EOK;
rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS;
rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
result = rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
RT_ASSERT(result > 0);
return u8Val;
}
@@ -39,24 +42,53 @@ static rt_uint8_t SpiFlash_ReadStatusReg(struct rt_qspi_device *qspi_device)
static rt_uint8_t SpiFlash_ReadStatusReg2(struct rt_qspi_device *qspi_device)
{
rt_uint8_t u8Val;
rt_err_t result = RT_EOK;
rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS2;
rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
result = rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
RT_ASSERT(result > 0);
return u8Val;
}
static void SpiFlash_WriteStatusReg(struct rt_qspi_device *qspi_device, uint8_t u8Value1, uint8_t u8Value2)
static rt_err_t SpiFlash_WriteStatusReg(struct rt_qspi_device *qspi_device, uint8_t u8Value1, uint8_t u8Value2)
{
rt_uint8_t w25x_txCMD1;
rt_uint8_t u8Val[3];
rt_uint8_t au8Val[2];
rt_err_t result;
struct rt_qspi_message qspi_message = {0};
/* Enable WE */
w25x_txCMD1 = W25X_REG_WRITEENABLE;
rt_qspi_send(qspi_device, &w25x_txCMD1, 1);
result = rt_qspi_send(qspi_device, &w25x_txCMD1, sizeof(w25x_txCMD1));
if (result != sizeof(w25x_txCMD1))
goto exit_SpiFlash_WriteStatusReg;
u8Val[0] = W25X_REG_WRITESTATUS;
u8Val[1] = u8Value1;
u8Val[2] = u8Value2;
rt_qspi_send(qspi_device, &u8Val, 3);
/* Prepare status-1, 2 data */
au8Val[0] = u8Value1;
au8Val[1] = u8Value2;
/* 1-bit mode: Instruction+payload */
qspi_message.instruction.content = W25X_REG_WRITESTATUS;
qspi_message.instruction.qspi_lines = 1;
qspi_message.qspi_data_lines = 1;
qspi_message.parent.cs_take = 1;
qspi_message.parent.cs_release = 1;
qspi_message.parent.send_buf = &au8Val[0];
qspi_message.parent.length = sizeof(au8Val);
qspi_message.parent.next = RT_NULL;
if (rt_qspi_transfer_message(qspi_device, &qspi_message) != sizeof(au8Val))
{
result = -RT_ERROR;
}
result = RT_EOK;
exit_SpiFlash_WriteStatusReg:
return result;
}
static void SpiFlash_WaitReady(struct rt_qspi_device *qspi_device)
@@ -73,21 +105,30 @@ static void SpiFlash_WaitReady(struct rt_qspi_device *qspi_device)
static void SpiFlash_EnterQspiMode(struct rt_qspi_device *qspi_device)
{
rt_err_t result = RT_EOK;
uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device);
uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device);
u8Status2 |= W25X_REG_QUADENABLE;
SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
result = SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
RT_ASSERT(result == RT_EOK);
SpiFlash_WaitReady(qspi_device);
}
static void SpiFlash_ExitQspiMode(struct rt_qspi_device *qspi_device)
{
rt_err_t result = RT_EOK;
uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device);
uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device);
u8Status2 &= ~W25X_REG_QUADENABLE;
SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
result = SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
RT_ASSERT(result == RT_EOK);
SpiFlash_WaitReady(qspi_device);
}
@@ -105,7 +146,49 @@ static int rt_hw_spiflash_init(void)
return 0;
}
INIT_COMPONENT_EXPORT(rt_hw_spiflash_init);
#endif /* BOARD_USING_STORAGE_SPIFLASH */
#endif
#if defined(BOARD_USING_STORAGE_SPINAND) && defined(NU_PKG_USING_SPINAND)
#include "drv_qspi.h"
#include "spinand.h"
struct rt_mtd_nand_device mtd_partitions[MTD_SPINAND_PARTITION_NUM] =
{
[0] =
{
.block_start = 0,
.block_end = 23,
.block_total = 24,
},
[1] =
{
.block_start = 24,
.block_end = 1023,
.block_total = 1000,
},
[2] =
{
.block_start = 0,
.block_end = 1023,
.block_total = 1024,
}
};
static int rt_hw_spinand_init(void)
{
if (nu_qspi_bus_attach_device("qspi0", "qspi01", 4, RT_NULL, RT_NULL) != RT_EOK)
return -1;
if (rt_hw_mtd_spinand_register("qspi01") != RT_EOK)
return -1;
return 0;
}
INIT_COMPONENT_EXPORT(rt_hw_spinand_init);
#endif
#if defined(BOARD_USING_LCD_ILI9341) && defined(NU_PKG_USING_ILI9341_SPI)
#include <lcd_ili9341.h>
@@ -161,9 +244,9 @@ static int rt_hw_esp8266_port(void)
AT_DEVICE_CLASS_ESP8266,
(void *) esp8266);
}
//INIT_APP_EXPORT(rt_hw_esp8266_port);
INIT_APP_EXPORT(rt_hw_esp8266_port);
static void at_wifi_set(int argc, char **argv)
static int at_wifi_set(int argc, char **argv)
{
struct at_device_ssid_pwd sATDConf;
struct at_device *at_dev = RT_NULL;
@@ -173,7 +256,7 @@ static void at_wifi_set(int argc, char **argv)
{
rt_kprintf("\n");
rt_kprintf("at_wifi_set <ssid> <password>\n");
return ;
return -1;
}
sATDConf.ssid = argv[1]; //ssid
@@ -185,6 +268,8 @@ static void at_wifi_set(int argc, char **argv)
{
rt_kprintf("Can't find any initialized AT device.\n");
}
return 0;
}
#ifdef FINSH_USING_MSH
MSH_CMD_EXPORT(at_wifi_set, AT device wifi set ssid / password function);
bsp/nuvoton/nk-980iot/board/nu_pin_init.c
+12 -1
View File
@@ -78,10 +78,16 @@ static void nu_pin_can_init(void)
}
#if defined(BSP_USING_USBD)
static void nu_pin_usbd_init(void)
{
/* USB0_VBUSVLD, PE.11 */
//outpw(REG_SYS_GPE_MFPH, (inpw(REG_SYS_GPE_MFPH) & ~0x0000F000) | 0x00001000);
outpw(REG_SYS_GPE_MFPH, (inpw(REG_SYS_GPE_MFPH) & ~0x0000F000) | 0x00001000);
}
#endif
static void nu_pin_usbh_init(void)
{
}
void nu_pin_init(void)
@@ -95,7 +101,12 @@ void nu_pin_init(void)
nu_pin_pwm_init();
nu_pin_i2s_init();
nu_pin_can_init();
#if defined(BSP_USING_USBD)
nu_pin_usbd_init();
#endif
nu_pin_usbh_init();
}
void nu_pin_deinit(void)
bsp/nuvoton/nk-980iot/linking_scripts/nuc980.ld
+1 -1
View File
@@ -50,7 +50,7 @@ SECTIONS
. = ALIGN(4);
/* section information for utest */
. = ALIGN(4);
. = ALIGN(4);
__rt_utest_tc_tab_start = .;
KEEP(*(UtestTcTab))
__rt_utest_tc_tab_end = .;
bsp/nuvoton/nk-980iot/rtconfig.py
+2 -2
View File
@@ -53,10 +53,10 @@ if PLATFORM == 'gcc':
LPATH = ''
if BUILD == 'debug':
CFLAGS += ' -O0 -gdwarf-2'
CFLAGS += ' -O2 -gdwarf-2'
AFLAGS += ' -gdwarf-2'
else:
CFLAGS += ' -O0'
CFLAGS += ' -O2'
POST_ACTION = OBJCPY + ' -O binary $TARGET ' + TARGET_NAME + '\n'
POST_ACTION += SIZE + ' $TARGET\n'
bsp/nuvoton/nk-980iot/uboot/env.txt
+7
View File
@@ -0,0 +1,7 @@
baudrate=115200
bootdelay=1
stderr=serial
stdin=serial
stdout=serial
loadrtt=nand read 0x80000000 0x200000 0x100000
bootcmd=run loadrtt;go 0x0
bsp/nuvoton/nk-980iot/uboot/u-boot-spl.bin
BIN
View File
Binary file not shown.
bsp/nuvoton/nk-980iot/uboot/u-boot.bin
BIN
View File
Binary file not shown.
bsp/nuvoton/numaker-iot-m487/Nu_Link_Driver.ini
+3 -3
View File
@@ -1,9 +1,9 @@
[Version]
Nu_LinkVersion=V5.14
[Process]
ProcessID=0x00003a80
ProcessCreationTime_L=0xac7abbce
ProcessCreationTime_H=0x01d642ca
ProcessID=0x00004840
ProcessCreationTime_L=0xb55cd40e
ProcessCreationTime_H=0x01d6e4e3
NuLinkID=0x77885acd
NuLinkIDs_Count=0x00000001
NuLinkID0=0x77885acd
bsp/nuvoton/numaker-iot-m487/board/board_dev.c
+52 -11
View File
@@ -30,8 +30,11 @@
static rt_uint8_t SpiFlash_ReadStatusReg(struct rt_qspi_device *qspi_device)
{
rt_uint8_t u8Val;
rt_err_t result = RT_EOK;
rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS;
rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
result = rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
RT_ASSERT(result > 0);
return u8Val;
}
@@ -39,24 +42,53 @@ static rt_uint8_t SpiFlash_ReadStatusReg(struct rt_qspi_device *qspi_device)
static rt_uint8_t SpiFlash_ReadStatusReg2(struct rt_qspi_device *qspi_device)
{
rt_uint8_t u8Val;
rt_err_t result = RT_EOK;
rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS2;
rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
result = rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
RT_ASSERT(result > 0);
return u8Val;
}
static void SpiFlash_WriteStatusReg(struct rt_qspi_device *qspi_device, uint8_t u8Value1, uint8_t u8Value2)
static rt_err_t SpiFlash_WriteStatusReg(struct rt_qspi_device *qspi_device, uint8_t u8Value1, uint8_t u8Value2)
{
rt_uint8_t w25x_txCMD1;
rt_uint8_t u8Val[3];
rt_uint8_t au8Val[2];
rt_err_t result;
struct rt_qspi_message qspi_message = {0};
/* Enable WE */
w25x_txCMD1 = W25X_REG_WRITEENABLE;
rt_qspi_send(qspi_device, &w25x_txCMD1, 1);
result = rt_qspi_send(qspi_device, &w25x_txCMD1, sizeof(w25x_txCMD1));
if (result != sizeof(w25x_txCMD1))
goto exit_SpiFlash_WriteStatusReg;
u8Val[0] = W25X_REG_WRITESTATUS;
u8Val[1] = u8Value1;
u8Val[2] = u8Value2;
rt_qspi_send(qspi_device, &u8Val, 3);
/* Prepare status-1, 2 data */
au8Val[0] = u8Value1;
au8Val[1] = u8Value2;
/* 1-bit mode: Instruction+payload */
qspi_message.instruction.content = W25X_REG_WRITESTATUS;
qspi_message.instruction.qspi_lines = 1;
qspi_message.qspi_data_lines = 1;
qspi_message.parent.cs_take = 1;
qspi_message.parent.cs_release = 1;
qspi_message.parent.send_buf = &au8Val[0];
qspi_message.parent.length = sizeof(au8Val);
qspi_message.parent.next = RT_NULL;
if (rt_qspi_transfer_message(qspi_device, &qspi_message) != sizeof(au8Val))
{
result = -RT_ERROR;
}
result = RT_EOK;
exit_SpiFlash_WriteStatusReg:
return result;
}
static void SpiFlash_WaitReady(struct rt_qspi_device *qspi_device)
@@ -73,21 +105,30 @@ static void SpiFlash_WaitReady(struct rt_qspi_device *qspi_device)
static void SpiFlash_EnterQspiMode(struct rt_qspi_device *qspi_device)
{
rt_err_t result = RT_EOK;
uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device);
uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device);
u8Status2 |= W25X_REG_QUADENABLE;
SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
result = SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
RT_ASSERT(result == RT_EOK);
SpiFlash_WaitReady(qspi_device);
}
static void SpiFlash_ExitQspiMode(struct rt_qspi_device *qspi_device)
{
rt_err_t result = RT_EOK;
uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device);
uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device);
u8Status2 &= ~W25X_REG_QUADENABLE;
SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
result = SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
RT_ASSERT(result == RT_EOK);
SpiFlash_WaitReady(qspi_device);
}
bsp/nuvoton/numaker-pfm-m487/board/board_dev.c
+53 -12
View File
@@ -30,8 +30,11 @@
static rt_uint8_t SpiFlash_ReadStatusReg(struct rt_qspi_device *qspi_device)
{
rt_uint8_t u8Val;
rt_err_t result = RT_EOK;
rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS;
rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
result = rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
RT_ASSERT(result > 0);
return u8Val;
}
@@ -39,24 +42,53 @@ static rt_uint8_t SpiFlash_ReadStatusReg(struct rt_qspi_device *qspi_device)
static rt_uint8_t SpiFlash_ReadStatusReg2(struct rt_qspi_device *qspi_device)
{
rt_uint8_t u8Val;
rt_err_t result = RT_EOK;
rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS2;
rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
result = rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
RT_ASSERT(result > 0);
return u8Val;
}
static void SpiFlash_WriteStatusReg(struct rt_qspi_device *qspi_device, uint8_t u8Value1, uint8_t u8Value2)
static rt_err_t SpiFlash_WriteStatusReg(struct rt_qspi_device *qspi_device, uint8_t u8Value1, uint8_t u8Value2)
{
rt_uint8_t w25x_txCMD1;
rt_uint8_t u8Val[3];
rt_uint8_t au8Val[2];
rt_err_t result;
struct rt_qspi_message qspi_message = {0};
/* Enable WE */
w25x_txCMD1 = W25X_REG_WRITEENABLE;
rt_qspi_send(qspi_device, &w25x_txCMD1, 1);
result = rt_qspi_send(qspi_device, &w25x_txCMD1, sizeof(w25x_txCMD1));
if (result != sizeof(w25x_txCMD1))
goto exit_SpiFlash_WriteStatusReg;
u8Val[0] = W25X_REG_WRITESTATUS;
u8Val[1] = u8Value1;
u8Val[2] = u8Value2;
rt_qspi_send(qspi_device, &u8Val, 3);
/* Prepare status-1, 2 data */
au8Val[0] = u8Value1;
au8Val[1] = u8Value2;
/* 1-bit mode: Instruction+payload */
qspi_message.instruction.content = W25X_REG_WRITESTATUS;
qspi_message.instruction.qspi_lines = 1;
qspi_message.qspi_data_lines = 1;
qspi_message.parent.cs_take = 1;
qspi_message.parent.cs_release = 1;
qspi_message.parent.send_buf = &au8Val[0];
qspi_message.parent.length = sizeof(au8Val);
qspi_message.parent.next = RT_NULL;
if (rt_qspi_transfer_message(qspi_device, &qspi_message) != sizeof(au8Val))
{
result = -RT_ERROR;
}
result = RT_EOK;
exit_SpiFlash_WriteStatusReg:
return result;
}
static void SpiFlash_WaitReady(struct rt_qspi_device *qspi_device)
@@ -73,21 +105,30 @@ static void SpiFlash_WaitReady(struct rt_qspi_device *qspi_device)
static void SpiFlash_EnterQspiMode(struct rt_qspi_device *qspi_device)
{
rt_err_t result = RT_EOK;
uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device);
uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device);
u8Status2 |= W25X_REG_QUADENABLE;
SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
result = SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
RT_ASSERT(result == RT_EOK);
SpiFlash_WaitReady(qspi_device);
}
static void SpiFlash_ExitQspiMode(struct rt_qspi_device *qspi_device)
{
rt_err_t result = RT_EOK;
uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device);
uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device);
u8Status2 &= ~W25X_REG_QUADENABLE;
SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
result = SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
RT_ASSERT(result == RT_EOK);
SpiFlash_WaitReady(qspi_device);
}
@@ -265,7 +306,7 @@ static void PlayRingTone(void)
rt_pwm_set(bpwm_dev, BPWM_DEV_CHANNEL, period, period);
rt_thread_mdelay(50);
rt_pwm_set(bpwm_dev, BPWM_DEV_CHANNEL, period, period/2);
rt_pwm_set(bpwm_dev, BPWM_DEV_CHANNEL, period, period / 2);
rt_thread_mdelay(50);
}