resolve Conflicts

bsp/nrf52832/board/Sconscript bsp/nrf52832/startups/Sconscript bsp/raspberry-pi/raspi4-32/driver/SConscript
2026-02-07 01:44:41 +08:00 · 2020-12-28 12:02:31 +08:00
parent ef62febf1f e3e8633786
commit eeaf1fcc50
2004 changed files with 98787 additions and 437501 deletions
--- a/.github/workflows/action.yml
+++ b/.github/workflows/action.yml
@@ -0,0 +1,173 @@
+name: RT-Thread
+
+# Controls when the action will run. Triggers the workflow on push or pull request
+# events but only for the master branch
+on:
+  # Runs at 16:00 UTC (BeiJing 00:00) on the 1st of every month
+  schedule:
+    - cron:  '0 16 1 * *'
+  push:
+    branches:
+      - master
+    paths-ignore:
+      - documentation/**
+      - '**/README.md'
+      - '**/README_zh.md'
+  pull_request:
+    branches:
+      - master
+    paths-ignore:
+      - documentation/**
+      - '**/README.md'
+      - '**/README_zh.md'
+
+jobs:
+  build:
+    runs-on: ubuntu-latest
+    name: ${{ matrix.legs.RTT_BSP }}
+    strategy:
+      fail-fast: false
+      matrix:
+       legs:
+         - {RTT_BSP: "CME_M7", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "apollo2", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "asm9260t", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "at91sam9260", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "allwinner_tina", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "efm32", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "gd32e230k-start", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "gd32303e-eval", RTT_TOOL_CHAIN: "sourcery-arm"}         
+         - {RTT_BSP: "gd32450z-eval", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "gkipc", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "imx6sx/cortex-a9", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "imxrt/imxrt1052-atk-commander", RTT_TOOL_CHAIN: "sourcery-arm"}  
+         - {RTT_BSP: "imxrt/imxrt1052-fire-pro", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "imxrt/imxrt1052-nxp-evk", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "lm3s8962", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "lm3s9b9x", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "lm4f232", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "tm4c123bsp", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "tm4c129x", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "lpc43xx/M4", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "lpc176x", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "lpc178x", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "lpc408x", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "lpc1114", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "lpc2148", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "lpc2478", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "lpc5410x", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "lpc54114-lite", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "ls1bdev", RTT_TOOL_CHAIN: "sourcery-mips"}
+         - {RTT_BSP: "ls1cdev", RTT_TOOL_CHAIN: "sourcery-mips"}
+         - {RTT_BSP: "mb9bf500r", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "mb9bf506r", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "mb9bf618s", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "mb9bf568r", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "mini2440", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "qemu-vexpress-a9", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "qemu-vexpress-gemini", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "sam7x", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "stm32/stm32f072-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "stm32/stm32f091-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f103-atk-nano", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f103-atk-warshipv3", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f103-dofly-lyc8", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f103-dofly-M3S", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f103-fire-arbitrary", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f103-hw100k-ibox", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f103-mini-system", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f103-onenet-nbiot", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f103-yf-ufun", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f107-uc-eval", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f401-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f405-smdz-breadfruit", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f407-atk-explorer", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f407-st-discovery", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "stm32/stm32f410-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f411-atk-nano", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f411-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f411-weact-MiniF4", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f413-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f427-robomaster-a", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f429-armfly-v6", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f429-atk-apollo", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f429-fire-challenger", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f429-st-disco", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "stm32/stm32f446-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "stm32/stm32f469-st-disco", RTT_TOOL_CHAIN: "sourcery-arm"}  
+         - {RTT_BSP: "stm32/stm32f746-st-disco", RTT_TOOL_CHAIN: "sourcery-arm"}  
+         - {RTT_BSP: "stm32/stm32f767-atk-apollo", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "stm32/stm32f767-fire-challenger", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "stm32/stm32f767-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "stm32/stm32g070-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "stm32/stm32g071-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "stm32/stm32g431-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}  
+         - {RTT_BSP: "stm32/stm32h743-atk-apollo", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32h743-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32h747-st-discovery", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32l4r9-st-eval", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32l010-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32l053-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32l412-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "stm32/stm32l432-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "stm32/stm32l433-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "stm32/stm32l475-atk-pandora", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "stm32/stm32l475-st-discovery", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "stm32/stm32l476-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "stm32/stm32l496-ali-developer", RTT_TOOL_CHAIN: "sourcery-arm"}  
+         - {RTT_BSP: "stm32/stm32l496-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "stm32/stm32mp157a-st-discovery", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "stm32/stm32mp157a-st-ev1", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "stm32/stm32wb55-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "stm32f20x", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "swm320-lq100", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "beaglebone", RTT_TOOL_CHAIN: "sourcery-arm"}  
+         - {RTT_BSP: "zynq7000", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "zynqmp-r5-axu4ev", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "frdm-k64f", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "fh8620", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "xplorer4330/M4", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "at32/at32f403a-start", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "at32/at32f407-start", RTT_TOOL_CHAIN: "sourcery-arm"} 
+         - {RTT_BSP: "smartfusion2", RTT_TOOL_CHAIN: "sourcery-arm"} 
+    steps:
+      - uses: actions/checkout@v2
+      - name: Set up Python
+        uses: actions/setup-python@master
+        with:
+          python-version: 3.8
+
+      - name: Install Tools
+        shell: bash
+        run: |
+          sudo apt-get update
+          sudo apt-get -qq install gcc-multilib libsdl-dev scons
+          echo "RTT_ROOT=${{ github.workspace }}" >> $GITHUB_ENV
+          echo "RTT_CC=gcc" >> $GITHUB_ENV
+    
+      - name: Install Arm ToolChains
+        if: ${{ matrix.legs.RTT_TOOL_CHAIN == 'sourcery-arm' && success() }}
+        shell: bash
+        run: |
+          wget -q https://github.com/RT-Thread/toolchains-ci/releases/download/arm-2017q2-v6/gcc-arm-none-eabi-6-2017-q2-update-linux.tar.bz2 
+          sudo tar xjf gcc-arm-none-eabi-6-2017-q2-update-linux.tar.bz2 -C /opt  
+          /opt/gcc-arm-none-eabi-6-2017-q2-update/bin/arm-none-eabi-gcc --version
+          echo "RTT_EXEC_PATH=/opt/gcc-arm-none-eabi-6-2017-q2-update/bin" >> $GITHUB_ENV
+
+      - name: Install Mips ToolChains
+        if: ${{ matrix.legs.RTT_TOOL_CHAIN == 'sourcery-mips' && success() }}
+        shell: bash
+        run: |
+          wget -q https://github.com/RT-Thread/toolchains-ci/releases/download/v1.1/mips-2016.05-7-mips-sde-elf-i686-pc-linux-gnu.tar.bz2 
+          sudo tar xjf mips-2016.05-7-mips-sde-elf-i686-pc-linux-gnu.tar.bz2 -C /opt  
+          /opt/mips-2016.05/bin/mips-sde-elf-gcc --version
+          echo "RTT_EXEC_PATH=/opt/mips-2016.05/bin" >> $GITHUB_ENV
+
+      - name: Bsp Scons Compile
+        if: ${{ success() }}
+        shell: bash
+        env:
+          RTT_BSP: ${{ matrix.legs.RTT_BSP }}
+          RTT_TOOL_CHAIN: ${{ matrix.legs.RTT_TOOL_CHAIN }}
+        run: |
+          scons -C bsp/$RTT_BSP
--- a/.travis.yml
+++ b/.travis.yml
@@ -1,145 +0,0 @@
-language: c
-
-notifications:
-  email: false
-
-before_script:
-# travis has changed to 64-bit and we require 32-bit compatibility libraries
-  - sudo apt-get update
-  # clang
-  - "sudo apt-get -qq install gcc-multilib libc6:i386 libgcc1:i386 libstdc++5:i386 libstdc++6:i386 libsdl-dev scons || true"
-  # - sudo apt-get -qq install gcc-arm-none-eabi
-  # - "[ $RTT_TOOL_CHAIN = 'sourcery-arm' ] && export RTT_EXEC_PATH=/usr/bin && arm-none-eabi-gcc --version || true"
-  # - "[ $RTT_TOOL_CHAIN = 'sourcery-arm' ] && curl -s https://sourcery.mentor.com/public/gnu_toolchain/arm-none-eabi/arm-2014.05-28-arm-none-eabi-i686-pc-linux-gnu.tar.bz2 | sudo tar xjf - -C /opt && export RTT_EXEC_PATH=/opt/arm-2014.05/bin && /opt/arm-2014.05/bin/arm-none-eabi-gcc --version || true"
-  - "[ $RTT_TOOL_CHAIN = 'sourcery-arm' ] && wget -q https://github.com/RT-Thread/toolchains-ci/releases/download/arm-2017q2-v6/gcc-arm-none-eabi-6-2017-q2-update-linux.tar.bz2 && sudo tar xjf gcc-arm-none-eabi-6-2017-q2-update-linux.tar.bz2 -C /opt && export RTT_EXEC_PATH=/opt/gcc-arm-none-eabi-6-2017-q2-update/bin && /opt/gcc-arm-none-eabi-6-2017-q2-update/bin/arm-none-eabi-gcc --version || true"
-  - "[ $RTT_TOOL_CHAIN = 'sourcery-mips' ] && wget -q https://github.com/RT-Thread/toolchains-ci/releases/download/v1.1/mips-2016.05-7-mips-sde-elf-i686-pc-linux-gnu.tar.bz2 && sudo tar xjf mips-2016.05-7-mips-sde-elf-i686-pc-linux-gnu.tar.bz2 -C /opt && export RTT_EXEC_PATH=/opt/mips-2016.05/bin && /opt/mips-2016.05/bin/mips-sde-elf-gcc --version || true"
-  # - "[ $RTT_TOOL_CHAIN = 'sourcery-ppc' ] && curl -s https://sourcery.mentor.com/public/gnu_toolchain/powerpc-eabi/freescale-2011.03-39-powerpc-eabi-i686-pc-linux-gnu.tar.bz2 | sudo tar xjf - -C /opt && export RTT_EXEC_PATH=/opt/freescale-2011.03/bin && /opt/freescale-2011.03/bin/powerpc-eabi-gcc --version || true"
-  # - "[ $RTT_TOOL_CHAIN = 'atmel-avr32' ] && curl -s http://www.atmel.com/images/avr32-gnu-toolchain-3.4.1.348-linux.any.x86.tar.gz | sudo tar xzf - -C /opt && export RTT_EXEC_PATH=/opt/avr32-gnu-toolchain-linux_x86/bin && /opt/avr32-gnu-toolchain-linux_x86/bin/avr32-gcc --version && curl -sO http://www.atmel.com/images/avr-headers-3.2.3.970.zip && unzip -qq avr-headers-3.2.3.970.zip -d bsp/$RTT_BSP || true"
-  - export RTT_ROOT=`pwd`
-  - "[ x$RTT_CC == x ] && export RTT_CC='gcc' || true"
-
-env:
-#  - RTT_BSP='simulator' RTT_CC='clang-analyze' RTT_EXEC_PATH=/usr/share/clang/scan-build
-  - RTT_BSP='CME_M7' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='apollo2' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='asm9260t' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='at91sam9260' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='allwinner_tina' RTT_TOOL_CHAIN='sourcery-arm'
-#  - RTT_BSP='avr32uc3b0' RTT_TOOL_CHAIN='atmel-avr32'
-#  - RTT_BSP='bf533' # no scons
-  - RTT_BSP='efm32' RTT_TOOL_CHAIN='sourcery-arm'
-#  - RTT_BSP='es32f0334' RTT_TOOL_CHAIN='sourcery-arm' # not support gcc
-#  - RTT_BSP='es32f0654' RTT_TOOL_CHAIN='sourcery-arm' # not support gcc
-  - RTT_BSP='gd32e230k-start' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='gd32303e-eval' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='gd32450z-eval' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='gkipc' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='imx6sx/cortex-a9' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='imxrt/imxrt1052-atk-commander' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='imxrt/imxrt1052-fire-pro' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='imxrt/imxrt1052-nxp-evk' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='lm3s8962' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='lm3s9b9x' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='lm4f232' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='tm4c123bsp' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='tm4c129x' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='lpc43xx/M4' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='lpc176x' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='lpc178x' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='lpc408x' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='lpc1114' RTT_TOOL_CHAIN='sourcery-arm'
-#  - RTT_BSP='lpc824' RTT_TOOL_CHAIN='sourcery-arm' # not support gcc
-  - RTT_BSP='lpc2148' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='lpc2478' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='lpc5410x' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='lpc54114-lite' RTT_TOOL_CHAIN='sourcery-arm'
-#  - RTT_BSP='lpc54608-LPCXpresso' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='ls1bdev' RTT_TOOL_CHAIN='sourcery-mips'
-  - RTT_BSP='ls1cdev' RTT_TOOL_CHAIN='sourcery-mips'
-#  - RTT_BSP='m16c62p' # m32c
-  - RTT_BSP='mb9bf500r' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='mb9bf506r' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='mb9bf618s' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='mb9bf568r' RTT_TOOL_CHAIN='sourcery-arm'
-#  - RTT_BSP='microblaze' # no scons
-  - RTT_BSP='mini2440' RTT_TOOL_CHAIN='sourcery-arm'
-#  - RTT_BSP='mini4020' # no scons
-#  - RTT_BSP='mm32l07x' # not support gcc
-#  - RTT_BSP='nios_ii' # no scons
-#  - RTT_BSP='nuvoton_nuc472' RTT_TOOL_CHAIN='sourcery-arm'
-#  - RTT_BSP='nuvoton_m05x' RTT_TOOL_CHAIN='sourcery-arm'
-#  - RTT_BSP='pic32ethernet' # no scons
-  - RTT_BSP='qemu-vexpress-a9' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='qemu-vexpress-gemini' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='sam7x' RTT_TOOL_CHAIN='sourcery-arm'
-#  - RTT_BSP='simulator' # x86
-  - RTT_BSP='stm32/stm32f072-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f091-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f103-atk-nano' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f103-atk-warshipv3' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f103-dofly-lyc8' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f103-dofly-M3S' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f103-fire-arbitrary' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f103-hw100k-ibox' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f103-mini-system' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f103-onenet-nbiot' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f103-yf-ufun' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f107-uc-eval' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f401-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f405-smdz-breadfruit' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f407-atk-explorer' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f407-st-discovery' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f410-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f411-atk-nano' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f411-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f411-weact-MiniF4' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f413-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f427-robomaster-a' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f429-armfly-v6' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f429-atk-apollo' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f429-fire-challenger' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f429-st-disco' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f446-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f469-st-disco' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f746-st-disco' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f767-atk-apollo' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f767-fire-challenger' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32f767-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32g070-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32g071-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32g431-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32h743-atk-apollo' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32h743-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32h747-st-discovery' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32l4r9-st-eval' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32l010-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32l053-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32l412-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32l432-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32l433-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32l475-atk-pandora' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32l475-st-discovery' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32l476-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32l496-ali-developer' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32l496-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32mp157a-st-discovery' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32mp157a-st-ev1' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32f20x' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='swm320-lq100' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='stm32/stm32wb55-st-nucleo' RTT_TOOL_CHAIN='sourcery-arm'
-#  - RTT_BSP='taihu' RTT_TOOL_CHAIN='sourcery-ppc'
-#  - RTT_BSP='upd70f3454' # iar
-#  - RTT_BSP='x86' # x86
-  - RTT_BSP='beaglebone' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='zynq7000' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='frdm-k64f' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='fh8620' RTT_TOOL_CHAIN='sourcery-arm'
-#  - RTT_BSP='x1000' RTT_TOOL_CHAIN='sourcery-mips'
-  - RTT_BSP='xplorer4330/M4' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='at32/at32f403a-start' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='at32/at32f407-start' RTT_TOOL_CHAIN='sourcery-arm'
-  - RTT_BSP='smartfusion2' RTT_TOOL_CHAIN='sourcery-arm'
-
-stage: compile
-script:
-  - scons -C bsp/$RTT_BSP
--- a/bsp/CME_M7/applications/startup.c
+++ b/bsp/CME_M7/applications/startup.c
@@ -47,12 +47,6 @@ void rtthread_startup(void)
    /* show version */
    rt_show_version();

-    /* init tick */
-    rt_system_tick_init();
-
-    /* init kernel object */
-    rt_system_object_init();
-
    /* init timer system */
    rt_system_timer_init();

--- a/bsp/allwinner_tina/drivers/drv_uart.c
+++ b/bsp/allwinner_tina/drivers/drv_uart.c
@@ -120,8 +120,8 @@ int rt_hw_uart_init(void)
        uart->irqno        = UART1_INTERRUPT; // IRQ_UART1;
        uart->gpio_rx_port = GPIO_PORT_A;
        uart->gpio_tx_port = GPIO_PORT_A;
-        uart->gpio_rx_pin  = GPIO_PIN_3;
-        uart->gpio_tx_pin  = GPIO_PIN_2;
+        uart->gpio_rx_pin  = GPIO_PIN_2;
+        uart->gpio_tx_pin  = GPIO_PIN_3;
        uart->gpio_rx_fun  = IO_FUN_4;
        uart->gpio_tx_fun  = IO_FUN_4;

--- a/bsp/allwinner_tina/drivers/spi/drv_spi.c
+++ b/bsp/allwinner_tina/drivers/spi/drv_spi.c
@@ -483,7 +483,7 @@ static rt_err_t configure(struct rt_spi_device *device,
        SPI_SetFirstTransmitBit(spi, SPI_TCTRL_FBS_LSB);
    }

-    switch (configuration->mode)
+    switch (configuration->mode & RT_SPI_MODE_3)
    {
    case RT_SPI_MODE_0:
        SPI_SetSclkMode(spi, SPI_SCLK_Mode0);
--- a/bsp/avr32uc3b0/startup.c
+++ b/bsp/avr32uc3b0/startup.c
@@ -30,8 +30,6 @@ int main(void)
 #endif

 	rt_hw_board_init();
-	rt_system_tick_init();
-	rt_system_object_init();
 	rt_system_timer_init();

 #ifdef RT_USING_HEAP
--- a/bsp/bf533/startup.c
+++ b/bsp/bf533/startup.c
@@ -35,12 +35,6 @@ void rtthread_startup(void)
    /* show version */
    rt_show_version();

-    /* init tick */
-    rt_system_tick_init();
-
-    /* init kernel object */
-    rt_system_object_init();
-
    /* init timer system */
    rt_system_timer_init();

--- a/bsp/bluetrum/README.md
+++ b/bsp/bluetrum/README.md
@@ -0,0 +1 @@
+# Bluetrum RISC-V Processor Support Package
--- a/bsp/bluetrum/ab32vg1-ab-prougen/.config
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/.config
--- a/bsp/bluetrum/ab32vg1-ab-prougen/.cproject
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/.cproject
@@ -0,0 +1,155 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
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+        <externalSettings />
+        <extensions>
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+          <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser" />
+          <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser" />
+          <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser" />
+          <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser" />
+          <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser" />
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+                  <listOptionValue builtIn="false" value="&quot;${workspace_loc://${ProjName}//rt-thread/components/finsh}&quot;" />
+                  <listOptionValue builtIn="false" value="&quot;${workspace_loc://${ProjName}//rt-thread/components/libc/compilers/common}&quot;" />
+                  <listOptionValue builtIn="false" value="&quot;${workspace_loc://${ProjName}//rt-thread/components/libc/compilers/newlib}&quot;" />
+                  <listOptionValue builtIn="false" value="&quot;${workspace_loc://${ProjName}//rt-thread/include}&quot;" />
+                </option>
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+                </option>
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+                </option>
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+                </option>
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+              <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.1082822632" name="GNU RISC-V Cross C Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker">
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+                <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other.1506934091" name="Other linker flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other" useByScannerDiscovery="false" value="-mcmodel=medany -march=rv32imc -mabi=ilp32 -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start" valueType="string" />
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+                  <listOptionValue builtIn="false" value="c     " />
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+                <option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.scriptfile.808366667" name="Script files (-T)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.scriptfile" useByScannerDiscovery="false" valueType="stringList">
+                  <listOptionValue builtIn="false" value="&quot;${workspace_loc://${ProjName}//link.lds}&quot;" />
+                </option>
+                <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.nostart.1148948111" name="Do not use standard start files (-nostartfiles)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.nostart" useByScannerDiscovery="false" value="true" valueType="boolean" />
+                <inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input.216686783" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input">
+                  <additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)" />
+                  <additionalInput kind="additionalinput" paths="$(LIBS)" />
+                </inputType>
+              </tool>
+              <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker.394785702" name="GNU RISC-V Cross C++ Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker">
+                <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections.2024033290" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections" value="true" valueType="boolean" />
+              </tool>
+              <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver.1401777352" name="GNU RISC-V Cross Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver" />
+              <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash.1268552146" name="GNU RISC-V Cross Create Flash Image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash">
+                <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.choice.1142036741" name="Output file format (-O)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.choice" useByScannerDiscovery="false" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.choice.binary" valueType="enumerated" />
+              </tool>
+              <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting.1402684207" name="GNU RISC-V Cross Create Listing" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting">
+                <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source.2107259167" name="Display source (--source|-S)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source" useByScannerDiscovery="false" value="true" valueType="boolean" />
+                <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders.1517068442" name="Display all headers (--all-headers|-x)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders" useByScannerDiscovery="false" value="true" valueType="boolean" />
+                <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle.1334666714" name="Demangle names (--demangle|-C)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle" useByScannerDiscovery="false" value="true" valueType="boolean" />
+                <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers.1102744915" name="Display line numbers (--line-numbers|-l)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers" useByScannerDiscovery="false" value="true" valueType="boolean" />
+                <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide.382638533" name="Wide lines (--wide|-w)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide" useByScannerDiscovery="false" value="true" valueType="boolean" />
+              </tool>
+              <tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize.252011996" name="GNU RISC-V Cross Print Size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize">
+                <option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format.196205319" name="Size format" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format" useByScannerDiscovery="false" />
+              </tool>
+            </toolChain>
+          </folderInfo>
+          <sourceEntries>
+            <entry excluding="//rt-thread/components/cplusplus|//rt-thread/components/dfs|//rt-thread/components/drivers/audio|//rt-thread/components/drivers/can|//rt-thread/components/drivers/cputime|//rt-thread/components/drivers/hwcrypto|//rt-thread/components/drivers/hwtimer|//rt-thread/components/drivers/i2c|//rt-thread/components/drivers/misc/adc.c|//rt-thread/components/drivers/misc/dac.c|//rt-thread/components/drivers/misc/pulse_encoder.c|//rt-thread/components/drivers/misc/rt_drv_pwm.c|//rt-thread/components/drivers/misc/rt_inputcapture.c|//rt-thread/components/drivers/mtd|//rt-thread/components/drivers/pm|//rt-thread/components/drivers/rtc|//rt-thread/components/drivers/sdio|//rt-thread/components/drivers/sensors|//rt-thread/components/drivers/spi|//rt-thread/components/drivers/touch|//rt-thread/components/drivers/usb|//rt-thread/components/drivers/watchdog|//rt-thread/components/drivers/wlan|//rt-thread/components/finsh/msh_file.c|//rt-thread/components/finsh/symbol.c|//rt-thread/components/libc/aio|//rt-thread/components/libc/compilers/armlibc|//rt-thread/components/libc/compilers/common/unistd.c|//rt-thread/components/libc/compilers/dlib|//rt-thread/components/libc/compilers/minilibc|//rt-thread/components/libc/getline|//rt-thread/components/libc/libdl|//rt-thread/components/libc/mmap|//rt-thread/components/libc/pthreads|//rt-thread/components/libc/signal|//rt-thread/components/libc/termios|//rt-thread/components/libc/time|//rt-thread/components/lwp|//rt-thread/components/net|//rt-thread/components/utilities|//rt-thread/components/vbus|//rt-thread/components/vmm|//rt-thread/libcpu|//rt-thread/src/cpu.c|//rt-thread/src/slab.c|//rt-thread/tools" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="" />
+          </sourceEntries>
+        </configuration>
+      </storageModule>
+      <storageModule moduleId="org.eclipse.cdt.core.externalSettings" />
+      <storageModule moduleId="ilg.gnumcueclipse.managedbuild.packs" />
+    </cconfiguration>
+  </storageModule>
+  <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+    <project id="RISC-V-Project.ilg.gnumcueclipse.managedbuild.cross.riscv.target.elf.621045364" name="Executable" projectType="ilg.gnumcueclipse.managedbuild.cross.riscv.target.elf" />
+  </storageModule>
+  <storageModule moduleId="scannerConfiguration">
+    <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="" />
+    <scannerConfigBuildInfo instanceId="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.576542909;ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.576542909.;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.2003680225;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.2078217664">
+      <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="" />
+    </scannerConfigBuildInfo>
+    <scannerConfigBuildInfo instanceId="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1649151570;ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1649151570.;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.1094470304;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.506460738">
+      <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="" />
+    </scannerConfigBuildInfo>
+  </storageModule>
+  <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders" />
+  <storageModule moduleId="org.eclipse.cdt.make.core.buildtargets" />
+  <storageModule moduleId="refreshScope" versionNumber="2">
+    <configuration configurationName="Debug">
+      <resource resourceType="PROJECT" workspacePath="/ab32vg1" />
+    </configuration>
+    <configuration configurationName="Release">
+      <resource resourceType="PROJECT" workspacePath="/ab32vg1" />
+    </configuration>
+  </storageModule>
+</cproject>
--- a/bsp/bluetrum/ab32vg1-ab-prougen/.gitignore
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/.gitignore
@@ -0,0 +1,13 @@
+*.dblite
+*.bin
+*.dcf
+*.map
+*.lst
+*.pyc
+*.elf
+*.old
+*.o
+
+build
+dist
+packages
--- a/bsp/bluetrum/ab32vg1-ab-prougen/.project
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/.project
@@ -0,0 +1,27 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+  <name>ab32vg1</name>
+  <comment />
+  <projects>
+	</projects>
+  <buildSpec>
+    <buildCommand>
+      <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+      <triggers>clean,full,incremental,</triggers>
+      <arguments>
+			</arguments>
+    </buildCommand>
+    <buildCommand>
+      <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+      <triggers>full,incremental,</triggers>
+      <arguments>
+			</arguments>
+    </buildCommand>
+  </buildSpec>
+  <natures>
+    <nature>org.eclipse.cdt.core.cnature</nature>
+    <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+    <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+  </natures>
+  <linkedResources />
+</projectDescription>
--- a/bsp/bluetrum/ab32vg1-ab-prougen/.settings/.rtmenus
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/.settings/.rtmenus
--- a/bsp/bluetrum/ab32vg1-ab-prougen/.settings/ilg.gnumcueclipse.managedbuild.cross.riscv.prefs
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/.settings/ilg.gnumcueclipse.managedbuild.cross.riscv.prefs
@@ -0,0 +1,2 @@
+eclipse.preferences.version=1
+toolchain.path.512258282=${toolchain_install_path}/${riscv_gcc_relative_path}
--- a/bsp/bluetrum/ab32vg1-ab-prougen/.settings/language.settings.xml
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/.settings/language.settings.xml
@@ -0,0 +1,14 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<project>
+	<configuration id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.576542909" name="Debug">
+		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
+			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
+			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
+			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
+			<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-309903127852947962" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+				<language-scope id="org.eclipse.cdt.core.gcc"/>
+				<language-scope id="org.eclipse.cdt.core.g++"/>
+			</provider>
+		</extension>
+	</configuration>
+</project>
--- a/bsp/bluetrum/ab32vg1-ab-prougen/.settings/org.eclipse.core.resources.prefs
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/.settings/org.eclipse.core.resources.prefs
@@ -0,0 +1,2 @@
+eclipse.preferences.version=1
+encoding/<project>=UTF-8
--- a/bsp/bluetrum/ab32vg1-ab-prougen/.settings/projcfg.ini
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/.settings/projcfg.ini
@@ -0,0 +1,19 @@
+#RT-Thread Studio Project Configuration
+#Wed Dec 16 14:30:21 CST 2020
+cfg_version=v3.0
+board_name=AB32VG1-AB-PROUGEN
+example_name=
+hardware_adapter=DAP-LINK
+project_type=rt-thread
+board_base_nano_proj=False
+chip_name=AB32VG1
+selected_rtt_version=latest
+bsp_version=1.0.0
+os_branch=full
+output_project_path=D\:/Softwares/RT-ThreadStudio/workspace
+is_base_example_project=False
+is_use_scons_build=True
+project_base_bsp=true
+project_name=ab32vg1
+os_version=latest
+bsp_path=repo/Local/Board_Support_Packages/Bluetrum/AB32VG1-AB-PROUGEN/1.0.0
--- a/bsp/bluetrum/ab32vg1-ab-prougen/Kconfig
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/Kconfig
@@ -0,0 +1,27 @@
+mainmenu "RT-Thread Project Configuration"
+
+config BSP_DIR
+    string
+    option env="BSP_ROOT"
+    default "."
+
+config RTT_DIR
+    string
+    option env="RTT_ROOT"
+    default "../../.."
+
+config PKGS_DIR
+    string
+    option env="PKGS_ROOT"
+    default "packages"
+
+source "$RTT_DIR/Kconfig"
+source "$PKGS_DIR/Kconfig"
+source "board/Kconfig"
+
+config BOARD_BLUETRUM_EVB
+    bool
+    select RT_USING_COMPONENTS_INIT
+    select RT_USING_USER_MAIN
+    default y
+
--- a/bsp/bluetrum/ab32vg1-ab-prougen/README.md
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/README.md
@@ -0,0 +1,119 @@
+# AB32VG1 骄龙开发板 BSP 说明
+
+## 简介
+
+主要内容如下：
+
+- 开发板资源介绍
+- BSP 快速上手
+- 进阶使用方法
+
+通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
+
+## 开发板介绍
+
+ab32vg1-prougen 是 中科蓝讯(Bluetrum) 推出的一款基于 RISC-V 内核的开发板，最高主频为 120Mhz，该开发板芯片为 AB5301A。
+
+开发板外观如下图所示：
+
+![board](figures/board.png)
+
+该开发板常用 **板载资源** 如下：
+
+- MCU：AB5301A，主频 120MHz，可超频至 192MHz，4Mbit FLASH ，192KB RAM。
+- 常用外设
+  - LED: RGB灯
+  - 按键: 3 个, USER(s2,s3) and RESET(s1)
+- 常用接口：USB 转串口、SD 卡接口
+
+## 外设支持
+
+本 BSP 目前对外设的支持情况如下：
+
+| **板载外设** | **支持情况** | **备注**    |
+| :----------- | :----------: | :---------- |
+| USB 转串口   |     支持     |             |
+| SD卡         |   即将支持   |             |
+| IRDA         |   即将支持   |             |
+| 音频接口     |   即将支持   |             |
+| **片上外设** | **支持情况** | **备注**    |
+| GPIO         |     支持     | PA PB PE PF |
+| UART         |     支持     | UART0/1/2   |
+| SDIO         |   即将支持   |             |
+| ADC          |   即将支持   |             |
+| SPI          |   即将支持   |             |
+| I2C          |   即将支持   | 软件 I2C    |
+| RTC          |   即将支持   |             |
+| WDT          |   即将支持   |             |
+| FLASH        |   即将支持   |             |
+| PWM          |   即将支持   |             |
+| USB Device   |   暂不支持   |             |
+| USB Host     |   暂不支持   |             |
+
+## 使用说明
+
+使用说明分为如下两个章节：
+
+- 快速上手
+
+    本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
+
+- 进阶使用
+
+    本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
+
+
+### 快速上手
+
+本 BSP 为开发者提供 GCC 开发环境。下面介绍如何将系统运行起来。
+
+#### 硬件连接
+
+使用数据线连接开发板到 PC，打开电源开关。
+
+#### 编译下载
+
+运行 `scons` 编译得到 `.dcf` 固件，通过 `downloader` 进行下载
+
+#### 运行结果
+
+下载程序成功之后，系统会自动运行，观察开发板上 LED 的运行效果，红色 LED 常亮、绿色 LED 会周期性闪烁。
+
+连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息:
+
+```bash
+ \ | /
+- RT -     Thread Operating System
+ / | \     4.0.3 build Dec  9 2020
+ 2006 - 2020 Copyright by rt-thread team
+msh >
+```
+### 进阶使用
+
+此 BSP 默认只开启了 GPIO 和 串口0 的功能，如果需使用 SD 卡、Flash 等更多高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下：
+
+1. 在 bsp 下打开 env 工具。
+
+2. 输入`menuconfig`命令配置工程，配置好之后保存退出。
+
+3. 输入`pkgs --update`命令更新软件包。
+
+4. 输入`scons` 命令重新编译工程。
+
+## 注意事项
+
+波特率默认为 1.5M，需要使用 [Downloader](https://github.com/BLUETRUM/Downloader) 下载 `.dcf` 到芯片，需要编译后自动下载，需要在 `Downloader` 中的下载的下拉窗中选择 `自动`；目前暂时屏蔽 uart1 打印
+
+使用 `romfs` 时，需要自己生成 `romfs.c` 进行替换，操作参考[使用 RomFS](https://www.rt-thread.org/document/site/tutorial/qemu-network/filesystems/filesystems/#romfs)
+
+编译报错的时候，如果出现重复定义的报错，可能需要在 `cconfig.h` 中手动添加以下配置
+
+```
+#define HAVE_SIGEVENT 1
+#define HAVE_SIGINFO 1
+#define HAVE_SIGVAL 1
+```
+
+## 维护人信息
+
+- [greedyhao](https://github.com/greedyhao)
--- a/bsp/bluetrum/ab32vg1-ab-prougen/SConscript
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/SConscript
@@ -1,8 +1,9 @@
 # for module compiling
 import os
+Import('RTT_ROOT')
 from building import *

-cwd  = GetCurrentDir()
+cwd = GetCurrentDir()
 objs = []
 list = os.listdir(cwd)

@@ -11,6 +12,4 @@ for d in list:
    if os.path.isfile(os.path.join(path, 'SConscript')):
        objs = objs + SConscript(os.path.join(d, 'SConscript'))

-objs = objs + SConscript(os.path.join(cwd, 'nRF5_SDK_13.0.0_04a0bfd/components/SConscript'))
-
 Return('objs')
--- a/bsp/bluetrum/ab32vg1-ab-prougen/SConstruct
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/SConstruct
@@ -0,0 +1,61 @@
+import os
+import sys
+import rtconfig
+
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+try:
+    from building import *
+except:
+    print('Cannot found RT-Thread root directory, please check RTT_ROOT')
+    print(RTT_ROOT)
+    exit(-1)
+
+TARGET = 'rtthread.' + rtconfig.TARGET_EXT
+
+DefaultEnvironment(tools=[])
+env = Environment(tools = ['mingw'],
+    AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+    CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+    CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
+    AR = rtconfig.AR, ARFLAGS = '-rc',
+    LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+env['ASCOM'] = env['ASPPCOM']
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+SDK_ROOT = os.path.abspath('./')
+
+if os.path.exists(SDK_ROOT + '/libraries'):
+    libraries_path_prefix = SDK_ROOT + '/libraries'
+else:
+    libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
+
+if os.path.exists(SDK_ROOT + '/libcpu'):
+    libcpu_path_prefix = SDK_ROOT + '/libcpu'
+else:
+    libcpu_path_prefix = os.path.dirname(SDK_ROOT) + '/libcpu'
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu = True)
+
+bsp_library_type = 'hal_libraries'
+rtconfig.BSP_LIBRARY_TYPE = bsp_library_type
+
+# include libraries
+objs.extend(SConscript(os.path.join(libraries_path_prefix, bsp_library_type, 'SConscript')))
+
+# include drivers
+objs.extend(SConscript(os.path.join(libraries_path_prefix, 'hal_drivers', 'SConscript')))
+
+# include drivers
+objs.extend(SConscript(os.path.join(libcpu_path_prefix, 'cpu', 'SConscript')))
+
+# make a building
+DoBuilding(TARGET, objs)
--- a/bsp/bluetrum/ab32vg1-ab-prougen/applications/SConscript
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/applications/SConscript
@@ -0,0 +1,9 @@
+from building import *
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
--- a/bsp/bluetrum/ab32vg1-ab-prougen/applications/main.c
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/applications/main.c
@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2020-2020, Bluetrum Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020/12/10     greedyhao    The first version
+ */
+
+#include <rtthread.h>
+#include "board.h"
+
+int main(void)
+{
+    uint32_t cnt = 0;
+    uint8_t pin = rt_pin_get("PE.1");
+
+    rt_pin_mode(pin, PIN_MODE_OUTPUT);
+    rt_kprintf("Hello, world\n");
+
+    while (1)
+    {
+        if (cnt % 2 == 0) {
+            rt_pin_write(pin, PIN_LOW);
+        } else {
+            rt_pin_write(pin, PIN_HIGH);
+        }
+        cnt++;
+        rt_thread_mdelay(1000);
+    }
+
+    return 0;
+}
--- a/bsp/bluetrum/ab32vg1-ab-prougen/applications/mnt.c
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/applications/mnt.c
@@ -0,0 +1,21 @@
+#include <rtthread.h>
+
+#ifdef RT_USING_DFS
+#include <dfs_fs.h>
+#include "dfs_romfs.h"
+
+int mnt_init(void)
+{
+    if (dfs_mount(RT_NULL, "/", "rom", 0, &(romfs_root)) == 0)
+    {
+        rt_kprintf("ROM file system initializated!\n");
+    }
+    else
+    {
+        rt_kprintf("ROM file system initializate failed!\n");
+    }
+
+    return 0;
+}
+INIT_ENV_EXPORT(mnt_init);
+#endif
--- a/bsp/bluetrum/ab32vg1-ab-prougen/applications/romfs.c
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/applications/romfs.c
@@ -0,0 +1,17 @@
+/* Generated by mkromfs. Edit with caution. */
+#include <rtthread.h>
+
+#ifdef RT_USING_DFS
+#include <dfs_romfs.h>
+
+
+
+static const struct romfs_dirent _romfs_root[] = {
+    {ROMFS_DIRENT_FILE, "ab32vg1", RT_NULL, 0}
+};
+
+const struct romfs_dirent romfs_root = {
+    ROMFS_DIRENT_DIR, "/", (rt_uint8_t *)_romfs_root, sizeof(_romfs_root)/sizeof(_romfs_root[0])
+};
+
+#endif
--- a/bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig
@@ -0,0 +1,36 @@
+menu "Hardware Drivers Config"
+
+menu "Onboard Peripheral Drivers"
+
+    config BSP_USING_USB_TO_USART
+        bool "Enable USB TO USART (uart0)"
+        select BSP_USING_UART
+        select BSP_USING_UART0
+        default y
+
+    menuconfig BSP_USING_AUDIO
+        bool "Enable Audio Device"
+        select RT_USING_AUDIO
+        default n
+
+        if BSP_USING_AUDIO
+            config BSP_USING_AUDIO_PLAY
+            bool "Enable Audio Play"
+            default y
+        endif
+
+endmenu
+
+menu "On-chip Peripheral Drivers"
+
+    menuconfig BSP_USING_UART0
+        bool "Enable UART0"
+        select RT_USING_SERIAL
+        default y
+
+endmenu
+
+menu "Board extended module Drivers"
+endmenu
+
+endmenu
--- a/bsp/bluetrum/ab32vg1-ab-prougen/board/SConscript
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/board/SConscript
@@ -0,0 +1,25 @@
+# RT-Thread building script for component
+
+from building import *
+
+cwd     = GetCurrentDir()
+src     = Split('''
+board.c
+ab32vg1_hal_msp.c
+''')
+CPPPATH = [cwd]
+
+if GetDepend(['RT_USING_AUDIO']):
+    src += Glob('ports/audio/drv_sound.c')
+
+group = DefineGroup('Board', src, depend = [''], CPPPATH = CPPPATH)
+
+objs = [group]
+
+list = os.listdir(cwd)
+
+for item in list:
+    if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
+        objs = objs + SConscript(os.path.join(item, 'SConscript'))
+
+Return('objs')
--- a/bsp/bluetrum/ab32vg1-ab-prougen/board/ab32vg1_hal_msp.c
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/board/ab32vg1_hal_msp.c
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2020-2020, BLUETRUM Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "ab32vg1_hal.h"
+
+void hal_uart_mspinit(struct uart_handle *huart)
+{
+    struct gpio_init gpio_init;
+
+    if (huart->instance == UART0_BASE) {
+        gpio_init.pin       = GPIO_PIN_7;
+        gpio_init.pull      = GPIO_PULLUP;
+        gpio_init.dir       = GPIO_DIR_INPUT;
+        gpio_init.de        = GPIO_DIGITAL;
+        gpio_init.alternate = GPIO_AF_MAP_Gx(UT0TXMAP_AF, GPIO_AF_G1) | UT0RXMAP_TX;
+        gpio_init.af_con    = GPIO_AFEN | GPIO_AFCON0 | UT0TXMAP_AF;
+        hal_gpio_init(GPIOA_BASE, &gpio_init);
+    } else if (huart->instance == UART1_BASE) {
+        gpio_init.pin       = GPIO_PIN_4;
+        gpio_init.dir       = GPIO_DIR_OUTPUT;
+        gpio_init.de        = GPIO_DIGITAL;
+        gpio_init.alternate = GPIO_AF_MAP_Gx(UT1TXMAP_AF, GPIO_AF_G2);
+        gpio_init.af_con    = GPIO_AFEN | GPIO_AFCON0 | UT1TXMAP_AF;
+        hal_gpio_init(GPIOA_BASE, &gpio_init);
+
+        gpio_init.pin       = GPIO_PIN_3;
+        gpio_init.pull      = GPIO_PULLUP;
+        gpio_init.dir       = GPIO_DIR_INPUT;
+        gpio_init.de        = GPIO_DIGITAL;
+        gpio_init.alternate = GPIO_AF_MAP_Gx(UT1RXMAP_AF, GPIO_AF_G2);
+        gpio_init.af_con    = GPIO_AFEN | GPIO_AFCON0 | UT1RXMAP_AF;
+        hal_gpio_init(GPIOA_BASE, &gpio_init);
+        /* Interrupt */
+    }
+}
+
+#ifdef HAL_DAC_MODULE_ENABLED
+void hal_dac_mspinit(struct dac_handle *hdac)
+{
+}
+#endif
+
+#ifdef HAL_SD_MODULE_ENABLED
+void hal_sd_mspinit(sd_handle_t hsd)
+{
+    struct gpio_init gpio_init;
+
+    gpio_init.pin       = GPIO_PIN_0 | GPIO_PIN_2;
+    gpio_init.pull      = GPIO_PULLUP;
+    gpio_init.dir       = GPIO_DIR_INPUT;
+    gpio_init.de        = GPIO_DIGITAL;
+    gpio_init.alternate = GPIO_AF_MAP_Gx(SD0MAP_AF, GPIO_AF_G2);
+    gpio_init.af_con    = GPIO_AFEN | GPIO_AFCON0 | SD0MAP_AF;
+    hal_gpio_init(GPIOB_BASE, &gpio_init);
+
+    gpio_init.pin       = GPIO_PIN_1;
+    gpio_init.dir       = GPIO_DIR_OUTPUT;
+    gpio_init.alternate = GPIO_AF_MAP_Gx(SD0MAP_AF, GPIO_AF_G2);
+    gpio_init.af_con    = GPIO_AFEN | GPIO_AFCON0 | SD0MAP_AF;
+    hal_gpio_init(GPIOB_BASE, &gpio_init);
+}
+#endif
--- a/bsp/bluetrum/ab32vg1-ab-prougen/board/board.c
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/board/board.c
@@ -0,0 +1,129 @@
+/*
+ * Copyright (c) 2006-2020, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author            Notes
+ * 2020-11-18     greedyhao         first version
+ */
+
+#include <rthw.h>
+#include "board.h"
+
+int rt_hw_usart_init(void);
+void my_printf(const char *format, ...);
+void timer0_cfg(uint32_t ticks);
+void rt_soft_isr(int vector, void *param);
+void cpu_irq_comm(void);
+void set_cpu_irq_comm(void (*irq_hook)(void));
+extern uint32_t __heap_start, __heap_end;
+
+void hal_printf(const char *fmt, ...)
+{
+    rt_device_t console = rt_console_get_device();
+
+    va_list args;
+    rt_size_t length;
+    static char rt_log_buf[RT_CONSOLEBUF_SIZE];
+
+    va_start(args, fmt);
+    /* the return value of vsnprintf is the number of bytes that would be
+     * written to buffer had if the size of the buffer been sufficiently
+     * large excluding the terminating null byte. If the output string
+     * would be larger than the rt_log_buf, we have to adjust the output
+     * length. */
+    length = rt_vsnprintf(rt_log_buf, sizeof(rt_log_buf) - 1, fmt, args);
+    if (length > RT_CONSOLEBUF_SIZE - 1)
+        length = RT_CONSOLEBUF_SIZE - 1;
+#ifdef RT_USING_DEVICE
+    if (console == RT_NULL)
+    {
+        rt_hw_console_output(rt_log_buf);
+    }
+    else
+    {
+        rt_uint16_t old_flag = console->open_flag;
+
+        console->open_flag |= RT_DEVICE_FLAG_STREAM;
+        rt_device_write(console, 0, rt_log_buf, length);
+        console->open_flag = old_flag;
+    }
+#else
+    rt_hw_console_output(rt_log_buf);
+#endif
+    va_end(args);
+}
+
+void timer0_isr(int vector, void *param)
+{
+    rt_interrupt_enter();
+    TMR0CPND = BIT(9);
+    rt_tick_increase();
+    rt_interrupt_leave();
+}
+
+void timer0_init(void)
+{
+	TMR0CON =  BIT(7); //TIE
+	TMR0CNT = 0;
+
+	rt_hw_interrupt_install(IRQ_TMR0_VECTOR, timer0_isr, RT_NULL, "tick");
+}
+
+void timer0_cfg(uint32_t ticks)
+{
+	TMR0PR  = (uint32_t)(ticks - 1UL);       //1ms interrupt
+	TMR0CON |= BIT(0); // EN
+}
+
+void hal_mdelay(uint32_t ms)
+{
+    rt_thread_mdelay(ms);
+}
+
+void rt_hw_systick_init(void)
+{
+    CLKCON2 &= 0x00ffffff;
+    CLKCON2 |= (25 << 24);                                  //配置x26m_div_clk = 1M (timer, ir, fmam ...用到)
+    CLKCON0 &= ~(7 << 23);
+    CLKCON0 |= BIT(24);                                     //tmr_inc select x26m_div_clk = 1M
+
+    set_sysclk(SYSCLK_48M);
+
+    /* Setting software interrupt */
+    set_cpu_irq_comm(cpu_irq_comm);
+    rt_hw_interrupt_install(IRQ_SW_VECTOR, rt_soft_isr, RT_NULL, "sw_irq");
+
+    timer0_init();
+    hal_set_tick_hook(timer0_cfg);
+    hal_set_ticks(get_sysclk_nhz()/RT_TICK_PER_SECOND);
+
+    PICCON |= 0x10002;
+}
+
+void rt_hw_board_init(void)
+{
+    WDT_DIS();
+    rt_hw_systick_init();
+
+#ifdef RT_USING_HEAP
+    rt_system_heap_init(&__heap_start, &__heap_end);
+#endif
+
+#ifdef RT_USING_PIN
+    rt_hw_pin_init();
+#endif // RT_USING_PIN
+
+#ifdef RT_USING_SERIAL
+    rt_hw_usart_init();
+#endif // RT_USING_SERIAL
+
+#ifdef RT_USING_CONSOLE
+    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
+#endif // RT_USING_CONSOLE
+
+#ifdef RT_USING_COMPONENTS_INIT
+    rt_components_board_init();
+#endif
+}
--- a/bsp/bluetrum/ab32vg1-ab-prougen/board/board.h
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/board/board.h
@@ -0,0 +1,18 @@
+/*
+ * Copyright (c) 2006-2020, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author            Notes
+ * 2020-11-18     greedyhao         first version
+ */
+
+#ifndef BOARD_H__
+#define BOARD_H__
+
+#include <rtthread.h>
+#include "ab32vgx.h"
+#include "drv_gpio.h"
+
+#endif
--- a/bsp/bluetrum/ab32vg1-ab-prougen/board/ports/audio/drv_sound.c
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/board/ports/audio/drv_sound.c
@@ -0,0 +1,485 @@
+/*
+ * Copyright (c) 2020-2020, Bluetrum Development Team
+ * 
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Date           Author       Notes
+ * 2020-12-12     greedyhao    first implementation
+ */
+
+#include <board.h>
+
+#define DBG_TAG              "drv.snd_dev"
+#define DBG_LVL              DBG_INFO
+#include <rtdbg.h>
+
+#define SAI_AUDIO_FREQUENCY_44K         ((uint32_t)44100u)
+#define SAI_AUDIO_FREQUENCY_48K         ((uint32_t)48000u)
+#define TX_FIFO_SIZE         (1024)
+
+struct sound_device
+{
+    struct rt_audio_device audio;
+    struct rt_audio_configure replay_config;
+    rt_uint8_t *tx_fifo;
+    rt_uint8_t *rx_fifo;
+    rt_uint8_t volume;
+};
+
+static struct sound_device snd_dev = {0};
+
+//apll = 采样率*ADPLL_DIV*512
+//audio pll init
+void adpll_init(uint8_t out_spr)
+{
+    PLL1CON &= ~(BIT(16) | BIT(17));                //PLL1 refclk select xosc26m
+    CLKCON2  &= ~(BIT(4)| BIT(5) | BIT(6) | BIT(7));
+
+    PLL1CON &= ~(BIT(3) | BIT(4) | BIT(5));
+    PLL1CON |= BIT(3);                              //Select PLL/VCO frequency band (PLL大于206M vcos = 0x01, 否则为0)
+
+    PLL1CON |= BIT(12);                             //enable pll1 ldo
+    hal_mdelay(1);
+    PLL1CON |= BIT(18);                             //pll1 sdm enable
+
+    if (out_spr) {
+        CLKCON2  |= BIT(4) | BIT(7);                 //adpll_div = 10
+        PLL1DIV = (245.76 * 65536) / 26;            //245.76Mhz for 48K
+        // sys.aupll_type = 1;
+    } else {
+        CLKCON2  |= BIT(5) | BIT(7);                 //adpll_div = 11
+        PLL1DIV = (248.3712 * 65536) / 26;          //248.3712MHz for 44.1k
+        // sys.aupll_type = 0;
+    }
+    hal_mdelay(1);
+    PLL1CON |= BIT(20);                             //update pll1div
+    PLL1CON |= BIT(6);                              //enable analog pll1
+    hal_mdelay(1);                                 //wait pll1 stable
+}
+
+void dac_start(void)
+{
+    AUANGCON0 |= BIT(0) | BIT(1) | BIT(3); // bg ldoh bias enable
+
+    AUANGCON0 &= ~(BIT(6)|BIT(5)|BIT(4));  // LDOH voltage select：3bit
+    AUANGCON0 |= (3<<4); // 2.4/2.5/2.7/2.9/3.1/3.2
+
+    AUANGCON0 |= BIT(2);           // LDOL enable
+
+    AUANGCON0 |= BIT(9); //VCM enable
+    AUANGCON0 &= ~(BIT(13)|BIT(12)); // VCM voltage select, 2bit
+    AUANGCON0 |= (2<<12);
+
+    AUANGCON0 |= BIT(15) | BIT(16) | BIT(17) | BIT(18); // d2a lpf audpa audpa_dly
+
+    AUANGCON0 &= ~BIT(11); //VCM type: 0-->res divider with off-chip cap; 1-->internal VCM
+    //AUANGCON0 |= BIT(11);
+
+    AUANGCON0 &= ~BIT(19); // dac type: 0-->SC; 1-->SR
+    //AUANGCON0 |= BIT(19);
+
+    AUANGCON0 |= BIT(20); // pa type: 0-->diff; 1-->3.3V single
+
+    AUANGCON3 &= ~(0x7<<4); //BIT[6:4]=PA_GF[2:0]
+    AUANGCON3 |= (0<<4);
+    AUANGCON3 &= ~(0xf); //BIT[3:0]=PA_GX[3:0]
+    AUANGCON3 |= 0;
+
+    AUANGCON3 &= ~(0xF<<8); //BIT[11:8]=PA2_GX[3:0]
+    AUANGCON3 |= (0<<8);
+    AUANGCON3 &= ~(0x7<<12); //BIT[14:12]=PA2_GF[2:0]
+    AUANGCON3 |= (0<<12);
+
+    AUANGCON1 |= BIT(0) | BIT(1); // dac enable: BIT(0)-->right channel; BIT(1)-->left channel
+    //AUANGCON1 &= ~BIT(1); //disable left channel
+
+    AUANGCON1 |= BIT(12); // lpf2pa enable
+
+    AUANGCON1 &= ~BIT(29); // vcmbuf enable: 0-->disable
+    //AUANGCON1 |= BIT(29);
+
+    //AUANGCON1 |= BIT(30); // mirror enable
+
+    //AUANGCON2 |= BIT(29) | BIT(30); // adc mute
+
+    //AUANGCON1 |= BIT(3);  // pa mute
+}
+
+void saia_frequency_set(uint32_t frequency)
+{
+    if (frequency == SAI_AUDIO_FREQUENCY_48K) {
+        DACDIGCON0 |= BIT(1);
+        DACDIGCON0 &= ~(0xf << 2);
+        DACDIGCON0 |= BIT(6);
+    } else if (frequency == SAI_AUDIO_FREQUENCY_44K) {
+        DACDIGCON0 &= ~BIT(1);
+        DACDIGCON0 &= ~(0xf << 2);
+        DACDIGCON0 |= BIT(1);
+        DACDIGCON0 |= BIT(6);
+    }
+}
+
+void saia_channels_set(uint8_t channels)
+{
+    LOG_D("saia_channels_set=%d", channels);
+    if (channels == 1) {
+        AU0LMIXCOEF = 0x00007FFF;
+        AU1LMIXCOEF = 0x00007FFF;
+        DACDIGCON0 |= BIT(7);
+        DACDIGCON0 |= BIT(8);
+        AUANGCON1 &= ~BIT(0);
+    } else {
+        AUANGCON1 |= BIT(0);
+        DACDIGCON0 &= ~BIT(7);
+        DACDIGCON0 &= ~BIT(8);
+    }
+}
+
+void saia_volume_set(rt_uint8_t volume)
+{
+    if (volume > 100)
+        volume = 100;
+    
+    uint32_t dvol = volume * 327; // max is 0x7ffff
+    LOG_D("dvol=0x%x", dvol);
+    DACVOLCON = dvol | (0x02 << 16); // dac fade in
+}
+
+uint8_t saia_volume_get(void)
+{
+    return ((DACVOLCON & 0xffff) / 327);
+}
+
+static rt_err_t sound_getcaps(struct rt_audio_device *audio, struct rt_audio_caps *caps)
+{
+    rt_err_t result = RT_EOK;
+    struct sound_device *snd_dev = RT_NULL;
+
+    RT_ASSERT(audio != RT_NULL); 
+    snd_dev = (struct sound_device *)audio->parent.user_data;
+
+    switch (caps->main_type)
+    {
+    case AUDIO_TYPE_QUERY: /* qurey the types of hw_codec device */
+    {
+        switch (caps->sub_type)
+        {
+        case AUDIO_TYPE_QUERY:
+            caps->udata.mask = AUDIO_TYPE_OUTPUT | AUDIO_TYPE_MIXER;
+            break;
+
+        default:
+            result = -RT_ERROR;
+            break;
+        }
+
+        break;
+    }
+
+    case AUDIO_TYPE_OUTPUT: /* Provide capabilities of OUTPUT unit */
+    {
+        switch (caps->sub_type)
+        {
+        case AUDIO_DSP_PARAM:
+            caps->udata.config.samplerate   = snd_dev->replay_config.samplerate;
+            caps->udata.config.channels     = snd_dev->replay_config.channels;
+            caps->udata.config.samplebits   = snd_dev->replay_config.samplebits;
+            break;
+
+        case AUDIO_DSP_SAMPLERATE:
+            caps->udata.config.samplerate   = snd_dev->replay_config.samplerate;
+            break;
+
+        case AUDIO_DSP_CHANNELS:
+            caps->udata.config.channels     = snd_dev->replay_config.channels;
+            break;
+
+        case AUDIO_DSP_SAMPLEBITS:
+            caps->udata.config.samplebits   = snd_dev->replay_config.samplebits;
+            break;
+
+        default:
+            result = -RT_ERROR;
+            break;
+        }
+
+        break;
+    }
+
+    case AUDIO_TYPE_MIXER: /* report the Mixer Units */
+    {
+        switch (caps->sub_type)
+        {
+        case AUDIO_MIXER_QUERY:
+            caps->udata.mask = AUDIO_MIXER_VOLUME;
+            break;
+
+        case AUDIO_MIXER_VOLUME:
+            caps->udata.value =  saia_volume_get();
+            break;
+
+        default:
+            result = -RT_ERROR;
+            break;
+        }
+
+        break;
+    }
+
+    default:
+        result = -RT_ERROR;
+        break;
+    }
+
+    return RT_EOK; 
+}
+
+static rt_err_t sound_configure(struct rt_audio_device *audio, struct rt_audio_caps *caps)
+{
+    rt_err_t result = RT_EOK;
+    struct sound_device *snd_dev = RT_NULL;
+
+    RT_ASSERT(audio != RT_NULL);
+    snd_dev = (struct sound_device *)audio->parent.user_data;
+
+    switch (caps->main_type)
+    {
+    case AUDIO_TYPE_MIXER:
+    {
+        switch (caps->sub_type)
+        {
+        case AUDIO_MIXER_VOLUME:
+        {
+            rt_uint8_t volume = caps->udata.value;
+
+            saia_volume_set(volume);
+            snd_dev->volume = volume;
+            LOG_D("set volume %d", volume);
+            break;
+        }
+
+        default:
+            result = -RT_ERROR;
+            break;
+        }
+
+        break;
+    }
+
+    case AUDIO_TYPE_OUTPUT:
+    {
+        switch (caps->sub_type)
+        {
+        case AUDIO_DSP_PARAM:
+        {
+            /* set samplerate */
+            saia_frequency_set(caps->udata.config.samplerate);
+            /* set channels */
+            saia_channels_set(caps->udata.config.channels);
+
+            /* save configs */
+            snd_dev->replay_config.samplerate = caps->udata.config.samplerate;
+            snd_dev->replay_config.channels   = caps->udata.config.channels;
+            snd_dev->replay_config.samplebits = caps->udata.config.samplebits;
+            LOG_D("set samplerate %d", snd_dev->replay_config.samplerate);
+            break;
+        }
+
+        case AUDIO_DSP_SAMPLERATE:
+        {
+            saia_frequency_set(caps->udata.config.samplerate);
+            snd_dev->replay_config.samplerate = caps->udata.config.samplerate;
+            LOG_D("set samplerate %d", snd_dev->replay_config.samplerate);
+            break;
+        }
+
+        case AUDIO_DSP_CHANNELS:
+        {
+            saia_channels_set(caps->udata.config.channels);
+            snd_dev->replay_config.channels   = caps->udata.config.channels;
+            LOG_D("set channels %d", snd_dev->replay_config.channels);
+            break;
+        }
+
+        case AUDIO_DSP_SAMPLEBITS:
+        {
+            /* not support */
+            snd_dev->replay_config.samplebits = caps->udata.config.samplebits;
+            break;
+        }
+
+        default:
+            result = -RT_ERROR;
+            break;
+        }
+
+        break;
+    }
+
+    default:
+        break;
+    }
+
+    return RT_EOK; 
+}
+
+static rt_err_t sound_init(struct rt_audio_device *audio)
+{
+    struct sound_device *snd_dev = RT_NULL;
+
+    RT_ASSERT(audio != RT_NULL); 
+    snd_dev = (struct sound_device *)audio->parent.user_data;
+
+    adpll_init(0);
+    dac_start();
+
+    /* set default params */
+    saia_frequency_set(snd_dev->replay_config.samplerate);
+    saia_channels_set(snd_dev->replay_config.channels);
+
+    return RT_EOK; 
+}
+
+static rt_err_t sound_start(struct rt_audio_device *audio, int stream)
+{
+    struct sound_device *snd_dev = RT_NULL;
+
+    RT_ASSERT(audio != RT_NULL); 
+    snd_dev = (struct sound_device *)audio->parent.user_data;
+
+    if (stream == AUDIO_STREAM_REPLAY)
+    {
+        LOG_D("open sound device");
+
+        AUBUFSIZE       = (TX_FIFO_SIZE / 4 - 1);
+        AUBUFSIZE       |= (TX_FIFO_SIZE / 8) << 16;
+        AUBUFSTARTADDR  = DMA_ADR(snd_dev->rx_fifo);
+
+        DACDIGCON0  = BIT(0) | BIT(10); // (0x01<<2)
+        DACVOLCON   = 0x7fff; // -60DB
+        DACVOLCON  |= BIT(20);
+
+        AUBUFCON |= BIT(1) | BIT(4);
+    }
+
+    return RT_EOK;
+}
+
+static rt_err_t sound_stop(struct rt_audio_device *audio, int stream)
+{
+    struct sound_device *snd_dev = RT_NULL;
+
+    RT_ASSERT(audio != RT_NULL); 
+    snd_dev = (struct sound_device *)audio->parent.user_data; 
+
+    if (stream == AUDIO_STREAM_REPLAY)
+    {
+        AUBUFCON &= ~BIT(4);
+        LOG_D("close sound device");
+    }
+
+    return RT_EOK;
+}
+
+rt_size_t sound_transmit(struct rt_audio_device *audio, const void *writeBuf, void *readBuf, rt_size_t size)
+{
+    struct sound_device *snd_dev = RT_NULL;
+    rt_size_t tmp_size = size / 4;
+    rt_size_t count = 0;
+
+    RT_ASSERT(audio != RT_NULL); 
+    snd_dev = (struct sound_device *)audio->parent.user_data;
+
+    while (tmp_size-- > 0) {
+        while(AUBUFCON & BIT(8)); // aubuf full
+        AUBUFDATA = ((const uint32_t *)writeBuf)[count++];
+    }
+
+    return size; 
+}
+
+static void sound_buffer_info(struct rt_audio_device *audio, struct rt_audio_buf_info *info)
+{
+    struct sound_device *snd_dev = RT_NULL;
+
+    RT_ASSERT(audio != RT_NULL); 
+    snd_dev = (struct sound_device *)audio->parent.user_data;
+
+    /**
+     *               TX_FIFO
+     * +----------------+----------------+
+     * |     block1     |     block2     |
+     * +----------------+----------------+
+     *  \  block_size  /
+     */
+    info->buffer      = snd_dev->tx_fifo;
+    info->total_size  = TX_FIFO_SIZE;
+    info->block_size  = TX_FIFO_SIZE / 2;
+    info->block_count = 2;
+}
+
+static struct rt_audio_ops ops =
+{
+    .getcaps     = sound_getcaps,
+    .configure   = sound_configure,
+    .init        = sound_init,
+    .start       = sound_start,
+    .stop        = sound_stop,
+    .transmit    = sound_transmit, 
+    .buffer_info = sound_buffer_info,
+};
+
+void audio_isr(int vector, void *param)
+{
+    rt_interrupt_enter();
+
+    //Audio buffer pend
+    if (AUBUFCON & BIT(5)) {
+        AUBUFCON |= BIT(1);         //Audio Buffer Pend Clear
+        rt_audio_tx_complete(&snd_dev.audio);
+    }
+    rt_interrupt_leave();
+}
+
+static int rt_hw_sound_init(void)
+{
+    rt_uint8_t *tx_fifo = RT_NULL; 
+    rt_uint8_t *rx_fifo = RT_NULL; 
+
+    /* 分配 DMA 搬运 buffer */ 
+    tx_fifo = rt_calloc(1, TX_FIFO_SIZE); 
+    if(tx_fifo == RT_NULL)
+    {
+        return -RT_ENOMEM;
+    }
+
+    rt_memset(tx_fifo, 0, TX_FIFO_SIZE);
+    snd_dev.tx_fifo = tx_fifo;
+
+    /* 分配 DMA 搬运 buffer */ 
+    rx_fifo = rt_calloc(1, TX_FIFO_SIZE); 
+    if(rx_fifo == RT_NULL)
+    {
+        return -RT_ENOMEM;
+    }
+
+    rt_memset(rx_fifo, 0, TX_FIFO_SIZE);
+    snd_dev.rx_fifo = rx_fifo;
+
+    /* init default configuration */
+    {
+        snd_dev.replay_config.samplerate = 48000;
+        snd_dev.replay_config.channels   = 2;
+        snd_dev.replay_config.samplebits = 16;
+        snd_dev.volume                   = 55;
+    }
+
+    /* register snd_dev device */
+    snd_dev.audio.ops = &ops;
+    rt_audio_register(&snd_dev.audio, "sound0", RT_DEVICE_FLAG_WRONLY, &snd_dev);
+
+    rt_hw_interrupt_install(IRQ_AUBUF0_1_VECTOR, audio_isr, RT_NULL, "au_isr");
+
+    return RT_EOK;
+}
+INIT_DEVICE_EXPORT(rt_hw_sound_init);
--- a/bsp/bluetrum/ab32vg1-ab-prougen/cconfig.h
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/cconfig.h
@@ -0,0 +1,21 @@
+#ifndef CCONFIG_H__
+#define CCONFIG_H__
+/* Automatically generated file; DO NOT EDIT. */
+/* compiler configure file for RT-Thread in GCC*/
+
+#define HAVE_NEWLIB_H 1
+#define LIBC_VERSION "newlib 3.2.0"
+
+#define HAVE_SYS_SIGNAL_H 1
+#define HAVE_SYS_SELECT_H 1
+#define HAVE_PTHREAD_H 1
+
+#define HAVE_FDSET 1
+#define HAVE_SIGACTION 1
+#define HAVE_SIGEVENT 1
+#define HAVE_SIGINFO 1
+#define HAVE_SIGVAL 1
+#define GCC_VERSION_STR "10.1.0"
+#define STDC "2011"
+
+#endif
--- a/bsp/bluetrum/ab32vg1-ab-prougen/download.xm
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/download.xm
--- a/bsp/bluetrum/ab32vg1-ab-prougen/figures/board.png
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/figures/board.png
--- a/bsp/bluetrum/ab32vg1-ab-prougen/header.bin
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/header.bin
--- a/bsp/bluetrum/ab32vg1-ab-prougen/link.lds
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/link.lds
@@ -0,0 +1,115 @@
+/* Define the flash max size */
+__max_flash_size = 1024k;
+
+__data_ram_size = 8k;
+__stack_ram_size = 4k;
+__comm_ram_size = 83k;
+__heap_ram_size = 29k;
+
+__base = 0x10000000;
+
+__data_vma = 0x11000;
+__stack_vma = __data_vma + __data_ram_size;
+__comm_vma = __stack_vma + __stack_ram_size;
+__heap_vma = __comm_vma + __comm_ram_size;
+
+__ram1_vma = 0x50000;
+
+MEMORY
+{
+    init            : org = __base,             len = 512
+    flash(rx)       : org = __base + 512,       len = __max_flash_size
+    comm(rx)        : org = __comm_vma,         len = __comm_ram_size
+
+    data            : org = __data_vma,         len = __data_ram_size
+    stack           : org = __stack_vma,        len = __stack_ram_size
+    heap            : org = __heap_vma,         len = __heap_ram_size
+    ram1(rx)        : org = __ram1_vma,         len = 0x7a00
+}
+
+SECTIONS
+{
+    .init : {
+        *(.reset)
+    } > init
+
+    .ram1 __ram1_vma : {
+        *components*drivers**.o(.text* .rodata*)
+        *device.o(.text*)
+        . = ALIGN(32);
+    } > ram1 AT > flash
+
+    .rti : {
+        . = ALIGN(4);
+        /* section information for initial */
+        __rt_init_start = .;
+        KEEP(*(SORT(.rti_fn*)))
+        __rt_init_end = .;
+
+        . = ALIGN(4);
+        __fsymtab_start = .;
+        KEEP(*(FSymTab))
+        __fsymtab_end = .;
+
+        . = ALIGN(4);
+        __vsymtab_start = .;
+        KEEP(*(VSymTab))
+        __vsymtab_end = .;
+
+        . = ALIGN(32);
+    } > ram1 AT > flash
+
+    .comm : {
+        KEEP (*(.vector))
+        EXCLUDE_FILE (*hal_drivers**.o *ab32vg1_hal**.o *components*finsh**.o *components*libc**.o *rt-thread*src**.o *kernel*src**.o *romfs.o *lib_a**.o) *(.text*)
+        *idle.o (.text*)
+        *ipc.o (.text*)
+        *irq.o (.text*)
+        *scheduler.o (.text*)
+        *timer.o (.text*)
+        *kservice.o (.text*)
+        EXCLUDE_FILE (*romfs.o *lib_a**.o) *(.rodata*)
+        *(.srodata*)
+        *(.rela*)
+        *(.data*)
+	    *(.sdata*)
+        . = ALIGN(512);
+    } > comm AT > flash
+
+    .bss (NOLOAD):
+    {
+        __bss_start = .;
+        *(COMMON)
+        *(.bss)
+        *(.sbss)
+        *(.buf*)
+        __bss_end = .;
+    } > data
+    __bss_size = __bss_end - __bss_start;
+
+    .stack (NOLOAD) : {
+        __irq_stack_start = .;
+        . = __stack_ram_size;
+        __irq_stack = .;
+    } > stack
+    __irq_stack_size = __irq_stack - __irq_stack_start;
+
+    .heap (NOLOAD) : {
+        __heap_start = .;
+        . = __heap_ram_size;
+        __heap_end = .;
+    } > heap
+
+    .flash : {
+        *(.text*)
+        *(.rodata*)
+        . = ALIGN(512);
+    } > flash
+}
+
+/* Calc the lma */
+__bank_size = SIZEOF(.flash);
+__comm_lma = LOADADDR(.comm);
+__comm_size = SIZEOF(.comm);
+__ram1_lma = LOADADDR(.ram1);
+__ram1_size = SIZEOF(.ram1) + SIZEOF(.rti);
--- a/bsp/bluetrum/ab32vg1-ab-prougen/riscv32-elf-xmaker.exe
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/riscv32-elf-xmaker.exe
--- a/bsp/bluetrum/ab32vg1-ab-prougen/rtconfig.h
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/rtconfig.h
@@ -0,0 +1,183 @@
+#ifndef RT_CONFIG_H__
+#define RT_CONFIG_H__
+
+/* Automatically generated file; DO NOT EDIT. */
+/* RT-Thread Project Configuration */
+
+/* RT-Thread Kernel */
+
+#define RT_NAME_MAX 8
+#define RT_ALIGN_SIZE 8
+#define RT_THREAD_PRIORITY_32
+#define RT_THREAD_PRIORITY_MAX 32
+#define RT_TICK_PER_SECOND 1000
+#define RT_USING_OVERFLOW_CHECK
+#define RT_USING_HOOK
+#define RT_USING_IDLE_HOOK
+#define RT_IDLE_HOOK_LIST_SIZE 4
+#define IDLE_THREAD_STACK_SIZE 512
+#define RT_USING_TIMER_SOFT
+#define RT_TIMER_THREAD_PRIO 4
+#define RT_TIMER_THREAD_STACK_SIZE 256
+#define RT_DEBUG
+
+/* Inter-Thread communication */
+
+#define RT_USING_SEMAPHORE
+#define RT_USING_MUTEX
+#define RT_USING_EVENT
+#define RT_USING_MAILBOX
+#define RT_USING_MESSAGEQUEUE
+
+/* Memory Management */
+
+#define RT_USING_MEMPOOL
+#define RT_USING_MEMHEAP
+#define RT_USING_SMALL_MEM
+#define RT_USING_HEAP
+
+/* Kernel Device Object */
+
+#define RT_USING_DEVICE
+#define RT_USING_DEVICE_OPS
+#define RT_USING_CONSOLE
+#define RT_CONSOLEBUF_SIZE 128
+#define RT_CONSOLE_DEVICE_NAME "uart0"
+#define RT_VER_NUM 0x40003
+
+/* RT-Thread Components */
+
+#define RT_USING_COMPONENTS_INIT
+#define RT_USING_USER_MAIN
+#define RT_MAIN_THREAD_STACK_SIZE 1024
+#define RT_MAIN_THREAD_PRIORITY 10
+
+/* C++ features */
+
+
+/* Command shell */
+
+#define RT_USING_FINSH
+#define FINSH_THREAD_NAME "tshell"
+#define FINSH_USING_HISTORY
+#define FINSH_HISTORY_LINES 5
+#define FINSH_USING_SYMTAB
+#define FINSH_USING_DESCRIPTION
+#define FINSH_THREAD_PRIORITY 20
+#define FINSH_THREAD_STACK_SIZE 2048
+#define FINSH_CMD_SIZE 80
+#define FINSH_USING_MSH
+#define FINSH_USING_MSH_DEFAULT
+#define FINSH_ARG_MAX 10
+
+/* Device virtual file system */
+
+#define RT_USING_DFS
+#define DFS_USING_WORKDIR
+#define DFS_FILESYSTEMS_MAX 2
+#define DFS_FILESYSTEM_TYPES_MAX 2
+#define DFS_FD_MAX 16
+#define RT_USING_DFS_ROMFS
+
+/* Device Drivers */
+
+#define RT_USING_DEVICE_IPC
+#define RT_PIPE_BUFSZ 512
+#define RT_USING_SERIAL
+#define RT_SERIAL_RB_BUFSZ 64
+#define RT_USING_PIN
+#define RT_USING_AUDIO
+#define RT_AUDIO_REPLAY_MP_BLOCK_SIZE 1024
+#define RT_AUDIO_REPLAY_MP_BLOCK_COUNT 2
+#define RT_AUDIO_RECORD_PIPE_SIZE 512
+
+/* Using USB */
+
+
+/* POSIX layer and C standard library */
+
+#define RT_USING_LIBC
+
+/* Network */
+
+/* Socket abstraction layer */
+
+
+/* Network interface device */
+
+
+/* light weight TCP/IP stack */
+
+
+/* AT commands */
+
+
+/* VBUS(Virtual Software BUS) */
+
+
+/* Utilities */
+
+
+/* RT-Thread online packages */
+
+/* IoT - internet of things */
+
+
+/* Wi-Fi */
+
+/* Marvell WiFi */
+
+
+/* Wiced WiFi */
+
+
+/* IoT Cloud */
+
+
+/* security packages */
+
+
+/* language packages */
+
+
+/* multimedia packages */
+
+
+/* tools packages */
+
+
+/* system packages */
+
+
+/* Micrium: Micrium software products porting for RT-Thread */
+
+
+/* peripheral libraries and drivers */
+
+
+/* miscellaneous packages */
+
+
+/* samples: kernel and components samples */
+
+
+/* games: games run on RT-Thread console */
+
+
+/* Hardware Drivers Config */
+
+/* Onboard Peripheral Drivers */
+
+#define BSP_USING_USB_TO_USART
+#define BSP_USING_AUDIO
+#define BSP_USING_AUDIO_PLAY
+
+/* On-chip Peripheral Drivers */
+
+#define BSP_USING_UART0
+
+/* Board extended module Drivers */
+
+#define BOARD_BLUETRUM_EVB
+
+#endif
--- a/bsp/bluetrum/ab32vg1-ab-prougen/rtconfig.py
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/rtconfig.py
@@ -0,0 +1,68 @@
+import os
+
+# toolchains options
+ARCH        ='risc-v'
+CPU         ='bluetrum'
+CROSS_TOOL  ='gcc'
+
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = r'../../..'
+
+if os.getenv('RTT_CC'):
+    CROSS_TOOL = os.getenv('RTT_CC')
+
+if  CROSS_TOOL == 'gcc':
+    PLATFORM    = 'gcc'
+    EXEC_PATH   = r'D:/Softwares/RT-ThreadStudio/repo/Extract/ToolChain_Support_Packages/RISC-V/RISC-V-GCC/10.1.0/bin'
+else:
+    print('Please make sure your toolchains is GNU GCC!')
+    exit(0)
+
+if os.getenv('RTT_EXEC_PATH'):
+    EXEC_PATH = os.getenv('RTT_EXEC_PATH')
+
+BUILD = 'release'
+
+if PLATFORM == 'gcc':
+    # toolchains
+    PREFIX  = 'riscv64-unknown-elf-'
+    CC      = PREFIX + 'gcc'
+    CXX     = PREFIX + 'g++'
+    AS      = PREFIX + 'gcc'
+    AR      = PREFIX + 'ar'
+    LINK    = PREFIX + 'gcc'
+    TARGET_EXT = 'elf'
+    SIZE    = PREFIX + 'size'
+    OBJDUMP = PREFIX + 'objdump'
+    OBJCPY  = PREFIX + 'objcopy'
+
+    # DEVICE  = ' -mcmodel=medany -march=rv32imc -mabi=ilp32 -fsingle-precision-constant'
+    DEVICE  = ' -mcmodel=medany -march=rv32imc -mabi=ilp32'
+    # CFLAGS  = DEVICE + ' -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields'
+    CFLAGS = DEVICE
+    AFLAGS  = ' -c' + DEVICE + ' -x assembler-with-cpp'
+    LFLAGS  = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start -T link.lds'
+    CPATH   = ''
+    LPATH   = ''
+
+    if BUILD == 'debug':
+        CFLAGS += ' -O0 -ggdb'
+        AFLAGS += ' -ggdb'
+    else:
+        CFLAGS += ' -Os'
+
+    CXXFLAGS = CFLAGS
+
+DUMP_ACTION = OBJDUMP + ' -D -S $TARGET > rtt.asm\n'
+POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
+POST_ACTION += './riscv32-elf-xmaker -b rtthread.xm\n'
+POST_ACTION += './riscv32-elf-xmaker -b download.xm\n'
+
+def dist_handle(BSP_ROOT, dist_dir):
+    import sys
+    cwd_path = os.getcwd()
+    sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
+    from sdk_dist import dist_do_building
+    dist_do_building(BSP_ROOT, dist_dir)
--- a/bsp/bluetrum/ab32vg1-ab-prougen/rtthread.xm
+++ b/bsp/bluetrum/ab32vg1-ab-prougen/rtthread.xm
--- a/bsp/bluetrum/libcpu/cpu/SConscript
+++ b/bsp/bluetrum/libcpu/cpu/SConscript
@@ -0,0 +1,23 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+
+if rtconfig.PLATFORM == 'armcc':
+    src += Glob('*_rvds.S')
+
+if rtconfig.PLATFORM == 'gcc':
+    src += Glob('*_init.S')
+    src += Glob('*_gcc.S')
+
+if rtconfig.PLATFORM == 'iar':
+    src += Glob('*_iar.S')
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')
--- a/bsp/bluetrum/libcpu/cpu/context_gcc.S
+++ b/bsp/bluetrum/libcpu/cpu/context_gcc.S
@@ -0,0 +1,226 @@
+/*
+ * Copyright (c) 2020-2020, Bluetrum Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020/11/18     greedyhao    The first version.
+ */
+
+#include "ab32vg1.h"
+
+.global  rt_interrupt_from_thread
+.global  rt_interrupt_to_thread
+.global  rt_cur_thread_sp
+.global  rt_switch_flag
+.global  rt_interrupt_nest
+
+/*
+ * rt_base_t rt_hw_interrupt_disable();
+ * a0 -> return
+ */
+    .global rt_hw_interrupt_disable
+rt_hw_interrupt_disable:
+    lw      a5, PICCON(zero)
+    mv      a0, a5
+    andi    a5, a5, -2
+    sw      a5, PICCON(zero)
+    ret
+
+/*
+ * void rt_hw_interrupt_enable(rt_base_t level);
+ * a0 -> level
+ */
+    .global rt_hw_interrupt_enable
+rt_hw_interrupt_enable:
+    andi    a0, a0, 1
+    beqz    a0,enable_int_ret
+    lw      a5, PICCON(zero)
+    ori     a5, a5, 1
+    sw      a5,PICCON(zero)
+enable_int_ret:
+    ret
+
+/* Macro for saving task context */
+.macro save_context
+    addi    sp, sp, -124
+
+    /* Save Context */
+    sw      x1, 0(sp)
+    sw      x4, 4(sp)
+    sw      x5, 8(sp)
+    sw      x6, 12(sp)
+    sw      x7, 16(sp)
+    sw      x8, 20(sp)
+    sw      x9, 24(sp)
+    sw      x10, 28(sp)
+    sw      x11, 32(sp)
+    sw      x12, 36(sp)
+    sw      x13, 40(sp)
+    sw      x14, 44(sp)
+    sw      x15, 48(sp)
+    sw      x16, 52(sp)
+    sw      x17, 56(sp)
+    sw      x18, 60(sp)
+    sw      x19, 64(sp)
+    sw      x20, 68(sp)
+    sw      x21, 72(sp)
+    sw      x22, 76(sp)
+    sw      x23, 80(sp)
+    sw      x24, 84(sp)
+    sw      x25, 88(sp)
+    sw      x26, 92(sp)
+    sw      x27, 96(sp)
+    sw      x28, 100(sp)
+    sw      x29, 104(sp)
+    sw      x30, 108(sp)
+    sw      x31, 112(sp)
+
+    lw      a5, EPC(zero)                  //Saves current program counter (EPC) as task program counter
+    sw      a5, 116(sp)
+    lw      a5, EPICCON(zero)
+    sw      a5, 120(sp)
+
+    sw      sp, rt_cur_thread_sp, a4                       //store sp in preempted tasks tcb
+    .endm
+
+
+/* Macro for restoring task context */
+.macro restore_context
+
+    la      a5, rt_cur_thread_sp
+    lw      sp, 0(a5)                       //get new task stack pointer
+
+    /* Load task program counter  EPC*/
+    lw      a5, 116(sp)
+    sw      a5, EPC(zero)
+    lw      a5, 120(sp)
+    sw      a5, EPICCON(zero)
+
+    /* Restore registers,
+       Skip global pointer because that does not change */
+    lw      x1, 0(sp)
+    lw      x4, 4(sp)
+    lw      x5, 8(sp)
+    lw      x6, 12(sp)
+    lw      x7, 16(sp)
+    lw      x8, 20(sp)
+    lw      x9, 24(sp)
+    lw      x10, 28(sp)
+    lw      x11, 32(sp)
+    lw      x12, 36(sp)
+    lw      x13, 40(sp)
+    lw      x14, 44(sp)
+    lw      x15, 48(sp)
+    lw      x16, 52(sp)
+    lw      x17, 56(sp)
+    lw      x18, 60(sp)
+    lw      x19, 64(sp)
+    lw      x20, 68(sp)
+    lw      x21, 72(sp)
+    lw      x22, 76(sp)
+    lw      x23, 80(sp)
+    lw      x24, 84(sp)
+    lw      x25, 88(sp)
+    lw      x26, 92(sp)
+    lw      x27, 96(sp)
+    lw      x28, 100(sp)
+    lw      x29, 104(sp)
+    lw      x30, 108(sp)
+    lw      x31, 112(sp)
+
+    addi    sp, sp, 124
+    mret
+    .endm
+
+/*
+ * void rt_hw_context_switch_to(rt_uint32 to);
+ * r0 --> to
+ */
+    .globl rt_hw_context_switch_to
+rt_hw_context_switch_to:
+    sw      zero, rt_interrupt_from_thread, a4                         /*set from thread to 0*/
+    sw      a0, rt_interrupt_to_thread, a4                           /*set rt_interrupt_to_thread*/
+
+    sb      zero, rt_interrupt_nest, a4                                /*rt_interrupt_nest = 0*/
+
+    li      a5, 1
+    sw      a5, rt_switch_flag, a4                                  // rt_switch_flag = 1;
+
+    SWINT                                                           /*kick soft interrupt*/
+    lw      a5, PICCON(zero)                                                 /*enable interrupt*/
+    ori     a5, a5, 1
+    sw      a5, PICCON(zero)
+    ret
+
+/*
+ * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
+ * a0 --> from
+ * a1 --> to
+ */
+    .globl rt_hw_context_switch
+rt_hw_context_switch:
+    sw      a0, rt_interrupt_from_thread, a4                         /*set rt_interrupt_from_thread*/
+    sw      a1, rt_interrupt_to_thread, a4                          /*set rt_interrupt_to_thread*/
+    li      a5, 1
+    sw      a5, rt_switch_flag, a4                                  // rt_switch_flag = 1;
+    SWINT                                                           /*kick soft interrupt*/
+    ret
+
+ /*
+ * void rt_switch_to_thread(void);
+ * r0 --> to
+ */
+    .globl rt_switch_to_thread
+rt_switch_to_thread:
+    lw     a0, rt_interrupt_from_thread
+    lw     a5, rt_cur_thread_sp
+    sw     a5, 0(a0)
+
+    lw     a0, rt_interrupt_to_thread
+    lw     a5, 0(a0)
+    sw     a5, rt_cur_thread_sp, a4
+    ret
+
+/*
+ * void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to);
+ * a0 --> from
+ * a1 --> to
+ */
+    .global rt_hw_context_switch_interrupt
+rt_hw_context_switch_interrupt:
+    lw      a5, rt_switch_flag
+    bnez    a5, _reswitch
+    li      a5, 0x01
+    sw      a5, rt_switch_flag, a4
+    sw      a0, rt_interrupt_from_thread, a4                       /*set rt_interrupt_from_thread*/
+_reswitch:
+    sw      a1, rt_interrupt_to_thread, a4                        /*set rt_interrupt_to_thread*/
+    ret
+
+    //软中断服务
+    .global rt_soft_isr
+rt_soft_isr:
+    li      a5, 0x4                                                 // PICPND = BIT(IRQ_SW_VECTOR); 清软中断Pending
+    sw      a5, PICPND(zero)
+    ret
+
+    .globl low_prio_irq
+low_prio_irq:
+    save_context
+    li      a5, 1
+    sb      a5, rt_interrupt_nest, a4                               // rt_interrupt_nest = 1;
+
+    lw      a5, cpu_irq_comm_hook
+    jalr    a5
+
+    lw      a5, rt_switch_flag
+    beqz    a5, _low_prio_irq_exit                                  // if (rt_switch_flag)
+    jal     rt_switch_to_thread
+    sw      zero, rt_switch_flag, a4                                // rt_switch_flag = 0;
+
+    _low_prio_irq_exit:
+    sb      zero, rt_interrupt_nest, a4                             // rt_interrupt_nest = 0;
+    restore_context
+
--- a/bsp/bluetrum/libcpu/cpu/cpuport.c
+++ b/bsp/bluetrum/libcpu/cpu/cpuport.c
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2020-2020, Bluetrum Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020/11/18     greedyhao    Bluetrum RISC-V porting code.
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+
+volatile rt_ubase_t  rt_interrupt_from_thread = 0;
+volatile rt_ubase_t  rt_interrupt_to_thread   = 0;
+volatile rt_uint32_t rt_thread_switch_interrupt_flag = 0;
+volatile rt_uint32_t rt_switch_flag = 0;
+rt_uint32_t rt_cur_thread_sp = 0;
+
+/**
+ * This function will initialize thread stack
+ *
+ * @param tentry the entry of thread
+ * @param parameter the parameter of entry
+ * @param stack_addr the beginning stack address
+ * @param texit the function will be called when thread exit
+ *
+ * @return stack address
+ */
+rt_uint8_t *rt_hw_stack_init(void       *tentry,
+                             void       *parameter,
+                             rt_uint8_t *stack_addr,
+                             void       *texit)
+{
+    rt_uint32_t *stk;
+    register int *tp asm("x3");
+
+    stack_addr += sizeof(rt_uint32_t);
+    stack_addr  = (rt_uint8_t *)RT_ALIGN_DOWN((rt_uint32_t)stack_addr, 8);
+    stk  = (rt_uint32_t *)stack_addr;
+
+    stk--;
+    *stk = (rt_uint32_t)0x10003;         /* Start address */
+    stk--;
+	*stk = (rt_uint32_t)tentry;			/* Start address */
+	stk -= 22;
+	*stk = (rt_uint32_t)parameter;	    /* Register a0  parameter*/
+	stk -= 6;
+	*stk = (rt_uint32_t)tp;             /* Register thread pointer */
+	stk --;
+	*stk = (rt_uint32_t)texit;          /* Register ra   texit*/
+
+    /* return task's current stack address */
+    return (rt_uint8_t *)stk;
+}
+
+/** shutdown CPU */
+void rt_hw_cpu_shutdown(void)
+{
+    rt_uint32_t level;
+    rt_kprintf("shutdown...\n");
+
+    level = rt_hw_interrupt_disable();
+    while (level)
+    {
+        RT_ASSERT(0);
+    }
+}
--- a/bsp/bluetrum/libcpu/cpu/interrupt.c
+++ b/bsp/bluetrum/libcpu/cpu/interrupt.c
@@ -0,0 +1,84 @@
+/*
+ * Copyright (c) 2020-2020, Bluetrum Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2020/11/18     greedyhao    Bluetrum RISC-V porting code.
+ */
+
+#include <rtthread.h>
+#include <stdbool.h>
+#include <rthw.h>
+#include "ab32vgx.h"
+
+uint32_t irq_mask;
+void *tbl_irq_vector[IRQ_TOTAL_NUM];
+void (*cpu_irq_comm_hook)(void);
+
+void set_cpu_irq_comm(void (*irq_hook)(void))
+{
+    cpu_irq_comm_hook = irq_hook;
+}
+
+void cpu_irq_comm_do(void)
+{
+	void (*pfnct)(void);
+    uint32_t irq_pend = PICPND & irq_mask;
+	for (int i = 0; i < IRQ_TOTAL_NUM; i++) {
+        if (irq_pend & BIT(i)) {
+            pfnct = tbl_irq_vector[i];
+            if (pfnct) {
+                pfnct();				/* call ISR */
+            }
+        }
+	}
+}
+
+void rt_hw_irq_enable(int vector)
+{
+    if (vector < IRQ_TOTAL_NUM) {
+        PICEN |= BIT(vector);
+    }
+}
+
+void rt_hw_irq_disable(int vector)
+{
+    if (vector < IRQ_TOTAL_NUM) {
+        PICEN &= ~BIT(vector);
+    }
+}
+
+void rt_hw_interrupt_init(void)
+{
+}
+
+/**
+ * @brief This function will install a interrupt service routine to a interrupt.
+ * 
+ * @param vector 
+ * @param handler 
+ * @param param 
+ * @param name 
+ * @return rt_isr_handler_t 
+ */
+rt_isr_handler_t rt_hw_interrupt_install(int              vector,
+                                         rt_isr_handler_t handler,
+                                         void            *param,
+                                         const char      *name)
+{
+    rt_isr_handler_t old_handler = RT_NULL;
+
+    if (vector < IRQ_TOTAL_NUM) {
+        uint32_t cpu_ie = PICCON & BIT(0);
+        PICCON &= ~BIT(0);
+        old_handler = tbl_irq_vector[vector];
+        tbl_irq_vector[vector] = handler;
+        irq_mask |= BIT(vector);
+        PICCON |= cpu_ie;
+        PICPR &= ~BIT(vector);
+        PICEN |= BIT(vector);
+    }
+    return old_handler;
+}
--- a/bsp/bluetrum/libcpu/cpu/interrupt.h
+++ b/bsp/bluetrum/libcpu/cpu/interrupt.h
@@ -0,0 +1,7 @@
+#ifndef INTERRUPT_H__
+#define INTERRUPT_H__
+
+void rt_hw_irq_enable(int vector);
+void rt_hw_irq_disable(int vector);
+
+#endif
--- a/bsp/bluetrum/libraries/hal_drivers/SConscript
+++ b/bsp/bluetrum/libraries/hal_drivers/SConscript
@@ -0,0 +1,25 @@
+# RT-Thread building script for component
+
+from building import *
+
+cwd     = GetCurrentDir()
+src     = []
+CPPPATH = [cwd]
+
+if GetDepend('RT_USING_PIN'):
+    src += ['drv_gpio.c']
+
+if GetDepend('RT_USING_SERIAL'):
+    src += ['drv_usart.c']
+
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
+
+objs = [group]
+
+list = os.listdir(cwd)
+
+for item in list:
+    if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
+        objs = objs + SConscript(os.path.join(item, 'SConscript'))
+
+Return('objs')
--- a/bsp/bluetrum/libraries/hal_drivers/drv_common.h
+++ b/bsp/bluetrum/libraries/hal_drivers/drv_common.h
@@ -0,0 +1,18 @@
+/*
+ * Copyright (c) 2020-2020, Bluetrum Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author            Notes
+ * 2020-11-18     greedyhao         first version
+ */
+
+#ifndef DRV_COMMON_H__
+#define DRV_COMMON_H__
+
+#include <rtthread.h>
+#include <rthw.h>
+#include <rtdevice.h>
+
+#endif // DRV_COMMON_H__
--- a/bsp/bluetrum/libraries/hal_drivers/drv_gpio.c
+++ b/bsp/bluetrum/libraries/hal_drivers/drv_gpio.c
@@ -0,0 +1,182 @@
+/*
+ * Copyright (c) 2020-2020, Bluetrum Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author            Notes
+ * 2020-11-19     greedyhao         first version
+ */
+
+#include "drv_gpio.h"
+
+#ifdef RT_USING_PIN
+
+// #define DRV_DEBUG
+#define LOG_TAG             "drv.gpio"
+#include <drv_log.h>
+
+struct port_info
+{
+    uint8_t start_pin;
+    uint8_t delta_pin;
+    uint8_t total_pin;
+};
+
+/* It needs to be adjusted to the hardware. */
+static const struct port_info port_table[] =
+{
+    {0, 8, 0},      /* PA0-PA7 */
+    {0, 5, 8},      /* PB0-PB5 */
+    {0, 8, 13},     /* PE0-PE7 */
+    {0, 6, 21},     /* PF0-PF6 */
+};
+
+static const hal_sfr_t port_sfr[] =
+{
+    GPIOA_BASE,
+    GPIOB_BASE,
+    GPIOE_BASE,
+    GPIOF_BASE,
+};
+
+static uint8_t _pin_port(uint32_t pin)
+{
+    uint8_t port = 0;
+    for (port = 0; port < 3; port++) {
+        if (pin < (port_table[port].total_pin + port_table[port].delta_pin)) {
+            break;
+        }
+    }
+    return port;
+}
+
+#define PIN_NUM(port, no)       ((uint8_t)(port_table[port].total_pin + no - port_table[port].start_pin))
+#define PIN_PORT(pin)           _pin_port(pin)
+#define PORT_SFR(port)          (port_sfr[(port)])
+#define PIN_NO(pin)             (uint8_t)((pin) & 0xFu)
+
+// #define PIN_ABPIN(pin)  (uint8_t)(port_table[PIN_PORT(pin)].total_pin + PIN_NO(pin))
+
+static rt_base_t ab32_pin_get(const char *name)
+{
+    rt_base_t pin = 0;
+    int hw_port_num, hw_pin_num = 0;
+    int i, name_len;
+
+    name_len = rt_strlen(name);
+
+    if ((name_len < 4) || (name_len >= 6))
+    {
+        return -RT_EINVAL;
+    }
+    if ((name[0] != 'P') || (name[2] != '.'))
+    {
+        return -RT_EINVAL;
+    }
+
+    if ((name[1] >= 'A') && (name[1] <= 'B'))
+    {
+        hw_port_num = (int)(name[1] - 'A');
+    }
+    else if ((name[1] >= 'E') && (name[1] <= 'G'))
+    {
+        hw_port_num = (int)(name[1] - 'A') - 2;  /* Without 'C' and 'D'. */
+    }
+    else
+    {
+        return -RT_EINVAL;
+    }
+
+    for (i = 3; i < name_len; i++)
+    {
+        hw_pin_num *= 10;
+        hw_pin_num += name[i] - '0';
+    }
+
+    pin = PIN_NUM(hw_port_num, hw_pin_num);
+    LOG_D("name=%s", name);
+    LOG_D("hw_port_num=%d hw_pin_num=%d pin=%d", hw_port_num, hw_pin_num, pin);
+
+    return pin;
+}
+
+static void ab32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
+{
+    uint8_t port = PIN_PORT(pin);
+    uint8_t gpio_pin  = pin - port_table[port].total_pin;
+    hal_gpio_write(PORT_SFR(port), gpio_pin, (uint8_t)value);
+}
+
+static int ab32_pin_read(rt_device_t dev, rt_base_t pin)
+{
+    uint8_t port = PIN_PORT(pin);
+    uint8_t gpio_pin  = pin - port_table[port].total_pin;
+    return hal_gpio_read(PORT_SFR(port), gpio_pin);
+}
+
+static void ab32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
+{
+    struct gpio_init gpio_init;
+    uint8_t port = PIN_PORT(pin);
+
+    gpio_init.pin = BIT(pin - port_table[port].total_pin);
+    gpio_init.de  = GPIO_DIGITAL;
+    gpio_init.af_con = GPIO_AFDIS;
+    LOG_D("port=%d pin=%d", port, gpio_init.pin);
+
+    switch (mode)
+    {
+    case PIN_MODE_INPUT:
+    case PIN_MODE_INPUT_PULLUP:
+        gpio_init.pull = GPIO_PULLUP;
+        gpio_init.dir = GPIO_DIR_INPUT;
+        break;
+    case PIN_MODE_INPUT_PULLDOWN:
+        gpio_init.pull = GPIO_PULLDOWN;
+        gpio_init.dir = GPIO_DIR_INPUT;
+        break;
+    case PIN_MODE_OUTPUT:
+    case PIN_MODE_OUTPUT_OD:
+    default:
+        gpio_init.pull = GPIO_NOPULL;
+        gpio_init.dir = GPIO_DIR_OUTPUT;
+        break;
+    }
+    hal_gpio_init(PORT_SFR(port), &gpio_init);
+}
+
+static rt_err_t ab32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
+                                     rt_uint32_t mode, void (*hdr)(void *args), void *args)
+{
+    return -RT_ERROR;
+}
+
+static rt_err_t ab32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
+{
+    return -RT_ERROR;
+}
+
+static rt_err_t ab32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
+                                     rt_uint32_t enabled)
+{
+    return -RT_ERROR;
+}
+
+const static struct rt_pin_ops _ab32_pin_ops =
+{
+    ab32_pin_mode,
+    ab32_pin_write,
+    ab32_pin_read,
+    ab32_pin_attach_irq,
+    ab32_pin_dettach_irq,
+    ab32_pin_irq_enable,
+    ab32_pin_get,
+};
+
+int rt_hw_pin_init(void)
+{
+    return rt_device_pin_register("pin", &_ab32_pin_ops, RT_NULL);
+}
+
+#endif
--- a/bsp/bluetrum/libraries/hal_drivers/drv_gpio.h
+++ b/bsp/bluetrum/libraries/hal_drivers/drv_gpio.h
@@ -0,0 +1,21 @@
+/*
+ * Copyright (c) 2020-2020, Bluetrum Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author            Notes
+ * 2020-11-19     greedyhao         first version
+ */
+
+#ifndef DRV_GPIO_H__
+#define DRV_GPIO_H__
+
+#include "drv_common.h"
+#include "board.h"
+
+#define __AB32_PORT(port)   GPIO##port
+
+int rt_hw_pin_init(void);
+
+#endif // DRV_GPIO_H__
--- a/bsp/bluetrum/libraries/hal_drivers/drv_log.h
+++ b/bsp/bluetrum/libraries/hal_drivers/drv_log.h
@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2020-2020, Bluetrum Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author            Notes
+ * 2020-11-19     greedyhao         first version
+ */
+
+/*
+ * NOTE: DO NOT include this file on the header file.
+ */
+
+#ifndef LOG_TAG
+#define DBG_TAG               "drv"
+#else
+#define DBG_TAG               LOG_TAG
+#endif /* LOG_TAG */
+
+#ifdef DRV_DEBUG
+#define DBG_LVL               DBG_LOG
+#else
+#define DBG_LVL               DBG_INFO
+#endif /* DRV_DEBUG */
+
+#include <rtdbg.h>
--- a/Show More
+++ b/Show More
				`@@ -0,0 +1 @@`
				`# Bluetrum RISC-V Processor Support Package`