add nv32f100x bsp.

2026-02-06 09:02:20 +08:00 · 2017-09-20 14:21:18 +08:00
parent b2dd63d310
commit e9cafbeb6a
66 changed files with 25782 additions and 0 deletions
--- a/bsp/nv32f100x/SConscript
+++ b/bsp/nv32f100x/SConscript
@@ -0,0 +1,14 @@
+# for module compiling
+import os
+Import('RTT_ROOT')
+
+cwd = str(Dir('#'))
+objs = []
+list = os.listdir(cwd)
+
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        objs = objs + SConscript(os.path.join(d, 'SConscript'))
+
+Return('objs')
--- a/bsp/nv32f100x/SConstruct
+++ b/bsp/nv32f100x/SConstruct
@@ -0,0 +1,34 @@
+import os
+import sys
+import rtconfig
+
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+from building import *
+
+TARGET = 'rtthread-stm32f0xx.' + rtconfig.TARGET_EXT
+
+env = Environment(tools = ['mingw'],
+	AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+	CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+	AR = rtconfig.AR, ARFLAGS = '-rc',
+	LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+
+if rtconfig.PLATFORM == 'iar':
+	env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
+	env.Replace(ARFLAGS = [''])
+	env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map project.map'])
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
+
+# make a building
+DoBuilding(TARGET, objs)
--- a/bsp/nv32f100x/app/SConscript
+++ b/bsp/nv32f100x/app/SConscript
@@ -0,0 +1,15 @@
+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd     = os.path.join(str(Dir('#')), 'app')
+
+src	= Glob('./src/*.c')
+
+path = [cwd + '/inc',
+	cwd + '/..',
+	]
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = path)
+
+Return('group')
--- a/bsp/nv32f100x/app/src/application.c
+++ b/bsp/nv32f100x/app/src/application.c
@@ -0,0 +1,69 @@
+/*
+ * File      : application.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2009-01-05     Bernard      the first version
+ * 2013-11-15     bright       add init thread and components initial
+ * 2017-09-19     Quintin.Z    modify for nv32f100xxx version and components initial
+ */
+
+/**
+ * @addtogroup STM32
+ */
+/*@{*/
+
+#include <stdio.h>
+#include <rthw.h>
+#include <rtdevice.h>
+#include "board.h"
+#include <rtthread.h>
+#ifdef  RT_USING_COMPONENTS_INIT
+#include <components.h>
+#endif  /* RT_USING_COMPONENTS_INIT */
+
+static void rt_init_thread_entry(void* parameter)
+{
+extern void led_thread_entry(void* parameter);
+	rt_thread_t thread;
+
+/* Initialization RT-Thread Components */
+#ifdef RT_USING_COMPONENTS_INIT
+    rt_components_init();
+#endif
+
+/* Set finsh device */
+#ifdef  RT_USING_FINSH
+    finsh_set_device(RT_CONSOLE_DEVICE_NAME);
+#endif  /* RT_USING_FINSH */
+
+    
+    /* Create led thread */
+    thread = rt_thread_create("led",
+		led_thread_entry, RT_NULL,
+		256, 20, 20);
+    if(thread != RT_NULL)
+	rt_thread_startup(thread);
+}
+
+int rt_application_init()
+{
+	rt_thread_t init_thread;
+    init_thread = rt_thread_create("init",
+                                   rt_init_thread_entry, RT_NULL,
+                                   512, 8, 20);
+
+    if(init_thread != RT_NULL)
+	rt_thread_startup(init_thread);
+
+    return 0;
+}
+
+
+/*@}*/
--- a/bsp/nv32f100x/app/src/ledapp.c
+++ b/bsp/nv32f100x/app/src/ledapp.c
@@ -0,0 +1,39 @@
+/*
+ * File      : ledapp.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-09-19     Quintin.Z    the first version
+ */
+ 
+#include <stdio.h>
+#include <rthw.h>
+#include <rtdevice.h>
+#include "board.h"
+#include <rtthread.h>
+
+#ifdef  RT_USING_COMPONENTS_INIT
+#include <components.h>
+#endif  /* RT_USING_COMPONENTS_INIT */
+
+#include "gpio.h"
+
+
+void led_thread_entry(void* parameter)
+{
+
+    GPIO_Init  (GPIOA, GPIO_PTB5_MASK, GPIO_PinOutput);
+    
+	while(1)
+	{
+        GPIO_Toggle  (GPIOA, GPIO_PTB5_MASK);
+        rt_thread_delay(RT_TICK_PER_SECOND / 10);
+
+	}
+}
--- a/bsp/nv32f100x/app/src/startup.c
+++ b/bsp/nv32f100x/app/src/startup.c
@@ -0,0 +1,116 @@
+/*
+ * File      : startup.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://openlab.rt-thread.com/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2006-08-31     Bernard      first implementation
+ * 2013-11-15     bright       modify for stm32f0xx version and components initial
+ * 2017-09-19     Quintin.Z    modify for nv32f100xxx version and components initial
+ */
+
+
+#include <rthw.h>
+#include <rtthread.h>
+
+#include "board.h"
+
+
+extern int  rt_application_init(void);
+#ifdef RT_USING_FINSH
+extern int finsh_system_init(void);
+extern void finsh_set_device(const char* device);
+#endif
+
+#ifdef __CC_ARM
+extern int Image$$RW_IRAM1$$ZI$$Limit;
+#define NV32_SRAM_BEGIN    (&Image$$RW_IRAM1$$ZI$$Limit)
+#elif __ICCARM__
+#pragma section="HEAP"
+#define NV32_SRAM_BEGIN    (__segment_end("HEAP"))
+#else
+extern int __bss_end;
+#define NV32_SRAM_BEGIN    (&__bss_end)
+#endif
+
+/*******************************************************************************
+* Function Name  : assert_failed
+* Description    : Reports the name of the source file and the source line number
+*                  where the assert error has occurred.
+* Input          : - file: pointer to the source file name
+*                  - line: assert error line source number
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void assert_failed(uint8_t* file, uint32_t line)
+{
+	rt_kprintf("\n\r Wrong parameter value detected on\r\n");
+	rt_kprintf("       file  %s\r\n", file);
+	rt_kprintf("       line  %d\r\n", line);
+
+	while (1) ;
+}
+
+/**
+ * This function will startup RT-Thread RTOS.
+ */
+void rtthread_startup(void)
+{
+	/* init board */
+	rt_hw_board_init();
+
+	/* show version */
+	rt_show_version();
+
+	/* init tick */
+	rt_system_tick_init();
+
+	/* init kernel object */
+	rt_system_object_init();
+
+	/* init timer system */
+	rt_system_timer_init();
+
+#ifdef RT_USING_HEAP
+    rt_system_heap_init((void*)NV32_SRAM_BEGIN, (void*)NV32_SRAM_END);
+#endif
+
+	/* init scheduler system */
+	rt_system_scheduler_init();
+
+	/* init application */
+	rt_application_init();
+
+    /* init timer thread */
+    rt_system_timer_thread_init();
+
+	/* init idle thread */
+	rt_thread_idle_init();
+
+	/* start scheduler */
+	rt_system_scheduler_start();
+
+	/* never reach here */
+    
+	return ;
+}
+
+
+
+int main(void)
+{
+	/* disable interrupt first */
+	rt_hw_interrupt_disable();
+
+	/* startup RT-Thread RTOS */
+	rtthread_startup();
+    
+	return 0;
+}
+
+/*@}*/
--- a/bsp/nv32f100x/board/SConscript
+++ b/bsp/nv32f100x/board/SConscript
@@ -0,0 +1,12 @@
+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd     = os.path.join(str(Dir('#')), 'board')
+src	= Glob('./src/*.c')
+path = [cwd + '/inc'
+	]
+
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path)
+
+Return('group')
--- a/bsp/nv32f100x/board/inc/board.h
+++ b/bsp/nv32f100x/board/inc/board.h
@@ -0,0 +1,30 @@
+/*
+ * File      : board.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006-2017, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-09-19     Quintin.Z    the first version
+ */
+
+// <<< Use Configuration Wizard in Context Menu >>>
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+#include <stdint.h>
+#include <stdbool.h>
+
+
+// <o> Internal SRAM memory size[Kbytes] <8>
+#define NV32_SRAM_SIZE         8
+#define NV32_SRAM_END          (0x1FFFF800 + NV32_SRAM_SIZE * 1024)
+
+void rt_hw_board_init(void);
+
+
+#endif
--- a/bsp/nv32f100x/board/inc/drv_uart.h
+++ b/bsp/nv32f100x/board/inc/drv_uart.h
@@ -0,0 +1,23 @@
+/*
+ * File      : drv_uart.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006-2017, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-09-19     Quintin.Z    the first version
+ */
+
+#ifndef __DRV_UART_H__
+#define __DRV_UART_H__
+
+#include <rthw.h>
+#include <rtthread.h>
+
+void rt_hw_uart_init(void);
+
+#endif
--- a/bsp/nv32f100x/board/inc/start.h
+++ b/bsp/nv32f100x/board/inc/start.h
@@ -0,0 +1,9 @@
+/******************************************************************************
+* @brief provide high-level startup routines for NV32Fxx.
+*
+*******************************************************************************/
+
+/* Function prototypes */
+void cpu_identify(void);
+void flash_identify(void);
+void start(void);
--- a/bsp/nv32f100x/board/inc/sysinit.h
+++ b/bsp/nv32f100x/board/inc/sysinit.h
@@ -0,0 +1,38 @@
+/******************************************************************************
+* @brief provide system init routine/configuration for KExx.
+*
+*******************************************************************************/
+
+/********************************************************************/
+
+#ifndef SYSINIT_H_
+#define SYSINIT_H_
+
+/******************************************************************************
+* Includes
+******************************************************************************/
+
+/******************************************************************************
+* Constants
+******************************************************************************/
+
+
+/******************************************************************************
+* Macros
+******************************************************************************/ 
+#define SIM_SCGC_VALUE      0x00003000L  
+
+  
+/******************************************************************************
+* Global variables
+******************************************************************************/
+
+/******************************************************************************
+* Global functions
+******************************************************************************/
+void sysinit (void);
+void enable_abort_button(void);
+void end_test(void);
+
+/********************************************************************/
+#endif /* SYSINIT_H_ */
--- a/bsp/nv32f100x/board/src/board.c
+++ b/bsp/nv32f100x/board/src/board.c
@@ -0,0 +1,91 @@
+/*
+ * File      : board.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006-2017, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-09-19     Quintin.Z    the first version
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+#include "sysinit.h"
+#include "board.h"
+#include "drv_uart.h"
+#include "nv32.h"
+
+/* RT_USING_COMPONENTS_INIT */
+#ifdef  RT_USING_COMPONENTS_INIT
+#include <components.h>
+#endif
+
+
+#define portNVIC_SYSTICK_CTRL           ( ( volatile uint32_t *) 0xe000e010 )
+#define portNVIC_SYSTICK_LOAD           ( ( volatile uint32_t *) 0xe000e014 )
+#define portNVIC_INT_CTRL               ( ( volatile uint32_t *) 0xe000ed04 )
+#define portNVIC_SYSPRI2                ( ( volatile uint32_t *) 0xe000ed20 )
+#define portNVIC_SYSTICK_CLK            0x00000004
+#define portNVIC_SYSTICK_INT            0x00000002
+#define portNVIC_SYSTICK_ENABLE         0x00000001
+#define portNVIC_PENDSVSET              0x10000000
+#define portMIN_INTERRUPT_PRIORITY      ( 255UL )
+#define portNVIC_PENDSV_PRI             ( portMIN_INTERRUPT_PRIORITY << 16UL )
+#define portNVIC_SYSTICK_PRI            ( portMIN_INTERRUPT_PRIORITY << 24UL )
+
+
+/**
+ * This is the timer interrupt service routine.
+ *
+ */
+void SysTick_Handler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    rt_tick_increase();
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+
+
+/**
+ * This function will initial STM32 board.
+ */
+void rt_hw_board_init()
+{
+    /* Configure the SysTick */
+    *(portNVIC_SYSTICK_LOAD) = ( 40000000 / RT_TICK_PER_SECOND ) - 1UL;
+    *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
+
+    rt_hw_uart_init();
+
+    /* Call components board initial (use INIT_BOARD_EXPORT()) */
+#ifdef RT_USING_COMPONENTS_INIT
+    rt_components_board_init();
+#endif
+
+
+#ifdef RT_USING_CONSOLE
+    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
+#endif
+
+}
+
+long cmd_reset(int argc, char** argv)
+{
+    NVIC_SystemReset();
+
+    return 0;
+}
+
+FINSH_FUNCTION_EXPORT_ALIAS(cmd_reset, __cmd_reset, Reset Board.);
+
+
+
+/*@}*/
--- a/bsp/nv32f100x/board/src/drv_spi.c
+++ b/bsp/nv32f100x/board/src/drv_spi.c
@@ -0,0 +1,10 @@
+#include <rthw.h>
+#include <rtthread.h>
+#include <rtdevice.h>
+#include <board.h>
+
+#ifdef RT_USING_COMPONENTS_INIT
+#include <components.h>
+#endif
+
+/* TODO */
--- a/bsp/nv32f100x/board/src/drv_uart.c
+++ b/bsp/nv32f100x/board/src/drv_uart.c
@@ -0,0 +1,189 @@
+/*
+ * File      : drv_uart.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006-2017, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-09-19     Quintin.Z    the first version
+ */
+
+#include <rtdevice.h>
+#include <board.h>
+#include "drv_uart.h"
+#include "nv32.h"
+#include "uart.h"
+#include "sim.h"
+
+/* NV32 uart driver */
+struct nv32_uart
+{
+    UART_Type* uart_device;
+    IRQn_Type irq;
+};
+
+static rt_err_t nv32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
+{
+    struct nv32_uart* uart;
+
+    UART_ConfigBaudrateType uart_config;
+
+    RT_ASSERT(serial != RT_NULL);
+    RT_ASSERT(cfg != RT_NULL);
+
+    uart = (struct nv32_uart *)serial->parent.user_data;
+
+    uart_config.u32SysClkHz = BUS_CLK_HZ;
+    uart_config.u32Baudrate = cfg->baud_rate;
+
+    UART_SetBaudrate(uart->uart_device, &uart_config);
+
+
+    if (cfg->data_bits == DATA_BITS_8)
+    {
+        UART_Set8BitMode(uart->uart_device);
+    }
+    else if(cfg->data_bits == DATA_BITS_9)
+    {
+        UART_Set9BitMode(uart->uart_device);
+    }
+
+    if (cfg->stop_bits == STOP_BITS_1)
+    {
+        uart->uart_device->BDH  &= (~UART_BDH_SBNS_MASK);
+    }
+    else if (cfg->stop_bits == STOP_BITS_2)
+    {
+        uart->uart_device->BDH  |= UART_BDH_SBNS_MASK;
+    }
+
+    /* Enable receiver and transmitter */
+    uart->uart_device->C2 |= (UART_C2_TE_MASK | UART_C2_RE_MASK );
+
+
+    UART_EnableInterrupt(UART0, UART_RxBuffFullInt);
+    NVIC_EnableIRQ(UART0_IRQn);
+
+
+    return RT_EOK;
+}
+
+static rt_err_t nv32_control(struct rt_serial_device *serial, int cmd, void *arg)
+{
+    struct nv32_uart* uart;
+
+    RT_ASSERT(serial != RT_NULL);
+    uart = (struct nv32_uart *)serial->parent.user_data;
+
+    switch (cmd)
+    {
+        case RT_DEVICE_CTRL_CLR_INT:
+            /* disable rx irq */
+            NVIC_DisableIRQ(uart->irq);
+            break;
+        case RT_DEVICE_CTRL_SET_INT:
+            /* enable rx irq */
+            NVIC_EnableIRQ(uart->irq);
+            break;
+    }
+
+    return RT_EOK;
+}
+
+static int nv32_putc(struct rt_serial_device *serial, char c)
+{
+    struct nv32_uart* uart;
+
+    RT_ASSERT(serial != RT_NULL);
+    uart = (struct nv32_uart *)serial->parent.user_data;
+
+    while (!(uart->uart_device->S1 & UART_S1_TDRE_MASK));
+
+    uart->uart_device->D = (uint8_t)c;
+
+    return 1;
+}
+
+
+static int nv32_getc(struct rt_serial_device *serial)
+{
+    int ch;
+    struct nv32_uart* uart;
+
+    RT_ASSERT(serial != RT_NULL);
+    uart = (struct nv32_uart *)serial->parent.user_data;
+
+    ch = -1;
+    if (uart->uart_device->S1 & UART_S1_RDRF_MASK)
+    {
+        ch = uart->uart_device->D;
+    }
+
+    return ch;
+}
+
+static const struct rt_uart_ops nv32_uart_ops =
+{
+    nv32_configure,
+    nv32_control,
+    nv32_putc,
+    nv32_getc,
+};
+
+#ifdef RT_USING_UART0
+
+struct nv32_uart uart0 =
+{
+    UART0,
+    UART0_IRQn,
+};
+
+struct rt_serial_device serial0;
+
+void UART0_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    if(UART0->S1 & UART_S1_RDRF_MASK)
+    {
+        rt_hw_serial_isr(&serial0, RT_SERIAL_EVENT_RX_IND);
+    }
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+
+#endif
+
+
+void rt_hw_uart_init(void)
+{
+    struct nv32_uart* uart;
+    struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
+
+#ifdef RT_USING_UART0
+    uart = &uart0;
+
+    serial0.ops    = &nv32_uart_ops;
+    serial0.config = config;
+
+
+    SIM->PINSEL |= SIM_PINSEL_UART0PS_MASK;
+
+    SIM->SCGC |= SIM_SCGC_UART0_MASK;
+
+    uart->uart_device->C2 &= ~(UART_C2_TE_MASK | UART_C2_RE_MASK );
+
+    /* Configure the UART for 8-bit mode, no parity */
+    uart->uart_device->C1 = 0;
+
+    rt_hw_serial_register(&serial0, "uart0", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart);
+#endif
+
+}
+
--- a/bsp/nv32f100x/board/src/start.c
+++ b/bsp/nv32f100x/board/src/start.c
@@ -0,0 +1,36 @@
+/******************************************************************************
+* @brief provide high-level startup routines for NV32Fxx.
+*
+*******************************************************************************/
+
+#include "start.h"
+#include "common.h"
+#include "wdog.h"
+#include "sysinit.h"
+
+/********************************************************************/
+/********************************************************************/
+/*!
+ * \brief   flash SystemInit
+ * \return  None
+ *
+ * this is a system initialization function which dediu16Cated in Keil
+ * others complier don't use it.
+ * it is similar to start function
+ */
+void SystemInit( void )
+{
+#if !defined(ENABLE_WDOG)
+    /* Disable the watchdog ETMer */
+    WDOG_Disable();
+#else
+    /* Disable the watchdog ETMer but enable update */
+    WDOG_DisableWDOGEnableUpdate();
+#endif
+
+    sysinit();
+
+}
+
+
+
--- a/bsp/nv32f100x/board/src/sysinit.c
+++ b/bsp/nv32f100x/board/src/sysinit.c
@@ -0,0 +1,124 @@
+/*****************************************************************************
+* @brief provide system init routine/configuration for NV32Fxx.
+*
+*******************************************************************************/
+
+#include "common.h"
+#include "sysinit.h"
+#include "sim.h"
+#include "uart.h"
+#include "ics.h"
+
+/********************************************************************/
+
+uint16_t global_pass_count = 0;
+uint16_t global_fail_count = 0;
+
+
+void print_sys_log(void);
+void UART_InitPrint(void);
+
+/*****************************************************************************//*!
+FUNCTION----------------------------------------------------------------
+* @function name: sysinit
+*
+* @brief  initalize system including SIM, ICS, UART, etc
+*
+* @param  none
+*
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+void sysinit (void)
+{
+    SIM_ConfigType  sSIMConfig = {{0}, 0};
+    ICS_ConfigType  sICSConfig = {0};
+
+    /* initialize the Pass/Fail counts to 0 */
+    global_pass_count = 0;
+    global_fail_count = 0;
+
+    EFMCR &= 0xFFFF0001; // set wait state 1
+
+#if defined(TRIM_IRC)
+    /* if not trimmed, do trim first */
+    ICS_Trim(ICS_TRIM_VALUE);
+#endif
+    /*
+     * Enable SWD pin, RESET pin
+     */
+    /*
+     * NOTE: please make sure other register bits are also write-once and
+     * need add other bit mask here if needed.
+     */
+#if defined(SPI0_PINREMAP)
+    sSIMConfig.u32PinSel |= SIM_PINSEL_SPI0PS_MASK;
+#endif
+
+#if defined(OUTPUT_BUSCLK)
+    sSIMConfig.sBits.bEnableCLKOUT = 1;      /* output bus clock if enabled */
+#endif
+
+#if defined(DISABLE_NMI)
+    sSIMConfig.sBits.bDisableNMI = 1;
+#endif
+
+#if !defined(CPU_NV32M3)
+    /* make sure clocks to peripheral modules are enabled */
+    sSIMConfig.u32SCGC |= SIM_SCGC_SWD_MASK | SIM_SCGC_FLASH_MASK |
+                          SIM_SCGC_UART0_MASK | SIM_SCGC_UART1_MASK |
+                          SIM_SCGC_UART2_MASK
+                          ;
+#else
+    sSIMConfig.u32SCGC |= SIM_SCGC_SWD_MASK | SIM_SCGC_FLASH_MASK |
+                          SIM_SCGC_UART0_MASK
+                          ;
+#endif
+
+#if !defined(CPU_NV32)
+    /* bus clock divided by 2 */
+    // sSIMConfig.u32BusDiv |= SIM_CLKDIV_OUTDIV2_MASK;
+#endif
+
+//  sSIMConfig.sBits.bBusDiv |= SIM_BUSDIV_BUSDIV_MASK;
+
+    SIM_Init(&sSIMConfig);                   /* initialize SIM */
+
+#if defined(XOSC_STOP_ENABLE)
+    sICSConfig.oscConfig.bStopEnable = 1;    /*  enabled in stop mode */
+#endif
+
+#if defined(CRYST_HIGH_GAIN)
+    sICSConfig.oscConfig.bGain = 1;           /* high gain */
+#endif
+
+
+#if  (EXT_CLK_FREQ_KHZ >=4000)
+    sICSConfig.oscConfig.bRange = 1;           /* high range */
+#endif
+
+    sICSConfig.oscConfig.bEnable = 1;          /* enable OSC */
+    sICSConfig.u32ClkFreq = EXT_CLK_FREQ_KHZ;
+
+#if     defined(USE_FEE)
+    sICSConfig.u8ClkMode = ICS_CLK_MODE_FEE;
+#elif   defined(USE_FBE_OSC)
+    sICSConfig.u8ClkMode = ICS_CLK_MODE_FBE_OSC;
+#elif   defined(USE_FEE_OSC)
+    sICSConfig.u8ClkMode = ICS_CLK_MODE_FEE_OSC;
+#elif   defined(USE_FBILP)
+    sICSConfig.u8ClkMode = ICS_CLK_MODE_FBILP;
+#elif   defined(USE_FBELP)
+    sICSConfig.u8ClkMode = ICS_CLK_MODE_FBELP;
+#endif
+
+    ICS_Init(&sICSConfig);   /* initialize ICS */
+
+
+}
+
+void NMI_Handler(void)
+{
+    while(1);
+}
--- a/bsp/nv32f100x/lib/SConscript
+++ b/bsp/nv32f100x/lib/SConscript
@@ -0,0 +1,16 @@
+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd     = os.path.join(str(Dir('#')), 'lib')
+src	= Glob('./src/*.c')
+
+src += Glob('./src/*.s')
+path = [cwd + '/inc'
+	]
+
+CPPDEFINES = ['NV32', 'KEIL']
+
+group = DefineGroup('Lib', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
+
+Return('group')
--- a/bsp/nv32f100x/lib/inc/BME.h
+++ b/bsp/nv32f100x/lib/inc/BME.h
--- a/bsp/nv32f100x/lib/inc/NV32.h
+++ b/bsp/nv32f100x/lib/inc/NV32.h
--- a/bsp/nv32f100x/lib/inc/NV32_config.h
+++ b/bsp/nv32f100x/lib/inc/NV32_config.h
@@ -0,0 +1,71 @@
+/******************************************************************************
+*
+* NOTE:系统所使用的一些宏定义，以及时钟模式的选择。
+******************************************************************************/
+
+#ifndef _NVxx_CONFIG_H_
+#define _NVxx_CONFIG_H_
+
+
+#include <stdint.h>
+
+#define CPU_NV32
+#define TEST
+
+
+//#define TRIM_IRC                    /*!< 是否使用定义的TRIM值来校准内部IRC，若注释则使用出厂校准的TRIM值出厂校准至37.5K--48M */
+//#define SPI0_PINREMAP               /*!< SPI0的管脚映射定义 */
+//#define ENABLE_WDOG               /*!< 使能看门狗 */
+//#define DISABLE_NMI               /*!< 禁用NMI中断输入引脚 */
+
+/*! 定义是否打印系统信息 */      
+//#define PRINT_SYS_LOG           
+
+#if     !defined(BOOT_LOADER)
+#endif
+
+//#define OUTPUT_BUSCLK             /*!< 定义是否输出系统时钟，输出引脚为PH2 */
+#define ICS_TRIM_VALUE  0x2c   
+
+
+    /*! 定义时钟的时钟模式以及频率
+     */
+   //#define USE_FEE                         /*!< 使用外部时钟FEE模式 */
+   //#define USE_FEE_OSC                     /*!< 使用外部时钟输入OSC模式 */
+     #define USE_FEI                         /*!< 使用系统内部时钟IRC */
+  // #define USE_FBELP	
+   //#define USE_FBE_OSC
+
+   /*! 定义外部晶振频率. */
+   //#define EXT_CLK_FREQ_KHZ	32          /* in KHz */
+   //#define EXT_CLK_FREQ_KHZ	4000        /* in KHz */
+   //#define EXT_CLK_FREQ_KHZ	4000        /* in KHz */
+   //#define EXT_CLK_FREQ_KHZ	1000        /* in KHz */
+     #define EXT_CLK_FREQ_KHZ	10000       /* in KHz */
+    /*! 定义所使用的UART口 */
+    #define TERM_PORT   UART1               /*!< 定义使用UART1口，开发板上默认使用UART1口 */
+
+
+    /* 定义总线时钟主频 */
+    #if	defined(USE_FEI)
+        #define  BUS_CLK_HZ		40000000L
+
+    #elif  (EXT_CLK_FREQ_KHZ == 10000)
+        #define  BUS_CLK_HZ		50000000L
+    #elif  (EXT_CLK_FREQ_KHZ == 12000)
+        #define  BUS_CLK_HZ   30000000L
+    #elif  (EXT_CLK_FREQ_KHZ == 8000)
+        #define  BUS_CLK_HZ		24000000L
+    #elif  (EXT_CLK_FREQ_KHZ == 4000)
+        #define  BUS_CLK_HZ		40000000L
+    #elif  (EXT_CLK_FREQ_KHZ == 32)
+        #define  BUS_CLK_HZ		16777216L
+    #else   
+        #define  BUS_CLK_HZ		60000000L
+    #endif
+
+    /*! define UART baud rate */
+    #define UART_PRINT_BITRATE              115200      /*! UART波特率 */
+
+
+#endif /* NVxx_CONFIG_H_ */
--- a/bsp/nv32f100x/lib/inc/acmp.h
+++ b/bsp/nv32f100x/lib/inc/acmp.h
--- a/bsp/nv32f100x/lib/inc/adc.h
+++ b/bsp/nv32f100x/lib/inc/adc.h
--- a/bsp/nv32f100x/lib/inc/arm_cm0.h
+++ b/bsp/nv32f100x/lib/inc/arm_cm0.h
@@ -0,0 +1,100 @@
+/******************************************************************************
+*
+* @brief provide generic high-level routines for ARM Cortex M0/M0+ processors. 
+*
+*******************************************************************************/
+
+#ifndef _CPU_ARM_CM0_H
+#define _CPU_ARM_CM0_H
+
+/*ARM Cortex M0 implementation for interrupt priority shift*/
+#define ARM_INTERRUPT_LEVEL_BITS          2
+
+
+/***********************************************************************/
+  /*!< Macro to enable all interrupts. */
+#ifndef KEIL
+#define EnableInterrupts asm(" CPSIE i");
+#else
+#define EnableInterrupts  __enable_irq()
+#endif
+
+  /*!< Macro to disable all interrupts. */
+#ifndef KEIL
+#define DisableInterrupts asm(" CPSID i");
+#else
+#define DisableInterrupts __disable_irq()
+#endif
+
+#define disable_irq(irq)             NVIC_DisableIRQ(irq)
+#define enable_irq(irq)              NVIC_EnableIRQ(irq)
+#define set_irq_priority(irq, prio)  NVIC_SetPriority(irq, prio)
+/***********************************************************************/
+
+
+/*
+ * Misc. Defines
+ */
+#ifdef	FALSE
+#undef	FALSE
+#endif
+#define FALSE	(0)
+
+#ifdef	TRUE
+#undef	TRUE
+#endif
+#define	TRUE	(1)
+
+#ifdef	NULL
+#undef	NULL
+#endif
+#define NULL	(0)
+
+#ifdef  ON
+#undef  ON
+#endif
+#define ON      (1)
+
+#ifdef  OFF
+#undef  OFF
+#endif
+#define OFF     (0)
+
+#undef  ENABLE
+#define ENABLE  (1)
+
+#undef  DISABLE
+#define DISABLE  (0)
+
+
+/***********************************************************************/
+/*
+ * The basic data types
+ */
+typedef unsigned char		uint8;  /*  8 bits */
+typedef unsigned short int	uint16; /* 16 bits */
+typedef unsigned long int	uint32; /* 32 bits */
+
+typedef char			int8;   /*  8 bits */
+typedef short int	        int16;  /* 16 bits */
+typedef int		        int32;  /* 32 bits */
+
+typedef volatile int8		vint8;  /*  8 bits */
+typedef volatile int16		vint16; /* 16 bits */
+typedef volatile int32		vint32; /* 32 bits */
+
+typedef volatile uint8		vuint8;  /*  8 bits */
+typedef volatile uint16		vuint16; /* 16 bits */
+typedef volatile uint32		vuint32; /* 32 bits */
+
+// function prototype for main function
+int main(void);
+/***********************************************************************/
+// function prototypes for arm_cm0.c
+void stop (void);
+void wait (void);
+void write_vtor (int);
+
+/***********************************************************************/
+#endif	/* _CPU_ARM_CM4_H */
+
--- a/bsp/nv32f100x/lib/inc/common.h
+++ b/bsp/nv32f100x/lib/inc/common.h
@@ -0,0 +1,88 @@
+/******************************************************************************
+*
+* @brief provide header files to be included by all project files. 
+*
+*******************************************************************************/
+
+
+#ifndef _COMMON_H_
+#define _COMMON_H_
+
+#define swap_bytes(ptrWord)   *ptrWord = (*ptrWord >>8) | (*ptrWord<<8)
+typedef unsigned long   dword;
+typedef unsigned short  word;
+
+/********************************************************************/
+
+/*
+ * Debug prints ON (#define) or OFF (#undef)
+ */
+
+#define DEBUG
+#define DEBUG_PRINT
+
+/* 
+ * Include the generic CPU header file 
+ */
+#include "arm_cm0.h"
+
+/* 
+ * Include the platform specific header file 
+ */
+#if (defined(NV32))
+ #include  "NV32_config.h"
+#elif (defined(FRDM_NV32M3))
+ #include  "NV32M3_config.h"
+#elif (defined(FRDM_NV32M4))
+ #include  "NV32M4_config.h"
+#else
+  #error "No valid board defined"
+#endif
+
+/* 
+ * Include the cpu specific header file 
+*/
+#if (defined(CPU_NV32))
+ #include "NV32.h"
+#elif (defined(CPU_NV32M3))
+ #include "NV32M3.h"
+#elif (defined(CPU_NV32M4))
+ #include "NV32M4.h"
+#else
+  #error "No valid CPU defined"
+#endif
+
+
+/* 
+ * Include any toolchain specfic header files 
+ */
+#if (defined(__MWERKS__))
+  #include "mwerks.h"
+#elif (defined(__DCC__))
+  #include "build/wrs/diab.h"
+#elif (defined(__ghs__))
+  #include "build/ghs/ghs.h"
+#elif (defined(__GNUC__))
+  #if (defined(IAR))
+    #include "build/gnu/gnu.h"
+  #endif
+#elif (defined(IAR))
+  #include "iar.h"
+#elif (defined(KEIL))
+  
+#else
+#warning "No toolchain specific header included"
+#endif
+
+/* 
+ * Include common utilities
+ */
+
+#define ASSERT(x)
+
+#if (defined(IAR))
+#include "intrinsics.h"
+#endif
+/********************************************************************/
+
+#endif /* _COMMON_H_ */
--- a/bsp/nv32f100x/lib/inc/core_cm0plus.h
+++ b/bsp/nv32f100x/lib/inc/core_cm0plus.h
--- a/bsp/nv32f100x/lib/inc/core_cmFunc.h
+++ b/bsp/nv32f100x/lib/inc/core_cmFunc.h
--- a/bsp/nv32f100x/lib/inc/core_cmInstr.h
+++ b/bsp/nv32f100x/lib/inc/core_cmInstr.h
--- a/bsp/nv32f100x/lib/inc/core_cmSimd.h
+++ b/bsp/nv32f100x/lib/inc/core_cmSimd.h
--- a/bsp/nv32f100x/lib/inc/crc.h
+++ b/bsp/nv32f100x/lib/inc/crc.h
@@ -0,0 +1,109 @@
+/******************************************************************************
+*
+* @brief    Cyclic redundancy check (CRC) header file. 
+*
+******************************************************************************/
+#ifndef CRC_H_
+#define CRC_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+/******************************************************************************
+* Includes
+******************************************************************************/
+
+/******************************************************************************
+* Constants
+******************************************************************************/
+
+/******************************************************************************
+* Macros
+******************************************************************************/
+
+
+/******************************************************************************
+* CRC control bit definition
+*
+*//*! @addtogroup crc_controlbit
+* @{
+*******************************************************************************/
+
+/*!
+ * @brief CRC control register bit definition.
+ *
+ */
+
+#define CRC_WIDTH_16BIT                 0	/*!< select CRC16 protocol */   
+#define CRC_WIDTH_32BIT                 1	/*!< select CRC32 protocol */ 
+#define CRC_DATA_SEED                   1	/*!< Write CRC Data Register are seed */  
+#define CRC_DATA_DATA                   0	/*!< Write CRC Data Register are data */ 
+#define CRC_READ_COMPLETE               1	/*!< Invert or complement read CRC Data register */ 
+#define CRC_READ_NONE                   0	/*!< No XOR on reading */ 
+#define CRC_READ_TRANSPOSE_NONE         0	/*!< No transposition in read */ 
+#define CRC_READ_TRANSPOSE_BIT          1	/*!< only bits in bytes are transposed in read */
+#define CRC_READ_TRANSPOSE_ALL          2	/*!< both bits in bytes and bytes are transposed in read */
+#define CRC_READ_TRANSPOSE_BYTE         3	/*!< only bytes are transposed in read */
+#define CRC_WRITE_TRANSPOSE_NONE        0	/*!< No transposition write */
+#define CRC_WRITE_TRANSPOSE_BIT         1	/*!< only bits in bytes are transposed in write */ 
+#define CRC_WRITE_TRANSPOSE_ALL         2	/*!< both bits in bytes and bytes are transposed in write */
+#define CRC_WRITE_TRANSPOSE_BYTE        3	/*!< only bytes are transposed in write */
+
+/*! @} End of crc_controlbit                                                */
+
+     
+/******************************************************************************
+* Types
+******************************************************************************/
+/* CRC configuration structure 
+ */  
+/******************************************************************************
+* CRC Configuration Structure type.
+*
+*//*! @addtogroup crc_config_type
+* @{
+*******************************************************************************/ 
+/*!
+ * @brief CRC Configuration Structure.
+ *
+ */
+
+typedef struct
+{          
+    uint8_t bWidth                  : 1;    /*!< 1: 32-bit CRC protocol , 0: 16-bit CRC protocol */
+    uint8_t bDataType               : 1;    /*!< 1: write seed , 0: write data */
+    uint8_t bFinalXOR               : 1;    /*!< 1: Invert or complement read , 0: No XOR on reading */
+    uint8_t bRESERVED               : 1;    /*!< reserved bit */  
+    uint8_t bTransposeReadType      : 2;    /*!< type of transpose For read, see reference manual */
+    uint8_t bTransposeWriteType     : 2;    /*!< type of transpose For write, see reference manual */      
+    uint32_t u32PolyData               ;    /*!< 32bit or 16-biy poly data */           
+} CRC_ConfigType, *CRC_ConfigPtr  ; 
+/*! @} End of crc_config_type                                                */
+
+           
+/******************************************************************************
+* Global variables
+******************************************************************************/
+
+/******************************************************************************
+* CRC API list
+*
+*//*! @addtogroup crc_api_list
+* @{
+*******************************************************************************/
+
+/******************************************************************************
+* Global functions
+******************************************************************************/
+void        CRC_Init(CRC_ConfigType *pConfig);
+uint32_t    CRC_Cal16(uint32_t u32Seed, uint8_t *msg, uint32_t u32SizeBytes);
+uint32_t    CRC_Cal32(uint32_t u32Seed, uint8_t *msg, uint32_t u32SizeBytes);
+void        CRC_DeInit(void);
+/*! @} End of crc_api_list                                                   */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* CRC_H_ */
+
+
+
--- a/bsp/nv32f100x/lib/inc/eeprom.h
+++ b/bsp/nv32f100x/lib/inc/eeprom.h
@@ -0,0 +1,28 @@
+#ifndef EEPROM_H_
+#define EEPROM_H_
+
+/******************************************************************************
+* Includes
+******************************************************************************/
+#include "common.h"
+
+#define EERPOM_SIZE	1024		// in bytes
+#define EEPROM_START_ADR 0x00401000
+#define EEPROM_ERR_SUCCESS 0x01
+#define EEPROM_ADR_OverFlow 0x02
+#define EEPROM_ERR_INVALID_PARAM 0x04
+#define EEPROM_BLANK 0xffffffff
+#define EEPROM_SECTOR_MASK 0x00401200
+#define EEPROM_ARRAY_ADR_MASK 0x1ff
+
+
+uint16_t Adress_Js(uint32_t adr);
+uint16_t EEPROM_Erase(uint32_t adr);
+uint32_t EEPROM_Read(uint32_t adr);
+uint8_t EEPROM_ReadByte(uint32_t adr);
+
+
+uint16_t EEPROM_Write(uint32_t adr, uint32_t Data);
+uint16_t EEPROM_WriteByte(uint32_t adr, uint8_t Data);
+uint16_t EERPOM_Writeup4byte(uint32_t adr, uint8_t *pData,uint32_t length);
+#endif
--- a/bsp/nv32f100x/lib/inc/etm.h
+++ b/bsp/nv32f100x/lib/inc/etm.h
--- a/bsp/nv32f100x/lib/inc/flash.h
+++ b/bsp/nv32f100x/lib/inc/flash.h
@@ -0,0 +1,118 @@
+/******************************************************************************
+******************************************************************************
+*
+* @file flash.h
+*
+* @brief application entry point which performs application specific tasks. 
+*
+*******************************************************************************
+*
+* provide a demo for how to initialize the NV32, output messages via SCI, 
+* flash operations, etc.
+* NOTE:
+*	printf call may occupy a lot of memory (around 1924 bytes), so please
+*	consider your code size before using printf.
+******************************************************************************
+*
+* provide FLASH driver
+*
+******************************************************************************/
+
+
+
+#ifndef FLASH_H_
+#define FLASH_H_
+
+/******************************************************************************
+* Includes
+******************************************************************************/
+#include "common.h"
+/******************************************************************************
+* Constants
+******************************************************************************/
+
+/******************************************************************************
+* Macros
+******************************************************************************/
+/* Uncomment the following line to support programming flash while running code from flash */
+// #define FLASH_ENABLE_STALLING_FLASH_CONTROLLER
+
+#define ETMRH_FSTAT_MGSTAT0_MASK  (1)
+#define ETMRH_FSTAT_MGSTAT1_MASK  (1<<1)
+
+#define FLASH_SECTOR_SIZE	512		// in bytes
+
+/* Flash driver errors */
+#define FLASH_ERR_BASE				0x3000
+#define FLASH_ERR_SUCCESS			0
+#define FLASH_ERR_INVALID_PARAM		(FLASH_ERR_BASE+1)	// invalid parameter error code
+#define EEPROM_ERR_SINGLE_BIT_FAULT	(FLASH_ERR_BASE+2)	// EEPROM single bit fault error code
+#define EEPROM_ERR_DOUBLE_BIT_FAULT	(FLASH_ERR_BASE+4)	// EEPROM double bits fault error code
+#define FLASH_ERR_ACCESS			(FLASH_ERR_BASE+8)	// flash access error code
+#define FLASH_ERR_PROTECTION		(FLASH_ERR_BASE+0x10)	// flash protection error code
+#define FLASH_ERR_MGSTAT0			(FLASH_ERR_BASE+0x11)	// flash verification error code
+#define FLASH_ERR_MGSTAT1			(FLASH_ERR_BASE+0x12)	// flash non-correctable error code
+#define FLASH_ERR_INIT_CCIF			(FLASH_ERR_BASE+0x14)	// flash driver init error with CCIF = 1
+#define FLASH_ERR_INIT_FDIV			(FLASH_ERR_BASE+0x18)	// flash driver init error with wrong FDIV 
+
+/* Flash and EEPROM commands */
+
+
+#define FLASH_CMD_PROGRAM			0x20000000
+#define FLASH_CMD_CLEAR       0x00005000
+#define FLASH_CMD_ERASE_ALL   0x41000000
+#define FLASH_CMD_ERASE_SECTOR		0x40000000
+#define FLASH_FACTORY_KEY 0x0065fe9a
+
+#define EFM_DONE_MASK    0x00006000
+#define EFM_STATUS_DONE  0x00006000
+#define EFM_STATUS_READY 0x00002000
+
+#define FLASH_ACCERR_MASK 0x10
+
+#define M8(adr)  (*((volatile unsigned char  *) (adr)))
+#define M16(adr) (*((volatile unsigned short *) (adr)))
+#define M32(adr) (*((volatile unsigned long  *) (adr)))
+
+
+
+/******************************************************************************
+* Types
+******************************************************************************/
+typedef  uint16_t (*TFlash_Fun1)(uint32_t wNVMTargetAddress, uint8_t *pbData, uint8_t bByteCount);
+typedef  uint16_t (*TFlash_Fun2)(uint32_t wNVMTargetAddress, uint32_t dwData0, uint32_t dwData1);
+typedef  uint16_t (*TFlash_Fun3)(uint32_t wNVMTargetAddress, uint32_t dwData);
+
+/******************************************************************************
+* Global variables
+******************************************************************************/
+
+/******************************************************************************
+* Global functions
+******************************************************************************/
+uint16_t Flash_Program(uint32_t wNVMTargetAddress, uint8_t *pData, uint16_t sizeBytes);
+uint16_t Flash_Program1LongWord(uint32_t wNVMTargetAddress, uint32_t dwData);
+uint16_t Flash_Program2LongWords(uint32_t wNVMTargetAddress, uint32_t dwData0, uint32_t dwData1);
+
+uint16_t Flash_EraseSector(uint32_t wNVMTargetAddress);
+
+uint16_t Flash_VerifyBackdoorKey(void);
+
+uint16_t NVM_EraseAll(void);
+
+uint16_t NVM_Unsecure(void);
+
+uint16_t Flash_Init(void);
+
+#ifdef IAR
+void __ramfunc EFM_LaunchCMD(uint32_t EFM_CMD);
+#else
+void EFM_LaunchCMD(uint32_t EFM_CMD);
+#endif
+
+
+void	Flash_CopyInRAM(void);
+void	Flash_CopyRouinte2RAM(char *func, uint16_t sizeFunc);
+/********************************************************************/
+
+#endif /* FLASH_H_ */
--- a/bsp/nv32f100x/lib/inc/gpio.h
+++ b/bsp/nv32f100x/lib/inc/gpio.h
@@ -0,0 +1,278 @@
+/******************************************************************************
+*
+* @brief provide commond GPIO utilities. 
+*
+*******************************************************************************/
+#ifndef _GPIO_H_
+#define _GPIO_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "common.h"
+#include "stdint.h"
+
+/******************************************************************************
+*define gpio pin name
+*
+*//*! @addtogroup gpio_pin_name_list
+* @{
+*******************************************************************************/
+typedef enum
+{
+    /* in GPIOA register */
+    GPIO_PTA0 = 0,              /*!< GPIO Pin PTA0 */
+    GPIO_PTA1,                  /*!< GPIO Pin PTA1 */
+    GPIO_PTA2,                  /*!< GPIO Pin PTA2 */
+    GPIO_PTA3,                  /*!< GPIO Pin PTA3 */
+    GPIO_PTA4,                  /*!< GPIO Pin PTA4 */
+    GPIO_PTA5,                  /*!< GPIO Pin PTA5 */
+    GPIO_PTA6,                  /*!< GPIO Pin PTA6 */
+    GPIO_PTA7,                  /*!< GPIO Pin PTA7 */
+    GPIO_PTB0,                  /*!< GPIO Pin PTB0 */
+    GPIO_PTB1,                  /*!< GPIO Pin PTB1 */
+    GPIO_PTB2,                  /*!< GPIO Pin PTB2 */
+    GPIO_PTB3,                  /*!< GPIO Pin PTB3 */
+    GPIO_PTB4,                  /*!< GPIO Pin PTB4 */
+    GPIO_PTB5,                  /*!< GPIO Pin PTB5 */
+    GPIO_PTB6,                  /*!< GPIO Pin PTB6 */
+    GPIO_PTB7,                  /*!< GPIO Pin PTB7 */
+    GPIO_PTC0,                  /*!< GPIO Pin PTC0 */
+    GPIO_PTC1,                  /*!< GPIO Pin PTC1 */
+    GPIO_PTC2,                  /*!< GPIO Pin PTC2 */
+    GPIO_PTC3,                  /*!< GPIO Pin PTC3 */
+    GPIO_PTC4,                  /*!< GPIO Pin PTC4 */
+    GPIO_PTC5,                  /*!< GPIO Pin PTC5 */
+    GPIO_PTC6,                  /*!< GPIO Pin PTC6 */
+    GPIO_PTC7,                  /*!< GPIO Pin PTC7 */
+    GPIO_PTD0,                  /*!< GPIO Pin PTD0 */
+    GPIO_PTD1,                  /*!< GPIO Pin PTD1 */
+    GPIO_PTD2,                  /*!< GPIO Pin PTD2 */
+    GPIO_PTD3,                  /*!< GPIO Pin PTD3 */
+    GPIO_PTD4,                  /*!< GPIO Pin PTD4 */
+    GPIO_PTD5,                  /*!< GPIO Pin PTD5 */
+    GPIO_PTD6,                  /*!< GPIO Pin PTD6 */
+    GPIO_PTD7,                  /*!< GPIO Pin PTD7 */
+    /* in GPIOB register */
+    GPIO_PTE0,                  /*!< GPIO Pin PTE0 */
+    GPIO_PTE1,                  /*!< GPIO Pin PTE1 */
+    GPIO_PTE2,                  /*!< GPIO Pin PTE2 */
+    GPIO_PTE3,                  /*!< GPIO Pin PTE3 */
+    GPIO_PTE4,                  /*!< GPIO Pin PTE4 */
+    GPIO_PTE5,                  /*!< GPIO Pin PTE5 */
+    GPIO_PTE6,                  /*!< GPIO Pin PTE6 */
+    GPIO_PTE7,                  /*!< GPIO Pin PTE7 */
+    GPIO_PTF0,                  /*!< GPIO Pin PTF0 */
+    GPIO_PTF1,                  /*!< GPIO Pin PTF1 */
+    GPIO_PTF2,                  /*!< GPIO Pin PTF2 */
+    GPIO_PTF3,                  /*!< GPIO Pin PTF3 */
+    GPIO_PTF4,                  /*!< GPIO Pin PTF4 */
+    GPIO_PTF5,                  /*!< GPIO Pin PTF5 */
+    GPIO_PTF6,                  /*!< GPIO Pin PTF6 */
+    GPIO_PTF7,                  /*!< GPIO Pin PTF7 */
+    GPIO_PTG0,                  /*!< GPIO Pin PTG0 */
+    GPIO_PTG1,                  /*!< GPIO Pin PTG1 */
+    GPIO_PTG2,                  /*!< GPIO Pin PTG2 */
+    GPIO_PTG3,                  /*!< GPIO Pin PTG3 */
+    GPIO_PTG4,                  /*!< GPIO Pin PTG4 */
+    GPIO_PTG5,                  /*!< GPIO Pin PTG5 */
+    GPIO_PTG6,                  /*!< GPIO Pin PTG6 */
+    GPIO_PTG7,                  /*!< GPIO Pin PTG7 */
+    GPIO_PTH0,                  /*!< GPIO Pin PTH0 */
+    GPIO_PTH1,                  /*!< GPIO Pin PTH1 */
+    GPIO_PTH2,                  /*!< GPIO Pin PTH2 */
+    GPIO_PTH3,                  /*!< GPIO Pin PTH3 */
+    GPIO_PTH4,                  /*!< GPIO Pin PTH4 */
+    GPIO_PTH5,                  /*!< GPIO Pin PTH5 */
+    GPIO_PTH6,                  /*!< GPIO Pin PTH6 */
+    GPIO_PTH7,                  /*!< GPIO Pin PTH7 */
+    /* the following pins are not in NV322 */
+    GPIO_PTI0,                  /*!< GPIO Pin PTI0 */
+    GPIO_PTI1,                  /*!< GPIO Pin PTI1 */
+    GPIO_PTI2,                  /*!< GPIO Pin PTI2 */
+    GPIO_PTI3,                  /*!< GPIO Pin PTI3 */
+    GPIO_PTI4,                  /*!< GPIO Pin PTI4 */
+    GPIO_PTI5,                  /*!< GPIO Pin PTI5 */
+    GPIO_PTI6,                  /*!< GPIO Pin PTI6 */
+    GPIO_PTI7,                  /*!< GPIO Pin PTI7 */
+    GPIO_PIN_MAX,
+} GPIO_PinType;
+/*! @} End of gpio_pin_name_list    */
+
+/******************************************************************************
+*define gpio pin mask
+*
+*//*! @addtogroup gpio_pin_mask_list
+* @{
+*******************************************************************************/
+typedef enum
+{
+    /* in GPIOA register */
+    GPIO_PTA0_MASK = (1<<0),    /*!< GPIO Pin PTA0 bit mask */        
+    GPIO_PTA1_MASK = (1<<1),    /*!< GPIO Pin PTA1 bit mask */
+    GPIO_PTA2_MASK = (1<<2),    /*!< GPIO Pin PTA2 bit mask */
+    GPIO_PTA3_MASK = (1<<3),    /*!< GPIO Pin PTA3 bit mask */
+    GPIO_PTA4_MASK = (1<<4),    /*!< GPIO Pin PTA4 bit mask */
+    GPIO_PTA5_MASK = (1<<5),    /*!< GPIO Pin PTA5 bit mask */
+    GPIO_PTA6_MASK = (1<<6),    /*!< GPIO Pin PTA6 bit mask */
+    GPIO_PTA7_MASK = (1<<7),    /*!< GPIO Pin PTA7 bit mask */
+    GPIO_PTB0_MASK = (1<<8),    /*!< GPIO Pin PTB0 bit mask */
+    GPIO_PTB1_MASK = (1<<9),    /*!< GPIO Pin PTB1 bit mask */
+    GPIO_PTB2_MASK = (1<<10),   /*!< GPIO Pin PTB2 bit mask */
+    GPIO_PTB3_MASK = (1<<11),   /*!< GPIO Pin PTB3 bit mask */
+    GPIO_PTB4_MASK = (1<<12),   /*!< GPIO Pin PTB4 bit mask */
+    GPIO_PTB5_MASK = (1<<13),   /*!< GPIO Pin PTB5 bit mask */
+    GPIO_PTB6_MASK = (1<<14),   /*!< GPIO Pin PTB6 bit mask */
+    GPIO_PTB7_MASK = (1<<15),   /*!< GPIO Pin PTB7 bit mask */
+    GPIO_PTC0_MASK = (1<<16),   /*!< GPIO Pin PTC0 bit mask */
+    GPIO_PTC1_MASK = (1<<17),   /*!< GPIO Pin PTC1 bit mask */
+    GPIO_PTC2_MASK = (1<<18),   /*!< GPIO Pin PTC2 bit mask */
+    GPIO_PTC3_MASK = (1<<19),   /*!< GPIO Pin PTC3 bit mask */
+    GPIO_PTC4_MASK = (1<<20),   /*!< GPIO Pin PTC4 bit mask */
+    GPIO_PTC5_MASK = (1<<21),   /*!< GPIO Pin PTC5 bit mask */
+    GPIO_PTC6_MASK = (1<<22),   /*!< GPIO Pin PTC6 bit mask */
+    GPIO_PTC7_MASK = (1<<23),   /*!< GPIO Pin PTC7 bit mask */
+    GPIO_PTD0_MASK = (1<<24),   /*!< GPIO Pin PTD0 bit mask */
+    GPIO_PTD1_MASK = (1<<25),   /*!< GPIO Pin PTD1 bit mask */
+    GPIO_PTD2_MASK = (1<<26),   /*!< GPIO Pin PTD2 bit mask */
+    GPIO_PTD3_MASK = (1<<27),   /*!< GPIO Pin PTD3 bit mask */
+    GPIO_PTD4_MASK = (1<<28),   /*!< GPIO Pin PTD4 bit mask */
+    GPIO_PTD5_MASK = (1<<29),   /*!< GPIO Pin PTD5 bit mask */
+    GPIO_PTD6_MASK = (1<<30),   /*!< GPIO Pin PTD6 bit mask */
+    GPIO_PTD7_MASK = (1<<31),   /*!< GPIO Pin PTD7 bit mask */
+    /* in GPIOB register */
+    GPIO_PTE0_MASK = (1<<0),    /*!< GPIO Pin PTE0 bit mask */
+    GPIO_PTE1_MASK = (1<<1),    /*!< GPIO Pin PTE1 bit mask */
+    GPIO_PTE2_MASK = (1<<2),    /*!< GPIO Pin PTE2 bit mask */
+    GPIO_PTE3_MASK = (1<<3),    /*!< GPIO Pin PTE3 bit mask */
+    GPIO_PTE4_MASK = (1<<4),    /*!< GPIO Pin PTE4 bit mask */
+    GPIO_PTE5_MASK = (1<<5),    /*!< GPIO Pin PTE5 bit mask */
+    GPIO_PTE6_MASK = (1<<6),    /*!< GPIO Pin PTE6 bit mask */
+    GPIO_PTE7_MASK = (1<<7),    /*!< GPIO Pin PTE7 bit mask */
+    GPIO_PTF0_MASK = (1<<8),    /*!< GPIO Pin PTF0 bit mask */
+    GPIO_PTF1_MASK = (1<<9),    /*!< GPIO Pin PTF1 bit mask */
+    GPIO_PTF2_MASK = (1<<10),   /*!< GPIO Pin PTF2 bit mask */
+    GPIO_PTF3_MASK = (1<<11),   /*!< GPIO Pin PTF3 bit mask */
+    GPIO_PTF4_MASK = (1<<12),   /*!< GPIO Pin PTF4 bit mask */
+    GPIO_PTF5_MASK = (1<<13),   /*!< GPIO Pin PTF5 bit mask */
+    GPIO_PTF6_MASK = (1<<14),   /*!< GPIO Pin PTF6 bit mask */
+    GPIO_PTF7_MASK = (1<<15),   /*!< GPIO Pin PTF7 bit mask */
+    GPIO_PTG0_MASK = (1<<16),   /*!< GPIO Pin PTG0 bit mask */
+    GPIO_PTG1_MASK = (1<<17),   /*!< GPIO Pin PTG1 bit mask */
+    GPIO_PTG2_MASK = (1<<18),   /*!< GPIO Pin PTG2 bit mask */
+    GPIO_PTG3_MASK = (1<<19),   /*!< GPIO Pin PTG3 bit mask */
+    GPIO_PTG4_MASK = (1<<20),   /*!< GPIO Pin PTG4 bit mask */
+    GPIO_PTG5_MASK = (1<<21),   /*!< GPIO Pin PTG5 bit mask */
+    GPIO_PTG6_MASK = (1<<22),   /*!< GPIO Pin PTG6 bit mask */
+    GPIO_PTG7_MASK = (1<<23),   /*!< GPIO Pin PTG7 bit mask */
+    GPIO_PTH0_MASK = (1<<24),   /*!< GPIO Pin PTH0 bit mask */
+    GPIO_PTH1_MASK = (1<<25),   /*!< GPIO Pin PTH1 bit mask */
+    GPIO_PTH2_MASK = (1<<26),   /*!< GPIO Pin PTH2 bit mask */
+    GPIO_PTH3_MASK = (1<<27),   /*!< GPIO Pin PTH3 bit mask */
+    GPIO_PTH4_MASK = (1<<28),   /*!< GPIO Pin PTH4 bit mask */
+    GPIO_PTH5_MASK = (1<<29),   /*!< GPIO Pin PTH5 bit mask */
+    GPIO_PTH6_MASK = (1<<30),   /*!< GPIO Pin PTH6 bit mask */
+    GPIO_PTH7_MASK = (1<<31),   /*!< GPIO Pin PTH7 bit mask */
+    /* in GPIOC register */
+    GPIO_PTI0_MASK = (1<<0),    /*!< GPIO Pin PTI0 bit mask */
+    GPIO_PTI1_MASK = (1<<1),    /*!< GPIO Pin PTI1 bit mask */
+    GPIO_PTI2_MASK = (1<<2),    /*!< GPIO Pin PTI2 bit mask */
+    GPIO_PTI3_MASK = (1<<3),    /*!< GPIO Pin PTI3 bit mask */
+    GPIO_PTI4_MASK = (1<<4),    /*!< GPIO Pin PTI4 bit mask */
+    GPIO_PTI5_MASK = (1<<5),    /*!< GPIO Pin PTI5 bit mask */
+    GPIO_PTI6_MASK = (1<<6),    /*!< GPIO Pin PTI6 bit mask */
+    GPIO_PTI7_MASK = (1<<7),    /*!< GPIO Pin PTI7 bit mask */
+} GPIO_PinMaskType;
+/*! @} End of gpio_pin_mask_list    */
+
+
+/******************************************************************************
+*define gpio pin config type
+*
+*//*! @addtogroup gpio_pin_config_type_list
+* @{
+*******************************************************************************/
+/*
+*   . Internal pullup is disabled if the pin is configured as an output
+*   . High-current drive function is disabled, if the pin is configured as an input
+*       Only PTH1/0, PTE1/0, PTD1/0, PTB5/4 support Hight-current Drive.
+*/
+typedef enum
+{
+    GPIO_PinOutput = 0,                 /*!< set pin as outout */
+    GPIO_PinInput,                      /*!< set pin as input */
+    GPIO_PinInput_InternalPullup,       /*!< set internal pullup for input pin */
+    GPIO_PinOutput_HighCurrent,         /*!< set high drive for output pin */
+} GPIO_PinConfigType;
+/*! @} End of gpio_pin_config_type_list */
+
+/******************************************************************************
+* define GPIO APIs
+*
+*//*! @addtogroup gpio_api_list
+* @{
+*******************************************************************************/
+
+/*****************************************************************************//*!
+* @brief    Toggle the pins which are specified by u32PinMask in single cycle.
+*        
+* @param[in] pGPIO       Pointer to GPIO module, can be FGPIOA/FGPIOB.
+* @param[in] u32PinMask  Specify GPIO pin need to be toggled
+*
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+__STATIC_INLINE void FGPIO_Toggle(FGPIO_Type *pFGPIO, uint32_t u32PinMask)
+{
+    pFGPIO->PTOR = u32PinMask;   /* Toggle the pins specified by u32PinMask */
+}
+
+/*****************************************************************************//*!
+* @brief Read input data from GPIO which is specified by pGPIO in single cycle.
+*        
+* @param[in] pGPIO       Pointer to GPIO module, can be FGPIOA/FGPIOB.
+*
+* @return   GPIO input value unsigned int 32-bit
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+ __STATIC_INLINE uint32_t FGPIO_Read(FGPIO_Type *pFGPIO)
+{
+    return (pFGPIO->PDIR);      /* Read Port Data Input Register */
+  
+}
+
+/*****************************************************************************//*!
+* @brief    Write output data to GPIO which is specified by pGPIO in single cycle.
+*        
+* @param[in] pGPIO       Pointer to GPIO module, can be FGPIOA/FGPIOB.
+* @param[in] u32Value    value to output
+*
+* @return   none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+__STATIC_INLINE void FGPIO_Write(FGPIO_Type *pFGPIO, uint32_t u32Value)
+{    
+    pFGPIO->PDOR = u32Value;    /* Write Port Ouput Data Register */
+}
+
+void GPIO_DeInit(GPIO_Type *pGPIO);
+void GPIO_Init(GPIO_Type *pGPIO, uint32_t u32PinMask, GPIO_PinConfigType sGpioType);
+void GPIO_Toggle(GPIO_Type *pGPIO, uint32_t u32PinMask);
+uint32_t GPIO_Read(GPIO_Type *pGPIO);
+void GPIO_Write(GPIO_Type *pGPIO, uint32_t u32Value);
+void GPIO_PinInit(GPIO_PinType GPIO_Pin, GPIO_PinConfigType GPIO_PinConfig);
+void GPIO_PinToggle(GPIO_PinType GPIO_Pin);
+void GPIO_PinSet(GPIO_PinType GPIO_Pin);
+void GPIO_PinClear(GPIO_PinType GPIO_Pin);
+uint8_t GPIO_BitRead(GPIO_PinType GPIO_Pin);
+    
+/*! @} End of gpio_api_list */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* #ifndef _GPIO_H_ */
--- a/bsp/nv32f100x/lib/inc/i2c.h
+++ b/bsp/nv32f100x/lib/inc/i2c.h
--- a/bsp/nv32f100x/lib/inc/ics.h
+++ b/bsp/nv32f100x/lib/inc/ics.h
@@ -0,0 +1,347 @@
+/******************************************************************************
+*
+* @brief  ICS 驱动头文件.  
+*
+******************************************************************************/
+#ifndef ICS_H_
+#define ICS_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "common.h"
+/****************************************************************************!
+ * @brief 时钟模式常量定义
+ *
+ ***************************************************************************/
+enum
+{
+    ICS_CLK_MODE_FEI = 1,       /*!< FEI 模式 */
+    ICS_CLK_MODE_FEE,           /*!< FEE 模式 */
+    ICS_CLK_MODE_FEE_OSC,       /*!< FEE 模式 OSC输出时钟源选择来自EXTAL引脚的外部时钟源 */    
+    ICS_CLK_MODE_FBE,           /*!< FBE 模式 */
+    ICS_CLK_MODE_FBE_OSC,       /*!< FBE 模式 OSC输出时钟源选择来自EXTAL引脚的外部时钟源  */    
+    ICS_CLK_MODE_FBI,           /*!< FBI 模式 */
+    ICS_CLK_MODE_FBILP,         /*!< FBILP 模式 */    
+    ICS_CLK_MODE_FBELP,         /*!< FBELP 模式 */        
+};			
+  
+/*****************************************************************************//*!
+   *
+   * @brief 将时钟模式从当前模式切换到另一个时钟模式.
+   *
+   *  时钟模式宏观定义如下:
+   *      FEI, FBI, FEE, FBE, FBILP, FBELP, FEE_OSC, FBE_OSC
+   *   注：FEE_OSC, FBE_OSC 不能用作当前时钟模式. 当前时钟模式和要切换到的时钟模式组合如下： 
+   *    < 当前时钟模式，要切换到的时钟模式>     
+   *    <FEI,FEE>, <FEI,FBI>, <FEI,FBE>, <FEI,FBE_OSC>, <FEI,FEE_OSC>, <FEE,FEI>,
+   *    <FEE,FBI>, <FEE,FBE>, <FBI,FBE>, <FBI,FEE>, <FBI,FBILP>, <FBI,FEI>,
+   *    <FBE,FBI>, <FBE,FEE>, <FBE,FEI>, <FBE,FBELP>, <FBELP,FBE>, <FBILP,FBI>.
+   *    
+   * @param[in] CurMode   当前时钟模式
+   * @param[in] NewMode   要切换到的时钟模式
+   * @param[in] clkFreq     参考时钟频率
+   *       
+   * @return none
+   * @warning   FEE_OSC, FBE_OSC 不能用作当前时钟模式. 
+   *
+   *****************************************************************************/
+
+#define ICS_SwitchMode(CurMode, NewMode, clkFreq)   CurMode##_to_##NewMode(clkFreq)
+       
+ 
+/******************************************************************************
+* 定义 OSC 配置结构体
+*
+*******************************************************************************/
+typedef struct
+{
+	uint8_t bRange      : 1;        /*!< 1: 高频范围, 0: 低频范围 */
+	uint8_t bGain       : 1;        /*!< 1: 高增益, 0:低增益 */
+	uint8_t bEnable     : 1;        /*!< 1: 使能OSC, 0: 禁用OSC */
+	uint8_t bStopEnable : 1;        /*!< 1: 停止模式下OSC使能, 0: 停止模式下OSC禁用 */
+	uint8_t bIsCryst    : 1;        /*!< 1: OSC输出选择振荡器时钟, 0: OSC输出选择来自extal引脚的外部时钟 */
+	uint8_t bWaitInit   : 1;        /*!< 1: 等待振荡器初始化完成, 0: 不等待 */
+} OSC_ConfigType, *OSC_ConfigPtr;
+
+
+
+/******************************************************************************
+* 
+* ICS配置结构体
+*
+*******************************************************************************/
+typedef struct
+{
+   uint8_t    u8ClkMode;        /*!< 选择时钟模式*/
+   uint8_t    bLPEnable;        /*!< 低功耗模式下使能 */
+   uint32_t   u32ClkFreq;       /*!< 参考时钟频率 */  
+   OSC_ConfigType  oscConfig;   /*!< OSC 配置 */
+} ICS_ConfigType ;
+
+/*****************************************************************************//*!
+*
+* @brief 使能中断.
+*        
+* @param   none
+*
+* @return none
+* 
+* @see    ICS_DisableInt
+*****************************************************************************/
+__STATIC_INLINE void ICS_EnableInt(void)
+{
+    ICS->C4 |= (ICS_C4_LOLIE_MASK);    
+}
+
+/*****************************************************************************//*!
+*
+* @brief 禁用中断
+*        
+* @param   none
+*
+* @return none
+*
+* @see    ICS_EnableInt
+*****************************************************************************/
+__STATIC_INLINE void ICS_DisableInt(void)
+{
+    ICS->C4 &= ~(ICS_C4_LOLIE_MASK);    
+}
+
+/*****************************************************************************//*!
+*
+* @brief 使能时钟监控
+*        
+* @param   none
+*
+* @return none
+*
+* @see    ICS_DisableClockMonitor
+*****************************************************************************/
+__STATIC_INLINE void ICS_EnableClockMonitor(void)
+{
+    ICS->C4 |= (ICS_C4_CME_MASK);    
+}
+
+/*****************************************************************************//*!
+*
+* @brief 禁用时钟监控
+*        
+* @param   none
+*
+* @return none
+*
+* @see    ICS_EnableClockMonitor
+*****************************************************************************/
+__STATIC_INLINE void ICS_DisableClockMonitor(void)
+{
+    ICS->C4 &= ~(ICS_C4_CME_MASK);    
+}
+
+/*****************************************************************************//*!
+   *
+   * @brief 设置ICS输出时钟源分频
+   *        
+   * @param[in] busDivide   -- 分频值
+   *
+   * @return  depends on commands
+   *****************************************************************************/
+__STATIC_INLINE void ICS_SetBusDivider(uint8_t u8BusDivide)
+{
+    ICS->C2 = (ICS->C2 & ~(ICS_C2_BDIV_MASK)) | ICS_C2_BDIV(u8BusDivide);
+}
+
+
+/*****************************************************************************//*!
+*
+* @brief 使能OSC
+*        
+* @param   none
+*
+* @return none
+*
+*****************************************************************************/
+__STATIC_INLINE void OSC_Enable(void)
+{
+    OSC->CR |= (OSC_CR_OSCEN_MASK);    
+}
+
+/*****************************************************************************//*!
+*
+* @brief 禁用OSC
+*        
+* @param   none
+*
+* @return none
+*
+*****************************************************************************/
+__STATIC_INLINE void OSC_Disable(void)
+{
+    OSC->CR &= ~(OSC_CR_OSCEN_MASK);    
+}
+
+/*****************************************************************************//*!
+*
+* @brief 设置OSC模块的频率范围为低频范围
+*        
+* @param   none
+*
+* @return none
+*
+*****************************************************************************/
+__STATIC_INLINE void OSC_SetLowRange(void)
+{
+    OSC->CR &= ~(OSC_CR_RANGE_MASK);    
+}
+
+/*!***************************************************************************//*!
+FUNCTION----------------------------------------------------------------
+*
+* @brief 设置OSC模块的频率范围为高频范围
+*        
+* @param   none
+*
+* @return none
+*
+*****************************************************************************/
+__STATIC_INLINE void OSC_SetHighRange(void)
+{
+    OSC->CR |= (OSC_CR_RANGE_MASK);    
+}
+
+
+/*****************************************************************************//*!
+*
+* @brief 设置OSC的工作模式为高增益模式
+*        
+* @param   none
+*
+* @return none
+*
+*****************************************************************************/
+__STATIC_INLINE void OSC_SetHighGain(void)
+{
+    OSC->CR |= (OSC_CR_HGO_MASK);    
+}
+
+/*****************************************************************************//*!
+*
+* @brief 设置OSC的工作模式为低功耗模式
+*        
+* @param   none
+*
+* @return none
+*
+*****************************************************************************/
+__STATIC_INLINE void OSC_SetLowGain(void)
+{
+    OSC->CR &= ~(OSC_CR_HGO_MASK);    
+}
+
+/*****************************************************************************//*!
+*
+* @brief 选择OSC模块的输出时钟源为振荡器时钟源
+*        
+* @param   none
+*
+* @return none
+*
+*****************************************************************************/
+__STATIC_INLINE void OSC_SelectCrystal(void)
+{
+    OSC->CR |= (OSC_CR_OSCOS_MASK);    
+}
+
+
+/*****************************************************************************//*!
+*
+* @brief OSC输出选择来自extal引脚的外部时钟 
+*        
+* @param   none
+*
+* @return none
+*
+*****************************************************************************/
+__STATIC_INLINE void OSC_SelectClock(void)
+{
+    OSC->CR &= ~(OSC_CR_OSCOS_MASK);    
+}
+
+/*****************************************************************************//*!
+*
+* @brief 在停止模式下OSC模块使能
+*        
+* @param   none
+*
+* @return none
+*
+*****************************************************************************/
+__STATIC_INLINE void OSC_ActiveInStop(void)
+{
+    OSC->CR |= (OSC_CR_OSCSTEN_MASK);    
+}
+
+/*****************************************************************************//*!
+*
+* @brief 在停止模式下OSC模块禁用
+*        
+* @param   none
+*
+* @return none
+*
+*****************************************************************************/
+__STATIC_INLINE void OSC_InactiveInStop(void)
+{
+    OSC->CR &= ~(OSC_CR_OSCSTEN_MASK);    
+}
+
+/******************************************************************************/
+
+void ICS_Init(ICS_ConfigType *pConfig);
+void ICS_DeInit(void);
+void ICS_SetClkDivider(uint32_t u32ClkFreqKHz);
+void ICS_Trim(uint16 u16TrimValue);
+void OSC_Init(OSC_ConfigType *pConfig);
+void OSC_DeInit(void);
+
+/************** 内联函数 ******************/
+void ICS_DisableClockMonitor(void);
+void ICS_DisableInt(void);
+void ICS_EnableClockMonitor(void);
+void ICS_EnableInt(void);
+void ICS_SetBusDivider(uint8_t u8BusDivide);
+void OSC_ActiveInStop(void);
+void OSC_Enable(void);
+void OSC_Disable(void);
+void OSC_InactiveInStop(void);
+void OSC_SelectClock(void);
+void OSC_SelectCrystal(void);
+void OSC_SetHighGain(void);
+void OSC_SetHighRange(void);
+void OSC_SetLowGain(void);
+void OSC_SetLowRange(void);
+
+/* do not touch the following functions */
+void FEI_to_FEE(ICS_ConfigType *pConfig);
+void FEI_to_FBI(ICS_ConfigType *pConfig);
+void FEI_to_FBE(ICS_ConfigType *pConfig);
+void FEE_to_FBI(ICS_ConfigType *pConfig);
+void FEE_to_FEI(ICS_ConfigType *pConfig);
+void FEE_to_FBE(ICS_ConfigType *pConfig);
+void FBE_to_FEE(ICS_ConfigType *pConfig);
+void FBE_to_FEI(ICS_ConfigType *pConfig);
+void FBE_to_FBI(ICS_ConfigType *pConfig);
+void FBE_to_FBELP(ICS_ConfigType *pConfig);
+void FBI_to_FEI(ICS_ConfigType *pConfig);
+void FBI_to_FBE(ICS_ConfigType *pConfig);
+void FBI_to_FEE(ICS_ConfigType *pConfig);
+void FBI_to_FBILP(ICS_ConfigType *pConfig);
+void FBILP_to_FBI(ICS_ConfigType *pConfig);
+void FBELP_to_FBE(ICS_ConfigType *pConfig);
+void FEI_to_FBE_OSC(ICS_ConfigType *pConfig);
+void FEI_to_FEE_OSC(ICS_ConfigType *pConfig);
+#ifdef __cplusplus
+}
+#endif
+#endif 
--- a/bsp/nv32f100x/lib/inc/kbi.h
+++ b/bsp/nv32f100x/lib/inc/kbi.h
@@ -0,0 +1,428 @@
+/******************************************************************************
+**
+* @brief header file for KBI. 
+*
+*******************************************************************************
+*
+* provide APIs for accessing KBI
+******************************************************************************/
+#ifndef _KBI_H_
+#define _KBI_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+/******************************************************************************
+* Includes
+******************************************************************************/
+
+/******************************************************************************
+* Constants
+******************************************************************************/
+
+/*!
+* @brief KBI MODE select enum.
+*
+*/
+typedef enum
+{
+    KBI_MODE_EDGE_ONLY = 0,             /*!< select  edge only mode  */         
+    KBI_MODE_EDGE_LEVEL                 /*!< select  both edge and level  mode */
+}KBI_ModeType;
+
+
+ /*!
+ * @brief KBI Edge select enum.
+ *
+ */
+typedef enum
+{
+    KBI_FALLING_EDGE_LOW_LEVEL = 0,     /*!< select falling edge and/or low level  */
+    KBI_RISING_EDGE_HIGH_LEVEL          /*!< select rising edge and/or high level  */
+}KBI_EdgeType;
+
+
+/******************************************************************************
+* Macros
+******************************************************************************/
+
+/******************************************************************************
+* KBI module max number and port pins definition
+*
+*//*! @addtogroup kbi_macro
+* @{
+*******************************************************************************/
+#define KBI_MAX_NO              2                  /*!< max number of modules */
+
+#if defined(CPU_NV32)|| defined(CPU_NV32M3)
+   #define KBI_MAX_PINS_PER_PORT   8                  /*!< max number of pins */
+#elif defined(CPU_NV32M4)
+   #define KBI_MAX_PINS_PER_PORT   32                  /*!< max number of pins */
+#endif
+/*! @} End of kbi_macro                                                    */
+
+
+/******************************************************************************
+* Types
+******************************************************************************/
+
+/*! @brief KBI_CALLBACK function declaration                                  */
+typedef void (*KBI_CallbackType)(void);                     
+/*! @} End of kbi_callback                                                    */
+
+
+
+/******************************************************************************
+* KBI pin config struct
+*
+*//*! @addtogroup kbi_pinconfigstruct
+* @{
+*******************************************************************************/
+/*!
+* @brief KBI pin enable and edge select struct.
+*
+*/
+
+typedef struct
+{
+    uint8_t     bEdge   : 1;                                /*!< edge/level select bit */
+    uint8_t     bEn     : 1;                                /*!< pin enable bit */
+    uint8_t     bRsvd   : 6;                                /*!< reserved */
+} KBI_PinConfigType;
+/*! @} End of kbi_pinconfigstruct                                             */
+
+
+/******************************************************************************
+* KBI config struct
+*
+*//*! @addtogroup kbi_configstruct
+* @{
+*******************************************************************************/
+/*!
+ * @brief KBI status and control struct.
+ *
+ */
+
+typedef struct
+{
+#if defined(CPU_NV32)|| defined(CPU_NV32M3)
+    struct
+    {
+        uint8_t     bMode   : 1;                            /*!< KBI detection mode select */
+        uint8_t     bIntEn  : 1;                            /*!< KBI interrupt enable bit */
+        uint8_t     bRsvd   : 6;                            /*!< reserved */
+    } sBits;
+#elif  defined(CPU_NV32M4)
+    struct
+    {
+        uint32_t     bMode   : 1;                            /*!< KBI detection mode select */
+        uint32_t     bIntEn  : 1;                            /*!< KBI interrupt enable bit */
+        uint32_t     bRsvd2  : 2;                           /*!< reserved */
+        uint32_t     bKbspEn : 1;							  /*!<Real KBI_SP register enable*/
+		uint32_t     bRstKbsp: 1;                            /*!<Reset KBI_SP register*/
+        uint32_t     bRsvd26 : 26;                           /*!< reserved */
+    } sBits;
+#endif
+    KBI_PinConfigType   sPin[KBI_MAX_PINS_PER_PORT];
+} KBI_ConfigType, *KBI_ConfigTypePtr;
+/*! @} End of kbi_configstruct                                                */
+
+/******************************************************************************
+* Global variables
+******************************************************************************/
+/*!
+ * inline functions
+ */
+/******************************************************************************
+* KBI api list
+*
+*//*! @addtogroup kbi_api_list
+* @{
+*******************************************************************************/
+/*****************************************************************************//*!
+*
+* @brief set detect falling edge only.
+*        
+* @param[in]   pKBI          pointer to KBI module.
+* @param[in]   PinMasks      indicate pin numbers.
+*
+* @return none.
+*
+* @ Pass/ Fail criteria: none.
+*
+* @see KBI_DetectRisingEdge.
+*
+*****************************************************************************/
+#if defined(CPU_NV32)|| defined(CPU_NV32M3)
+__STATIC_INLINE  void KBI_DetectFallingEdge(KBI_Type *pKBI, uint8_t PinMasks)
+#elif defined(CPU_NV32M4)
+__STATIC_INLINE  void KBI_DetectFallingEdge(KBI_Type *pKBI, uint32_t PinMasks)
+#endif
+{
+    pKBI->SC &= ~KBI_SC_KBMOD_MASK;
+    pKBI->ES &= ~(PinMasks);
+}
+
+/*****************************************************************************//*!
+*
+* @brief set detect falling edge only.
+*        
+* @param[in]   pKBI         pointer to KBI module.
+* @param[in]   PinMasks     indicate pin numbers.
+*
+* @return none.
+*
+* @ Pass/ Fail criteria: none.
+*
+* @see KBI_DetectFallingEdge.
+*
+*****************************************************************************/
+#if defined(CPU_NV32)|| defined(CPU_NV32M3)
+__STATIC_INLINE  void KBI_DetectRisingEdge(KBI_Type *pKBI, uint8_t PinMasks)
+#elif defined(CPU_NV32M4)
+__STATIC_INLINE  void KBI_DetectRisingEdge(KBI_Type *pKBI, uint32_t PinMasks)
+#endif
+{
+    pKBI->SC &= ~KBI_SC_KBMOD_MASK;
+    pKBI->ES |= (PinMasks);    
+}
+
+/*****************************************************************************//*!
+*
+* @brief set detect falling edge only.
+*        
+* @param[in]   pKBI         pointer to KBI module.
+* @param[in]   PinMasks     indicate pin number/mask.
+*
+* @return none.
+*
+* @ Pass/ Fail criteria: none.
+*
+* @see KBI_DetectFallingEdgeLowLevel.
+*
+*****************************************************************************/
+#if defined(CPU_NV32)|| defined(CPU_NV32M3)
+__STATIC_INLINE  void KBI_DetectRisingEdgeHighLevel(KBI_Type *pKBI, uint8_t PinMasks)
+#elif defined(CPU_NV32M4)
+__STATIC_INLINE  void KBI_DetectRisingEdgeHighLevel(KBI_Type *pKBI, uint32_t PinMasks)
+#endif
+{
+    pKBI->SC |= KBI_SC_KBMOD_MASK;
+    pKBI->ES |= (PinMasks);    
+}
+
+/*****************************************************************************//*!
+*
+* @brief set detect falling edge only.
+*        
+* @param[in]   pKBI         pointer to KBI module.
+* @param[in]   PinMasks     indicate pin number/mask.
+*
+* @return none.
+*
+* @ Pass/ Fail criteria: none.
+*
+* @see KBI_DetectRisingEdgeHighLevel.
+*
+*****************************************************************************/
+#if defined(CPU_NV32)|| defined(CPU_NV32M3)
+__STATIC_INLINE  void KBI_DetectFallingEdgeLowLevel(KBI_Type *pKBI, uint8_t PinMasks)
+#elif defined(CPU_NV32M4)
+__STATIC_INLINE  void KBI_DetectFallingEdgeLowLevel(KBI_Type *pKBI, uint32_t PinMasks)
+#endif
+{
+    pKBI->SC |= KBI_SC_KBMOD_MASK;
+    pKBI->ES &= ~(PinMasks);        
+}
+
+/*****************************************************************************//*!
+*
+* @brief enable the pin specified.
+*        
+* @param[in]   pKBI         pointer to KBI module.
+* @param[in]   PinMasks     indicate pin number/mask.
+*
+* @return none.
+*
+* @ Pass/ Fail criteria: none.
+*
+* @see KBI_Disable.
+*
+*****************************************************************************/
+#if defined(CPU_NV32)|| defined(CPU_NV32M3)
+__STATIC_INLINE  void KBI_Enable(KBI_Type *pKBI, uint8_t PinMasks)
+#elif defined(CPU_NV32M4)
+__STATIC_INLINE  void KBI_Enable(KBI_Type *pKBI, uint32_t PinMasks)
+#endif
+{
+    pKBI->PE |= (PinMasks);        
+}
+
+/*****************************************************************************//*!
+*
+* @brief disable the pin specified.
+*        
+* @param[in]   pKBI         pointer to KBI module.
+* @param[in]   PinMasks     indicate pin number/mask.
+*
+* @return none.
+*
+* @ Pass/ Fail criteria: none.
+*
+* @see KBI_Enable.
+*
+*****************************************************************************/
+#if defined(CPU_NV32)|| defined(CPU_NV32M3)
+__STATIC_INLINE  void KBI_Disable(KBI_Type *pKBI, uint8_t PinMasks)
+#elif defined(CPU_NV32M4)
+__STATIC_INLINE  void KBI_Disable(KBI_Type *pKBI, uint32_t PinMasks)
+#endif
+{
+    pKBI->PE &= ~(PinMasks);        
+}
+
+/*****************************************************************************//*!
+*
+* @brief enable the corresponding interrupt.
+*        
+* @param[in]   pKBI         pointer to KBI module.
+*          
+* @return none.
+*
+* @ Pass/ Fail criteria: none.
+*
+* @see KBI_DisableInt.
+*
+*****************************************************************************/
+__STATIC_INLINE  void KBI_EnableInt(KBI_Type *pKBI)
+{
+    pKBI->SC |= KBI_SC_KBIE_MASK;        
+}
+
+
+/*****************************************************************************//*!
+*
+* @brief disable the corresponding interrupt.
+*        
+* @param[in]  pKBI         pointer to KBI module.
+*          
+* @return none.
+*
+* @ Pass/ Fail criteria: none
+*
+* @see KBI_EnableInt.
+*
+*****************************************************************************/
+__STATIC_INLINE  void KBI_DisableInt(KBI_Type *pKBI)
+{
+    pKBI->SC &= ~KBI_SC_KBIE_MASK;        
+}
+
+/*****************************************************************************//*!
+*
+* @brief Get the corresponding status flag bits.
+*        
+* @param[in]   pKBI         pointer to KBI module.
+*          
+* @return uint8_t.
+*
+* @ Pass/ Fail criteria: none.
+*
+* @see KBI_ClrFlags.
+*
+*****************************************************************************/
+#if defined(CPU_NV32)|| defined(CPU_NV32M3)
+__STATIC_INLINE  uint8_t KBI_GetFlags(KBI_Type *pKBI)
+#elif defined(CPU_NV32M4)
+__STATIC_INLINE  uint32_t KBI_GetFlags(KBI_Type *pKBI)
+#endif
+{
+    return (pKBI->SC & KBI_SC_KBF_MASK);        
+}
+
+/*****************************************************************************//*!
+*
+* @brief clear the corresponding status flag bits.
+*        
+* @param[in]   pKBI         pointer to KBI module
+*          
+* @return none.
+*
+* @ Pass/ Fail criteria: none
+*
+* @see KBI_GetFlags.
+*
+*****************************************************************************/
+__STATIC_INLINE  void KBI_ClrFlags(KBI_Type *pKBI)
+{
+    pKBI->SC |= KBI_SC_KBACK_MASK;        
+}
+
+#if defined(CPU_NV32M4)
+/*****************************************************************************//*!
+*
+* @brief Real KBI_SP register enable.
+*        
+* @param[in]   pKBI         pointer to KBI module
+*          
+* @return none.
+*
+* @ Pass/ Fail criteria: none
+*
+* @see The real ETMe value of Keyboard source pin to be read.
+*
+*****************************************************************************/
+__STATIC_INLINE  void KBI_SPEnable(KBI_Type *pKBI)
+{
+    pKBI->SC |= KBI_SC_KBSPEN_MASK;        
+}
+
+/*****************************************************************************//*!
+*
+* @brief Get KBI source pin register fields.
+*        
+* @param[in]   pKBI         pointer to KBI module.
+*          
+* @return uint32_t.
+*
+* @ Pass/ Fail criteria: none.
+*
+* @see KBI_GetSP.
+*
+*****************************************************************************/
+__STATIC_INLINE  uint32_t KBI_GetSP(KBI_Type *pKBI)
+{
+    return (pKBI->SP & KBI_SP_SP_MASK);        
+}
+
+/*****************************************************************************//*!
+*
+* @brief Reset KBI_SP register.
+*        
+* @param[in]   pKBI         pointer to KBI module
+*          
+* @return none.
+*
+* @ Pass/ Fail criteria: none
+*
+* @see KBI_RstSP.
+*
+*****************************************************************************/
+__STATIC_INLINE  void KBI_RstSP(KBI_Type *pKBI)
+{
+    pKBI->SC |= KBI_SC_RSTKBSP_MASK;        
+}
+#endif
+
+/*! @} End of kbi_api_list                                                  */
+
+/******************************************************************************
+* Global functions
+******************************************************************************/
+
+void KBI_Init(KBI_Type *pKBI, KBI_ConfigType *pConfig);
+void KBI_SetCallback(KBI_Type *pKBI, KBI_CallbackType pfnCallback);
+
+#ifdef __cplusplus
+}
+#endif
+#endif 
--- a/bsp/nv32f100x/lib/inc/pit.h
+++ b/bsp/nv32f100x/lib/inc/pit.h
@@ -0,0 +1,317 @@
+/******************************************************************************
+* @brief    Periodic Interrupt ETMer (PIT) driver head file. 
+*
+******************************************************************************/
+#ifndef PIT_H_
+#define PIT_H_
+#include"common.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+/******************************************************************************
+* Includes
+******************************************************************************/
+
+/******************************************************************************
+* Constants
+******************************************************************************/
+
+/******************************************************************************
+* PIT channel number list
+*
+*//*! @addtogroup pit_channelnumber
+* @{
+*******************************************************************************/
+enum
+{
+    PIT_CHANNEL0 = 0,       /*!< PIT channel 0 */
+    PIT_CHANNEL1            /*!< PIT channel 1 */
+};
+
+/*! @} End of pit_channelnumber                                               */
+
+/******************************************************************************
+* Macros
+******************************************************************************/
+
+/******************************************************************************
+* Types
+******************************************************************************/
+
+/*
+ * Callback type
+ */
+
+/******************************************************************************
+* PIT callback function declaration
+*
+*//*! @addtogroup pit_callback
+* @{
+*******************************************************************************/
+typedef void (*PIT_CallbackType)(void);             /*!< PIT callback type */
+
+/*! @} End of pit_callback                                                    */
+
+/* PIT configuration structure 
+ */  
+/*!
+ * @brief PIT configuration type.
+ *
+ */
+typedef struct
+{   
+    uint8_t bFreeze         : 1;    /*!< 1: stop in debug mode, 0: run in debug mode */
+    uint8_t bModuleDis      : 1;    /*!< 1: PIT module is disable, 0: PIT module is enable */    
+    uint8_t bReserved0      : 1;    /*!< reserved bit */ 
+    uint8_t bReserved1      : 5;    /*!< reserved bit */ 
+    uint8_t bETMerEn        : 1;    /*!< 1: channel ETMer is enable, 0: channel ETMer is disable */ 
+    uint8_t bInterruptEn    : 1;    /*!< 1: channel ETMer interrupt is enable, 0: channel ETMer interrupt is disable */ 
+    uint8_t bChainMode      : 1;    /*!< 1: chain mode is enable, 0: chain mode is disable */ 
+    uint8_t bReserved2      : 5;    /*!< reserved bit */ 
+    uint8_t bFlag           : 1;    /*!< 1: flag is set,and write 1 to clear flag, 0: no flag is set */
+    uint8_t bReserved3      : 7;    /*!< reserved bit */   
+    uint32_t u32LoadValue      ;    /*!< 32-bit channel load value */  
+} PIT_ConfigType, *PIT_ConfigPtr; 
+
+
+/******************************************************************************
+* Global variables
+******************************************************************************/
+
+
+/*!
+ * inline functions
+ */
+
+/******************************************************************************
+* PIT API list
+*
+*//*! @addtogroup pit_api_list
+* @{
+*******************************************************************************/
+
+/*****************************************************************************//*!
+*
+* @brief enable pit module.
+*        
+* @param   none
+*
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+__STATIC_INLINE void PIT_Enable(void)
+{
+
+    PIT->MCR &= ~PIT_MCR_MDIS_MASK; 
+    
+}
+
+
+/*****************************************************************************//*!
+*
+* @brief disable pit module.
+*        
+* @param   none
+*
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+__STATIC_INLINE void PIT_Disable(void)
+{
+
+    PIT->MCR |= PIT_MCR_MDIS_MASK; 
+}
+
+
+/*****************************************************************************//*!
+*
+* @brief pit ETMers are stopped in debug mode.
+*        
+* @param  none
+*
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+__STATIC_INLINE void PIT_SetDebugFreeze(void)
+{
+
+    PIT->MCR |= PIT_MCR_FRZ_MASK;
+}
+
+
+/*****************************************************************************//*!
+*
+* @brief pit ETMers are running in debug mode.
+*        
+* @param  none
+*
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+__STATIC_INLINE void PIT_SetDebugOn(void)
+{
+
+    PIT->MCR &= ~PIT_MCR_FRZ_MASK;
+}
+
+
+/*****************************************************************************//*!
+*
+* @brief enable pit channel ETMer.
+*        
+* @param[in]   u8Channel.
+*
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+__STATIC_INLINE void PIT_ChannelEnable(uint8_t u8Channel)
+
+{
+
+    PIT->CHANNEL[u8Channel].TCTRL |= PIT_TCTRL_TEN_MASK; 
+}
+
+
+/*****************************************************************************//*!
+*
+* @brief disable pit channel ETMer.
+*        
+* @param[in]   u8Channel.
+*
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+__STATIC_INLINE void PIT_ChannelDisable(uint8_t u8Channel)
+{
+
+    PIT->CHANNEL[u8Channel].TCTRL &= ~PIT_TCTRL_TEN_MASK; 
+}
+
+
+/*****************************************************************************//*!
+*
+* @brief enable pit channel ETMer interrupt.
+*        
+* @param[in]  u8Channel.
+*
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+__STATIC_INLINE void PIT_ChannelEnableInt(uint8_t u8Channel)
+
+{
+
+    PIT->CHANNEL[u8Channel].TCTRL |= PIT_TCTRL_TIE_MASK; 
+}
+
+
+/*****************************************************************************//*!
+*
+* @brief disable pit channel ETMer interrupt .
+*        
+* @param[in]   u8Channel.
+*
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+__STATIC_INLINE void PIT_ChannelDisableInt(uint8_t u8Channel)
+
+{
+
+    PIT->CHANNEL[u8Channel].TCTRL &= ~PIT_TCTRL_TIE_MASK; 
+}
+
+
+/*****************************************************************************//*!
+*
+* @brief  enable pit channel ETMer chain mode.
+*        
+* @param[in]   u8Channel.
+*
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+__STATIC_INLINE void PIT_ChannelEnableChain(uint8_t u8Channel)
+{
+    PIT->CHANNEL[u8Channel].TCTRL |= PIT_TCTRL_CHN_MASK;
+}
+
+
+/*****************************************************************************//*!
+*
+* @brief  disable pit channel ETMer chain mode.
+*        
+* @param[in]   u8Channel.
+*
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+__STATIC_INLINE void PIT_ChannelDisableChain(uint8_t u8Channel)
+
+{
+    PIT->CHANNEL[u8Channel].TCTRL &= ~PIT_TCTRL_CHN_MASK;
+}
+
+
+/*****************************************************************************//*!
+*
+* @brief get pit channel ETMer interrrupt flag.
+*        
+* @param[in]   u8Channel.
+*
+* @return bflag.
+*
+* @ Pass/ Fail criteria: none
+
+*****************************************************************************/
+__STATIC_INLINE uint8_t PIT_ChannelGetFlags(uint8_t u8Channel)
+
+{
+    uint8_t bflag;  
+    
+    bflag = (PIT->CHANNEL[u8Channel].TFLG & PIT_TFLG_TIF_MASK);    
+    
+    return bflag;
+    
+}
+
+
+/*****************************************************************************//*!
+*
+* @brief clear pit channel ETMer interrrupt flag.
+*        
+* @param[in] u8Channel
+*
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+__STATIC_INLINE void PIT_ChannelClrFlags(uint8_t u8Channel)
+{
+    PIT->CHANNEL[u8Channel].TFLG |= PIT_TFLG_TIF_MASK;       
+}
+
+
+/******************************************************************************
+* Global functions
+******************************************************************************/
+void PIT_Init(uint8_t u8Channel_No, PIT_ConfigType *pConfig);
+void PIT_SetLoadVal(uint8_t u8Channel, uint32_t u32loadvalue);
+void PIT_SetCallback(uint8_t u8Channel_No, PIT_CallbackType pfnCallback);
+void PIT_DeInit(void);
+/*! @} End of pit_api_list                                                   */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* PIT_H_ */
--- a/bsp/nv32f100x/lib/inc/pmc.h
+++ b/bsp/nv32f100x/lib/inc/pmc.h
@@ -0,0 +1,373 @@
+/******************************************************************************
+*
+* @brief header file for PMC. 
+*
+*******************************************************************************
+*
+* provide APIs for accessing PMC
+******************************************************************************/
+#ifndef PMC_H_
+#define PMC_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/******************************************************************************
+* Includes
+******************************************************************************/
+
+/******************************************************************************
+* Macros
+******************************************************************************/
+/******************************************************************************
+* PMC system mode definition
+*
+*//*! @addtogroup pmc_sysmode
+* @{
+*******************************************************************************/
+#define PmcModeRun     0                     /*!< run mode */
+#define PmcModeWait    1                     /*!< wait mode */
+#define PmcModeStop4   2                     /*!< stop4 mode */
+#define PmcModeStop3   3                     /*!< stop3 mode */
+/*! @} End of pmc_sysmode                                                     */
+
+/******************************************************************************
+* PMC LVD and LVW voltage definition
+*
+*//*! @addtogroup pmc_voltageselect
+* @{
+*******************************************************************************/
+#define PmcLVDTrip_Low   0                    /*!< LVD low trip point */
+#define PmcLVDTrip_High  1                     /*!< LVD high trip point  */
+
+#define PmcLVWTrip_Low   0                     /*!< LVW low trip point */
+#define PmcLVWTrip_Mid1  1                     /*!< LVW mid1 trip point */
+#define PmcLVWTrip_Mid2  2                     /*!< LVW mid2 trip point */
+#define PmcLVWTrip_High  3                     /*!< LVW high trip point */
+/*! @} End of pmc_voltageselect                                               */
+
+
+/******************************************************************************
+* Types
+******************************************************************************/
+
+/******************************************************************************
+* PMC control  struct
+*
+*//*! @addtogroup pmc_ctrlstruct
+* @{
+*******************************************************************************/
+/*!
+ * @brief PMC Control Structure Type.
+ *
+ */
+
+typedef union 
+{
+   uint8_t byte;						  /*!< byte field of union type */
+   struct 
+   {     
+       uint8_t bBandgapEn        :1;      /*!< bandgap enable */
+       uint8_t bBandgapDrv       :1;      /*!< bandgap drive select */
+       uint8_t bLvdEn            :1;      /*!< LVD enable */
+       uint8_t bLvdStopEn        :1;      /*!< LVD enable in stop mode */
+       uint8_t bLvdRstEn         :1;      /*!< reset enable when VLD evvent */
+       uint8_t bLvwIrqEn         :1;      /*!< LVW int enable */
+       uint8_t bLvwAck           :1;      /*!< LVW acknowledge */
+       uint8_t bLvwFlag          :1;      /*!< LVW flag */
+   }bits; 								  /*!< bitfield of union type */
+}PMC_Ctrl1Type, *PMC_Ctrl1Ptr;		  /*!< PMC control1 reg structure */
+/*! @} End of pmc_ctrlstruct                                                  */
+
+/******************************************************************************
+* PMC control-- voltage select type.
+*
+*//*! @addtogroup pmc_voltselectstruct
+* @{
+*******************************************************************************/
+/*!
+ * @brief PMC control-- voltage select type.
+ *
+ */
+typedef union 
+{
+   uint8_t byte;						   /*!< byte field of union type */
+   struct 
+   {     
+       uint8_t           :4;               /*!< none */  
+       uint8_t bLVWV     :2;               /*!< LVW voltage select */  
+       uint8_t bLVDV     :1;               /*!< LVD voltage select */  
+       uint8_t           :1;               /*!< none */                 
+   }bits;  								   /*!< bitfield of union type */
+}PMC_Ctrl2Type, *PMC_Ctrl2Ptr;		   /*!< PMC control2 reg structure */
+/*! @} End of pmc_voltselectstruct                                            */
+
+/******************************************************************************
+* PMC configrue type.
+*
+*//*! @addtogroup pmc_configstruct
+* @{
+*******************************************************************************/
+/*!
+ * @brief PMC configrue type.
+ *
+ */
+
+typedef struct 
+{
+    PMC_Ctrl1Type    sCtrlstatus;          /*!< PMC control and status */  
+    PMC_Ctrl2Type    sDetectVoltSelect;    /*!< LVW and LVW voltage select */  
+}PMC_ConfigType, *PMC_ConfigPtr;		   /*!< PMC configuration structure */
+/*! @} End of pmc_configstruct                                            */  
+
+
+
+/******************************************************************************
+* Global variables
+******************************************************************************/
+
+/*!
+ * inline functions
+ */
+/******************************************************************************
+* PMC api list.
+*
+*//*! @addtogroup pmc_api_list
+* @{
+*******************************************************************************/
+/*****************************************************************************//*!
+*
+* @brief  enable LVD events during stop mode.
+* 
+* @param[in]  pPMC              pointer to the PMC module.
+*
+* @return none.
+*
+* @ Pass/ Fail criteria: none.
+*
+* @see PMC_DisableLVDInStopMode.
+*
+*****************************************************************************/
+__STATIC_INLINE void PMC_EnableLVDInStopMode(PMC_Type *pPMC)
+{
+    pPMC->SPMSC1 |= PMC_SPMSC1_LVDSE_MASK;
+}
+
+/*****************************************************************************//*!
+*
+* @brief  disable LVD events during stop mode.
+* 
+* @param[in]  pPMC              pointer to the PMC module.
+*
+* @return none.
+*
+* @ Pass/ Fail criteria: none.
+*
+* @see PMC_EnableLVDInStopMode.
+*
+*****************************************************************************/
+__STATIC_INLINE void PMC_DisableLVDInStopMode(PMC_Type *pPMC)
+{
+    pPMC->SPMSC1 &= ~PMC_SPMSC1_LVDSE_MASK;
+}
+
+/*****************************************************************************//*!
+*
+* @brief  enable LVD events to generate a hardware reset,  note: write once.
+* 
+* @param[in]  pPMC              pointer to the PMC module.
+*
+* @return none.
+*
+* @ Pass/ Fail criteria: none.
+*
+* @see PMC_DisableLVDRst.
+*
+*****************************************************************************/
+__STATIC_INLINE void PMC_EnableLVDRst(PMC_Type *pPMC)
+{
+    pPMC->SPMSC1 |= PMC_SPMSC1_LVDRE_MASK;
+}
+
+/*****************************************************************************//*!
+*
+* @brief  disable LVD events to generate a hardware reset,  note: write once.
+* 
+* @param[in]  pPMC              pointer to the PMC module.
+*
+* @return none.
+*
+* @ Pass/ Fail criteria: none.
+*
+* @see PMC_EnableLVDRst.
+*
+*****************************************************************************/
+__STATIC_INLINE void PMC_DisableLVDRst(PMC_Type *pPMC)
+{
+    pPMC->SPMSC1 &= ~PMC_SPMSC1_LVDRE_MASK;
+}
+
+/*****************************************************************************//*!
+*
+* @brief  enable low-voltage detect logic,  note: write once.
+* 
+* @param[in]  pPMC              pointer to the PMC module.
+*
+* @return none.
+*
+* @ Pass/ Fail criteria: none.
+*
+* @see PMC_DisableLVD.
+*
+*****************************************************************************/
+__STATIC_INLINE void PMC_EnableLVD(PMC_Type *pPMC)
+{
+    pPMC->SPMSC1 |= PMC_SPMSC1_LVDE_MASK;
+}
+
+/*****************************************************************************//*!
+*
+* @brief  disable low-voltage detect logic,  note: write once
+* 
+* @param[in]  pPMC              pointer to the PMC module.
+*
+* @return none.
+*
+* @ Pass/ Fail criteria: none
+*
+* @see PMC_EnableLVD.
+*
+*****************************************************************************/
+__STATIC_INLINE void PMC_DisableLVD(PMC_Type *pPMC)
+{
+    pPMC->SPMSC1 &= ~PMC_SPMSC1_LVDE_MASK;
+}
+
+/*****************************************************************************//*!
+*
+* @brief  set the low-voltage detect trip point voltage, note: write once.
+* 
+* @param[in]  pPMC              pointer to the PMC module.
+* @param[in]  Trippoint         LVD trip point voltage,0~1.
+*
+* @return none.
+*
+* @ Pass/ Fail criteria: none.
+*
+* @see PMC_SetLVWTripVolt.
+*
+*****************************************************************************/
+__STATIC_INLINE void PMC_SetLVDTripVolt(PMC_Type *pPMC, uint8_t Trippoint)
+{
+    if(Trippoint)
+        pPMC->SPMSC2 |= PMC_SPMSC2_LVDV_MASK;
+    else
+        pPMC->SPMSC2 &= ~PMC_SPMSC2_LVDV_MASK;
+}
+
+/*****************************************************************************//*!
+*
+* @brief  set the low-voltage warning (LVW) trip point voltage.
+* 
+* @param[in]  pPMC              pointer to the PMC module.
+* @param[in]  Trippoint         LVW trip point voltage,0~3.
+*
+* @return none.
+*
+* @ Pass/ Fail criteria: none.
+*
+* @see PMC_SetLVDTripVolt.
+*
+*****************************************************************************/
+__STATIC_INLINE void PMC_SetLVWTripVolt(PMC_Type *pPMC, uint8_t Trippoint)
+{
+    pPMC->SPMSC2 &= ~PMC_SPMSC2_LVWV_MASK;
+    pPMC->SPMSC2 |= PMC_SPMSC2_LVWV(Trippoint);
+}
+
+/*****************************************************************************//*!
+*
+* @brief  Enable hardware interrupt requests for LVWF.
+* 
+* @param[in]  pPMC              pointer to the PMC module.
+*
+* @return none.
+*
+* @ Pass/ Fail criteria: none.
+*
+* @see PMC_DisableLVWInterrupt.
+*
+*****************************************************************************/
+__STATIC_INLINE void PMC_EnableLVWInterrupt(PMC_Type *pPMC)
+{
+   pPMC->SPMSC1 |= PMC_SPMSC1_LVWIE_MASK;
+}
+
+/*****************************************************************************//*!
+*
+* @brief  Disable hardware interrupt requests for LVWF.
+* 
+* @param[in]  pPMC              pointer to the PMC module.
+*
+* @return none.
+*
+* @ Pass/ Fail criteria: none.
+*
+* @see PMC_EnableLVWInterrupt.
+*
+*****************************************************************************/
+__STATIC_INLINE void PMC_DisableLVWInterrupt(PMC_Type *pPMC)
+{
+   pPMC->SPMSC1 &= ~PMC_SPMSC1_LVWIE_MASK;
+}
+
+/*****************************************************************************//*!
+*
+* @brief  get the lvw warning flag.
+* 
+* @param[in]  pPMC              pointer to the PMC module.
+*
+* @return uint8_t lvw warning flag.
+*
+* @ Pass/ Fail criteria: none.
+*
+* @see PMC_ClrLVWFlag.
+*
+*****************************************************************************/
+__STATIC_INLINE uint8_t PMC_GetLVWFlag(PMC_Type *pPMC)
+{
+   return (pPMC->SPMSC1 & PMC_SPMSC1_LVWF_MASK);
+}
+
+/*****************************************************************************//*!
+*
+* @brief  clear the lvw warning flag.
+* 
+* @param[in]  pPMC              pointer to the PMC module.
+*
+* @return none.
+*
+* @ Pass/ Fail criteria: none.
+*
+* @see PMC_GetLVWFlag.
+*
+*****************************************************************************/
+__STATIC_INLINE void PMC_ClrLVWFlag(PMC_Type *pPMC)
+{
+   pPMC->SPMSC1 |= PMC_SPMSC1_LVWACK_MASK;
+}
+
+/*! @} End of pmc_api_list                                                    */
+
+/******************************************************************************
+* Global functions
+******************************************************************************/
+
+void PMC_Init(PMC_Type *pPMC, PMC_ConfigType *pPMC_Config);
+void PMC_DeInit(PMC_Type *pPMC);
+void PMC_SetMode(PMC_Type *pPMC,uint8_t u8PmcMode);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* PMC_H_ */
--- a/bsp/nv32f100x/lib/inc/rtc.h
+++ b/bsp/nv32f100x/lib/inc/rtc.h
@@ -0,0 +1,224 @@
+/******************************************************************************
+*
+* @brief    Real-ETMe counter (RTC) driver head file.  
+*
+******************************************************************************/
+#ifndef RTC_H_
+#define RTC_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+/******************************************************************************
+* Includes
+******************************************************************************/
+
+/******************************************************************************
+* Constants
+******************************************************************************/
+
+/******************************************************************************
+* Macros
+******************************************************************************/
+
+/******************************************************************************
+* RTC control bit definition
+*
+*//*! @addtogroup rtc_controlbit
+* @{
+*******************************************************************************/
+
+#define RTC_OUTPUT_ENABLE           1	/*!< enable RTCO pin  */ 
+#define RTC_INTERRUPT_ENABLE        1	/*!< enable RTC interrupt  */ 
+#define RTC_CLKSRC_EXTERNAL         0	/*!< select external clock as RTC clock source  */
+#define RTC_CLKSRC_1KHZ             1	/*!< select LPO as RTC clock source  */
+#define RTC_CLKSRC_IREF             2	/*!< select internal reference clock as RTC clock source  */
+#define RTC_CLKSRC_BUS              3	/*!< select bus clock as RTC clock source  */
+#define RTC_CLK_PRESCALER_128       1	/*!< presalcer is 1 or 128 according to RTCLKS bits */
+#define RTC_CLK_PRESCALER_256       2	/*!< presalcer is 2 or 256 according to RTCLKS bits */
+#define RTC_CLK_PRESCALER_512       3	/*!< presalcer is 4 or 512 according to RTCLKS bits */
+#define RTC_CLK_PRESCALER_1024      4	/*!< presalcer is 8 or 1024 according to RTCLKS bits */
+#define RTC_CLK_PRESCALER_2048      5	/*!< presalcer is 16 or 2048 according to RTCLKS bits */
+#define RTC_CLK_PRESCALER_100       6	/*!< presalcer is 32 or 100 according to RTCLKS bits */
+#define RTC_CLK_PRESCALER_1000      7	/*!< presalcer is 64 or 1000 according to RTCLKS bits */
+
+
+/*! @} End of rtc_controlbit                                                  */
+
+/******************************************************************************
+* Types
+******************************************************************************/
+
+/*
+ * Callback type
+ */
+
+/******************************************************************************
+* RTC callback function declaration
+*
+*//*! @addtogroup rtc_callback
+* @{
+*******************************************************************************/
+
+/*!
+ * @brief RTC Callback type.
+ *
+ */
+
+typedef void (*RTC_CallbackType)(void);
+
+/*! @} End of rtc_callback                                                    */
+
+
+/* RTC configuration structure 
+ */  
+/*!
+ * @brief RTC configuration type.
+ *
+ */
+typedef struct
+{   
+    uint16_t bReserved                  : 4;    /*!< reserved */     
+    uint16_t bRTCOut                    : 1;    /*!< 1: RTCO pin is enable, 0: RTCO pin is disable */
+    uint16_t bReserved1                 : 1;    /*!< reserved */ 
+    uint16_t bInterruptEn               : 1;    /*!< 1: RTC interrupt is enable, 0: RTC interrupt is disable */
+    uint16_t bFlag                      : 1;    /*!< 1: RTC flag is set, 0: RTC flag is not set */   
+    uint16_t bClockPresaler             : 3;    /*!< 1: RTC presclaer, from 0x0 to 0x7 */    
+    uint16_t bReserved2                 : 3;    /*!< reserved */ 
+    uint16_t bClockSource               : 2;    /*!< RTC clock source selection from 0x0 to 0x3 */
+    uint16_t u16ModuloValue                ;    /*!< 16-bit rtc modulo value */
+} RTC_ConfigType, *RTC_ConfigPtr; 
+
+
+/******************************************************************************
+* Global variables
+******************************************************************************/
+
+/*!
+ * inline functions
+ */
+
+/******************************************************************************
+* RTC API list
+*
+*//*! @addtogroup rtc_api_list
+* @{
+*******************************************************************************/
+
+/*****************************************************************************//*!
+*
+* @brief enable rtc interrupt.
+*        
+* @param   none
+*
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+__STATIC_INLINE void RTC_EnableInt(void)
+{
+    RTC->SC |= RTC_SC_RTIE_MASK;
+}
+
+
+/*****************************************************************************//*!
+*
+* @brief disable rtc interrupt.
+*        
+* @param   none
+*
+* @return non
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+__STATIC_INLINE void RTC_DisableInt(void)
+{
+    RTC->SC &= ~RTC_SC_RTIE_MASK;
+}
+
+
+/*****************************************************************************//*!
+*
+* @brief set rtc modulo value.
+*        
+* @param[in]   u16Mod_Value
+*
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+__STATIC_INLINE void RTC_SetModulo(uint16_t u16Mod_Value)
+{
+ 
+    RTC->MOD = u16Mod_Value;
+}
+
+/*****************************************************************************//*!
+*
+* @brief set rtc clock source and presalcer.
+*        
+* @param[in]   u16Clock_Number clock source number
+* @param[in]   u16Presalcer prescaler value
+*
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+__STATIC_INLINE void RTC_SetClock(uint16_t u16Clock_Number, uint16_t u16Presalcer)
+{
+    uint32_t u32rtc_sc;
+        
+    u32rtc_sc  = RTC->SC; 
+    u32rtc_sc &= ~(RTC_SC_RTCLKS_MASK | RTC_SC_RTCPS_MASK);
+    u32rtc_sc |= RTC_SC_RTCLKS(u16Clock_Number) | RTC_SC_RTCPS(u16Presalcer); 
+    RTC->SC   = u32rtc_sc;
+}
+
+/*****************************************************************************//*!
+*
+* @brief get rtc flag bit.
+*        
+* @param  none 
+*
+* @return bflag.
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+__STATIC_INLINE uint8_t RTC_GetFlags(void)
+{
+  uint8_t bflag;
+  
+  bflag = RTC->SC & RTC_SC_RTIF_MASK; 
+  
+  return bflag;  
+}
+
+
+/*****************************************************************************//*!
+*
+* @brief clear rtc flag bit.
+*        
+* @param  none 
+*
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+__STATIC_INLINE void RTC_ClrFlags(void)
+{
+    RTC->SC |= RTC_SC_RTIF_MASK; 
+}
+
+
+/******************************************************************************
+* Global functions
+******************************************************************************/
+void RTC_Init(RTC_ConfigType *pConfig);
+void RTC_SetCallback(RTC_CallbackType pfnCallback);
+void RTC_DeInit(void);
+
+/*! @} End of rtc_api_list                                                   */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* RTC_H_ */
--- a/bsp/nv32f100x/lib/inc/sim.h
+++ b/bsp/nv32f100x/lib/inc/sim.h
--- a/bsp/nv32f100x/lib/inc/spi.h
+++ b/bsp/nv32f100x/lib/inc/spi.h
--- a/bsp/nv32f100x/lib/inc/uart.h
+++ b/bsp/nv32f100x/lib/inc/uart.h
@@ -0,0 +1,496 @@
+/******************************************************************************
+*
+* @brief provide commond UART utilities. 
+*
+*******************************************************************************/
+#ifndef _UART_H_
+#define _UART_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/******************************************************************************
+* Includes
+******************************************************************************/
+#include "common.h"
+#include "wdog.h"
+/******************************************************************************
+* Constants
+******************************************************************************/
+
+/******************************************************************************
+* Macros
+******************************************************************************/
+#define MAX_UART_NO             3
+
+/******************************************************************************
+* Types
+******************************************************************************/
+
+/******************************************************************************
+*define uart setting type
+*
+*//*! @addtogroup uart_setting_type
+* @{
+*******************************************************************************/  
+
+/*!
+* @brief UART setting type.
+*
+*/ 
+
+typedef struct
+{
+    uint32_t bEnable      : 1;                /*!< 1: enable, 0: disable */
+    uint32_t resvd        : 31;               /*!< 1: reserved bit field */
+} UART_SettingType;
+/*! @} End of uart_setting_type */
+
+/******************************************************************************
+*define uart config type
+*
+*//*! @addtogroup uart_config_type
+* @{
+******************************************************************************/
+ /*!
+ * @brief UART Configuration structure.
+ *
+ */   
+typedef struct 
+{
+    UART_SettingType    sSettings;              /*!< UART settings */
+    uint32_t    u32SysClkHz;        /*!< system clock */
+    uint32_t    u32Baudrate;        /*!< UART baudrate */
+} UART_ConfigType;
+/*! @} End of uart_config_type  */
+
+/******************************************************************************
+*define uart config baudrate type
+*
+*//*! @addtogroup uart_config_baudrate_type
+* @{
+******************************************************************************/
+ /*!
+ * @brief UART baudrate type structure.
+ *
+ */   
+typedef struct
+{
+    uint32_t    u32SysClkHz;        /*!< system clock */
+    uint32_t    u32Baudrate;        /*!< UART baudrate */
+} UART_ConfigBaudrateType;
+/*! @} End of uart_config_baudrate_type */
+
+/******************************************************************************
+*define uart config mode type list
+*
+*//*! @addtogroup uart_mode_type_list
+* @{
+******************************************************************************/
+typedef enum
+{
+    UART_Mode8Bit,                  /*!< 8 bit mode */
+    UART_Mode9Bit,                  /*!< 9 bit mode */
+    UART_ModeEnableLoopback,        /*!< enable looback mode */
+    UART_ModeDisableLoopback,       /*!< disable loopback mode*/
+    UART_ModeEnableSingleWire,      /*!< enable single wire mode */
+    UART_ModeDisableSingleWire,     /*!< disable single wire mode */
+} UART_ModeType;
+/*! @} End of uart_mode_type_list   */
+
+/******************************************************************************
+*define uart interrupt type list
+*
+*//*! @addtogroup uart_interrupt_type_list
+* @{
+******************************************************************************/
+
+typedef enum
+{
+    UART_TxBuffEmptyInt,            /*!< transmit buffer empty interrupt */
+    UART_TxCompleteInt,             /*!< transmit complete interrupt */
+    UART_RxBuffFullInt,             /*!< receive buffer full interrupt */
+
+    UART_IdleLineInt,               /*!< idle line interrupt */
+
+    UART_RxOverrunInt,              /*!< receive overrun interrupt */
+    UART_NoiseErrorInt,             /*!< noise error interrupt */
+    UART_FramingErrorInt,           /*!< framing error interrupt */
+    UART_ParityErrorInt,            /*!< parity error interrupt */
+} UART_InterruptType;
+/*! @} End of uart_interrupt_type_list  */
+
+/******************************************************************************
+*define uart flag type list
+*
+*//*! @addtogroup uart_flag_type_list
+* @{
+******************************************************************************/
+typedef enum
+{
+    UART_FlagPF = 0,        /*!< Parity error flag */
+    UART_FlagFE,            /*!< Framing error flag */
+    UART_FlagNF,            /*!< Noise flag */
+    UART_FlagOR,            /*!< Receive overrun */
+    UART_FlagIDLE,          /*!< Idle line flag */
+    UART_FlagRDRF,          /*!< Receive data register full flag */
+    UART_FlagTC,            /*!< Transmission complete flag */
+    UART_FlagTDRE,          /*!< Transmit data register flag */
+
+    UART_FlagRAF,           /*!< Receiver active flag */
+    UART_FlagLBKDE,         /*!< LIN break detection enable */
+    UART_FlagBRK13,         /*!< Break character generation length */ 
+    UART_FlagRWUID,         /*!< Receive wake up idle detect */
+    UART_FlagRXINV,         /*!< Receive data inversion */
+    UART_FlagRev1,          /*!< Reserved */
+    UART_FlagRXEDGIF,       /*!< RxD pin active edge interrupt flag */
+    UART_FlagLBKDIF,        /*!< LIN break detect interrupt flag */
+} UART_FlagType;
+/*! @} End of uart_flag_type_list   */
+
+/* callback types */
+typedef void (*UART_CallbackType)(UART_Type *pUART);
+
+/******************************************************************************
+* Global variables
+******************************************************************************/
+
+/******************************************************************************
+* Inline functions
+******************************************************************************/
+
+/******************************************************************************
+* define UART APIs
+*
+*//*! @addtogroup uart_api_list
+* @{
+*******************************************************************************/
+
+/*****************************************************************************//*!
+*
+* @brief read receive buffer
+*        
+* @param[in] pUART       base of UART port
+*
+* @return unsign char received char
+*
+*****************************************************************************/
+__STATIC_INLINE uint8_t UART_ReadDataReg(UART_Type *pUART)
+{
+    /* Return the 8-bit data from the receiver */
+    return pUART->D;
+}
+/*****************************************************************************//*!
+*
+* @brief write transmit buffer
+*        
+* @param[in] pUART       base of UART port
+* @param[in] u8Char      char to send
+*
+* @return none
+*
+*****************************************************************************/
+__STATIC_INLINE void UART_WriteDataReg(UART_Type *pUART, uint8_t u8Char)
+{
+    /* Send the character */
+    pUART->D = (uint8_t)u8Char;
+}
+
+/*****************************************************************************//*!
+*
+* @brief check if a character has been received
+*
+* @param[in] pUART  base of UART port
+*
+* @return 0, No character received; no-zero, Character has been received
+*
+* @ Pass/ Fail criteria:
+*****************************************************************************/
+__STATIC_INLINE uint8_t UART_CharPresent(UART_Type *pUART)
+{  
+    return (pUART->S1 & UART_S1_RDRF_MASK);
+}
+/*****************************************************************************//*!
+*
+* @brief enable transmit
+*        
+* @param[in] pUART       base of UART port
+*
+* @return none
+*
+*****************************************************************************/
+__STATIC_INLINE void UART_EnableTx(UART_Type *pUART)
+{
+    
+    pUART->C2 |= UART_C2_TE_MASK;
+}
+/*****************************************************************************//*!
+*
+* @brief disable transmit
+*        
+* @param[in] pUART       base of UART port
+*
+* @return none
+*
+*****************************************************************************/
+__STATIC_INLINE void UART_DisableTx(UART_Type *pUART)
+{    
+    pUART->C2 &= (~UART_C2_TE_MASK);
+}
+/*****************************************************************************//*!
+*
+* @brief enable receive
+*        
+* @param[in] pUART       base of UART port
+*
+* @return none
+*
+*****************************************************************************/
+__STATIC_INLINE void UART_EnableRx(UART_Type *pUART)
+{    
+    pUART->C2 |= UART_C2_RE_MASK;
+}
+/*****************************************************************************//*!
+*
+* @brief disable receive
+*        
+* @param[in] pUART       base of UART port
+*
+* @return none
+*
+*****************************************************************************/
+__STATIC_INLINE void UART_DisableRx(UART_Type *pUART)
+{    
+    pUART->C2 &= (~UART_C2_RE_MASK);
+}
+/*****************************************************************************//*!
+*
+* @brief Enable loopback mode
+*        
+* @param[in] pUART       base of UART port
+*
+* @return none
+*
+*****************************************************************************/
+__STATIC_INLINE void UART_EnableLoopback(UART_Type *pUART)
+{
+    pUART->C1 |= UART_C1_LOOPS_MASK;
+    pUART->C1 &= (~UART_C1_RSRC_MASK);
+}
+/*****************************************************************************//*!
+*
+* @brief enable single wire mode
+*        
+* @param[in] pUART       base of UART port
+*
+* @return none
+*
+*****************************************************************************/
+__STATIC_INLINE void UART_EnableSingleWire(UART_Type *pUART)
+{
+    pUART->C1 |= UART_C1_LOOPS_MASK;
+    pUART->C1 |= UART_C1_RSRC_MASK;
+}
+/*****************************************************************************//*!
+*
+* @brief set 8-bit mode
+*        
+* @param[in] pUART       base of UART port
+*
+* @return none
+*
+*****************************************************************************/
+__STATIC_INLINE void UART_Set8BitMode(UART_Type *pUART)
+{
+    pUART->C1 &= (~UART_C1_M_MASK);
+}
+/*****************************************************************************//*!
+*
+* @brief set 9-bit mode
+*        
+* @param[in] pUART       base of UART port
+*
+* @return none
+*
+*****************************************************************************/
+__STATIC_INLINE void UART_Set9BitMode(UART_Type *pUART)
+{
+    pUART->C1 |= UART_C1_M_MASK;
+}
+/*****************************************************************************//*!
+*
+* @brief enable transmit buffer empty interrupt
+*        
+* @param[in] pUART       base of UART port
+*
+* @return none
+*
+* @ Pass/ Fail criteria:
+*****************************************************************************/
+__STATIC_INLINE void UART_EnableTxBuffEmptyInt(UART_Type *pUART)
+{
+    pUART->C2 |= UART_C2_TIE_MASK;
+}
+/*****************************************************************************//*!
+*
+* @brief enable transmit complete interrupt
+*        
+* @param[in] pUART       base of UART port
+*
+* @return none
+*
+* @ Pass/ Fail criteria:
+*****************************************************************************/
+__STATIC_INLINE void UART_EnableTxCompleteInt(UART_Type *pUART)
+{
+    pUART->C2 |= UART_C2_TCIE_MASK;
+}
+/*****************************************************************************//*!
+*
+* @brief enable receive buffer full interrupt
+*        
+* @param[in] pUART       base of UART port
+*
+* @return none
+*
+* @ Pass/ Fail criteria:
+*****************************************************************************/
+__STATIC_INLINE void UART_EnableRxBuffFullInt(UART_Type *pUART)
+{
+    pUART->C2 |= UART_C2_RIE_MASK;
+}
+/*****************************************************************************//*!
+*
+* @brief disable transmit buffer empty interrupt
+*        
+* @param[in] pUART       base of UART port
+*
+* @return none
+*
+* @ Pass/ Fail criteria:
+*****************************************************************************/
+__STATIC_INLINE void UART_DisableTxBuffEmptyInt(UART_Type *pUART)
+{
+        pUART->C2 &= (~UART_C2_TIE_MASK);    
+}
+/*****************************************************************************//*!
+*
+* @brief disable transmit complete interrupt
+*        
+* @param[in] pUART       base of UART port
+*
+* @return none
+*
+* @ Pass/ Fail criteria:
+*****************************************************************************/
+__STATIC_INLINE void UART_DisableTxCompleteInt(UART_Type *pUART)
+{
+    pUART->C2 &= (~UART_C2_TCIE_MASK);   
+}
+/*****************************************************************************//*!
+*
+* @brief disable receive buffer full interrupt
+*        
+* @param[in] pUART       base of UART port
+*
+* @return none
+*
+* @ Pass/ Fail criteria:
+*****************************************************************************/
+__STATIC_INLINE void UART_DisableRxBuffFullInt(UART_Type *pUART)
+{
+    pUART->C2 &= (~UART_C2_RIE_MASK);  
+}
+/*****************************************************************************//*!
+*
+* @brief print out break character
+*        
+* @param[in] pUART  base of UART port
+*
+* @return       none
+*
+* @ Pass/ Fail criteria:
+*****************************************************************************/
+__STATIC_INLINE void UART_PutBreak(UART_Type *pUART)
+{
+    /* Write 1 then write 0 to UART_C2[SBK] bit, will put break character */
+    pUART->C2 |= UART_C2_SBK_MASK; 
+    pUART->C2 &= (~UART_C2_SBK_MASK);
+}
+
+/*****************************************************************************//*!
+*
+* @brief check whether tx is complete,i.e. data has been sent out.
+*        
+* @param[in] pUART  base of UART port
+*
+* @return       
+*               1, Tx complete flag is set
+*               0, Tx complete flag is clear
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+__STATIC_INLINE uint8_t UART_IsTxComplete(UART_Type *pUART)
+{
+    return (pUART->S1 & UART_S1_TC_MASK);
+}
+/*****************************************************************************//*!
+*
+* @brief check whether Tx buffer is empty
+*        
+* @param[in] pUART  base of UART port
+*
+* @return       
+*               1, Tx buffer is empty
+*               0, Tx buffer is not empty
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+__STATIC_INLINE uint8_t UART_IsTxBuffEmpty(UART_Type *pUART)
+{
+    return (pUART->S1 & UART_S1_TDRE_MASK);
+}
+/*****************************************************************************//*!
+*
+* @brief check whether Rx buffer is full, i.e. receive a character
+*        
+* @param[in] pUART  base of UART port
+*
+* @return       
+*               1, Rx buffer is full
+*               0, Rx buffer is not full
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+__STATIC_INLINE uint8_t UART_IsRxBuffFull(UART_Type *pUART)
+{
+    return (pUART->S1 & UART_S1_RDRF_MASK);
+}
+/*! @} End of uart_api_list */
+
+
+/******************************************************************************
+* Global functions declaration
+******************************************************************************/
+void UART_Init(UART_Type *pUART, UART_ConfigType *pConfig);
+uint8_t UART_GetChar(UART_Type *pUART);
+void UART_PutChar(UART_Type *pUART, uint8_t u8Char);
+void UART_SetBaudrate(UART_Type *pUART, UART_ConfigBaudrateType *pConfig);
+void UART_EnableInterrupt(UART_Type *pUART, UART_InterruptType InterruptType);
+void UART_DisableInterrupt(UART_Type *pUART, UART_InterruptType InterruptType);
+uint16_t UART_GetFlags(UART_Type *pUART);
+uint8_t UART_CheckFlag(UART_Type *pUART, UART_FlagType FlagType);
+void UART_SendWait(UART_Type *pUART, uint8_t *pSendBuff, uint32_t u32Length);
+void UART_ReceiveWait(UART_Type *pUART, uint8_t *pReceiveBuff, uint32_t u32Length);
+void UART_WaitTxComplete(UART_Type *pUART);
+void UART_SetCallback(UART_CallbackType pfnCallback);
+void UART0_Isr(void);
+void UART1_Isr(void);
+void UART2_Isr(void);
+
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* #ifndef _UART_H_ */
--- a/bsp/nv32f100x/lib/inc/wdog.h
+++ b/bsp/nv32f100x/lib/inc/wdog.h
@@ -0,0 +1,203 @@
+
+/******************************************************************************
+* @brief provide commond watch dog utilities. 
+*
+*******************************************************************************
+*
+* provide APIs for accessing watch dog
+******************************************************************************/
+
+#ifndef __WDOG_H__
+#define __WDOG_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/******************************************************************************
+* Includes
+******************************************************************************/
+#include "sim.h"
+
+/******************************************************************************
+* Constants
+******************************************************************************/
+
+/******************************************************************************
+* Macros
+******************************************************************************/
+/* wdog_unlock sequence must be performed within 16 bus clock cycles without
+ * any interrupt 
+ */
+
+   
+/* WDOG clock sources option */
+/******************************************************************************
+* define watchdog clock source selection
+*
+*//*! @addtogroup wdog_clock_sources
+* @{
+*******************************************************************************/
+
+#define WDOG_CLK_BUS                    0   /*!< clock source is bus clock */
+#define WDOG_CLK_INTERNAL_32KHZ         2   /*!< clock source is internal oscillator 32 kHz (ICSIRCLK) */
+#define WDOG_CLK_INTERNAL_1KHZ	        1   /*!< clock source is internal LPO 1 KHz */
+#define WDOG_CLK_EXTERNAL               3   /*!< clock source is external clock */
+/*! @} End of wdog_clock_sources                                                    					*/
+
+/* WDOG clock source selection */
+#define WDOG_CLK  (WDOG_CLK_INTERNAL_1KHZ)
+    
+/* WDOG default values */
+#define WDOG_CS1_DEFAULT_VALUE      0x80
+#define WDOG_CS2_DEFAULT_VALUE      0x01
+#define WDOG_TOVAL_DEFAULT_VALUE    0x0400
+#define WDOG_WIN_DEFAULT_VALUE      0x0000
+     
+/* WDOG utilities */  
+
+/******************************************************************************
+* define watchdog API list
+*
+*//*! @addtogroup wdog_api_list
+* @{
+*******************************************************************************/
+/*! 
+ * @brief watchdog unlock routine.
+ */
+#define WDOG_Unlock()        WDOG->CNT = 0x20C5; WDOG->CNT = 0x28D9        
+//#define WDOG_Unlock()       DisableInterrupts; WDOG->CNT = 0x20C5; WDOG->CNT = 0x28D9; EnableInterrupts        
+/*! @} End of wdog_api_list                                                    					*/
+
+/******************************************************************************
+* Types
+******************************************************************************/
+
+/******************************************************************************
+* define watchdog configuration structure
+*
+*//*! @addtogroup wdog_config_type
+* @{
+*******************************************************************************/
+
+/*!
+ * @brief watchdog configuration structure.
+ *
+ */
+typedef struct {	
+    struct {
+	uint16_t    bIntEnable      : 1;    /*!< watchdog interrupt enable */
+	uint16_t    bDisable        : 1;    /*!< disable watchdog */
+	uint16_t    bWaitEnable     : 1;    /*!< enable watchdog in wait mode */
+	uint16_t    bStopEnable     : 1;    /*!< enable watchdog in stop mode */
+	uint16_t    bDbgEnable      : 1;    /*!< enable watchdog in debug mode */
+	uint16_t    bWinEnable      : 1;    /*!< enable watchdog window mode */
+	uint16_t    bUpdateEnable   : 1;    /*!< enable update of watchdog control */
+	uint16_t    bClkSrc         : 2;    /*!< watchdog clock source selection */  
+	uint16_t    bPrescaler      : 1;    /*!< prescaler */  
+    }sBits;                             /*!< bitfield structure  */
+    uint16_t    u16ETMeOut;             /*!< watchdog ETMeout value */
+    uint16_t    u16WinETMe;             /*!< watchdog window value */
+} WDOG_ConfigType, *WDOG_ConfigPtr;  /*!< watchdog configuration structure type */
+/*! @} End of wdog_config_type                                                    					*/
+
+/******************************************************************************
+* Global variables
+******************************************************************************/
+
+/******************************************************************************
+* Global functions
+******************************************************************************/
+
+/******************************************************************************
+* define watchdog API list
+*
+*//*! @addtogroup wdog_api_list
+* @{
+*******************************************************************************/
+
+
+/*****************************************************************************//*!
+*
+* @brief set ETMe out value for WDOG.
+*        
+* @param[in]   u16ETMeOut  ETMeout value to TOVAL register.
+*
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*
+*****************************************************************************/
+
+__STATIC_INLINE void WDOG_SetETMeOut(uint16_t u16ETMeOut)
+{
+    WDOG->CNT = 0x20C5; 
+    WDOG->CNT = 0x28D9;
+    WDOG->TOVAL8B.TOVALL  = u16ETMeOut;
+    WDOG->TOVAL8B.TOVALH  = u16ETMeOut >> 8;
+}
+
+
+/*****************************************************************************//*!
+*
+* @brief set window value for WDOG.
+*        
+* @param[in]   u16WinETMe  window value to WIN register.
+*
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*
+*****************************************************************************/
+
+__STATIC_INLINE void WDOG_SetWindow(uint16_t u16WinETMe)
+{
+    WDOG->CNT = 0x20C5; 
+    WDOG->CNT = 0x28D9;
+    WDOG->WIN8B.WINL  = u16WinETMe;
+    WDOG->WIN8B.WINH  = u16WinETMe >> 8;
+}
+
+/*****************************************************************************//*!
+*
+* @brief check if watchdog reset occurs.
+*        
+* @param    none.
+*
+* @return   TRUE if watchdog reset occurs, FALSE otherwise.
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+
+__STATIC_INLINE uint8_t WDOG_IsReset(void)
+{
+    if(SIM_GetStatus(SIM_SRSID_WDOG_MASK))
+    {
+        return (TRUE);
+    }
+    return (FALSE);
+}
+
+/*! @} End of wdog_api_list                                                    					*/
+
+
+void WDOG_Init(WDOG_ConfigPtr pConfig);
+void WDOG_DeInit(void);
+void WDOG_Disable(void);
+void WDOG_DisableWDOGEnableUpdate(void);
+void WDOG_Enable(void);
+void WDOG_Feed(void);
+void WDOG_SetETMeOut(uint16_t u16ETMeOut);
+void WDOG_SetWindow(uint16_t u16WinETMe);
+void WDOG_EnableUpdate(void);
+void WDOG_DisableUpdate(void);
+uint8_t WDOG_IsReset(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+/********************************************************************/
+#endif /* __WDOG_H__ */
+
--- a/bsp/nv32f100x/lib/src/acmp.c
+++ b/bsp/nv32f100x/lib/src/acmp.c
@@ -0,0 +1,215 @@
+
+/******************************************************************************
+*
+* @brief providing APIs for configuring ACMP. 
+*
+*******************************************************************************
+*
+* provide APIs for configuring ACMP
+******************************************************************************/
+#include "common.h"
+#include "acmp.h"
+/******************************************************************************
+* Global variables
+******************************************************************************/
+
+/******************************************************************************
+* Constants and macros
+******************************************************************************/
+
+/******************************************************************************
+* Local types
+******************************************************************************/
+
+/******************************************************************************
+* Local function prototypes
+******************************************************************************/
+
+/******************************************************************************
+* Local variables
+******************************************************************************/
+
+ACMP_CallbackPtr ACMP_Callback[2] = {(ACMP_CallbackPtr)NULL};
+
+/******************************************************************************
+* Local functions
+******************************************************************************/
+/******************************************************************************
+* Global functions
+******************************************************************************/
+void ACMP0_Isr(void);
+void ACMP1_Isr(void);
+
+/******************************************************************************
+* ACMP api list.
+*
+*//*! @addtogroup acmp_api_list
+* @{
+*******************************************************************************/
+
+/*****************************************************************************//*!
+*
+* @brief initialize ACMP as per control field.
+*        
+* @param   pACMPx         pointer to an ACMP register base.
+* @param   pConfig        control parameters.  
+*
+* @return none.
+*
+* @ Pass/ Fail criteria: none.
+*
+* @see   ACMP_DeInit.  
+*
+*****************************************************************************/
+void ACMP_Init(ACMP_Type *pACMPx, ACMP_ConfigType *pConfig) 
+{
+    if(ACMP0 == pACMPx)
+    {    
+        /* enable clock to ACMP */
+        SIM->SCGC |= SIM_SCGC_ACMP0_MASK;
+ 
+        /* enable ACMP interrupt */
+        if(pConfig->sCtrlStatus.bits.bIntEn)
+            NVIC_EnableIRQ(ACMP0_IRQn);
+    }
+    else
+    {
+        SIM->SCGC |= SIM_SCGC_ACMP1_MASK;
+        if(pConfig->sCtrlStatus.bits.bIntEn)
+            NVIC_EnableIRQ(ACMP1_IRQn);            
+    }
+    /* neg and pos pin are not equal */
+    pACMPx->C0 = pConfig->sPinSelect.byte;
+    ACMP_ConfigDAC(pACMPx, &pConfig->sDacSet );
+    //pACMPx->C1 = pConfig->sDacSet.byte;
+    pACMPx->C2 = pConfig->sPinEnable.byte;
+    pACMPx->CS = pConfig->sCtrlStatus.byte;
+}
+
+
+/*****************************************************************************//*!
+*
+* @brief write ACMP register bits.
+*        
+* @param   pACMPx      pointer to an ACMP register base.
+* @param   pDACConfig   pointer to an ACMP DAC control structure.
+*
+* @return none.
+*
+* @ Pass/ Fail criteria: none.
+*
+*****************************************************************************/
+void ACMP_ConfigDAC(ACMP_Type *pACMPx, ACMP_DACType *pDACConfig) 
+{
+    pACMPx->C1 = pDACConfig->byte;  
+}
+
+/*****************************************************************************//*!
+*
+* @brief deinit ACMP module.
+*        
+* @param   pACMPx      pointer to an ACMP register base.
+*
+* @return none.
+*
+* @ Pass/ Fail criteria: none.
+*
+* @see   ACMP_Init.  
+*
+*****************************************************************************/
+void ACMP_DeInit(ACMP_Type *pACMPx) 
+{
+    if(ACMP0 == pACMPx)
+    {    
+        if(pACMPx->CS & ACMP_CS_ACIE_MASK)
+            NVIC_DisableIRQ(ACMP0_IRQn);
+    }
+    else
+    {
+        if(pACMPx->CS & ACMP_CS_ACIE_MASK)
+            NVIC_DisableIRQ(ACMP1_IRQn);            
+    }
+    
+    pACMPx->CS = 0;
+    pACMPx->C0 = 0;
+    pACMPx->C1 = 0;
+    pACMPx->C2 = 0;
+    
+    if(ACMP0 == pACMPx)
+    {    
+        SIM->SCGC &= ~SIM_SCGC_ACMP0_MASK;
+    }
+    else
+    {
+        SIM->SCGC &= ~SIM_SCGC_ACMP1_MASK;           
+    } 
+}
+
+/*****************************************************************************//*!
+*
+* @brief  set up ACMP callback routines to be called by interrupt service routine.
+*        
+* @param  pACMPx       pointer to an ACMP register base. 
+* @param   pfnCallback  callback routine.
+*
+* @return none.
+*
+* @ Pass/ Fail criteria: none.
+*
+*****************************************************************************/
+void ACMP_SetCallback(ACMP_Type *pACMPx, ACMP_CallbackPtr pfnCallback)
+{
+    if(ACMP0 == pACMPx)
+    {
+        ACMP_Callback[0] = pfnCallback;
+    }
+    else
+    {
+        ACMP_Callback[1] = pfnCallback;
+    }
+}
+
+/*! @} End of acmp_api_list                                                  */
+
+
+/*****************************************************************************//*!
+*
+* @brief  ACMP0 interrupt service routine.
+*        
+* @param  none. 
+*
+* @return none.
+*
+* @ Pass/ Fail criteria: none.
+*
+*****************************************************************************/
+void ACMP0_Isr(void)
+{
+
+    if(ACMP_Callback[0])
+    {
+        ACMP_Callback[0]();             /* call callback routine */
+    }
+}
+
+/*****************************************************************************//*!
+*
+* @brief  ACMP1 interrupt service routine.
+*        
+* @param  none. 
+*
+* @return none.
+*
+* @ Pass/ Fail criteria: none.
+*
+*****************************************************************************/
+void ACMP1_Isr(void)
+{
+
+    if(ACMP_Callback[1])
+    {
+        ACMP_Callback[1]();             /* call callback routine */
+    }
+}
+
+
--- a/bsp/nv32f100x/lib/src/adc.c
+++ b/bsp/nv32f100x/lib/src/adc.c
@@ -0,0 +1,336 @@
+/******************************************************************************
+* @brief providing APIs for configuring ADC module (ADC). 
+*
+*******************************************************************************
+*
+* provide APIs for configuring ADC module (ADC)
+******************************************************************************/
+#include "common.h"
+#include "adc.h"
+/******************************************************************************
+* Local function
+******************************************************************************/
+ADC_CallbackType ADC_Callback[1] = {NULL};
+/******************************************************************************
+* Local variables
+******************************************************************************/
+
+/******************************************************************************
+* Local function prototypes
+******************************************************************************/
+
+/******************************************************************************
+* define ADC APIs
+*
+*//*! @addtogroup adc_api_list
+* @{
+*******************************************************************************/
+
+
+/*****************************************************************************//**
+   *
+   * @brief initialize ADC module.
+   *
+   * @param[in]  pADC point to ADC module type. 
+   * @param[in]  pADC_Config point to ADC configuration structure. 
+   *
+   * @return none
+   *
+   * @ Pass/ Fail criteria: none
+   *****************************************************************************/
+void ADC_Init(ADC_Type *pADC, ADC_ConfigTypePtr pADC_Config)
+{
+    if( pADC == ADC)
+    {
+        SIM->SCGC |= SIM_SCGC_ADC_MASK;
+    }
+
+    /* set clock cource for ADC */
+    ADC_SelectClock(pADC,pADC_Config->u8ClockSource);
+
+    /* set clock divide */
+    ADC_SelectClockDivide(pADC,pADC_Config->u8ClockDiv);
+
+    /* set ADC mode */
+    ADC_SetMode(pADC,pADC_Config->u8Mode);
+
+    /* set FIFO level */
+    ADC_SetFifoLevel(pADC,pADC_Config->u8FiFoLevel);
+
+    /* set pin control */
+    pADC->APCTL1 = pADC_Config->u16PinControl;
+
+    if( pADC_Config->sSetting.bCompareEn )
+    {
+        ADC_CompareEnable(pADC);
+    }
+    
+    if( pADC_Config->sSetting.bCompareGreaterEn )
+    {
+        ADC_CompareGreaterFunction(pADC);
+    }
+        
+    if( pADC_Config->sSetting.bContinuousEn )
+    {
+        ADC_ContinuousConversion(pADC);
+    }
+        
+    if( pADC_Config->sSetting.bCompareAndEn ) 
+    {
+        ADC_CompareFifoAnd(pADC);
+    }
+    
+    if( pADC_Config->sSetting.bFiFoScanModeEn )
+    {
+        ADC_FifoScanModeEnable(pADC);
+    }
+    
+    if( pADC_Config->sSetting.bHardwareTriggerEn )
+    {
+        ADC_SetHardwareTrigger(pADC);
+    }
+
+    if( pADC_Config->sSetting.bIntEn )
+    {
+        ADC_IntEnable(pADC);
+        NVIC_EnableIRQ( ADC0_IRQn );
+    } 
+
+    if( pADC_Config->sSetting.bLongSampleEn )
+    {
+        ADC_SetLongSample(pADC);
+    } 
+
+    if( pADC_Config->sSetting.bLowPowerEn )
+    {
+        ADC_SetLowPower(pADC);
+    }
+
+#if !defined(CPU_NV32)
+
+    if( pADC_Config->sSetting.bHTRGMEn )
+    {
+        ADC_HardwareTriggerMultiple(pADC);
+    }
+    else
+    {
+		ADC_HardwareTriggerSingle(pADC);
+    }
+    if( pADC_Config->sSetting.bHTRGMASKEn )
+    {
+        ADC_HardwareTriggerMaskEnable(pADC);
+    }
+    else
+    {
+		ADC_HardwareTriggerMaskDisable(pADC);
+    }
+    if( pADC_Config->sSetting.bHTRGMASKSEL )
+    {
+        ADC_HardwareTriggerMaskAuto(pADC);
+    }
+    else
+    {
+		ADC_HardwareTriggerMaskNonAuto(pADC);
+    }
+#endif
+}
+
+/*****************************************************************************//*!
+   *
+   * @brief disable ADC module.
+   *        
+   * @param[in]  pADC point to ADC module type. 
+   *
+   * @return none.
+   *
+   * @ Pass/ Fail criteria: none.
+   *****************************************************************************/
+void ADC_DeInit( ADC_Type *pADC )
+{
+    ADC_SetChannel(pADC,ADC_CHANNEL_DISABLE);
+
+    SIM->SCGC &= ~SIM_SCGC_ADC_MASK;
+}
+
+/*****************************************************************************//*!
+   *
+   * @brief start a conversion and get conversion result
+   *        
+   * @param[in]  pADC point to ADC module type. 
+   * @param[in]  u8Channel adc channel to conversion. 
+   *
+   * @return ADC conversion result.
+   *
+   * @ Pass/ Fail criteria: none
+   *****************************************************************************/
+unsigned int ADC_PollRead( ADC_Type *pADC, uint8_t u8Channel )
+{
+		ADC_SetChannel(pADC,u8Channel);
+		while( !ADC_IsCOCOFlag(pADC) );
+		return ADC_ReadResultReg(pADC);
+}
+
+
+/*****************************************************************************//*!
+   *
+   * @brief install ADC call back function.
+   *        
+   * @param[in]	 pADC_CallBack point to address of  adc call back function.
+   *
+   * @return none.
+   *
+   * @ Pass/ Fail criteria: none.
+   *****************************************************************************/
+void ADC_SetCallBack(ADC_CallbackType pADC_CallBack)
+{
+    ADC_Callback[0] = pADC_CallBack;
+}
+
+/*****************************************************************************//*!
+   *
+   * @brief set ADC channel.
+   *        
+   * @param[in]  pADC point to ADC module type. 
+   * @param[in]  u8Channel adc channel to conversion. 
+   *
+   * @return none
+   *
+   * @ Pass/ Fail criteria: none
+   *****************************************************************************/
+void ADC_SetChannel( ADC_Type *pADC, uint8_t u8Channel )
+{
+    uint32_t u32temp;    
+    u32temp = pADC->SC1; 
+    u32temp &= ~ADC_SC1_ADCH_MASK;
+    pADC->SC1 = u32temp|ADC_SC1_ADCH(u8Channel);   
+}
+/*****************************************************************************//*!
+   *
+   * @brief Voltage Reference Selection.
+   *        
+   * @param[in]  pADC point to ADC module type. 
+   * @param[in]  u8Vref adc reference voltage selection. 
+   *
+   * @return none
+   *
+   * @ Pass/ Fail criteria: none
+   *****************************************************************************/
+void ADC_VrefSelect( ADC_Type *pADC, uint8_t u8Vref )
+{
+    uint32_t u32Temp;
+    u32Temp = pADC->SC2;
+    u32Temp &= ~ADC_SC2_REFSEL_MASK;
+    pADC->SC2 = u32Temp|ADC_SC2_REFSEL(u8Vref);
+}
+
+/*****************************************************************************//*!
+   *
+   * @brief select clock divide
+   *        
+   * @param[in]  pADC point to ADC module type. 
+   * @param[in]  u8Div Clock Divide Select. 
+   *
+   * @return none
+   *
+   * @ Pass/ Fail criteria: none
+   *****************************************************************************/
+void ADC_SelectClockDivide( ADC_Type *pADC, uint8_t u8Div )
+{
+    uint32_t u32Temp;
+    u32Temp = pADC->SC3;
+    u32Temp &= ~ADC_SC3_ADIV_MASK;
+    pADC->SC3 = u32Temp|ADC_SC3_ADIV(u8Div);
+}
+
+/*****************************************************************************//*!
+   *
+   * @brief set ADC mode.
+   *        
+   * @param[in]  pADC point to ADC module type. 
+   * @param[in]  u8Mode Conversion Mode Selection. 
+   *
+   * @return none
+   *
+   * @ Pass/ Fail criteria: none
+   *****************************************************************************/
+void ADC_SetMode( ADC_Type *pADC, uint8_t u8Mode )
+{
+    uint32_t u32Temp;
+    u32Temp = pADC->SC3;
+    u32Temp &= ~ADC_SC3_MODE_MASK;
+    pADC->SC3 = u32Temp|ADC_SC3_MODE(u8Mode);
+}
+/*****************************************************************************//*!
+   *
+   * @brief Input Clock Select.
+   *        
+   * @param[in]  pADC point to ADC module type. 
+   * @param[in]  u8Clock Input Clock Select. 
+   *
+   * @return none
+   *
+   * @ Pass/ Fail criteria: none
+   *****************************************************************************/
+void ADC_SelectClock( ADC_Type *pADC, uint8_t u8Clock )
+{
+    uint32_t u32Temp;
+    u32Temp = pADC->SC3;
+    u32Temp &= ~ADC_SC3_ADICLK_MASK;
+    pADC->SC3 = u32Temp|ADC_SC3_ADICLK(u8Clock);
+}
+
+/*****************************************************************************//*!
+   *
+   * @brief FIFO Depth enables
+   *        
+   * @param[in]  pADC point to ADC module type. 
+   * @param[in]  u8FifoLevel set FIFO level. 
+   *
+   * @return none
+   *
+   * @ Pass/ Fail criteria: none
+   *****************************************************************************/
+void ADC_SetFifoLevel( ADC_Type *pADC, uint8_t u8FifoLevel )
+{
+    uint32_t u32Temp;
+    u32Temp = pADC->SC4;
+    u32Temp &= ~ADC_SC4_AFDEP_MASK;
+    pADC->SC4 = u32Temp|ADC_SC4_AFDEP(u8FifoLevel);
+}
+
+/*! @} End of adc_api_list                                               						*/
+
+
+/*****************************************************************************//*!
+   *
+   * @brief ADC interrupt service routine.
+   *        
+   * @param  none. 
+   *
+   * @return none.
+   *
+   * @ Pass/ Fail criteria: none.
+   *****************************************************************************/
+void ADC_Isr(void)
+{ 
+//	printf("input any character to start a new conversion!\n");
+    if( ADC_Callback[0] )
+    {
+        ADC_Callback[0]();
+    }
+}
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
--- a/bsp/nv32f100x/lib/src/arm_cm0.c
+++ b/bsp/nv32f100x/lib/src/arm_cm0.c
@@ -0,0 +1,77 @@
+/******************************************************************************
+* @brief provide generic high-level routines for ARM Cortex M0/M0+ processors. 
+*
+*******************************************************************************/
+
+#include "common.h"
+
+/***********************************************************************/
+/*
+ * Configures the ARM system control register for STOP (deep sleep) mode
+ * and then executes the WFI instruction to enter the mode.
+ *
+ * Parameters:
+ * none
+ *
+ * Note: Might want to change this later to allow for passing in a parameter
+ *       to optionally set the sleep on exit bit.
+ */
+
+void stop (void)
+{
+	/* Set the SLEEPDEEP bit to enable deep sleep mode (STOP) */
+	SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;	
+
+	/* WFI instruction will start entry into STOP mode */
+#ifndef KEIL
+        // If not using KEIL's uVision use the standard assembly command
+	asm("WFI");
+#else
+        // If using KEIL's uVision, use the CMSIS intrinsic
+	__wfi();
+#endif
+}
+/***********************************************************************/
+/*
+ * Configures the ARM system control register for WAIT (sleep) mode
+ * and then executes the WFI instruction to enter the mode.
+ *
+ * Parameters:
+ * none
+ *
+ * Note: Might want to change this later to allow for passing in a parameter
+ *       to optionally set the sleep on exit bit.
+ */
+
+void wait (void)
+{
+	/* Clear the SLEEPDEEP bit to make sure we go into WAIT (sleep) mode instead
+	 * of deep sleep.
+	 */
+	SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;	
+
+	/* WFI instruction will start entry into WAIT mode */
+#ifndef KEIL
+        // If not using KEIL's uVision use the standard assembly command
+	asm("WFI");
+#else
+        // If using KEIL's uVision, use the CMSIS intrinsic
+    __wfi();
+#endif
+}
+/***********************************************************************/
+/*
+ * Change the value of the vector table offset register to the specified value.
+ *
+ * Parameters:
+ * vtor     new value to write to the VTOR
+ */
+
+void write_vtor (int vtor)
+{
+        /* Write the VTOR with the new value */
+        SCB->VTOR = vtor;	
+}
+
+/***********************************************************************/
+
--- a/bsp/nv32f100x/lib/src/crc.c
+++ b/bsp/nv32f100x/lib/src/crc.c
@@ -0,0 +1,256 @@
+/******************************************************************************
+* @brief    Cyclic redundancy check (CRC) source code. 
+*
+******************************************************************************/
+#include "common.h"
+#include "crc.h"
+
+/******************************************************************************
+* Global variables
+******************************************************************************/
+
+/******************************************************************************
+* Constants and macros
+******************************************************************************/
+
+/******************************************************************************
+* Local types
+******************************************************************************/
+
+/******************************************************************************
+* Local function prototypes
+******************************************************************************/
+
+/******************************************************************************
+* Local variables
+******************************************************************************/
+
+/******************************************************************************
+* Local functions
+******************************************************************************/
+
+/******************************************************************************
+* Global functions
+******************************************************************************/
+
+/******************************************************************************
+* define CRC APIs
+*
+*//*! @addtogroup crc_api_list
+* @{
+*******************************************************************************/
+
+/*****************************************************************************//*!
+*
+* @brief initialize CRC with poly per control parameters
+*        
+* @param[in]  pConfig point to configuration. 
+*
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+void CRC_Init(CRC_ConfigType *pConfig)
+{       
+    uint32_t     u32Sc ;
+    
+    u32Sc      = 0;
+    
+    SIM->SCGC |= SIM_SCGC_CRC_MASK;  
+    
+    u32Sc     |= ((pConfig->bWidth & 0x01)<<24);    
+    u32Sc     |= CRC_CTRL_TOTR(pConfig->bTransposeReadType & 0x03); 
+    u32Sc     |= CRC_CTRL_TOT(pConfig->bTransposeWriteType & 0x03);
+    
+    if (pConfig->bFinalXOR)
+    {
+        u32Sc |= CRC_CTRL_FXOR_MASK;        
+    }
+    
+    CRC0->CTRL  = u32Sc;
+
+    if ( pConfig->bWidth )      
+    {
+        CRC0->GPOLY = pConfig->u32PolyData;
+    }
+    else 
+    {
+        CRC0->GPOLY_ACCESS16BIT.GPOLYL = pConfig->u32PolyData;  /*!< only 16-bit write allowed */             
+    }  
+    
+}     
+
+
+/*****************************************************************************//*!
+*
+* @brief crc module 16-bit mode calculation.
+*        
+* @param[in]  seed  
+* @param[in]  msg  poiont to message buffer
+* @param[in]  sizeBytes  size of message
+*
+* @return data_out convertion result
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+uint32_t CRC_Cal16(uint32_t seed, uint8_t *msg, uint32_t sizeBytes)
+{
+  uint32_t ctrl_reg,data_out,data_in;
+  uint8_t  *pCRCBytes;
+  uint32_t sizeWords;
+  uint32_t i,j;  
+  
+  /* Input seed, Set WaS=1 */
+  ctrl_reg  = CRC0->CTRL;
+  CRC0->CTRL  = ctrl_reg | CRC_CTRL_WAS_MASK;
+  CRC0->ACCESS16BIT.DATAL = seed;
+  
+  /*Input data, Set WaS=0*/
+  CRC0->CTRL  = ctrl_reg & 0xFD000000;
+
+  /*Wait for calculation completion*/
+  sizeWords = sizeBytes>>1;
+  j = 0;
+  for(i=0;i<sizeWords;i++){ 
+      data_in = (msg[j] << 8) | (msg[j+1]);
+      j += 2;
+      CRC0->ACCESS16BIT.DATAL =data_in; 
+  }
+  if (j<sizeBytes)
+  { 
+     pCRCBytes = (uint8_t*)&CRC0->ACCESS8BIT.DATALL;
+     *pCRCBytes++ = msg[j];
+  }
+    data_out=CRC0->ACCESS16BIT.DATAL;
+  
+  return(data_out);
+}
+
+
+/*****************************************************************************//*!
+*
+* @brief crc module 32-bit mode calculation.
+*        
+* @param[in]  seed 
+* @param[in]  msg  poiont to message buffer
+* @param[in]  sizeBytes  size of message
+*
+* @return data_out convertion result 
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+uint32_t CRC_Cal32(uint32_t seed, uint8_t *msg, uint32_t sizeBytes)
+{  
+  uint32_t ctrl_reg,data_out,data_in;
+  uint32_t sizeDwords;
+  uint8_t  *pCRCBytes;
+  uint32_t i,j;
+  
+  /*Input seed, Set WaS=1*/
+  ctrl_reg = CRC0->CTRL;
+  CRC0->CTRL = ctrl_reg | 0x02000000;
+  CRC0->DATA = seed;
+ 
+  /*Input data, Set WaS=0*/
+  CRC0->CTRL = ctrl_reg & 0xFD000000;
+  
+  /*Wait for calculation completion*/
+  sizeDwords = sizeBytes>>2;
+  j = 0;
+  for(i=0;i<sizeDwords;i++)
+  { 
+      data_in = ((msg[j] << 24) | (msg[j+1] << 16) | (msg[j+2] << 8) | msg[j+3]);
+      j += 4;
+      CRC0->DATA = data_in; 
+  }
+  if (j<sizeBytes)
+  {
+    pCRCBytes = (uint8_t*)&CRC0->ACCESS8BIT.DATALL;
+
+#if  defined(BYTE_ENABLES_1_2_4_8)    
+    
+    /*write single byte*/  
+    for(;j<sizeBytes;j++)
+    {     
+       *pCRCBytes++ = msg[j];
+    }
+#elif  defined(BYTE_ENABLES_3_6_C)
+    
+    /*write two bytes*/ 
+    data_in = 0;
+    i = 0;
+    for(;j<sizeBytes;j++)
+    {     
+      data_in = (data_in <<8) | msg[j];
+      i++;
+      if (i==2)
+      {
+        i = 0;
+        CRC0->ACCESS16BIT.DATAL = data_in;
+      }
+    }
+    if (i==1)
+    {
+       CRC0->ACCESS8BIT.DATALL = data_in;                /*!< write last byte */
+    }
+#elif  defined(BYTE_ENABLES_7_E)                         
+    /*!< write three bytes */
+    data_in = 0;
+    i = 0;
+    for(;j<sizeBytes;j++)
+    {     
+      data_in = (data_in <<8) | msg[j];
+      i++;
+      if (i==3)
+      {
+        i = 0;
+        /*write first  char*/
+        CRC0->ACCESS8BIT.DATAHL  = (data_in>>16) & 0xff; /*!< write low byte of high word */
+        /*write last two chars*/
+        CRC0->ACCESS16BIT.DATAL = data_in & 0x00ffff;    /*!< write low word */
+       }
+    }
+    if ( i == 2)
+    {
+       CRC0->ACCESS16BIT.DATAL = (data_in);              /*!< write last 2 bytes */
+    }
+    else if (i == 1)
+    {
+       CRC0->ACCESS8BIT.DATALL = data_in;                /*!< write last byte */      
+    }
+#else                                                    /*!< write low byte only */
+    for(;j<sizeBytes;j++)
+    {     
+       *pCRCBytes = msg[j];
+    }
+#endif            
+  }
+  data_out=CRC0->DATA;
+
+  return(data_out);
+}
+
+
+/*****************************************************************************//*!
+*
+* @brief de-initialize crc module, reset crc register.
+*        
+* @param none 
+*
+* @return none 
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+void CRC_DeInit(void)
+{  
+   CRC0->CTRL  = 0x3000000; /*!< prepare for write 32-bit seed*/ 
+   CRC0->DATA  = 0xFFFFFFFF;/*!< write 32-bit seed to data register*/ 
+   while(!(CRC0->DATA == 0xFFFFFFFF));
+   CRC0->GPOLY = 0x00001021; 
+   CRC0->CTRL  = 0;         /*!< reset ctrl register*/  
+   SIM->SCGC &= ~SIM_SCGC_CRC_MASK;
+}
+
+/*! @} End of crc_api_list                                                   */
+
+
--- a/bsp/nv32f100x/lib/src/eeprom.c
+++ b/bsp/nv32f100x/lib/src/eeprom.c
@@ -0,0 +1,345 @@
+#include "flash.h"
+#include "eeprom.h"
+#include <string.h>
+
+/******************************************************************************
+* Global variables
+******************************************************************************/
+
+/******************************************************************************
+* Constants and macros
+******************************************************************************/
+
+
+/******************************************************************************
+* Local types
+******************************************************************************/
+
+/******************************************************************************
+* Local function prototypes
+******************************************************************************/
+
+/******************************************************************************
+* Local variables
+******************************************************************************/
+
+/******************************************************************************
+* Local functions
+******************************************************************************/
+
+
+/******************************************************************************
+*
+* EEPROM 擦除命令，擦掉eeprom
+*输入参数：地址，函数将会擦除adr所在的512bytes eeprom
+*
+******************************************************************************/
+uint16_t Adress_Js(uint32_t adr)
+{
+    uint16_t err = EEPROM_ERR_SUCCESS;
+
+  
+    if(adr & 0x03)
+    {
+        err = EEPROM_ERR_INVALID_PARAM;
+	return (err);
+	}
+  
+    if(adr >1024)
+    {
+        err=EEPROM_ADR_OverFlow;
+      return(err);
+    }
+    return(err);
+}
+
+/******************************************************************************
+*
+* EEPROM 擦除命令，擦掉eeprom
+*输入参数：地址，函数将会擦除adr所在的512bytes eeprom
+*
+******************************************************************************/
+
+
+uint16_t EEPROM_Erase(uint32_t adr)
+{
+    uint16_t err = EEPROM_ERR_SUCCESS;
+    uint32_t e_adr;
+
+     if(adr & 0x03)
+    {
+        err = EEPROM_ERR_INVALID_PARAM;
+	return (err);
+	}
+  
+    if(adr >1024)
+    {
+        err=EEPROM_ADR_OverFlow;
+    
+      return(err);
+    }
+    
+    e_adr=adr+EEPROM_START_ADR;
+    err = Flash_EraseSector(e_adr);  
+    return(err);
+}
+
+/******************************************************************************
+*
+* EEPROM 读取函数，读取地址所在的eeprom
+*输入参数：地址
+*
+******************************************************************************/
+uint32_t EEPROM_Read(uint32_t adr)
+{
+    uint16_t err = EEPROM_ERR_SUCCESS;
+    uint32_t e_adr;
+    uint32_t data;
+    
+    if(adr & 0x03)
+    {
+        err = EEPROM_ERR_INVALID_PARAM;
+	return (err);
+	}
+  
+    if(adr >1024)
+    {
+        err=EEPROM_ADR_OverFlow;
+      return(err);
+    }
+    
+    e_adr=adr+EEPROM_START_ADR;
+    data = M32(e_adr);
+    return(data);
+    
+}
+/******************************************************************************
+*
+* EEPROM 写函数，写地址所在的eeprom
+*写之前读取出来，判断eeprom是否为空，如果为空，则直接写
+*如果非空，则先把整个512bytes sector读取到sram，修改要写的位置
+*然后再写入到flash，模拟一个eeprom的写过程
+*输入参数：地址
+*
+******************************************************************************/
+uint16_t EEPROM_Write(uint32_t adr, uint32_t Data)
+{
+  
+    uint32_t err = EEPROM_ERR_SUCCESS;
+    uint32_t e_adr;
+    uint32_t r_data;
+    uint16_t i;
+    uint32_t start_adr;
+ //   uint32_t modify_adr;
+    uint32_t EEPROM_DATA[128];
+
+    if(adr & 0x03)
+    {
+        err = EEPROM_ERR_INVALID_PARAM;
+	return (err);
+	}
+  
+    if(adr >1024)
+    {
+        err=EEPROM_ADR_OverFlow;
+      return(err);
+    }
+
+    
+    r_data = EEPROM_Read(adr);
+    
+    e_adr=adr+EEPROM_START_ADR;
+
+    if(r_data== EEPROM_BLANK) //如果要写的位置是空的，则直接写
+    {
+      err= Flash_Program1LongWord(e_adr,Data);
+    }
+   else if((r_data&Data) == Data)//如果要写的位置对应的bit，和要写的数据一致，或者是1，也是可以直接写
+     {
+      err= Flash_Program1LongWord(e_adr,Data);
+    }
+    else if(r_data == Data) //如果要写的数据和现有的数据一致，就不进行任何操作，直接返回
+    {
+      return(err);
+    }
+    else
+    {
+        start_adr = e_adr & EEPROM_SECTOR_MASK; //计算出sector的头地址    
+        
+        for( i=0;i<128;i++ ) //如果要写的位置不为空，则先把flash内容读取出来，放在sram中，修改
+        {
+          EEPROM_DATA[i] = M32(start_adr + 4*i);
+        }
+            
+        EEPROM_DATA[(adr&EEPROM_ARRAY_ADR_MASK)>>2] = Data; //修改SRAM 中的数据
+        
+        err=EEPROM_Erase(adr);
+     
+        err=Flash_Program(start_adr,(uint8_t*)EEPROM_DATA,512);//然后写入flash
+    }
+    return(err);
+    
+}
+
+/******************************************************************************
+*
+*Byte 写函数
+*
+******************************************************************************/
+uint16_t EEPROM_WriteByte(uint32_t adr, uint8_t Data)
+{
+    uint32_t err = EEPROM_ERR_SUCCESS;
+    uint32_t data_mask;
+    uint32_t r_data;
+    uint32_t data_m0;
+    uint32_t data_m1;
+    uint32_t word_adr = adr &0x3fc;
+    uint32_t  b_sit= adr & 0x3;
+    
+
+ //先让高位为FF
+    data_m0 = Data << b_sit*8;   
+    data_mask = 0xFFFFFFFF<<(b_sit+1)*8;    
+//   printf("datam0:=0x%x \n",data_m0);    
+//然后让低位为FF    
+     data_m1 = 0xFFFFFFFF >> (32-b_sit*8);
+     data_m1 = data_m1 | data_m0 | data_mask ;
+     
+//    printf("datam1:=0x%x \n",data_m1);  
+    
+    r_data = EEPROM_Read(word_adr);
+//    printf("r_data:=0x%x \n",r_data);        
+//或上原来的数据    
+    data_m1 = data_m1 & r_data;
+		
+    
+//    printf("data_m1:=0x%x \n",data_m1);     ;           
+    err = EEPROM_Write(word_adr , data_m1);
+    
+    return(err);
+
+}
+
+/******************************************************************************
+*
+*Byte 读函数
+*
+******************************************************************************/
+uint8_t EEPROM_ReadByte(uint32_t adr)
+{
+   uint32_t r_data;
+   uint32_t word_adr = adr &0x3fc;
+   uint32_t b_sit= adr & 0x3;
+   uint8_t  data;
+   
+    r_data = EEPROM_Read(word_adr);
+    data = (r_data>>b_sit*8)& 0xff;
+    return(data);
+   
+   
+}
+
+
+/******************************************************************************
+*
+*写函数，写一个长度为bytesize，到eeprom
+*先把1k的eeprom读取放入sram，然后修改要写的位置，
+*这个函数是还可以再优化的
+*这样更改后，没有考虑2K eeprom 。超过2K 也是完全可以的。
+******************************************************************************/
+uint16_t EERPOM_Writeup4byte(uint32_t adr,uint8_t *pData,uint32_t length)
+{
+	uint8_t buf[512];
+	uint8_t *pbuf;
+	uint32_t e_adr;
+	uint32_t e_sec;
+	uint32_t e_offset;
+	uint32_t a;
+	uint32_t err = EEPROM_ERR_SUCCESS;
+	
+   #ifdef IAR
+    if(adr & 0x03)
+    {
+        err = EEPROM_ERR_INVALID_PARAM;
+	      return (err);
+	   }
+    #endif
+  
+    if((adr + length )>1024)
+    {
+        err=EEPROM_ADR_OverFlow;
+      return(err);
+    }
+    
+	e_adr=adr+EEPROM_START_ADR;
+	e_sec=e_adr & EEPROM_SECTOR_MASK;
+	e_offset=e_adr & 0x1ff;
+
+	
+	while (length>0){
+          //如果起始地址不等于0，或者长度小于512 都进入这个循环
+		if (e_offset||(length<512)){
+			pbuf=buf;
+			a=512-e_offset;
+			a=(length>a?a:length);
+			
+			memcpy(buf,(uint8_t*)e_sec,512);
+			memcpy(&buf[e_offset],pData,a);
+			pData+=a;
+			length-=a;
+			e_offset=0;
+
+		}else{ //如果起始地址等于0且长度大于512 则简单了
+			pbuf=pData;
+			pData+=512;
+			length-=512;
+		}
+		err=Flash_EraseSector(e_sec);
+		err=Flash_Program(e_sec,(uint8_t*)pbuf,512);//然后写入flash
+		e_sec+=0x200;
+	}
+	return err;
+}
+
+
+/*
+uint16_t EERPOM_Writeup4byte(uint32_t adr,uint8_t *pData,uint32_t bytesize)
+{
+    uint32_t err = EEPROM_ERR_SUCCESS;
+    uint32_t e_adr;
+    uint16_t i;
+    uint32_t start_adr;
+    uint32_t EEPROM_DATA[256];
+    uint32_t longword = bytesize >>2;
+    uint32_t *pwData = (uint32_t*)pData ;
+    
+    err=Adress_Js(adr);
+    
+    if(adr+bytesize >1024) //如果写入的地址,加上要写的数据的个数大于1024，则报错
+    {
+      err = EEPROM_ADR_OverFlow;
+      return(err);
+    }
+    
+    e_adr=adr+EEPROM_START_ADR;
+    
+    start_adr = e_adr & EEPROM_SECTOR_MASK; //计算出sector 头地址
+
+    for( i=0;i<256;i++ ) //先把数据读取到sram
+      {
+        EEPROM_DATA[i] = M32(start_adr + 4*i);
+        }
+    for( i=0 ;i<longword ;i++) //然后修改要写的地址
+      {
+        EEPROM_DATA[(adr>>2)+i] = *pwData++;
+      }
+     //先erase掉2个eeprom secoter     
+     err=EEPROM_Erase(0x000);
+     err=EEPROM_Erase(0x200);   
+      
+    err=Flash_Program(start_adr,(uint8_t*)EEPROM_DATA,1024);//然后写入flash
+    
+    return(err);
+}
+*/
+
--- a/bsp/nv32f100x/lib/src/etm.c
+++ b/bsp/nv32f100x/lib/src/etm.c
--- a/bsp/nv32f100x/lib/src/flash.c
+++ b/bsp/nv32f100x/lib/src/flash.c
@@ -0,0 +1,351 @@
+/******************************************************************************
+******************************************************************************
+*
+* @file flash.c
+*
+* @brief application entry point which performs application specific tasks. 
+*
+*******************************************************************************
+*
+* provide a demo for how to initialize the NV32, output messages via SCI, 
+* flash operations, etc.
+* NOTE:
+*	printf call may occupy a lot of memory (around 1924 bytes), so please
+*	consider your code size before using printf.
+******************************************************************************
+*
+* provide FLASH driver
+*
+******************************************************************************/
+
+#include "flash.h"
+/******************************************************************************
+* Global variables
+******************************************************************************/
+
+/******************************************************************************
+* Constants and macros
+******************************************************************************/
+
+
+/******************************************************************************
+* Local types
+******************************************************************************/
+
+/******************************************************************************
+* Local function prototypes
+******************************************************************************/
+
+/******************************************************************************
+* Local variables
+******************************************************************************/
+
+/******************************************************************************
+* Local functions
+******************************************************************************/
+
+/******************************************************************************
+* Global functions
+******************************************************************************/
+/*****************************************************************************//*!
+FUNCTION----------------------------------------------------------------
+* @function name: Flash_CopyInRAM
+*
+* @brief This section of the code is the one that copies the routine into RAM. 
+* It is following the steps  documented in Technical Note 228
+*        
+* @param  
+*
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+
+#define FLASH_ENABLE_STALLING_FLASH_CONTROLLER
+
+
+/*****************************************************************************//*!
+FUNCTION----------------------------------------------------------------
+* @function name: Flash_Init
+*
+* @brief initialize flash driver
+*        
+* @param  
+*
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+
+uint16_t Flash_Init(void)
+{
+	uint16_t err   = FLASH_ERR_SUCCESS;
+	uint32_t clkDIV = BUS_CLK_HZ/1000000L - 1;
+	uint32_t Tpgs  =(285 *(BUS_CLK_HZ/100))/1000000L;  //update 2016.8.4 by ¹â½Å°å¤ÎGG
+	uint32_t Tprog =(675*(BUS_CLK_HZ/100))/1000000L;   //by ¹â½Å°å¤ÎGG
+//        printf("Tpgs= %x \n" , Tpgs);
+//        printf("Tprog= %x \n" , Tprog);   
+        
+	EFMCR=(clkDIV<<24) + 0x00001103; //divide to 1M hz 
+	EFMETM0=(Tpgs<<16)  + 0x00001194;  //0x00281194; //
+	EFMETM1=(Tprog<<16) + 0x000088B8; //
+//        printf("EFMCR= %x \n" , EFMCR); 
+//        printf("EFMETM0= %x \n" , EFMETM0);         
+//        printf("EFMETM1= %x \n" , EFMETM1); 
+  return(err);
+}
+
+/*****************************************************************************//*!
+FUNCTION----------------------------------------------------------------
+* @function name: FlashProgram
+*
+* @brief program flash routine, each program operation supports up to 2 longwords
+* 		 programming
+*        
+* @param  
+*
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+
+uint16_t Flash_Program(uint32_t wNVMTargetAddress, uint8_t *pData, uint16_t sizeBytes)
+{
+	uint16_t err = FLASH_ERR_SUCCESS;
+	uint16_t w2LongWordCount = sizeBytes>>3;
+	uint8_t  wLeftBytes = (sizeBytes & 0x07);
+	uint16_t wLeftLongWords = wLeftBytes>>2;
+	uint32_t wTargetAddress = wNVMTargetAddress;
+	uint32_t dwData0,dwData1;
+	uint32_t *pdwData = (uint32_t*)pData;
+	int  i;
+ //printf("\n adr : 0x%x ,data = 0x%x\n",w2LongWordCount,wLeftLongWords );
+	// Check address to see if it is aligned to 4 bytes
+	// Global address [1:0] must be 00.
+	if(wNVMTargetAddress & 0x03)
+	{
+		err = FLASH_ERR_INVALID_PARAM;
+		return (err);
+	}
+	// Loop for the two longwords (8 bytes) programming
+	for(i = 0; i < w2LongWordCount; i++)
+	{
+		dwData0 = *pdwData++;
+		dwData1 = *pdwData++;
+		err = Flash_Program2LongWords(wTargetAddress, dwData0, dwData1);
+		if(err)
+		{
+			goto EndP;
+			//break;
+		}
+		wTargetAddress += 8;
+	}
+	// Loop for the single longword (4 bytes) programming
+	for(i = 0; i < wLeftLongWords; i++)
+	{
+		dwData0 = *pdwData++;
+		//printf("\n adr : 0x%x ,data = 0x%x\n",i,dwData0 );
+		err = Flash_Program1LongWord(wTargetAddress, dwData0);
+    //printf("\n adr : 0x%x ,data = 0x%x\n",i,dwData0 );
+		if(err)
+		{			
+			goto EndP;
+			//break;
+		}
+		wTargetAddress += 4;
+	}
+	wLeftBytes = (wLeftBytes-(wLeftLongWords<<2));	// calculate the # of bytes that are not programmed
+	if(!wLeftBytes){
+		return (err);
+	}
+        
+#if     defined(BIG_ENDIAN)                
+	dwData0 = 0;
+	pData = (uint8_t*)pdwData;	// pointer to the left bytes
+	for(i = wLeftBytes; i >0; i--)
+	{
+		dwData0 <<= 8;
+		dwData0 |= *pData++;	// MSB byte first
+	}
+	// Calculate how many bytes need to be filled with 0xFFs
+	// in order to form a single longword for the left bytes of data
+	wLeftBytes = 4 - wLeftBytes;	
+	//  
+	for(i = wLeftBytes; i >0; i--)
+	{
+		dwData0 <<= 8;
+		dwData0 |= 0xFF;	// MSB byte first
+	}
+#else
+	dwData0 = 0xFFFFFFFFL;        
+	pData = (uint8_t*)pdwData+wLeftBytes-1;	// pointer to the left bytes
+	for(i = wLeftBytes; i >0; i--)
+	{
+		dwData0 <<= 8;
+		dwData0 |= *pData--;	// MSB byte first
+	}
+#endif	
+	// Now program the last longword
+	err = Flash_Program1LongWord(wTargetAddress, dwData0);	
+EndP:	
+	return (err);
+}
+
+uint16_t Flash_Program1LongWord(uint32_t wNVMTargetAddress, uint32_t dwData)
+{
+	uint16_t err = FLASH_ERR_SUCCESS;
+	
+	// Check address to see if it is aligned to 4 bytes
+	// Global address [1:0] must be 00.
+	if(wNVMTargetAddress & 0x03)
+	{
+		err = FLASH_ERR_INVALID_PARAM;
+		return (err);
+	}
+	// Clear error flags
+	EFMCMD = FLASH_CMD_CLEAR;
+	// Write index to specify the command code to be loaded
+	M32(wNVMTargetAddress) = dwData;
+	// Write command code and memory address bits[23:16]	
+        EFM_LaunchCMD(FLASH_CMD_PROGRAM);
+	return (err);
+}
+
+
+uint16_t Flash_Program2LongWords(uint32_t wNVMTargetAddress, uint32_t dwData0, uint32_t dwData1)
+{
+	uint16_t err = FLASH_ERR_SUCCESS;
+
+	
+	// Check address to see if it is aligned to 4 bytes
+	// Global address [1:0] must be 00.
+	if(wNVMTargetAddress & 0x03)
+	{
+		err = FLASH_ERR_INVALID_PARAM;
+		return (err);
+	}
+	// Clear error flags
+
+	EFMCMD = FLASH_CMD_CLEAR;
+
+//	printf("\n write data  adr : 0x%x ,data = 0x%x\n",dwData0,dwData1 );
+	// Write index to specify the command code to be loaded
+	M32(wNVMTargetAddress) = dwData0;
+	// Write command code and memory address bits[23:16]	
+  EFM_LaunchCMD(FLASH_CMD_PROGRAM);
+	wNVMTargetAddress = wNVMTargetAddress +4;
+	
+	//	printf("\n write data  adr : 0x%x ,data = 0x%x\n",wNVMTargetAddress,dwData1 );
+	// Clear error flags
+		EFMCMD = FLASH_CMD_CLEAR;
+	// Write index to specify the command code to be loaded
+	M32(wNVMTargetAddress) = dwData1;
+	// Write command code and memory address bits[23:16]	
+  EFM_LaunchCMD(FLASH_CMD_PROGRAM);
+//	printf("\n write data  adr : 0x%x ,data = 0x%x\n",wNVMTargetAddress,dwData1 );
+	return (err);
+}
+
+
+
+
+
+/*****************************************************************************//*!
+FUNCTION----------------------------------------------------------------
+* @function name: Flash_EraseSector
+*
+* @brief erase flash sector, each flash sector is of 512 bytes long,
+* global address [1:0] = 00.
+*        
+* @param  
+*
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+uint16_t  Flash_EraseSector(uint32_t wNVMTargetAddress)
+{
+	uint16_t err = FLASH_ERR_SUCCESS;
+	// Check address to see if it is aligned to 4 bytes
+	// Global address [1:0] must be 00.
+	if(wNVMTargetAddress & 0x03)
+	{
+		err = FLASH_ERR_INVALID_PARAM;
+		return (err);
+	}
+	// Clear error flags
+		EFMCMD = FLASH_CMD_CLEAR;
+	  M32(wNVMTargetAddress) = 0xffffffff;
+	  EFM_LaunchCMD(FLASH_CMD_ERASE_SECTOR);
+	return (err);
+}
+
+uint16_t Flash_VerifyBackdoorKey()
+{
+	uint16_t err = FLASH_ERR_SUCCESS;
+//        int i;
+        
+	// Clear error flags
+		EFMCMD = FLASH_CMD_CLEAR;
+	// Write index to specify the command code to be loaded
+	 Custombkd = FLASH_FACTORY_KEY;
+	return (err);
+}
+
+/*****************************************************************************//*!
+FUNCTION----------------------------------------------------------------
+* @function name: NVM_EraseAll
+*
+* @brief erase all block,both flash and EEPROM
+*        
+* @param  
+*	
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+uint16_t NVM_EraseAll(void)
+{
+	uint16_t err = FLASH_ERR_SUCCESS;
+		EFMCMD = FLASH_CMD_CLEAR;
+	  EFM_LaunchCMD(FLASH_CMD_ERASE_ALL);
+	// Clear error flags
+    return err;
+}
+
+/*****************************************************************************//*!
+FUNCTION----------------------------------------------------------------
+* @function name: NVM_Unsecure
+*
+* @brief unsecure 
+*        
+* @param  
+*	
+* @return none
+*
+* @ Pass/ Fail criteria: none
+*****************************************************************************/
+uint16_t NVM_Unsecure(void)
+{
+	uint16_t err = FLASH_ERR_SUCCESS;
+
+    return err;
+}
+
+#ifdef IAR
+void __ramfunc EFM_LaunchCMD(uint32_t EFM_CMD)
+#else
+void EFM_LaunchCMD(uint32_t EFM_CMD)
+#endif
+{
+  DisableInterrupts;
+		if((EFMCMD&EFM_DONE_MASK)== EFM_STATUS_READY)
+		{
+	  EFMCMD = EFM_CMD;
+		}
+	while(1)
+	{
+		if((EFMCMD&EFM_DONE_MASK) == EFM_STATUS_DONE) break;
+	}
+ EnableInterrupts;
+}
--- a/Show More
+++ b/Show More