mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2026-09-19 16:26:55 +08:00
增加对lcd和sd驱动的支持
This commit is contained in:
Hao Zhu
@@ -104,6 +104,10 @@ CONFIG_FINSH_ARG_MAX=10
|
||||
# Device virtual file system
|
||||
#
|
||||
# CONFIG_RT_USING_DFS is not set
|
||||
# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set
|
||||
# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
|
||||
# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
|
||||
# CONFIG_RT_DFS_ELM_USE_LFN_3 is not set
|
||||
|
||||
#
|
||||
# Device Drivers
|
||||
@@ -338,7 +342,10 @@ CONFIG_BSP_USING_USB_TO_USART=y
|
||||
# CONFIG_BSP_USING_RS232 is not set
|
||||
# CONFIG_BSP_USING_SDRAM is not set
|
||||
# CONFIG_BSP_USING_QSPI_FLASH is not set
|
||||
# CONFIG_BSP_USING_LCD is not set
|
||||
# CONFIG_BSP_USING_MPU6050 is not set
|
||||
# CONFIG_BSP_USING_POT is not set
|
||||
# CONFIG_BSP_USING_SDCARD is not set
|
||||
|
||||
#
|
||||
# On-chip Peripheral Drivers
|
||||
@@ -355,6 +362,9 @@ CONFIG_BSP_USING_UART1=y
|
||||
# CONFIG_BSP_USING_I2C1 is not set
|
||||
# CONFIG_BSP_USING_ONCHIP_RTC is not set
|
||||
# CONFIG_BSP_USING_WDT is not set
|
||||
# CONFIG_BSP_USING_SDIO is not set
|
||||
# CONFIG_BSP_USING_FMC is not set
|
||||
# CONFIG_BSP_USING_LTDC is not set
|
||||
|
||||
#
|
||||
# Board extended module Drivers
|
||||
|
||||
@@ -37,33 +37,34 @@
|
||||
|
||||
本 BSP 目前对外设的支持情况如下：
|
||||
|
||||
| **板载外设** | **支持情况** | **备注** |
|
||||
| :----------------- | :----------: | :------------------------------------- |
|
||||
| USB 转串口 | 支持 | |
|
||||
| RS232 | 支持 | 与以太网有引脚冲突 |
|
||||
| QSPI Flash | 支持 | |
|
||||
| 电位器 | 支持 | 使用 ADC1 |
|
||||
| 以太网 | 暂不支持 | 移植中 |
|
||||
| MPU6050六轴传感器 | 支持 | |
|
||||
| SDRAM | 支持 | |
|
||||
| SD卡 | 即将支持 | |
|
||||
| CAN | 即将支持 | |
|
||||
| EMW1062 | 暂不支持 | |
|
||||
| **片上外设** | **支持情况** | **备注** |
|
||||
| GPIO | 支持 | PA0, PA1... PK15 ---> PIN: 0, 1...176 |
|
||||
| UART | 支持 | UART1/x/x |
|
||||
| SPI | 支持 | SPI1/x/x |
|
||||
| I2C | 支持 | 软件 I2C |
|
||||
| ADC | 支持 | |
|
||||
| RTC | 支持 | |
|
||||
| WDT | 支持 | |
|
||||
| FLASH | 支持 | 已适配 [FAL](https://github.com/RT-Thread-packages/fal) |
|
||||
| SDIO | 暂不支持 | 即将支持 |
|
||||
| PWM | 暂不支持 | 即将支持 |
|
||||
| USB Device | 暂不支持 | 即将支持 |
|
||||
| USB Host | 暂不支持 | 即将支持 |
|
||||
| **扩展模块** | **支持情况** | **备注** |
|
||||
| 暂无 | 暂不支持 | 暂不支持 |
|
||||
| **板载外设** | **支持情况** | **备注** |
|
||||
| :---------------- | :----------: | :------------------------------------------------------ |
|
||||
| USB 转串口 | 支持 | |
|
||||
| RS232 | 支持 | 与以太网有引脚冲突 |
|
||||
| QSPI Flash | 支持 | |
|
||||
| 电位器 | 支持 | 使用 ADC1 |
|
||||
| 以太网 | 暂不支持 | 移植中 |
|
||||
| MPU6050六轴传感器 | 支持 | |
|
||||
| SDRAM | 支持 | |
|
||||
| LCD | 支持 | |
|
||||
| SD卡 | 支持 | |
|
||||
| CAN | 即将支持 | |
|
||||
| EMW1062 | 暂不支持 | |
|
||||
| **片上外设** | **支持情况** | **备注** |
|
||||
| GPIO | 支持 | PA0, PA1... PK15 ---> PIN: 0, 1...176 |
|
||||
| UART | 支持 | UART1/x/x |
|
||||
| SPI | 支持 | SPI1/x/x |
|
||||
| I2C | 支持 | 软件 I2C |
|
||||
| ADC | 支持 | |
|
||||
| RTC | 支持 | |
|
||||
| WDT | 支持 | |
|
||||
| FLASH | 支持 | 已适配 [FAL](https://github.com/RT-Thread-packages/fal) |
|
||||
| SDIO | 支持 | |
|
||||
| PWM | 暂不支持 | 即将支持 |
|
||||
| USB Device | 暂不支持 | 即将支持 |
|
||||
| USB Host | 暂不支持 | 即将支持 |
|
||||
| **扩展模块** | **支持情况** | **备注** |
|
||||
| 暂无 | 暂不支持 | 暂不支持 |
|
||||
|
||||
## 使用说明
|
||||
|
||||
|
||||
File diff suppressed because one or more lines are too long
@@ -1,27 +1,123 @@
|
||||
#MicroXplorer Configuration settings - do not modify
|
||||
ETH.IPParameters=MediaInterface
|
||||
ETH.MediaInterface=ETH_MEDIA_INTERFACE_RMII
|
||||
File.Version=6
|
||||
KeepUserPlacement=false
|
||||
Mcu.Family=STM32F7
|
||||
Mcu.IP0=CORTEX_M7
|
||||
Mcu.IP1=NVIC
|
||||
Mcu.IP2=RCC
|
||||
Mcu.IP3=SYS
|
||||
Mcu.IP4=USART1
|
||||
Mcu.IPNb=5
|
||||
Mcu.IP1=DMA2D
|
||||
Mcu.IP10=USART1
|
||||
Mcu.IP2=ETH
|
||||
Mcu.IP3=FMC
|
||||
Mcu.IP4=LTDC
|
||||
Mcu.IP5=NVIC
|
||||
Mcu.IP6=QUADSPI
|
||||
Mcu.IP7=RCC
|
||||
Mcu.IP8=SDMMC1
|
||||
Mcu.IP9=SYS
|
||||
Mcu.IPNb=11
|
||||
Mcu.Name=STM32F767I(G-I)Tx
|
||||
Mcu.Package=LQFP176
|
||||
Mcu.Pin0=PH0/OSC_IN
|
||||
Mcu.Pin1=PH1/OSC_OUT
|
||||
Mcu.Pin2=PH10
|
||||
Mcu.Pin3=PA9
|
||||
Mcu.Pin4=PA10
|
||||
Mcu.Pin5=VP_SYS_VS_Systick
|
||||
Mcu.PinsNb=6
|
||||
Mcu.Pin0=PE4
|
||||
Mcu.Pin1=PE5
|
||||
Mcu.Pin10=PF5
|
||||
Mcu.Pin11=PF6
|
||||
Mcu.Pin12=PF7
|
||||
Mcu.Pin13=PF8
|
||||
Mcu.Pin14=PF9
|
||||
Mcu.Pin15=PF10
|
||||
Mcu.Pin16=PH0/OSC_IN
|
||||
Mcu.Pin17=PH1/OSC_OUT
|
||||
Mcu.Pin18=PC0
|
||||
Mcu.Pin19=PC1
|
||||
Mcu.Pin2=PE6
|
||||
Mcu.Pin20=PA1
|
||||
Mcu.Pin21=PA2
|
||||
Mcu.Pin22=PH2
|
||||
Mcu.Pin23=PH3
|
||||
Mcu.Pin24=PA3
|
||||
Mcu.Pin25=PA7
|
||||
Mcu.Pin26=PC4
|
||||
Mcu.Pin27=PC5
|
||||
Mcu.Pin28=PB0
|
||||
Mcu.Pin29=PB1
|
||||
Mcu.Pin3=PI9
|
||||
Mcu.Pin30=PB2
|
||||
Mcu.Pin31=PF11
|
||||
Mcu.Pin32=PF12
|
||||
Mcu.Pin33=PF13
|
||||
Mcu.Pin34=PF14
|
||||
Mcu.Pin35=PF15
|
||||
Mcu.Pin36=PG0
|
||||
Mcu.Pin37=PG1
|
||||
Mcu.Pin38=PE7
|
||||
Mcu.Pin39=PE8
|
||||
Mcu.Pin4=PI10
|
||||
Mcu.Pin40=PE9
|
||||
Mcu.Pin41=PE10
|
||||
Mcu.Pin42=PE11
|
||||
Mcu.Pin43=PE12
|
||||
Mcu.Pin44=PE13
|
||||
Mcu.Pin45=PE14
|
||||
Mcu.Pin46=PE15
|
||||
Mcu.Pin47=PB11
|
||||
Mcu.Pin48=PH6
|
||||
Mcu.Pin49=PH7
|
||||
Mcu.Pin5=PF0
|
||||
Mcu.Pin50=PH8
|
||||
Mcu.Pin51=PH10
|
||||
Mcu.Pin52=PB12
|
||||
Mcu.Pin53=PB13
|
||||
Mcu.Pin54=PD8
|
||||
Mcu.Pin55=PD9
|
||||
Mcu.Pin56=PD10
|
||||
Mcu.Pin57=PD14
|
||||
Mcu.Pin58=PD15
|
||||
Mcu.Pin59=PG4
|
||||
Mcu.Pin6=PF1
|
||||
Mcu.Pin60=PG5
|
||||
Mcu.Pin61=PG6
|
||||
Mcu.Pin62=PG7
|
||||
Mcu.Pin63=PG8
|
||||
Mcu.Pin64=PC7
|
||||
Mcu.Pin65=PC8
|
||||
Mcu.Pin66=PC9
|
||||
Mcu.Pin67=PA9
|
||||
Mcu.Pin68=PA10
|
||||
Mcu.Pin69=PA11
|
||||
Mcu.Pin7=PF2
|
||||
Mcu.Pin70=PA12
|
||||
Mcu.Pin71=PH13
|
||||
Mcu.Pin72=PH15
|
||||
Mcu.Pin73=PI0
|
||||
Mcu.Pin74=PI2
|
||||
Mcu.Pin75=PC10
|
||||
Mcu.Pin76=PC11
|
||||
Mcu.Pin77=PC12
|
||||
Mcu.Pin78=PD0
|
||||
Mcu.Pin79=PD1
|
||||
Mcu.Pin8=PF3
|
||||
Mcu.Pin80=PD2
|
||||
Mcu.Pin81=PD6
|
||||
Mcu.Pin82=PG10
|
||||
Mcu.Pin83=PG11
|
||||
Mcu.Pin84=PG12
|
||||
Mcu.Pin85=PG15
|
||||
Mcu.Pin86=PB6
|
||||
Mcu.Pin87=PB8
|
||||
Mcu.Pin88=PB9
|
||||
Mcu.Pin89=PE0
|
||||
Mcu.Pin9=PF4
|
||||
Mcu.Pin90=PE1
|
||||
Mcu.Pin91=PI4
|
||||
Mcu.Pin92=VP_DMA2D_VS_DMA2D
|
||||
Mcu.Pin93=VP_SYS_VS_Systick
|
||||
Mcu.PinsNb=94
|
||||
Mcu.ThirdPartyNb=0
|
||||
Mcu.UserConstants=
|
||||
Mcu.UserName=STM32F767IGTx
|
||||
MxCube.Version=5.0.0
|
||||
MxDb.Version=DB.5.0.0
|
||||
MxCube.Version=5.0.1
|
||||
MxDb.Version=DB.5.0.1
|
||||
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false
|
||||
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false
|
||||
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false
|
||||
@@ -32,12 +128,81 @@ NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
|
||||
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false
|
||||
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false
|
||||
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false
|
||||
PA1.Mode=RMII
|
||||
PA1.Signal=ETH_REF_CLK
|
||||
PA10.Locked=true
|
||||
PA10.Mode=Asynchronous
|
||||
PA10.Signal=USART1_RX
|
||||
PA11.GPIOParameters=GPIO_Speed
|
||||
PA11.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PA11.Locked=true
|
||||
PA11.Mode=RGB888
|
||||
PA11.Signal=LTDC_R4
|
||||
PA12.GPIOParameters=GPIO_Speed
|
||||
PA12.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PA12.Locked=true
|
||||
PA12.Mode=RGB888
|
||||
PA12.Signal=LTDC_R5
|
||||
PA2.Mode=RMII
|
||||
PA2.Signal=ETH_MDIO
|
||||
PA3.GPIOParameters=GPIO_Speed
|
||||
PA3.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PA3.Mode=RGB888
|
||||
PA3.Signal=LTDC_B5
|
||||
PA7.Mode=RMII
|
||||
PA7.Signal=ETH_CRS_DV
|
||||
PA9.Locked=true
|
||||
PA9.Mode=Asynchronous
|
||||
PA9.Signal=USART1_TX
|
||||
PB0.GPIOParameters=GPIO_Speed
|
||||
PB0.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PB0.Mode=RGB888
|
||||
PB0.Signal=LTDC_R3
|
||||
PB1.GPIOParameters=GPIO_Speed
|
||||
PB1.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PB1.Mode=RGB888
|
||||
PB1.Signal=LTDC_R6
|
||||
PB11.Mode=RMII
|
||||
PB11.Signal=ETH_TX_EN
|
||||
PB12.Mode=RMII
|
||||
PB12.Signal=ETH_TXD0
|
||||
PB13.Mode=RMII
|
||||
PB13.Signal=ETH_TXD1
|
||||
PB2.Mode=Single Bank 1
|
||||
PB2.Signal=QUADSPI_CLK
|
||||
PB6.Locked=true
|
||||
PB6.Mode=Single Bank 1
|
||||
PB6.Signal=QUADSPI_BK1_NCS
|
||||
PB8.GPIOParameters=GPIO_Speed
|
||||
PB8.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PB8.Mode=RGB888
|
||||
PB8.Signal=LTDC_B6
|
||||
PB9.GPIOParameters=GPIO_Speed
|
||||
PB9.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PB9.Mode=RGB888
|
||||
PB9.Signal=LTDC_B7
|
||||
PC0.Signal=FMC_SDNWE
|
||||
PC1.Mode=RMII
|
||||
PC1.Signal=ETH_MDC
|
||||
PC10.Mode=SD_4_bits_Wide_bus
|
||||
PC10.Signal=SDMMC1_D2
|
||||
PC11.Mode=SD_4_bits_Wide_bus
|
||||
PC11.Signal=SDMMC1_D3
|
||||
PC12.Mode=SD_4_bits_Wide_bus
|
||||
PC12.Signal=SDMMC1_CK
|
||||
PC4.Mode=RMII
|
||||
PC4.Signal=ETH_RXD0
|
||||
PC5.Mode=RMII
|
||||
PC5.Signal=ETH_RXD1
|
||||
PC7.GPIOParameters=GPIO_Speed
|
||||
PC7.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PC7.Locked=true
|
||||
PC7.Mode=RGB888
|
||||
PC7.Signal=LTDC_G6
|
||||
PC8.Mode=SD_4_bits_Wide_bus
|
||||
PC8.Signal=SDMMC1_D0
|
||||
PC9.Mode=SD_4_bits_Wide_bus
|
||||
PC9.Signal=SDMMC1_D1
|
||||
PCC.Checker=false
|
||||
PCC.Line=STM32F7x7
|
||||
PCC.MCU=STM32F767I(G-I)Tx
|
||||
@@ -46,12 +211,124 @@ PCC.Seq0=0
|
||||
PCC.Series=STM32F7
|
||||
PCC.Temperature=25
|
||||
PCC.Vdd=3.3
|
||||
PD0.Signal=FMC_D2_DA2
|
||||
PD1.Signal=FMC_D3_DA3
|
||||
PD10.Signal=FMC_D15_DA15
|
||||
PD14.Signal=FMC_D0_DA0
|
||||
PD15.Signal=FMC_D1_DA1
|
||||
PD2.Mode=SD_4_bits_Wide_bus
|
||||
PD2.Signal=SDMMC1_CMD
|
||||
PD6.GPIOParameters=GPIO_Speed
|
||||
PD6.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PD6.Mode=RGB888
|
||||
PD6.Signal=LTDC_B2
|
||||
PD8.Signal=FMC_D13_DA13
|
||||
PD9.Signal=FMC_D14_DA14
|
||||
PE0.Signal=FMC_NBL0
|
||||
PE1.Signal=FMC_NBL1
|
||||
PE10.Signal=FMC_D7_DA7
|
||||
PE11.Signal=FMC_D8_DA8
|
||||
PE12.Signal=FMC_D9_DA9
|
||||
PE13.Signal=FMC_D10_DA10
|
||||
PE14.Signal=FMC_D11_DA11
|
||||
PE15.Signal=FMC_D12_DA12
|
||||
PE4.GPIOParameters=GPIO_Speed
|
||||
PE4.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PE4.Mode=RGB888
|
||||
PE4.Signal=LTDC_B0
|
||||
PE5.GPIOParameters=GPIO_Speed
|
||||
PE5.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PE5.Mode=RGB888
|
||||
PE5.Signal=LTDC_G0
|
||||
PE6.GPIOParameters=GPIO_Speed
|
||||
PE6.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PE6.Mode=RGB888
|
||||
PE6.Signal=LTDC_G1
|
||||
PE7.Signal=FMC_D4_DA4
|
||||
PE8.Signal=FMC_D5_DA5
|
||||
PE9.Signal=FMC_D6_DA6
|
||||
PF0.Signal=FMC_A0
|
||||
PF1.Signal=FMC_A1
|
||||
PF10.GPIOParameters=GPIO_Speed
|
||||
PF10.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PF10.Mode=RGB888
|
||||
PF10.Signal=LTDC_DE
|
||||
PF11.Signal=FMC_SDNRAS
|
||||
PF12.Signal=FMC_A6
|
||||
PF13.Signal=FMC_A7
|
||||
PF14.Signal=FMC_A8
|
||||
PF15.Signal=FMC_A9
|
||||
PF2.Signal=FMC_A2
|
||||
PF3.Signal=FMC_A3
|
||||
PF4.Signal=FMC_A4
|
||||
PF5.Signal=FMC_A5
|
||||
PF6.Mode=Single Bank 1
|
||||
PF6.Signal=QUADSPI_BK1_IO3
|
||||
PF7.Locked=true
|
||||
PF7.Mode=Single Bank 1
|
||||
PF7.Signal=QUADSPI_BK1_IO2
|
||||
PF8.Mode=Single Bank 1
|
||||
PF8.Signal=QUADSPI_BK1_IO0
|
||||
PF9.Mode=Single Bank 1
|
||||
PF9.Signal=QUADSPI_BK1_IO1
|
||||
PG0.Signal=FMC_A10
|
||||
PG1.Signal=FMC_A11
|
||||
PG10.GPIOParameters=GPIO_Speed
|
||||
PG10.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PG10.Locked=true
|
||||
PG10.Mode=RGB888
|
||||
PG10.Signal=LTDC_G3
|
||||
PG11.GPIOParameters=GPIO_Speed
|
||||
PG11.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PG11.Locked=true
|
||||
PG11.Mode=RGB888
|
||||
PG11.Signal=LTDC_B3
|
||||
PG12.Mode=RGB888
|
||||
PG12.Signal=LTDC_B1
|
||||
PG15.Signal=FMC_SDNCAS
|
||||
PG4.Signal=FMC_A14_BA0
|
||||
PG5.Signal=FMC_A15_BA1
|
||||
PG6.GPIOParameters=GPIO_Speed
|
||||
PG6.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PG6.Mode=RGB888
|
||||
PG6.Signal=LTDC_R7
|
||||
PG7.GPIOParameters=GPIO_Speed
|
||||
PG7.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
|
||||
PG7.Mode=RGB888
|
||||
PG7.Signal=LTDC_CLK
|
||||
PG8.Signal=FMC_SDCLK
|
||||
PH0/OSC_IN.Mode=HSE-External-Oscillator
|
||||
PH0/OSC_IN.Signal=RCC_OSC_IN
|
||||
PH1/OSC_OUT.Mode=HSE-External-Oscillator
|
||||
PH1/OSC_OUT.Signal=RCC_OSC_OUT
|
||||
PH10.Locked=true
|
||||
PH10.Signal=GPIO_Output
|
||||
PH13.Locked=true
|
||||
PH13.Mode=RGB888
|
||||
PH13.Signal=LTDC_G2
|
||||
PH15.Mode=RGB888
|
||||
PH15.Signal=LTDC_G4
|
||||
PH2.Mode=RGB888
|
||||
PH2.Signal=LTDC_R0
|
||||
PH3.Mode=RGB888
|
||||
PH3.Signal=LTDC_R1
|
||||
PH6.Mode=SdramChipSelect2_1
|
||||
PH6.Signal=FMC_SDNE1
|
||||
PH7.Mode=SdramChipSelect2_1
|
||||
PH7.Signal=FMC_SDCKE1
|
||||
PH8.Mode=RGB888
|
||||
PH8.Signal=LTDC_R2
|
||||
PI0.Locked=true
|
||||
PI0.Mode=RGB888
|
||||
PI0.Signal=LTDC_G5
|
||||
PI10.Mode=RGB888
|
||||
PI10.Signal=LTDC_HSYNC
|
||||
PI2.Mode=RGB888
|
||||
PI2.Signal=LTDC_G7
|
||||
PI4.Mode=RGB888
|
||||
PI4.Signal=LTDC_B4
|
||||
PI9.Mode=RGB888
|
||||
PI9.Signal=LTDC_VSYNC
|
||||
PinOutPanel.RotationAngle=0
|
||||
ProjectManager.AskForMigrate=true
|
||||
ProjectManager.BackupPrevious=false
|
||||
@@ -79,7 +356,7 @@ ProjectManager.StackSize=0x400
|
||||
ProjectManager.TargetToolchain=MDK-ARM V5
|
||||
ProjectManager.ToolChainLocation=
|
||||
ProjectManager.UnderRoot=false
|
||||
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true
|
||||
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_ETH_Init-ETH-false-HAL-true,6-MX_FMC_Init-FMC-false-HAL-true,7-MX_QUADSPI_Init-QUADSPI-false-HAL-true,8-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,9-MX_DMA2D_Init-DMA2D-false-HAL-true,10-MX_LTDC_Init-LTDC-false-HAL-true
|
||||
RCC.AHBFreq_Value=216000000
|
||||
RCC.APB1CLKDivider=RCC_HCLK_DIV4
|
||||
RCC.APB1Freq_Value=54000000
|
||||
@@ -102,8 +379,8 @@ RCC.I2C2Freq_Value=54000000
|
||||
RCC.I2C3Freq_Value=54000000
|
||||
RCC.I2C4Freq_Value=54000000
|
||||
RCC.I2SFreq_Value=96000000
|
||||
RCC.IPParameters=AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CECFreq_Value,CortexFreq_Value,DFSDMAudioFreq_Value,DFSDMFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LCDTFTFreq_Value,LPTIM1Freq_Value,LSE_VALUE,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLI2SPCLKFreq_Value,PLLI2SQCLKFreq_Value,PLLI2SRCLKFreq_Value,PLLI2SRoutputFreq_Value,PLLM,PLLN,PLLQCLKFreq_Value,PLLQoutputFreq_Value,PLLRFreq_Value,PLLSAIPCLKFreq_Value,PLLSAIQCLKFreq_Value,PLLSAIRCLKFreq_Value,PLLSAIoutputFreq_Value,PLLSourceVirtual,RNGFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMC2Freq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,UART7Freq_Value,UART8Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,USBFreq_Value,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value
|
||||
RCC.LCDTFTFreq_Value=48000000
|
||||
RCC.IPParameters=AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CECFreq_Value,CortexFreq_Value,DFSDMAudioFreq_Value,DFSDMFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LCDTFTFreq_Value,LPTIM1Freq_Value,LSE_VALUE,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLI2SPCLKFreq_Value,PLLI2SQCLKFreq_Value,PLLI2SRCLKFreq_Value,PLLI2SRoutputFreq_Value,PLLM,PLLN,PLLQ,PLLQCLKFreq_Value,PLLQoutputFreq_Value,PLLRFreq_Value,PLLSAIPCLKFreq_Value,PLLSAIQCLKFreq_Value,PLLSAIR,PLLSAIRCLKFreq_Value,PLLSAIoutputFreq_Value,PLLSourceVirtual,RNGFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMC2Freq_Value,SDMMCClockSelection,SDMMCFreq_Value,SPDIFRXFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,UART7Freq_Value,UART8Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,USBFreq_Value,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value
|
||||
RCC.LCDTFTFreq_Value=32000000
|
||||
RCC.LPTIM1Freq_Value=54000000
|
||||
RCC.LSE_VALUE=32768
|
||||
RCC.LSI_VALUE=32000
|
||||
@@ -115,19 +392,22 @@ RCC.PLLI2SRCLKFreq_Value=96000000
|
||||
RCC.PLLI2SRoutputFreq_Value=96000000
|
||||
RCC.PLLM=25
|
||||
RCC.PLLN=432
|
||||
RCC.PLLQCLKFreq_Value=216000000
|
||||
RCC.PLLQoutputFreq_Value=216000000
|
||||
RCC.PLLQ=9
|
||||
RCC.PLLQCLKFreq_Value=48000000
|
||||
RCC.PLLQoutputFreq_Value=48000000
|
||||
RCC.PLLRFreq_Value=216000000
|
||||
RCC.PLLSAIPCLKFreq_Value=96000000
|
||||
RCC.PLLSAIQCLKFreq_Value=96000000
|
||||
RCC.PLLSAIRCLKFreq_Value=96000000
|
||||
RCC.PLLSAIR=3
|
||||
RCC.PLLSAIRCLKFreq_Value=64000000
|
||||
RCC.PLLSAIoutputFreq_Value=96000000
|
||||
RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
|
||||
RCC.RNGFreq_Value=216000000
|
||||
RCC.RNGFreq_Value=48000000
|
||||
RCC.SAI1Freq_Value=96000000
|
||||
RCC.SAI2Freq_Value=96000000
|
||||
RCC.SDMMC2Freq_Value=216000000
|
||||
RCC.SDMMCFreq_Value=216000000
|
||||
RCC.SDMMCClockSelection=RCC_SDMMC1CLKSOURCE_CLK48
|
||||
RCC.SDMMCFreq_Value=48000000
|
||||
RCC.SPDIFRXFreq_Value=96000000
|
||||
RCC.SYSCLKFreq_VALUE=216000000
|
||||
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
|
||||
@@ -139,13 +419,87 @@ RCC.USART1Freq_Value=108000000
|
||||
RCC.USART2Freq_Value=54000000
|
||||
RCC.USART3Freq_Value=54000000
|
||||
RCC.USART6Freq_Value=108000000
|
||||
RCC.USBFreq_Value=216000000
|
||||
RCC.USBFreq_Value=48000000
|
||||
RCC.VCOI2SOutputFreq_Value=192000000
|
||||
RCC.VCOInputFreq_Value=1000000
|
||||
RCC.VCOOutputFreq_Value=432000000
|
||||
RCC.VCOSAIOutputFreq_Value=192000000
|
||||
SH.FMC_A0.0=FMC_A0,12b-sda1
|
||||
SH.FMC_A0.ConfNb=1
|
||||
SH.FMC_A1.0=FMC_A1,12b-sda1
|
||||
SH.FMC_A1.ConfNb=1
|
||||
SH.FMC_A10.0=FMC_A10,12b-sda1
|
||||
SH.FMC_A10.ConfNb=1
|
||||
SH.FMC_A11.0=FMC_A11,12b-sda1
|
||||
SH.FMC_A11.ConfNb=1
|
||||
SH.FMC_A14_BA0.0=FMC_BA0,FourSdramBanks1
|
||||
SH.FMC_A14_BA0.ConfNb=1
|
||||
SH.FMC_A15_BA1.0=FMC_BA1,FourSdramBanks1
|
||||
SH.FMC_A15_BA1.ConfNb=1
|
||||
SH.FMC_A2.0=FMC_A2,12b-sda1
|
||||
SH.FMC_A2.ConfNb=1
|
||||
SH.FMC_A3.0=FMC_A3,12b-sda1
|
||||
SH.FMC_A3.ConfNb=1
|
||||
SH.FMC_A4.0=FMC_A4,12b-sda1
|
||||
SH.FMC_A4.ConfNb=1
|
||||
SH.FMC_A5.0=FMC_A5,12b-sda1
|
||||
SH.FMC_A5.ConfNb=1
|
||||
SH.FMC_A6.0=FMC_A6,12b-sda1
|
||||
SH.FMC_A6.ConfNb=1
|
||||
SH.FMC_A7.0=FMC_A7,12b-sda1
|
||||
SH.FMC_A7.ConfNb=1
|
||||
SH.FMC_A8.0=FMC_A8,12b-sda1
|
||||
SH.FMC_A8.ConfNb=1
|
||||
SH.FMC_A9.0=FMC_A9,12b-sda1
|
||||
SH.FMC_A9.ConfNb=1
|
||||
SH.FMC_D0_DA0.0=FMC_D0,sd-16b-d1
|
||||
SH.FMC_D0_DA0.ConfNb=1
|
||||
SH.FMC_D10_DA10.0=FMC_D10,sd-16b-d1
|
||||
SH.FMC_D10_DA10.ConfNb=1
|
||||
SH.FMC_D11_DA11.0=FMC_D11,sd-16b-d1
|
||||
SH.FMC_D11_DA11.ConfNb=1
|
||||
SH.FMC_D12_DA12.0=FMC_D12,sd-16b-d1
|
||||
SH.FMC_D12_DA12.ConfNb=1
|
||||
SH.FMC_D13_DA13.0=FMC_D13,sd-16b-d1
|
||||
SH.FMC_D13_DA13.ConfNb=1
|
||||
SH.FMC_D14_DA14.0=FMC_D14,sd-16b-d1
|
||||
SH.FMC_D14_DA14.ConfNb=1
|
||||
SH.FMC_D15_DA15.0=FMC_D15,sd-16b-d1
|
||||
SH.FMC_D15_DA15.ConfNb=1
|
||||
SH.FMC_D1_DA1.0=FMC_D1,sd-16b-d1
|
||||
SH.FMC_D1_DA1.ConfNb=1
|
||||
SH.FMC_D2_DA2.0=FMC_D2,sd-16b-d1
|
||||
SH.FMC_D2_DA2.ConfNb=1
|
||||
SH.FMC_D3_DA3.0=FMC_D3,sd-16b-d1
|
||||
SH.FMC_D3_DA3.ConfNb=1
|
||||
SH.FMC_D4_DA4.0=FMC_D4,sd-16b-d1
|
||||
SH.FMC_D4_DA4.ConfNb=1
|
||||
SH.FMC_D5_DA5.0=FMC_D5,sd-16b-d1
|
||||
SH.FMC_D5_DA5.ConfNb=1
|
||||
SH.FMC_D6_DA6.0=FMC_D6,sd-16b-d1
|
||||
SH.FMC_D6_DA6.ConfNb=1
|
||||
SH.FMC_D7_DA7.0=FMC_D7,sd-16b-d1
|
||||
SH.FMC_D7_DA7.ConfNb=1
|
||||
SH.FMC_D8_DA8.0=FMC_D8,sd-16b-d1
|
||||
SH.FMC_D8_DA8.ConfNb=1
|
||||
SH.FMC_D9_DA9.0=FMC_D9,sd-16b-d1
|
||||
SH.FMC_D9_DA9.ConfNb=1
|
||||
SH.FMC_NBL0.0=FMC_NBL0,Sd2ByteEnable1
|
||||
SH.FMC_NBL0.ConfNb=1
|
||||
SH.FMC_NBL1.0=FMC_NBL1,Sd2ByteEnable1
|
||||
SH.FMC_NBL1.ConfNb=1
|
||||
SH.FMC_SDCLK.0=FMC_SDCLK,12b-sda1
|
||||
SH.FMC_SDCLK.ConfNb=1
|
||||
SH.FMC_SDNCAS.0=FMC_SDNCAS,12b-sda1
|
||||
SH.FMC_SDNCAS.ConfNb=1
|
||||
SH.FMC_SDNRAS.0=FMC_SDNRAS,12b-sda1
|
||||
SH.FMC_SDNRAS.ConfNb=1
|
||||
SH.FMC_SDNWE.0=FMC_SDNWE,12b-sda1
|
||||
SH.FMC_SDNWE.ConfNb=1
|
||||
USART1.IPParameters=VirtualMode-Asynchronous
|
||||
USART1.VirtualMode-Asynchronous=VM_ASYNC
|
||||
VP_DMA2D_VS_DMA2D.Mode=DMA2D_Activate
|
||||
VP_DMA2D_VS_DMA2D.Signal=DMA2D_VS_DMA2D
|
||||
VP_SYS_VS_Systick.Mode=SysTick
|
||||
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
|
||||
board=custom
|
||||
|
||||
@@ -5,7 +5,7 @@
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2018 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
@@ -57,22 +57,22 @@
|
||||
/* #define HAL_CRYP_MODULE_ENABLED */
|
||||
/* #define HAL_DAC_MODULE_ENABLED */
|
||||
/* #define HAL_DCMI_MODULE_ENABLED */
|
||||
/* #define HAL_DMA2D_MODULE_ENABLED */
|
||||
/* #define HAL_ETH_MODULE_ENABLED */
|
||||
#define HAL_DMA2D_MODULE_ENABLED
|
||||
#define HAL_ETH_MODULE_ENABLED
|
||||
/* #define HAL_NAND_MODULE_ENABLED */
|
||||
/* #define HAL_NOR_MODULE_ENABLED */
|
||||
/* #define HAL_SRAM_MODULE_ENABLED */
|
||||
/* #define HAL_SDRAM_MODULE_ENABLED */
|
||||
#define HAL_SDRAM_MODULE_ENABLED
|
||||
/* #define HAL_HASH_MODULE_ENABLED */
|
||||
/* #define HAL_I2S_MODULE_ENABLED */
|
||||
/* #define HAL_IWDG_MODULE_ENABLED */
|
||||
/* #define HAL_LPTIM_MODULE_ENABLED */
|
||||
/* #define HAL_LTDC_MODULE_ENABLED */
|
||||
/* #define HAL_QSPI_MODULE_ENABLED */
|
||||
#define HAL_LTDC_MODULE_ENABLED
|
||||
#define HAL_QSPI_MODULE_ENABLED
|
||||
/* #define HAL_RNG_MODULE_ENABLED */
|
||||
/* #define HAL_RTC_MODULE_ENABLED */
|
||||
/* #define HAL_SAI_MODULE_ENABLED */
|
||||
/* #define HAL_SD_MODULE_ENABLED */
|
||||
#define HAL_SD_MODULE_ENABLED
|
||||
/* #define HAL_MMC_MODULE_ENABLED */
|
||||
/* #define HAL_SPDIFRX_MODULE_ENABLED */
|
||||
/* #define HAL_SPI_MODULE_ENABLED */
|
||||
@@ -190,8 +190,8 @@
|
||||
|
||||
/* Section 2: PHY configuration section */
|
||||
|
||||
/* DP83848_PHY_ADDRESS Address*/
|
||||
#define DP83848_PHY_ADDRESS 0x01U
|
||||
/* LAN8742A_PHY_ADDRESS Address*/
|
||||
#define LAN8742A_PHY_ADDRESS 1
|
||||
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
|
||||
#define PHY_RESET_DELAY ((uint32_t)0x000000FFU)
|
||||
/* PHY Configuration delay */
|
||||
@@ -202,8 +202,8 @@
|
||||
|
||||
/* Section 3: Common PHY Registers */
|
||||
|
||||
#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */
|
||||
#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */
|
||||
#define PHY_BCR ((uint16_t)0x00U) /*!< Transceiver Basic Control Register */
|
||||
#define PHY_BSR ((uint16_t)0x01U) /*!< Transceiver Basic Status Register */
|
||||
|
||||
#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */
|
||||
#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */
|
||||
@@ -226,6 +226,9 @@
|
||||
#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */
|
||||
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */
|
||||
|
||||
#define PHY_ISFR ((uint16_t)0x000BU) /*!< PHY Interrupt Source Flag register Offset */
|
||||
#define PHY_ISFR_INT4 ((uint16_t)0x000BU) /*!< PHY Link down inturrupt */
|
||||
|
||||
/* ################## SPI peripheral configuration ########################## */
|
||||
|
||||
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
||||
|
||||
@@ -0,0 +1,133 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
|
||||
<Target>
|
||||
<TargetName>CubeMX_Config</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>216000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath />
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>0</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>1</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<nTsel>13</nTsel>
|
||||
<sDll />
|
||||
<sDllPa />
|
||||
<sDlgDll />
|
||||
<sDlgPa />
|
||||
<sIfile />
|
||||
<tDll />
|
||||
<tDllPa />
|
||||
<tDlgDll />
|
||||
<tDlgPa />
|
||||
<tIfile />
|
||||
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>ST-LINKIII-KEIL_SWO</Key>
|
||||
<Name>-U-O142 -O2254 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(5BA02477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32F7x_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F767IG$Flash\STM32F7x_1024.FLM) -FF1STM32F7x_TCM -FS1200000 -FL1100000 -FP1($$Device:STM32F767IG$Flash\STM32F7x_TCM.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key />
|
||||
<Name>-U-O142 -O2254 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(5BA02477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32F7x_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F767IG$Flash\STM32F7x_1024.FLM) -FF1STM32F7x_TCM -FS1200000 -FL1100000 -FP1($$Device:STM32F767IG$Flash\STM32F7x_TCM.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>1</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable />
|
||||
<LintConfigFile />
|
||||
</TargetOption>
|
||||
</Target>
|
||||
</ProjectOpt>
|
||||
+435
File diff suppressed because one or more lines are too long
+517
File diff suppressed because it is too large
Load Diff
@@ -63,8 +63,20 @@
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
|
||||
DMA2D_HandleTypeDef hdma2d;
|
||||
|
||||
ETH_HandleTypeDef heth;
|
||||
|
||||
LTDC_HandleTypeDef hltdc;
|
||||
|
||||
QSPI_HandleTypeDef hqspi;
|
||||
|
||||
SD_HandleTypeDef hsd1;
|
||||
|
||||
UART_HandleTypeDef huart1;
|
||||
|
||||
SDRAM_HandleTypeDef hsdram1;
|
||||
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
/* USER CODE END PV */
|
||||
@@ -73,6 +85,12 @@ UART_HandleTypeDef huart1;
|
||||
void SystemClock_Config(void);
|
||||
static void MX_GPIO_Init(void);
|
||||
static void MX_USART1_UART_Init(void);
|
||||
static void MX_ETH_Init(void);
|
||||
static void MX_FMC_Init(void);
|
||||
static void MX_QUADSPI_Init(void);
|
||||
static void MX_SDMMC1_SD_Init(void);
|
||||
static void MX_DMA2D_Init(void);
|
||||
static void MX_LTDC_Init(void);
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
@@ -111,6 +129,12 @@ int main(void)
|
||||
/* Initialize all configured peripherals */
|
||||
MX_GPIO_Init();
|
||||
MX_USART1_UART_Init();
|
||||
MX_ETH_Init();
|
||||
MX_FMC_Init();
|
||||
MX_QUADSPI_Init();
|
||||
MX_SDMMC1_SD_Init();
|
||||
MX_DMA2D_Init();
|
||||
MX_LTDC_Init();
|
||||
/* USER CODE BEGIN 2 */
|
||||
|
||||
/* USER CODE END 2 */
|
||||
@@ -149,7 +173,7 @@ void SystemClock_Config(void)
|
||||
RCC_OscInitStruct.PLL.PLLM = 25;
|
||||
RCC_OscInitStruct.PLL.PLLN = 432;
|
||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 9;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
@@ -173,14 +197,260 @@ void SystemClock_Config(void)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC|RCC_PERIPHCLK_USART1
|
||||
|RCC_PERIPHCLK_SDMMC1|RCC_PERIPHCLK_CLK48;
|
||||
PeriphClkInitStruct.PLLSAI.PLLSAIN = 192;
|
||||
PeriphClkInitStruct.PLLSAI.PLLSAIR = 3;
|
||||
PeriphClkInitStruct.PLLSAI.PLLSAIQ = 2;
|
||||
PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV2;
|
||||
PeriphClkInitStruct.PLLSAIDivQ = 1;
|
||||
PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_2;
|
||||
PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
|
||||
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
|
||||
PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_CLK48;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DMA2D Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_DMA2D_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN DMA2D_Init 0 */
|
||||
|
||||
/* USER CODE END DMA2D_Init 0 */
|
||||
|
||||
/* USER CODE BEGIN DMA2D_Init 1 */
|
||||
|
||||
/* USER CODE END DMA2D_Init 1 */
|
||||
hdma2d.Instance = DMA2D;
|
||||
hdma2d.Init.Mode = DMA2D_M2M;
|
||||
hdma2d.Init.ColorMode = DMA2D_OUTPUT_ARGB8888;
|
||||
hdma2d.Init.OutputOffset = 0;
|
||||
hdma2d.LayerCfg[1].InputOffset = 0;
|
||||
hdma2d.LayerCfg[1].InputColorMode = DMA2D_INPUT_ARGB8888;
|
||||
hdma2d.LayerCfg[1].AlphaMode = DMA2D_NO_MODIF_ALPHA;
|
||||
hdma2d.LayerCfg[1].InputAlpha = 0;
|
||||
hdma2d.LayerCfg[1].AlphaInverted = DMA2D_REGULAR_ALPHA;
|
||||
hdma2d.LayerCfg[1].RedBlueSwap = DMA2D_RB_REGULAR;
|
||||
if (HAL_DMA2D_Init(&hdma2d) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
if (HAL_DMA2D_ConfigLayer(&hdma2d, 1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN DMA2D_Init 2 */
|
||||
|
||||
/* USER CODE END DMA2D_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ETH Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_ETH_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN ETH_Init 0 */
|
||||
|
||||
/* USER CODE END ETH_Init 0 */
|
||||
|
||||
uint8_t MACAddr[6] ;
|
||||
|
||||
/* USER CODE BEGIN ETH_Init 1 */
|
||||
|
||||
/* USER CODE END ETH_Init 1 */
|
||||
heth.Instance = ETH;
|
||||
heth.Init.AutoNegotiation = ETH_AUTONEGOTIATION_ENABLE;
|
||||
heth.Init.PhyAddress = LAN8742A_PHY_ADDRESS;
|
||||
MACAddr[0] = 0x00;
|
||||
MACAddr[1] = 0x80;
|
||||
MACAddr[2] = 0xE1;
|
||||
MACAddr[3] = 0x00;
|
||||
MACAddr[4] = 0x00;
|
||||
MACAddr[5] = 0x00;
|
||||
heth.Init.MACAddr = &MACAddr[0];
|
||||
heth.Init.RxMode = ETH_RXPOLLING_MODE;
|
||||
heth.Init.ChecksumMode = ETH_CHECKSUM_BY_HARDWARE;
|
||||
heth.Init.MediaInterface = ETH_MEDIA_INTERFACE_RMII;
|
||||
|
||||
/* USER CODE BEGIN MACADDRESS */
|
||||
|
||||
/* USER CODE END MACADDRESS */
|
||||
|
||||
if (HAL_ETH_Init(&heth) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN ETH_Init 2 */
|
||||
|
||||
/* USER CODE END ETH_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief LTDC Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_LTDC_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN LTDC_Init 0 */
|
||||
|
||||
/* USER CODE END LTDC_Init 0 */
|
||||
|
||||
LTDC_LayerCfgTypeDef pLayerCfg = {0};
|
||||
LTDC_LayerCfgTypeDef pLayerCfg1 = {0};
|
||||
|
||||
/* USER CODE BEGIN LTDC_Init 1 */
|
||||
|
||||
/* USER CODE END LTDC_Init 1 */
|
||||
hltdc.Instance = LTDC;
|
||||
hltdc.Init.HSPolarity = LTDC_HSPOLARITY_AL;
|
||||
hltdc.Init.VSPolarity = LTDC_VSPOLARITY_AL;
|
||||
hltdc.Init.DEPolarity = LTDC_DEPOLARITY_AL;
|
||||
hltdc.Init.PCPolarity = LTDC_PCPOLARITY_IPC;
|
||||
hltdc.Init.HorizontalSync = 7;
|
||||
hltdc.Init.VerticalSync = 3;
|
||||
hltdc.Init.AccumulatedHBP = 14;
|
||||
hltdc.Init.AccumulatedVBP = 5;
|
||||
hltdc.Init.AccumulatedActiveW = 654;
|
||||
hltdc.Init.AccumulatedActiveH = 485;
|
||||
hltdc.Init.TotalWidth = 660;
|
||||
hltdc.Init.TotalHeigh = 487;
|
||||
hltdc.Init.Backcolor.Blue = 0;
|
||||
hltdc.Init.Backcolor.Green = 0;
|
||||
hltdc.Init.Backcolor.Red = 0;
|
||||
if (HAL_LTDC_Init(&hltdc) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
pLayerCfg.WindowX0 = 0;
|
||||
pLayerCfg.WindowX1 = 0;
|
||||
pLayerCfg.WindowY0 = 0;
|
||||
pLayerCfg.WindowY1 = 0;
|
||||
pLayerCfg.PixelFormat = LTDC_PIXEL_FORMAT_ARGB8888;
|
||||
pLayerCfg.Alpha = 0;
|
||||
pLayerCfg.Alpha0 = 0;
|
||||
pLayerCfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_CA;
|
||||
pLayerCfg.BlendingFactor2 = LTDC_BLENDING_FACTOR2_CA;
|
||||
pLayerCfg.FBStartAdress = 0;
|
||||
pLayerCfg.ImageWidth = 0;
|
||||
pLayerCfg.ImageHeight = 0;
|
||||
pLayerCfg.Backcolor.Blue = 0;
|
||||
pLayerCfg.Backcolor.Green = 0;
|
||||
pLayerCfg.Backcolor.Red = 0;
|
||||
if (HAL_LTDC_ConfigLayer(&hltdc, &pLayerCfg, 0) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
pLayerCfg1.WindowX0 = 0;
|
||||
pLayerCfg1.WindowX1 = 0;
|
||||
pLayerCfg1.WindowY0 = 0;
|
||||
pLayerCfg1.WindowY1 = 0;
|
||||
pLayerCfg1.PixelFormat = LTDC_PIXEL_FORMAT_ARGB8888;
|
||||
pLayerCfg1.Alpha = 0;
|
||||
pLayerCfg1.Alpha0 = 0;
|
||||
pLayerCfg1.BlendingFactor1 = LTDC_BLENDING_FACTOR1_CA;
|
||||
pLayerCfg1.BlendingFactor2 = LTDC_BLENDING_FACTOR2_CA;
|
||||
pLayerCfg1.FBStartAdress = 0;
|
||||
pLayerCfg1.ImageWidth = 0;
|
||||
pLayerCfg1.ImageHeight = 0;
|
||||
pLayerCfg1.Backcolor.Blue = 0;
|
||||
pLayerCfg1.Backcolor.Green = 0;
|
||||
pLayerCfg1.Backcolor.Red = 0;
|
||||
if (HAL_LTDC_ConfigLayer(&hltdc, &pLayerCfg1, 1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN LTDC_Init 2 */
|
||||
|
||||
/* USER CODE END LTDC_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief QUADSPI Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_QUADSPI_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN QUADSPI_Init 0 */
|
||||
|
||||
/* USER CODE END QUADSPI_Init 0 */
|
||||
|
||||
/* USER CODE BEGIN QUADSPI_Init 1 */
|
||||
|
||||
/* USER CODE END QUADSPI_Init 1 */
|
||||
/* QUADSPI parameter configuration*/
|
||||
hqspi.Instance = QUADSPI;
|
||||
hqspi.Init.ClockPrescaler = 255;
|
||||
hqspi.Init.FifoThreshold = 1;
|
||||
hqspi.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_NONE;
|
||||
hqspi.Init.FlashSize = 1;
|
||||
hqspi.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_1_CYCLE;
|
||||
hqspi.Init.ClockMode = QSPI_CLOCK_MODE_0;
|
||||
hqspi.Init.FlashID = QSPI_FLASH_ID_1;
|
||||
hqspi.Init.DualFlash = QSPI_DUALFLASH_DISABLE;
|
||||
if (HAL_QSPI_Init(&hqspi) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN QUADSPI_Init 2 */
|
||||
|
||||
/* USER CODE END QUADSPI_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief SDMMC1 Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_SDMMC1_SD_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN SDMMC1_Init 0 */
|
||||
|
||||
/* USER CODE END SDMMC1_Init 0 */
|
||||
|
||||
/* USER CODE BEGIN SDMMC1_Init 1 */
|
||||
|
||||
/* USER CODE END SDMMC1_Init 1 */
|
||||
hsd1.Instance = SDMMC1;
|
||||
hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING;
|
||||
hsd1.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE;
|
||||
hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE;
|
||||
hsd1.Init.BusWide = SDMMC_BUS_WIDE_1B;
|
||||
hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE;
|
||||
hsd1.Init.ClockDiv = 0;
|
||||
if (HAL_SD_Init(&hsd1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
if (HAL_SD_ConfigWideBusOperation(&hsd1, SDMMC_BUS_WIDE_4B) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN SDMMC1_Init 2 */
|
||||
|
||||
/* USER CODE END SDMMC1_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USART1 Initialization Function
|
||||
* @param None
|
||||
@@ -216,6 +486,41 @@ static void MX_USART1_UART_Init(void)
|
||||
|
||||
}
|
||||
|
||||
/* FMC initialization function */
|
||||
static void MX_FMC_Init(void)
|
||||
{
|
||||
FMC_SDRAM_TimingTypeDef SdramTiming;
|
||||
|
||||
/** Perform the SDRAM1 memory initialization sequence
|
||||
*/
|
||||
hsdram1.Instance = FMC_SDRAM_DEVICE;
|
||||
/* hsdram1.Init */
|
||||
hsdram1.Init.SDBank = FMC_SDRAM_BANK2;
|
||||
hsdram1.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_8;
|
||||
hsdram1.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_12;
|
||||
hsdram1.Init.MemoryDataWidth = FMC_SDRAM_MEM_BUS_WIDTH_16;
|
||||
hsdram1.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
|
||||
hsdram1.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_1;
|
||||
hsdram1.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
|
||||
hsdram1.Init.SDClockPeriod = FMC_SDRAM_CLOCK_DISABLE;
|
||||
hsdram1.Init.ReadBurst = FMC_SDRAM_RBURST_DISABLE;
|
||||
hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_0;
|
||||
/* SdramTiming */
|
||||
SdramTiming.LoadToActiveDelay = 16;
|
||||
SdramTiming.ExitSelfRefreshDelay = 16;
|
||||
SdramTiming.SelfRefreshTime = 16;
|
||||
SdramTiming.RowCycleDelay = 16;
|
||||
SdramTiming.WriteRecoveryTime = 16;
|
||||
SdramTiming.RPDelay = 16;
|
||||
SdramTiming.RCDDelay = 16;
|
||||
|
||||
if (HAL_SDRAM_Init(&hsdram1, &SdramTiming) != HAL_OK)
|
||||
{
|
||||
Error_Handler( );
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief GPIO Initialization Function
|
||||
* @param None
|
||||
@@ -226,8 +531,15 @@ static void MX_GPIO_Init(void)
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
|
||||
/* GPIO Ports Clock Enable */
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOI_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOF_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOH_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOG_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
|
||||
/*Configure GPIO pin Output Level */
|
||||
HAL_GPIO_WritePin(GPIOH, GPIO_PIN_10, GPIO_PIN_RESET);
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -21,6 +21,7 @@ menu "Onboard Peripheral Drivers"
|
||||
|
||||
config BSP_USING_SDRAM
|
||||
bool "Enable SDRAM"
|
||||
select BSP_USING_FMC
|
||||
default n
|
||||
|
||||
config BSP_USING_QSPI_FLASH
|
||||
@@ -30,12 +31,32 @@ menu "Onboard Peripheral Drivers"
|
||||
select RT_SFUD_USING_QSPI
|
||||
default n
|
||||
|
||||
config BSP_USING_LCD
|
||||
bool "Enable LCD"
|
||||
select BSP_USING_LTDC
|
||||
select BSP_USING_SDRAM
|
||||
default n
|
||||
|
||||
config BSP_USING_MPU6050
|
||||
bool "Enable MPU6050 (i2c4)"
|
||||
select BSP_USING_I2C4
|
||||
select PKG_USING_MPU6XXX
|
||||
default n
|
||||
|
||||
config BSP_USING_POT
|
||||
bool "Enable potentiometer"
|
||||
select BSP_USING_ADC
|
||||
select BSP_USING_ADC1
|
||||
default n
|
||||
|
||||
config BSP_USING_SDCARD
|
||||
bool "Enable SDCARD (sdio)"
|
||||
select BSP_USING_SDIO
|
||||
select RT_USING_DFS
|
||||
select RT_USING_DFS_ELMFAT
|
||||
select RT_USING_PIN
|
||||
default n
|
||||
|
||||
endmenu
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
@@ -178,6 +199,20 @@ menuconfig BSP_USING_SPI
|
||||
select RT_USING_WDT
|
||||
default n
|
||||
|
||||
config BSP_USING_SDIO
|
||||
bool "Enable SDIO"
|
||||
select RT_USING_SDIO
|
||||
select RT_USING_DFS
|
||||
default n
|
||||
|
||||
config BSP_USING_FMC
|
||||
bool
|
||||
default n
|
||||
|
||||
config BSP_USING_LTDC
|
||||
bool
|
||||
default n
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Board extended module Drivers"
|
||||
|
||||
@@ -18,6 +18,9 @@ if GetDepend(['BSP_USING_ETH']):
|
||||
if GetDepend(['BSP_USING_QSPI_FLASH']):
|
||||
src += Glob('ports/drv_qspi_flash.c')
|
||||
|
||||
if GetDepend(['BSP_USING_SDCARD']):
|
||||
src += Glob('ports/sdcard_port.c')
|
||||
|
||||
path = [cwd]
|
||||
path += [cwd + '/CubeMX_Config/Inc']
|
||||
path += [cwd + '/ports']
|
||||
|
||||
@@ -29,7 +29,7 @@ void SystemClock_Config(void)
|
||||
RCC_OscInitStruct.PLL.PLLM = 25;
|
||||
RCC_OscInitStruct.PLL.PLLN = 432;
|
||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 9;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
@@ -53,8 +53,17 @@ void SystemClock_Config(void)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC|RCC_PERIPHCLK_USART1
|
||||
|RCC_PERIPHCLK_SDMMC1|RCC_PERIPHCLK_CLK48;
|
||||
PeriphClkInitStruct.PLLSAI.PLLSAIN = 192;
|
||||
PeriphClkInitStruct.PLLSAI.PLLSAIR = 3;
|
||||
PeriphClkInitStruct.PLLSAI.PLLSAIQ = 2;
|
||||
PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV2;
|
||||
PeriphClkInitStruct.PLLSAIDivQ = 1;
|
||||
PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_2;
|
||||
PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
|
||||
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
|
||||
PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_CLK48;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
|
||||
@@ -7,7 +7,7 @@ define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2007FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x0400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x0000;
|
||||
|
||||
@@ -7,7 +7,7 @@
|
||||
MEMORY
|
||||
{
|
||||
ROM (rx) : ORIGIN = 0x08000000, LENGTH = 1024k /* 1024KB flash */
|
||||
RAM (rw) : ORIGIN = 0x20000000, LENGTH = 128k /* 128K sram */
|
||||
RAM (rw) : ORIGIN = 0x20000000, LENGTH = 512k /* 512K sram */
|
||||
}
|
||||
ENTRY(Reset_Handler)
|
||||
_system_stack_size = 0x200;
|
||||
|
||||
@@ -8,7 +8,7 @@ LR_IROM1 0x08000000 0x00100000 { ; load region size_region
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
RW_IRAM1 0x20020000 0x00060000 { ; RW data
|
||||
RW_IRAM1 0x2000000 0x00080000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
@@ -0,0 +1,33 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-01-08 zylx first version
|
||||
*/
|
||||
|
||||
#ifndef __LCD_PORT_H__
|
||||
#define __LCD_PORT_H__
|
||||
|
||||
/* fire 5 inch screen, 800 * 480 */
|
||||
#define LCD_WIDTH 800
|
||||
#define LCD_HEIGHT 480
|
||||
#define LCD_BITS_PER_PIXEL 16
|
||||
#define LCD_BUF_SIZE (LCD_WIDTH * LCD_HEIGHT * LCD_BITS_PER_PIXEL / 8)
|
||||
#define LCD_PIXEL_FORMAT RTGRAPHIC_PIXEL_FORMAT_RGB565
|
||||
|
||||
#define LCD_HSYNC_WIDTH 2
|
||||
#define LCD_VSYNC_HEIGHT 2
|
||||
#define LCD_HBP 46
|
||||
#define LCD_VBP 23
|
||||
#define LCD_HFP 22
|
||||
#define LCD_VFP 22
|
||||
|
||||
#define LCD_BACKLIGHT_USING_GPIO
|
||||
#define LCD_BL_GPIO_NUM GET_PIN(D, 7)
|
||||
#define LCD_DISP_GPIO_NUM GET_PIN(D, 4)
|
||||
/* fire 5 inch screen, 800 * 480 */
|
||||
|
||||
#endif /* __LCD_PORT_H__ */
|
||||
@@ -0,0 +1,76 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-12-13 balanceTWK add sdcard port file
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef BSP_USING_SDCARD
|
||||
|
||||
#include <dfs_elm.h>
|
||||
#include <dfs_fs.h>
|
||||
#include <dfs_posix.h>
|
||||
#include "drv_gpio.h"
|
||||
|
||||
// #define DBG_ENABLE
|
||||
#define DBG_SECTION_NAME "app.card"
|
||||
#define DBG_COLOR
|
||||
|
||||
#define DBG_LEVEL DBG_INFO
|
||||
#include <rtdbg.h>
|
||||
|
||||
#define WIFI_RESET_PIN GET_PIN(G, 9)
|
||||
|
||||
int ewm1062_disable(void)
|
||||
{
|
||||
rt_pin_mode(WIFI_RESET_PIN, PIN_MODE_OUTPUT);
|
||||
rt_pin_write(WIFI_RESET_PIN,PIN_LOW);
|
||||
return RT_EOK;
|
||||
}
|
||||
INIT_BOARD_EXPORT(ewm1062_disable);
|
||||
|
||||
void sd_mount(void *parameter)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
rt_thread_mdelay(500);
|
||||
if(rt_device_find("sd0") != RT_NULL)
|
||||
{
|
||||
if (dfs_mount("sd0", "/", "elm", 0, 0) == RT_EOK)
|
||||
{
|
||||
LOG_I("sd card mount to '/'");
|
||||
break;
|
||||
}
|
||||
else
|
||||
{
|
||||
LOG_W("sd card mount to '/' failed!");
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
int stm32_sdcard_mount(void)
|
||||
{
|
||||
rt_thread_t tid;
|
||||
|
||||
tid = rt_thread_create("sd_mount", sd_mount, RT_NULL,
|
||||
1024, RT_THREAD_PRIORITY_MAX - 2, 20);
|
||||
if (tid != RT_NULL)
|
||||
{
|
||||
rt_thread_startup(tid);
|
||||
}
|
||||
else
|
||||
{
|
||||
LOG_E("create sd_mount thread err!");
|
||||
}
|
||||
return RT_EOK;
|
||||
}
|
||||
INIT_ENV_EXPORT(stm32_sdcard_mount);
|
||||
|
||||
#endif /* BSP_USING_SDCARD */
|
||||
|
||||
@@ -14,7 +14,7 @@
|
||||
/* parameters for sdram peripheral */
|
||||
/* Bank1 or Bank2 */
|
||||
#define SDRAM_TARGET_BANK 2
|
||||
/* stm32f4 Bank1:0XC0000000 Bank2:0XD0000000 */
|
||||
/* stm32f7 Bank1:0XC0000000 Bank2:0XD0000000 */
|
||||
#define SDRAM_BANK_ADDR ((uint32_t)0XD0000000)
|
||||
/* data width: 8, 16, 32 */
|
||||
#define SDRAM_DATA_WIDTH 16
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -54,7 +54,7 @@
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>0</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<BrowseInformation>0</BrowseInformation>
|
||||
<ListingPath>.\build\keil\List\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
|
||||
Reference in New Issue
Block a user