mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2026-02-07 01:44:41 +08:00
fix raspi3-64 sdio driver
This commit is contained in:
@@ -65,7 +65,7 @@ CONFIG_RT_USING_DEVICE=y
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CONFIG_RT_USING_DEVICE_OPS=y
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# CONFIG_RT_USING_INTERRUPT_INFO is not set
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CONFIG_RT_USING_CONSOLE=y
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CONFIG_RT_CONSOLEBUF_SIZE=128
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CONFIG_RT_CONSOLEBUF_SIZE=512
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CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
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CONFIG_RT_VER_NUM=0x40003
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CONFIG_ARCH_CPU_64BIT=y
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@@ -77,7 +77,7 @@ CONFIG_ARCH_CPU_64BIT=y
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#
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CONFIG_RT_USING_COMPONENTS_INIT=y
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CONFIG_RT_USING_USER_MAIN=y
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CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
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CONFIG_RT_MAIN_THREAD_STACK_SIZE=4096
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CONFIG_RT_MAIN_THREAD_PRIORITY=10
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#
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@@ -113,7 +113,23 @@ CONFIG_DFS_FILESYSTEMS_MAX=2
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CONFIG_DFS_FILESYSTEM_TYPES_MAX=2
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CONFIG_DFS_FD_MAX=16
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# CONFIG_RT_USING_DFS_MNTTABLE is not set
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# CONFIG_RT_USING_DFS_ELMFAT is not set
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CONFIG_RT_USING_DFS_ELMFAT=y
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#
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# elm-chan's FatFs, Generic FAT Filesystem Module
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#
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CONFIG_RT_DFS_ELM_CODE_PAGE=437
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CONFIG_RT_DFS_ELM_WORD_ACCESS=y
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# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set
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# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
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# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
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CONFIG_RT_DFS_ELM_USE_LFN_3=y
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CONFIG_RT_DFS_ELM_USE_LFN=3
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CONFIG_RT_DFS_ELM_MAX_LFN=255
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CONFIG_RT_DFS_ELM_DRIVES=2
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CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=512
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# CONFIG_RT_DFS_ELM_USE_ERASE is not set
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CONFIG_RT_DFS_ELM_REENTRANT=y
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CONFIG_RT_USING_DFS_DEVFS=y
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# CONFIG_RT_USING_DFS_ROMFS is not set
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# CONFIG_RT_USING_DFS_RAMFS is not set
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@@ -140,7 +156,13 @@ CONFIG_RT_USING_PIN=y
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# CONFIG_RT_USING_MTD_NAND is not set
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# CONFIG_RT_USING_PM is not set
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# CONFIG_RT_USING_RTC is not set
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# CONFIG_RT_USING_SDIO is not set
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CONFIG_RT_USING_SDIO=y
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CONFIG_RT_SDIO_STACK_SIZE=2048
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CONFIG_RT_SDIO_THREAD_PRIORITY=15
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CONFIG_RT_MMCSD_STACK_SIZE=4096
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CONFIG_RT_MMCSD_THREAD_PREORITY=22
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CONFIG_RT_MMCSD_MAX_PARTITION=16
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CONFIG_RT_SDIO_DEBUG=y
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# CONFIG_RT_USING_SPI is not set
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# CONFIG_RT_USING_WDT is not set
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# CONFIG_RT_USING_AUDIO is not set
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@@ -448,7 +470,8 @@ CONFIG_BSP_USING_CORETIMER=y
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# CONFIG_BSP_USING_SPI is not set
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# CONFIG_BSP_USING_WDT is not set
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# CONFIG_BSP_USING_RTC is not set
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# CONFIG_BSP_USING_SDIO is not set
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CONFIG_BSP_USING_SDIO=y
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CONFIG_BSP_USING_SDIO0=y
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#
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# Board Peripheral Drivers
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@@ -10,7 +10,19 @@
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#include <rtthread.h>
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#ifdef BSP_USING_SDIO0
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#include <dfs_fs.h>
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int mnt_init(void)
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{
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rt_thread_delay(RT_TICK_PER_SECOND);
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if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
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{
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rt_kprintf("file system initialization done!\n");
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}
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return 0;
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}
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INIT_ENV_EXPORT(mnt_init);
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#endif
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@@ -93,10 +93,11 @@ void idle_wfi(void)
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void rt_hw_board_init(void)
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{
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mmu_init();
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armv8_map(0, 0, 0x800000, MEM_ATTR_MEMORY);
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armv8_map(0x3f00B000, 0x3f00B000, 0x1000, MEM_ATTR_IO);//timer
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armv8_map(0, 0, 0x6400000, MEM_ATTR_MEMORY);
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armv8_map(0x3f000000, 0x3f000000, 0x200000, MEM_ATTR_IO);//timer
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armv8_map(0x3f200000, 0x3f200000, 0x16000, MEM_ATTR_IO);//uart
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armv8_map(0x40000000, 0x40000000, 0x1000, MEM_ATTR_IO);//core timer
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armv8_map(0x3F300000, 0x3F300000, 0x1000, MEM_ATTR_IO);//sdio
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mmu_enable();
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/* initialize hardware interrupt */
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@@ -21,7 +21,7 @@ extern unsigned char __bss_start;
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extern unsigned char __bss_end;
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#define RT_HW_HEAP_BEGIN (void*)&__bss_end
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#define RT_HW_HEAP_END (void*)(RT_HW_HEAP_BEGIN + 4 * 1024 * 1024)
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#define RT_HW_HEAP_END (void*)(RT_HW_HEAP_BEGIN + 64 * 1024 * 1024)
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void rt_hw_board_init(void);
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File diff suppressed because it is too large
Load Diff
@@ -13,50 +13,12 @@
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#define __DRV_SDIO_H__
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <drivers/mmcsd_core.h>
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#define MMC0_BASE_ADDR 0x20300000
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#include "board.h"
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struct raspi_mmc
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{
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volatile rt_uint32_t arg2_reg; /* (0x000) */
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volatile rt_uint32_t blksizecnt_reg; /* (0x004) */
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volatile rt_uint32_t arg1_reg; /* (0x008) */
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volatile rt_uint32_t cmdtm_reg; /* (0x00C) */
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volatile rt_uint32_t resp0_reg; /* (0x010) */
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volatile rt_uint32_t resp1_reg; /* (0x014) */
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volatile rt_uint32_t resp2_reg; /* (0x018) */
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volatile rt_uint32_t resp3_reg; /* (0x01C) */
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volatile rt_uint32_t data_reg; /* (0x020) */
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volatile rt_uint32_t status_reg; /* (0x024) */
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volatile rt_uint32_t control0_reg; /* (0x028) */
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volatile rt_uint32_t control1_reg; /* (0x02C) */
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volatile rt_uint32_t interrupt_reg; /* (0x030) */
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volatile rt_uint32_t irpt_mask_reg; /* (0x034) */
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volatile rt_uint32_t irpt_en_reg; /* (0x038) */
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volatile rt_uint32_t control2_reg; /* (0x03C) */
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volatile rt_uint32_t reserved1[4]; /* (0x040) */
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volatile rt_uint32_t force_irpt_reg; /* (0x050) */
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volatile rt_uint32_t reserved2[7]; /* (0x054) */
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volatile rt_uint32_t boot_timeout_reg; /* (0x070) */
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volatile rt_uint32_t deg_sel_reg; /* (0x074) */
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volatile rt_uint32_t reserved3[2]; /* (0x078) */
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volatile rt_uint32_t exrdfifo_cfg_reg; /* (0x080) */
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volatile rt_uint32_t exrdfifo_cn_reg; /* (0x084) */
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volatile rt_uint32_t tune_step_reg; /* (0x088) */
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volatile rt_uint32_t tune_step_std_reg; /* (0x08C) */
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volatile rt_uint32_t tune_step_ddr_reg; /* (0x090) */
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volatile rt_uint32_t reserved4[23]; /* (0x094) */
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volatile rt_uint32_t spi_int_reg; /* (0x0f0) */
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volatile rt_uint32_t reserved5[2]; /* (0x0f4) */
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volatile rt_uint32_t slotisr_ver_reg; /* (0x0fC) */
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};
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typedef struct raspi_mmc *raspi_mmc_t;
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#define MMC0 ((tina_mmc_t)MMC0_BASE_ADDR)
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#define BIT(x) (1<<(x))
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#define MMC0_BASE_ADDR 0x3F300000
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/* Struct for Intrrrupt Information */
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#define SDXC_CmdDone BIT(0)
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@@ -78,25 +40,6 @@ typedef struct raspi_mmc *raspi_mmc_t;
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#define SDXC_DENDErr BIT(22)
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#define SDXC_ACMDErr BIT(24)
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/*
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SD CMD reg
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REG[0-5] : Cmd ID
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REG[6] : Has response
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REG[7] : Long response
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REG[8] : Check response CRC
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REG[9] : Has data
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REG[10] : Write
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REG[11] : Steam mode
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REG[12] : Auto stop
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REG[13] : Wait previous over
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REG[14] : About cmd
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REG[15] : Send initialization
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REG[21] : Update clock
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REG[31] : Load cmd
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*/
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#define SDXC_BLKCNT_EN BIT(1)
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#define SDXC_AUTO_CMD12_EN BIT(2)
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#define SDXC_AUTO_CMD23_EN BIT(3)
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@@ -112,82 +55,20 @@ REG[31] : Load cmd
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#define SDXC_CMD_RESUME BIT(23)
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#define SDXC_CMD_ABORT BIT(23)|BIT(22)
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//#define SDXC_CHECK_CRC_CMD BIT(19)
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//
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//#define SDXC_RESPONSE_CMD BIT(6)
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//#define SDXC_LONG_RESPONSE_CMD BIT(7)
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//#define SDXC_CHECK_CRC_CMD BIT(8)
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//#define SDXC_HAS_DATA_CMD BIT(9)
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//#define SDXC_WRITE_CMD BIT(10)
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//#define SDXC_STEAM_CMD BIT(11)
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//#define SDXC_AUTO_STOP_CMD BIT(12)
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//#define SDXC_WAIT_OVER_CMD BIT(13)
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//#define SDXC_ABOUT_CMD BIT(14)
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//#define SDXC_SEND_INIT_CMD BIT(15)
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//#define SDXC_UPDATE_CLOCK_CMD BIT(21)
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//#define SDXC_LOAD_CMD BIT(31)
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/*
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SD status reg
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REG[0] : FIFO_RX_LEVEL
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REG[1] : FIFO_TX_LEVEL
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REG[2] : FIFO_EMPTY
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REG[3] : FIFO_FULL
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REG[4-7] : FSM_STA
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REG[8] : CARD_PRESENT
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REG[9] : CARD_BUSY
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REG[10] : FSM_BUSY
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REG[11-16]: RESP_IDX
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REG[17-21]: FIFO_LEVEL
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REG[31] : DMA_REQ
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*/
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#define SDXC_CMD_INHIBIT BIT(0)
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#define SDXC_DAT_INHIBIT BIT(1)
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#define SDXC_DAT_ACTIVE BIT(2)
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#define SDXC_WRITE_TRANSFER BIT(8)
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#define SDXC_READ_TRANSFER BIT(9)
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//
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//
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//#define SDXC_FIFO_RX_LEVEL BIT(0)
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//#define SDXC_FIFO_TX_LEVEL BIT(1)
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//#define SDXC_FIFO_EMPTY BIT(2)
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//#define SDXC_FIFO_FULL BIT(3)
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//#define SDXC_CARD_PRESENT BIT(8)
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//#define SDXC_CARD_BUSY BIT(9)
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//#define SDXC_FSM_BUSY BIT(10)
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//#define SDXC_DMA_REQ BIT(31)
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struct mmc_des_v4p1
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{
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rt_uint32_t : 1,
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dic : 1, /* disable interrupt on completion */
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last_des : 1, /* 1-this data buffer is the last buffer */
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first_des : 1, /* 1-data buffer is the first buffer,0-data buffer contained in the next descriptor is 1st buffer */
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des_chain : 1, /* 1-the 2nd address in the descriptor is the next descriptor address */
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end_of_ring : 1, /* 1-last descriptor flag when using dual data buffer in descriptor */
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: 24,
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card_err_sum : 1, /* transfer error flag */
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own : 1; /* des owner:1-idma owns it, 0-host owns it */
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#define SDXC_DES_NUM_SHIFT 12 /* smhc2!! */
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#define SDXC_DES_BUFFER_MAX_LEN (1 << SDXC_DES_NUM_SHIFT)
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rt_uint32_t data_buf1_sz : 16,
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data_buf2_sz : 16;
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rt_uint32_t buf_addr_ptr1;
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rt_uint32_t buf_addr_ptr2;
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};
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struct sdhci_cmd_t
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{
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rt_uint32_t cmdidx;
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rt_uint32_t cmdarg;
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//const char* name;
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// rt_uint32_t code;
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rt_uint32_t resptype;
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// rt_uint8_t rca;
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// rt_uint32_t delay;
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rt_uint32_t datarw;
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#define DATA_READ 1
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#define DATA_WRITE 2
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rt_uint32_t response[4];
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};
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@@ -240,17 +121,6 @@ struct sdhci_pdata_t
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#define TM_BLKCNT_EN 0x00000002
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#define TM_MULTI_DATA (CMD_IS_DATA|TM_MULTI_BLOCK|TM_BLKCNT_EN)
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// Response types.
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// Note that on the PI, the index and CRC are dropped, leaving 32 bits in RESP0.
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#define RESP_NO 0 // No response
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//#define RESP_R1 1 // 48 RESP0 contains card status
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#define RESP_R1b 11 // 48 RESP0 contains card status, data line indicates busy
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#define RESP_R2I 2 // 136 RESP0..3 contains 128 bit CID shifted down by 8 bits as no CRC
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#define RESP_R2S 12 // 136 RESP0..3 contains 128 bit CSD shifted down by 8 bits as no CRC
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//#define RESP_R3 3 // 48 RESP0 contains OCR register
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//#define RESP_R6 6 // 48 RESP0 contains RCA and status bits 23,22,19,12:0
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//#define RESP_R7 7 // 48 RESP0 contains voltage acceptance and check pattern
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#define RCA_NO 1
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#define RCA_YES 2
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@@ -341,5 +211,43 @@ struct sdhci_pdata_t
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#define SR_DAT_INHIBIT 0x00000002
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#define SR_CMD_INHIBIT 0x00000001
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#define CONFIG_MMC_USE_DMA
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#define DMA_ALIGN (32U)
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#define SD_CMD_INDEX(a) ((a) << 24)
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#define SD_CMD_RESERVED(a) 0xffffffff
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#define SD_CMD_INDEX(a) ((a) << 24)
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#define SD_CMD_TYPE_NORMAL 0x0
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#define SD_CMD_TYPE_SUSPEND (1 << 22)
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#define SD_CMD_TYPE_RESUME (2 << 22)
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#define SD_CMD_TYPE_ABORT (3 << 22)
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#define SD_CMD_TYPE_MASK (3 << 22)
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#define SD_CMD_ISDATA (1 << 21)
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#define SD_CMD_IXCHK_EN (1 << 20)
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#define SD_CMD_CRCCHK_EN (1 << 19)
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#define SD_CMD_RSPNS_TYPE_NONE 0 // For no response
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#define SD_CMD_RSPNS_TYPE_136 (1 << 16) // For response R2 (with CRC), R3,4 (no CRC)
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#define SD_CMD_RSPNS_TYPE_48 (2 << 16) // For responses R1, R5, R6, R7 (with CRC)
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#define SD_CMD_RSPNS_TYPE_48B (3 << 16) // For responses R1b, R5b (with CRC)
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#define SD_CMD_RSPNS_TYPE_MASK (3 << 16)
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#define SD_CMD_MULTI_BLOCK (1 << 5)
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#define SD_CMD_DAT_DIR_HC 0
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#define SD_CMD_DAT_DIR_CH (1 << 4)
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#define SD_CMD_AUTO_CMD_EN_NONE 0
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#define SD_CMD_AUTO_CMD_EN_CMD12 (1 << 2)
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#define SD_CMD_AUTO_CMD_EN_CMD23 (2 << 2)
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#define SD_CMD_BLKCNT_EN (1 << 1)
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#define SD_CMD_DMA 1
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#define SD_RESP_NONE SD_CMD_RSPNS_TYPE_NONE
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#define SD_RESP_R1 (SD_CMD_RSPNS_TYPE_48) // | SD_CMD_CRCCHK_EN)
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#define SD_RESP_R1b (SD_CMD_RSPNS_TYPE_48B) // | SD_CMD_CRCCHK_EN)
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#define SD_RESP_R2 (SD_CMD_RSPNS_TYPE_136) //| SD_CMD_CRCCHK_EN)
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#define SD_RESP_R3 SD_CMD_RSPNS_TYPE_48
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#define SD_RESP_R4 SD_CMD_RSPNS_TYPE_136
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#define SD_RESP_R5 (SD_CMD_RSPNS_TYPE_48 | SD_CMD_CRCCHK_EN)
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#define SD_RESP_R5b (SD_CMD_RSPNS_TYPE_48B | SD_CMD_CRCCHK_EN)
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#define SD_RESP_R6 (SD_CMD_RSPNS_TYPE_48 | SD_CMD_CRCCHK_EN)
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#define SD_RESP_R7 (SD_CMD_RSPNS_TYPE_48 | SD_CMD_CRCCHK_EN)
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#define SD_DATA_READ (SD_CMD_ISDATA | SD_CMD_DAT_DIR_CH)
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#define SD_DATA_WRITE (SD_CMD_ISDATA | SD_CMD_DAT_DIR_HC)
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#endif
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@@ -67,4 +67,10 @@ enum rpi_pin_name
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RPI_GPIO_PIN_NUM,
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};
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#define DELAY_MICROS(micros) \
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do{ \
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rt_uint32_t compare = STIMER_CLO + micros * 25; \
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while (STIMER_CLO < compare); \
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} while (0) \
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#endif
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5
bsp/raspberry-pi/raspi3-64/qemu-64.bat
Normal file → Executable file
5
bsp/raspberry-pi/raspi3-64/qemu-64.bat
Normal file → Executable file
@@ -1 +1,4 @@
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qemu-system-aarch64 -M raspi3 -kernel kernel8.img -serial null -serial stdio
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if [ ! -f "sd.bin" ]; then
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dd if=/dev/zero of=sd.bin bs=1024 count=65536
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fi
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qemu-system-aarch64 -M raspi3 -kernel kernel8.img -serial null -serial stdio -sd sd.bin -nographic -monitor pty
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@@ -43,7 +43,7 @@
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#define RT_USING_DEVICE
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#define RT_USING_DEVICE_OPS
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#define RT_USING_CONSOLE
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#define RT_CONSOLEBUF_SIZE 128
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#define RT_CONSOLEBUF_SIZE 512
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#define RT_CONSOLE_DEVICE_NAME "uart1"
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#define RT_VER_NUM 0x40003
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#define ARCH_CPU_64BIT
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@@ -52,7 +52,7 @@
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#define RT_USING_COMPONENTS_INIT
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#define RT_USING_USER_MAIN
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#define RT_MAIN_THREAD_STACK_SIZE 2048
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||||
#define RT_MAIN_THREAD_STACK_SIZE 4096
|
||||
#define RT_MAIN_THREAD_PRIORITY 10
|
||||
|
||||
/* C++ features */
|
||||
@@ -81,6 +81,18 @@
|
||||
#define DFS_FILESYSTEMS_MAX 2
|
||||
#define DFS_FILESYSTEM_TYPES_MAX 2
|
||||
#define DFS_FD_MAX 16
|
||||
#define RT_USING_DFS_ELMFAT
|
||||
|
||||
/* elm-chan's FatFs, Generic FAT Filesystem Module */
|
||||
|
||||
#define RT_DFS_ELM_CODE_PAGE 437
|
||||
#define RT_DFS_ELM_WORD_ACCESS
|
||||
#define RT_DFS_ELM_USE_LFN_3
|
||||
#define RT_DFS_ELM_USE_LFN 3
|
||||
#define RT_DFS_ELM_MAX_LFN 255
|
||||
#define RT_DFS_ELM_DRIVES 2
|
||||
#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
|
||||
#define RT_DFS_ELM_REENTRANT
|
||||
#define RT_USING_DFS_DEVFS
|
||||
|
||||
/* Device Drivers */
|
||||
@@ -90,6 +102,13 @@
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_SERIAL_RB_BUFSZ 64
|
||||
#define RT_USING_PIN
|
||||
#define RT_USING_SDIO
|
||||
#define RT_SDIO_STACK_SIZE 2048
|
||||
#define RT_SDIO_THREAD_PRIORITY 15
|
||||
#define RT_MMCSD_STACK_SIZE 4096
|
||||
#define RT_MMCSD_THREAD_PREORITY 22
|
||||
#define RT_MMCSD_MAX_PARTITION 16
|
||||
#define RT_SDIO_DEBUG
|
||||
|
||||
/* Using USB */
|
||||
|
||||
@@ -174,6 +193,8 @@
|
||||
#define RT_USING_UART1
|
||||
#define BSP_USING_PIN
|
||||
#define BSP_USING_CORETIMER
|
||||
#define BSP_USING_SDIO
|
||||
#define BSP_USING_SDIO0
|
||||
|
||||
/* Board Peripheral Drivers */
|
||||
|
||||
|
||||
@@ -610,7 +610,7 @@ RTM_EXPORT(mmcsd_wait_cd_changed);
|
||||
|
||||
void mmcsd_change(struct rt_mmcsd_host *host)
|
||||
{
|
||||
rt_mb_send(&mmcsd_detect_mb, (rt_uint32_t)host);
|
||||
rt_mb_send(&mmcsd_detect_mb, (rt_ubase_t)host);
|
||||
}
|
||||
|
||||
void mmcsd_detect(void *param)
|
||||
@@ -649,7 +649,7 @@ void mmcsd_detect(void *param)
|
||||
if (init_sd(host, ocr))
|
||||
mmcsd_power_off(host);
|
||||
mmcsd_host_unlock(host);
|
||||
rt_mb_send(&mmcsd_hotpluge_mb, (rt_uint32_t)host);
|
||||
rt_mb_send(&mmcsd_hotpluge_mb, (rt_ubase_t)host);
|
||||
continue;
|
||||
}
|
||||
|
||||
@@ -662,7 +662,7 @@ void mmcsd_detect(void *param)
|
||||
if (init_mmc(host, ocr))
|
||||
mmcsd_power_off(host);
|
||||
mmcsd_host_unlock(host);
|
||||
rt_mb_send(&mmcsd_hotpluge_mb, (rt_uint32_t)host);
|
||||
rt_mb_send(&mmcsd_hotpluge_mb, (rt_ubase_t)host);
|
||||
continue;
|
||||
}
|
||||
mmcsd_host_unlock(host);
|
||||
@@ -683,7 +683,7 @@ void mmcsd_detect(void *param)
|
||||
host->card = RT_NULL;
|
||||
}
|
||||
mmcsd_host_unlock(host);
|
||||
rt_mb_send(&mmcsd_hotpluge_mb, (rt_uint32_t)host);
|
||||
rt_mb_send(&mmcsd_hotpluge_mb, (rt_ubase_t)host);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user