mirror of
https://github.com/RT-Thread/rt-thread.git
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[bsp][esp32-c6] add ESP32-C6-DevKitC-1 support (#11836)
* [bsp][esp32-c6] add ESP32-C6-DevKitC-1 support Add bsp/ESP/ESP32_C6. Default image is GPIO, UART0 and ADC. The C6 IDF sources are not in RT-Thread-packages/esp-idf yet. * [bsp][esp32-c6] fix CI format, C6 package and CH32V203 D6 build clang-format the files the format check rejected. Fetch the C6 scons branch when the downloaded ESP-IDF package has no C6 target. Patch the CH32V20x SDK under libraries so a D6 build no longer calls Exit(). * [bsp][esp32-c6] fetch mbedtls and stop pkgs from pulling the C6 branch * [bsp][esp32-c6] rebuild CI against the package branch tip * [bsp][esp32-c6] rebuild CI against the strict-mode package tip * [bsp][esp32-c6] fix the reviewed ADC, math and package pin bugs Keep the IDF tree on the reviewed commit, and stop the ADC and critical-section paths from reporting success when they did not. * [bsp][esp32-c6] reserve stuck interrupt lines and lock ADC CPU lines 3 and 4 never latch an enable, so copying the handler left the non-IRAM mask on the old line. Reserve those lines and let the allocator write the mask and the route together. The C6 oneshot registers are shared, so one mutex covers enable and convert. * [bsp][esp32-c6] list the peripherals this board actually runs GPIO, UART0 and ADC1 have been read on the DevKitC-1. Radios and the untested buses stay marked unsupported. * [bsp][esp32-c6] keep SPI unsupported after the loopback mismatch GPIO7 shorted to GPIO2 returned 0xA5000000 for a sent 0xA5, so the table does not mark SPI supported. --------- Co-authored-by: seteiro <276597748+cms19859230182-lang@users.noreply.github.com>
This commit is contained in:
seteiro
seteiro
@@ -495,6 +495,13 @@
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"ESP/ESP32_C3"
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]
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},
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{
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"RTT_BSP": "ESP32C6",
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"RTT_TOOL_CHAIN": "sourcery-riscv32-esp32",
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"SUB_RTT_BSP": [
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"ESP/ESP32_C6"
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]
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},
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{
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"RTT_BSP": "i386-unknown",
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"RTT_TOOL_CHAIN": "sourcery-i386-unknown-elf",
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@@ -89,7 +89,8 @@ jobs:
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#- {RTT_BSP_NAME: "core-v-mcu_core-v-cv32e40p", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "core-v-mcu/core-v-cv32e40p"} #特殊toolchain，不支持
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- {RTT_BSP_NAME: "dm365", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "dm365"}
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- {RTT_BSP_NAME: "efm32", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "efm32"}
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- {RTT_BSP_NAME: "ESP32_C3", RTT_TOOL_CHAIN: "sourcery-riscv32-esp32", RTT_BSP: "ESP32_C3"}
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- {RTT_BSP_NAME: "ESP32_C3", RTT_TOOL_CHAIN: "sourcery-riscv32-esp32", RTT_BSP: "ESP32_C3"}
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- {RTT_BSP_NAME: "ESP32_C6", RTT_TOOL_CHAIN: "sourcery-riscv32-esp32", RTT_BSP: "ESP32_C6"}
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- {RTT_BSP_NAME: "essemi_es32f0654", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "essemi/es32f0654"}
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- {RTT_BSP_NAME: "essemi_es32f365x", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "essemi/es32f365x"}
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- {RTT_BSP_NAME: "essemi_es32f369x", RTT_TOOL_CHAIN: "sourcery-arm", RTT_BSP: "essemi/es32f369x"}
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@@ -0,0 +1,14 @@
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scons.args: &scons
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scons_arg:
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- '--strict'
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devices.gpio:
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<<: *scons
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kconfig:
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- CONFIG_RT_USING_PIN=y
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- CONFIG_BSP_USING_GPIO=y
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devices.uart:
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<<: *scons
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kconfig:
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- CONFIG_RT_USING_SERIAL=y
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- CONFIG_RT_USING_SERIAL_V1=y
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- CONFIG_BSP_USING_UART=y
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,11 @@
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mainmenu "RT-Thread Configuration"
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BSP_DIR := .
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RTT_DIR := ../../..
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PKGS_DIR := packages
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source "$(RTT_DIR)/Kconfig"
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osource "$PKGS_DIR/Kconfig"
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rsource "../libraries/drivers/Kconfig"
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@@ -0,0 +1,77 @@
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# ESP32-C6-DevKitC-1 BSP 说明
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## 1 开发板简介
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ESP32-C6-DevKitC-1 是乐鑫推出的一款基于 RISC-V 内核的开发板，模组为 ESP32-C6-WROOM-1。本板读到的芯片 revision 是 v0.2。
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**基本特性：**
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- MCU：ESP32-C6，主频 160MHz，Flash 8MB
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- 晶振：40MHz
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- USB：2 个 Type-C。标着 UART 的口是 CP210x，接到 UART0（TX GPIO16，RX GPIO17）
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- 不用 WCH-Link
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更多信息请访问 [ESP32-C6-DevKitC-1](https://docs.espressif.com/projects/esp-dev-kits/en/latest/esp32c6/esp32-c6-devkitc-1/user_guide.html)
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## 外设支持
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本 BSP 目前对外设的支持情况如下：
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| **片上外设** | **支持情况** | **备注** |
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| :----------- | :----------: | :------- |
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| GPIO | 支持 | GPIO1 作输入。接 3V3 为 high，接 GND 为 low |
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| UART | 支持 | UART0，TX GPIO16，RX GPIO17。115200，能进 msh |
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| ADC | 支持 | ADC1 通道 1（GPIO1）。接地 2167，接 3V3 为 4095，没有校准 |
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| GDBStub | 支持 | 打开 `BSP_ENABLE_GDBSTUB` 后，出错会停进 stub。默认关闭 |
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| I2C | 待支持 | |
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| SPI | 待支持 | GPIO7 接到 GPIO2，发出 `0xA5`，收回 `0xA5000000`，对不上一字节 |
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| PWM | 待支持 | |
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| Wi-Fi | 待支持 | |
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| BLE | 待支持 | |
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| 802.15.4 | 待支持 | |
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### IO 在板级支持包中的映射情况
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| IO | 板级包中的定义 |
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| ------ | --------------------- |
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| GPIO16 | UART0_TX |
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| GPIO17 | UART0_RX |
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| GPIO1 | 已测输入，兼 ADC1 通道 1 |
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## 2 编译说明
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板级包支持 RISC-V GCC 开发环境，以下是具体版本信息：
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| IDE/编译器 | 已测试版本 |
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| ---------- | ---------- |
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| GCC | Espressif riscv32-esp-elf GCC 11.2.0 |
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## 3 使用说明
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> 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果。
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### 3.1 使用 Env 编译 BSP
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1. 下载 [riscv32-esp-elf GCC 11.2.0](https://github.com/espressif/crosstool-NG/releases/download/esp-2022r1-RC1/riscv32-esp-elf-gcc11_2_0-esp-2022r1-RC1-win64.zip)（Windows）。Linux 用同版本的 `linux-amd64` 包。
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2. 下载 Env 工具 [最新版本](https://github.com/RT-Thread/env-windows/releases)
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3. 将 [esp-idf 提交 `4fa003074a73774369d38123749fe64b7b4acbd3`](https://github.com/cms19859230182-lang/esp-idf/commit/4fa003074a73774369d38123749fe64b7b4acbd3)（`bsp/esp32c6-scons`）放到 `packages/ESP-IDF-latest`。官方 `RT-Thread-packages/esp-idf` 里还没有这些 C6 源码，`pkgs --update` 下到的包编不过。SConstruct 发现包里没有 C6 时，拉取的也是这一次提交，不跟分支尖走。
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4. 在当前 BSP 目录下执行 `scons --exec-path=工具链的bin目录`
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5. 编译完成之后会生成 **rtthread.bin** 文件。默认打开 GPIO、UART0 和 ADC。
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### 3.2 硬件连接
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串口用板上标着 UART 的 USB 口。不用杜邦线，也不用 WCH-Link。
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### 3.3 下载
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bootloader 和分区表在 `builtin_imgs`。bootloader 必须是这份 ESP32-C6 的，不能用 ESP32-C3 的。
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```sh
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esptool.py --chip esp32c6 -p COMx -b 460800 --before default_reset --after hard_reset write_flash --flash_mode dio --flash_size 8MB --flash_freq 80m 0x0 builtin_imgs/bootloader.bin 0x8000 builtin_imgs/partition-table.bin 0x10000 rtthread.bin
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```
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### 3.4 运行结果
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在终端工具里打开串口（115200-8-1-N），先打开串口再复位，可以看到 RT-Thread 的输出信息和 `msh >`。`help`、`version` 有回应。
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GDB 默认关闭。要在出错后停住，打开 `BSP_ENABLE_GDBSTUB` 再烧录，然后用本目录的 `esp32c6.gdb`。
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@@ -0,0 +1,14 @@
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# for module compiling
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import os
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Import('RTT_ROOT')
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cwd = str(Dir('#'))
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objs = []
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list = os.listdir(cwd)
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for d in list:
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path = os.path.join(cwd, d)
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if os.path.isfile(os.path.join(path, 'SConscript')):
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objs = objs + SConscript(os.path.join(d, 'SConscript'))
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Return('objs')
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@@ -0,0 +1,119 @@
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import os
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import sys
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from esptool.bin_image import ELFFile
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from esptool.targets import CHIP_DEFS
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def elf2image(target, source, env):
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e = ELFFile("rtthread.elf")
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print("Creating esp32c6 image...")
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image = CHIP_DEFS["esp32c6"].BOOTLOADER_IMAGE()
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image.entrypoint = e.entrypoint
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image.flash_mode = 2 # dio
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image.segments = e.sections
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image.flash_size_freq = image.ROM_LOADER.parse_flash_size_arg("8MB")
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image.flash_size_freq += image.ROM_LOADER.parse_flash_freq_arg("80m")
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image.elf_sha256 = e.sha256()
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image.elf_sha256_offset = 0xb0
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before = len(image.segments)
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image.merge_adjacent_segments()
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if len(image.segments) != before:
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delta = before - len(image.segments)
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print("Merged %d ELF section%s" % (delta, "s" if delta > 1 else ""))
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image.verify()
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image.save("rtthread.bin")
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print("Successfully created esp32c6 image.")
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if os.getenv('RTT_ROOT'):
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RTT_ROOT = os.getenv('RTT_ROOT')
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else:
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RTT_ROOT = os.path.join(os.getcwd(), '..', '..', '..')
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sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
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import rtconfig
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from building import *
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TARGET = 'rtthread.' + rtconfig.TARGET_EXT
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SDK_ROOT = os.path.abspath('./')
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if os.path.exists(SDK_ROOT + '/libraries'):
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libraries_path_prefix = SDK_ROOT + '/libraries'
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else:
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libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
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SDK_LIB = libraries_path_prefix
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Export('SDK_LIB')
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DefaultEnvironment(tools=[])
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env = Environment(tools = ['mingw'],
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AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
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CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
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CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
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AR = rtconfig.AR, ARFLAGS = '-rc',
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LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
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env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
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env['ASCOM'] = env['ASPPCOM']
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Export('RTT_ROOT')
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Export('rtconfig')
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C6_IDF_COMMIT = '4fa003074a73774369d38123749fe64b7b4acbd3'
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def _use_c6_idf_when_official_has_none():
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"""CI pkgs --update fetches RT-Thread-packages/esp-idf, which only sets
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CPPDEFINES for ESP32-C3. Swap in one reviewed C6 commit before the package
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SConscript runs. A tree that already has the C6 target is left as-is.
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The package may sit under this BSP's packages/ or under libraries/.
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The replacement is fetched by commit, not by the moving branch tip.
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"""
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import shutil
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import subprocess
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from env_package import find_package_path
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dest = os.path.abspath(find_package_path(SDK_ROOT, 'ESP-IDF-latest'))
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sc = os.path.join(dest, 'SConscript')
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if not os.path.isfile(sc):
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return
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with open(sc, 'r', encoding='utf-8', errors='replace') as f:
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text = f.read()
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if 'esp32c6' in text:
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return
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tmp = dest + '.c6'
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if os.path.isdir(tmp):
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shutil.rmtree(tmp)
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subprocess.check_call(['git', 'init', tmp])
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subprocess.check_call([
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'git', '-C', tmp, 'remote', 'add', 'origin',
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'https://github.com/cms19859230182-lang/esp-idf.git',
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])
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subprocess.check_call([
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'git', '-C', tmp, 'fetch', '--depth', '1', 'origin', C6_IDF_COMMIT,
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])
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subprocess.check_call(['git', '-C', tmp, 'checkout', '--detach', 'FETCH_HEAD'])
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head = subprocess.check_output(
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['git', '-C', tmp, 'rev-parse', 'HEAD']).decode().strip()
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if head != C6_IDF_COMMIT:
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shutil.rmtree(tmp)
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raise RuntimeError('fetched esp-idf is %s, this BSP expects %s'
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% (head, C6_IDF_COMMIT))
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subprocess.check_call([
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'git', '-C', tmp, 'submodule', 'update', '--init', '--depth', '1',
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'components/mbedtls/mbedtls', 'components/heap/tlsf',
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])
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git_meta = os.path.join(tmp, '.git')
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if os.path.isdir(git_meta):
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shutil.rmtree(git_meta)
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shutil.rmtree(dest)
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os.rename(tmp, dest)
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_use_c6_idf_when_official_has_none()
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objs = PrepareBuilding(env, RTT_ROOT, remove_components = ['libc'])
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objs.extend(SConscript(os.path.join(libraries_path_prefix, 'drivers', 'SConscript'), variant_dir='build/libraries/drivers', duplicate=0))
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DoBuilding(TARGET, objs)
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env.AddPostAction(TARGET, elf2image)
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@@ -0,0 +1,4 @@
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*
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!.gitignore
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!bootloader.bin
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!partition-table.bin
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Binary file not shown.
Binary file not shown.
@@ -0,0 +1,26 @@
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FROM ubuntu:22.04
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ARG HTTP_PROXY
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ARG HTTPS_PROXY
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ENV http_proxy=${HTTP_PROXY}
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ENV https_proxy=${HTTPS_PROXY}
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RUN apt update && \
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apt install -y --no-install-recommends \
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sudo git wget python3 python3-pip scons xz-utils ca-certificates && \
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pip3 install esptool && \
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useradd -m dev && \
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echo "dev ALL=(ALL) NOPASSWD:ALL" >> /etc/sudoers
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USER dev
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WORKDIR /home/dev
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RUN wget -q https://github.com/espressif/crosstool-NG/releases/download/esp-2022r1-RC1/riscv32-esp-elf-gcc11_2_0-esp-2022r1-RC1-linux-amd64.tar.xz && \
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sudo tar -xf riscv32-esp-elf-gcc11_2_0-esp-2022r1-RC1-linux-amd64.tar.xz -C /opt && \
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rm riscv32-esp-elf-gcc11_2_0-esp-2022r1-RC1-linux-amd64.tar.xz
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ENV PATH="/opt/riscv32-esp-elf/bin:${PATH}"
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# 本 BSP 还没进上游。把含有 bsp/ESP/ESP32_C6 的 RT-Thread 树挂到 /home/dev/rt-thread 后再编译。
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WORKDIR /home/dev/rt-thread/bsp/ESP/ESP32_C6
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CMD ["scons", "--exec-path=/opt/riscv32-esp-elf/bin"]
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@@ -0,0 +1,16 @@
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# Panic GDB stub for ESP32-C6. Default images do not enter this stub.
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# After a panic with BSP_ENABLE_GDBSTUB, connect the UART port (CP210x).
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set remote hardware-breakpoint-limit 1
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set remote hardware-watchpoint-limit 1
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set remote interrupt-on-connect on
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set remote kill-packet off
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set remote symbol-lookup-packet off
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set remotetimeout 20
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set serial baud 115200
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file ./rtthread.elf
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mem 0x40000000 0x4007ffff ro
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mem 0x40800000 0x4087ffff rw
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mem 0x42000000 0x42ffffff ro
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mem 0x50000000 0x50003fff rw
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mem 0x60000000 0x600dffff rw
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target remote \\.\COM13
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@@ -0,0 +1,19 @@
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import os
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from building import *
|
||||
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src = Split("""
|
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src/rt-thread_balance_stub.c
|
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src/x509_crt_bundle.S
|
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src/port.c
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src/port_common.c
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""")
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CPPPATH = Split(
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"""
|
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include
|
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include/freertos
|
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""")
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group = DefineGroup('idf_port', src, depend = [''], CPPPATH = CPPPATH)
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Return('group')
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,31 @@
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/*
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* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
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#ifndef FREERTOS_CONFIG_RISCV_H
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#define FREERTOS_CONFIG_RISCV_H
|
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|
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//RISC-V Archiecture specific configuration. This file is included in the common FreeRTOSConfig.h.
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#include "sdkconfig.h"
|
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|
||||
/* ------------------------------------------------- FreeRTOS Config ---------------------------------------------------
|
||||
* - All Vanilla FreeRTOS configuration goes into this section
|
||||
* ------------------------------------------------------------------------------------------------------------------ */
|
||||
|
||||
// ------------------ Scheduler Related --------------------
|
||||
|
||||
// #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
|
||||
#define configMAX_API_CALL_INTERRUPT_PRIORITY 0
|
||||
|
||||
/* ------------------------------------------------ ESP-IDF Additions --------------------------------------------------
|
||||
*
|
||||
* ------------------------------------------------------------------------------------------------------------------ */
|
||||
|
||||
#ifndef configISR_STACK_SIZE
|
||||
#define configISR_STACK_SIZE (CONFIG_FREERTOS_ISR_STACKSIZE)
|
||||
#endif
|
||||
|
||||
#endif // FREERTOS_CONFIG_RISCV_H
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,80 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "sdkconfig.h"
|
||||
#include "freertos/FreeRTOS.h"
|
||||
#include "freertos/task.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT || defined __DOXYGEN__
|
||||
/**
|
||||
* @brief Task Snapshot structure
|
||||
*
|
||||
* - Used with the uxTaskGetSnapshotAll() function to save memory snapshot of each task in the system.
|
||||
* - We need this structure because TCB_t is defined (hidden) in tasks.c.
|
||||
*/
|
||||
typedef struct xTASK_SNAPSHOT
|
||||
{
|
||||
void *pxTCB; /*!< Address of the task control block. */
|
||||
StackType_t *pxTopOfStack; /*!< Points to the location of the last item placed on the tasks stack. */
|
||||
StackType_t *pxEndOfStack; /*!< Points to the end of the stack. pxTopOfStack < pxEndOfStack, stack grows hi2lo
|
||||
pxTopOfStack > pxEndOfStack, stack grows lo2hi*/
|
||||
} TaskSnapshot_t;
|
||||
|
||||
/**
|
||||
* @brief Iterate over all tasks in the system
|
||||
*
|
||||
* - This function can be used to iterate over every task in the system
|
||||
* - The first call to this function must set pxTask to NULL
|
||||
* - When all functions have been iterated, this function will return NULL.
|
||||
* - This function is only available when CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT is set to 1.
|
||||
*
|
||||
* @note This function should only be called when FreeRTOS is no longer running (e.g., during a panic) as this function
|
||||
* does not acquire any locks.
|
||||
* @param pxTask Handle of the previous task (or NULL on the first call of this function)
|
||||
* @return TaskHandle_t Handle of the next task (or NULL when all tasks have been iterated over)
|
||||
*/
|
||||
TaskHandle_t pxTaskGetNext(TaskHandle_t pxTask);
|
||||
|
||||
/**
|
||||
* @brief Fill a TaskSnapshot_t structure for specified task.
|
||||
*
|
||||
* - This function is used by the panic handler to get the snapshot of a particular task.
|
||||
* - This function is only available when CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT is set to 1.
|
||||
*
|
||||
* @note This function should only be called when FreeRTOS is no longer running (e.g., during a panic) as this function
|
||||
* does not acquire any locks.
|
||||
* @param[in] pxTask Task's handle
|
||||
* @param[out] pxTaskSnapshot Snapshot of the task
|
||||
* @return pdTRUE if operation was successful else pdFALSE
|
||||
*/
|
||||
BaseType_t vTaskGetSnapshot(TaskHandle_t pxTask, TaskSnapshot_t *pxTaskSnapshot);
|
||||
|
||||
/**
|
||||
* @brief Fill an array of TaskSnapshot_t structures for every task in the system
|
||||
*
|
||||
* - This function is used by the panic handler to get a snapshot of all tasks in the system
|
||||
* - This function is only available when CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT is set to 1.
|
||||
*
|
||||
* @note This function should only be called when FreeRTOS is no longer running (e.g., during a panic) as this function
|
||||
* does not acquire any locks.
|
||||
* @param[out] pxTaskSnapshotArray Array of TaskSnapshot_t structures filled by this function
|
||||
* @param[in] uxArrayLength Length of the provided array
|
||||
* @param[out] pxTCBSize Size of the a task's TCB structure
|
||||
* @return UBaseType_t
|
||||
*/
|
||||
UBaseType_t uxTaskGetSnapshotAll(TaskSnapshot_t * const pxTaskSnapshotArray, const UBaseType_t uxArrayLength, UBaseType_t * const pxTCBSize);
|
||||
|
||||
#endif // CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT || defined __DOXYGEN__
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
@@ -0,0 +1,26 @@
|
||||
|
||||
|
||||
_esp_flash_mmap_prefetch_pad_size = 16;
|
||||
_esp_memprot_prefetch_pad_size = 0;
|
||||
_esp_memprot_align_size = 0;
|
||||
_esp_mmu_block_size = (0x10000);
|
||||
MEMORY
|
||||
{
|
||||
iram0_0_seg (RX) : org = (0x40800000), len = 0x4086E610 - (0x40800000 - 0x40800000) - (0x40800000)
|
||||
irom_seg (RX) : org = 0x42000020, len = (0x10000 << 8) - 0x20
|
||||
dram0_0_seg (RW) : org = (0x40800000), len = 0x4086E610 - (0x40800000 - 0x40800000) - (0x40800000)
|
||||
drom_seg (R) : org = 0x42000020, len = (0x10000 << 8) - 0x20
|
||||
lp_ram_seg(RW) : org = 0x50000000, len = 0x4000 - (0 + (24))
|
||||
lp_reserved_seg(RW) : org = 0x50000000 + 0x4000 - (0 + (24)), len = (0 + (24))
|
||||
}
|
||||
_heap_end = 0x40000000;
|
||||
_data_seg_org = ORIGIN(rtc_data_seg);
|
||||
REGION_ALIAS("rtc_iram_seg", lp_ram_seg );
|
||||
REGION_ALIAS("rtc_data_seg", rtc_iram_seg );
|
||||
REGION_ALIAS("rtc_slow_seg", rtc_iram_seg );
|
||||
REGION_ALIAS("rtc_data_location", rtc_iram_seg );
|
||||
REGION_ALIAS("rtc_reserved_seg", lp_reserved_seg );
|
||||
REGION_ALIAS("default_code_seg", irom_seg);
|
||||
REGION_ALIAS("default_rodata_seg", drom_seg);
|
||||
ASSERT(_flash_rodata_dummy_start == ORIGIN(default_rodata_seg),
|
||||
".flash_rodata_dummy section must be placed at the beginning of the rodata segment.")
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,115 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2020 Amazon.com, Inc. or its affiliates
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* SPDX-FileContributor: 2016-2022 Espressif Systems (Shanghai) CO LTD
|
||||
*/
|
||||
/*
|
||||
* FreeRTOS Kernel V10.4.3
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Implementation of functions defined in portable.h for the RISC-V port.
|
||||
*----------------------------------------------------------------------*/
|
||||
|
||||
#include "sdkconfig.h"
|
||||
#include <string.h>
|
||||
#include "soc/soc_caps.h"
|
||||
#include "soc/periph_defs.h"
|
||||
#include "soc/system_reg.h"
|
||||
#include "hal/systimer_hal.h"
|
||||
#include "hal/systimer_ll.h"
|
||||
#include "riscv/rvruntime-frames.h"
|
||||
#include "riscv/riscv_interrupts.h"
|
||||
#include "riscv/interrupt.h"
|
||||
#include "esp_private/crosscore_int.h"
|
||||
#include "esp_attr.h"
|
||||
#include "esp_system.h"
|
||||
#include "esp_intr_alloc.h"
|
||||
#include "esp_log.h"
|
||||
#include "FreeRTOS.h" /* This pulls in portmacro.h */
|
||||
#include "task.h"
|
||||
#include "portmacro.h"
|
||||
#include "esp_memory_utils.h"
|
||||
|
||||
/* ---------------------------------------------------- Variables ------------------------------------------------------
|
||||
*
|
||||
* ------------------------------------------------------------------------------------------------------------------ */
|
||||
|
||||
static const char *TAG = "cpu_start";
|
||||
|
||||
/* ---------------------------------------------- Port Implementations -------------------------------------------------
|
||||
*
|
||||
* ------------------------------------------------------------------------------------------------------------------ */
|
||||
|
||||
// --------------------- Interrupts ------------------------
|
||||
|
||||
BaseType_t xPortInIsrContext(void)
|
||||
{
|
||||
return (BaseType_t)rt_interrupt_get_nest();
|
||||
}
|
||||
|
||||
BaseType_t IRAM_ATTR xPortInterruptedFromISRContext(void)
|
||||
{
|
||||
/* For single core, this can be the same as xPortInIsrContext() because reading it is atomic */
|
||||
return (BaseType_t)rt_interrupt_get_nest();
|
||||
}
|
||||
|
||||
// ----------------------- System --------------------------
|
||||
|
||||
uint32_t xPortGetTickRateHz(void)
|
||||
{
|
||||
return (uint32_t)configTICK_RATE_HZ;
|
||||
}
|
||||
|
||||
#define STACK_WATCH_AREA_SIZE 32
|
||||
#define STACK_WATCH_POINT_NUMBER (SOC_CPU_WATCHPOINTS_NUM - 1)
|
||||
|
||||
void vPortSetStackWatchpoint(void *pxStackStart)
|
||||
{
|
||||
uint32_t addr = (uint32_t)pxStackStart;
|
||||
addr = (addr + (STACK_WATCH_AREA_SIZE - 1)) & (~(STACK_WATCH_AREA_SIZE - 1));
|
||||
esp_cpu_set_watchpoint(STACK_WATCH_POINT_NUMBER, (char *)addr, STACK_WATCH_AREA_SIZE, ESP_CPU_WATCHPOINT_STORE);
|
||||
}
|
||||
|
||||
|
||||
/* ---------------------------------------------- Misc Implementations -------------------------------------------------
|
||||
*
|
||||
* ------------------------------------------------------------------------------------------------------------------ */
|
||||
|
||||
// --------------------- App Start-up ----------------------
|
||||
|
||||
/* [refactor-todo]: See if we can include this through a header */
|
||||
extern void esp_startup_start_app_common(void);
|
||||
|
||||
void esp_startup_start_app(void)
|
||||
{
|
||||
esp_startup_start_app_common();
|
||||
|
||||
ESP_LOGI(TAG, "Starting scheduler.");
|
||||
vTaskStartScheduler();
|
||||
}
|
||||
@@ -0,0 +1,142 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include <string.h>
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
#include "portmacro.h"
|
||||
#include "esp_private/esp_int_wdt.h"
|
||||
#include "esp_system.h"
|
||||
#include "esp_heap_caps_init.h"
|
||||
#include "esp_task_wdt.h"
|
||||
#include "esp_task.h"
|
||||
#include "esp_private/crosscore_int.h"
|
||||
#include "esp_log.h"
|
||||
#include "esp_memory_utils.h"
|
||||
#include "esp_freertos_hooks.h"
|
||||
#include "sdkconfig.h"
|
||||
#include "esp_freertos_hooks.h"
|
||||
|
||||
#if CONFIG_SPIRAM
|
||||
#include "esp_psram.h"
|
||||
#include "esp_private/esp_psram_extram.h"
|
||||
#endif
|
||||
|
||||
#if CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL
|
||||
static const char *TAG = "cpu_start";
|
||||
#endif
|
||||
|
||||
/* Architecture-agnostic parts of the FreeRTOS ESP-IDF port layer can go here.
|
||||
*
|
||||
* The actual call flow will be to call esp_startup_start_app() in <ARCH>/port.c,
|
||||
* which will then call esp_startup_start_app_common()
|
||||
*/
|
||||
|
||||
// Duplicate of inaccessible xSchedulerRunning; needed at startup to avoid counting nesting
|
||||
volatile unsigned port_xSchedulerRunning[portNUM_PROCESSORS] = { 0 };
|
||||
|
||||
// For now, running FreeRTOS on one core and a bare metal on the other (or other OSes)
|
||||
// is not supported. For now CONFIG_FREERTOS_UNICORE and CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
|
||||
// should mirror each other's values.
|
||||
//
|
||||
// And since this should be true, we can just check for CONFIG_FREERTOS_UNICORE.
|
||||
#if CONFIG_FREERTOS_UNICORE != CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
|
||||
#error "FreeRTOS and system configuration mismatch regarding the use of multiple cores."
|
||||
#endif
|
||||
|
||||
#if !defined CONFIG_IDF_RTOS_RTTHREAD
|
||||
static void main_task(void *args);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ESP_SYSTEM_GDBSTUB_RUNTIME
|
||||
void esp_gdbstub_init(void);
|
||||
#endif // CONFIG_ESP_SYSTEM_GDBSTUB_RUNTIME
|
||||
|
||||
extern void app_main(void);
|
||||
|
||||
void esp_startup_start_app_common(void)
|
||||
{
|
||||
#if CONFIG_ESP_INT_WDT
|
||||
esp_int_wdt_init();
|
||||
//Initialize the interrupt watch dog for CPU0.
|
||||
esp_int_wdt_cpu_init();
|
||||
#endif
|
||||
|
||||
esp_crosscore_int_init();
|
||||
|
||||
#if CONFIG_ESP_SYSTEM_GDBSTUB_RUNTIME && !CONFIG_IDF_TARGET_ESP32C2
|
||||
esp_gdbstub_init();
|
||||
#endif // CONFIG_ESP_SYSTEM_GDBSTUB_RUNTIME
|
||||
|
||||
#if !defined CONFIG_IDF_RTOS_RTTHREAD
|
||||
portBASE_TYPE res = xTaskCreatePinnedToCore(&main_task, "main",
|
||||
ESP_TASK_MAIN_STACK, NULL,
|
||||
ESP_TASK_MAIN_PRIO, NULL, ESP_TASK_MAIN_CORE);
|
||||
assert(res == pdTRUE);
|
||||
(void)res;
|
||||
#endif
|
||||
}
|
||||
|
||||
#if !CONFIG_FREERTOS_UNICORE
|
||||
static volatile bool s_other_cpu_startup_done = false;
|
||||
static bool other_cpu_startup_idle_hook_cb(void)
|
||||
{
|
||||
s_other_cpu_startup_done = true;
|
||||
return true;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if !defined CONFIG_IDF_RTOS_RTTHREAD
|
||||
static void main_task(void *args)
|
||||
{
|
||||
#if !CONFIG_FREERTOS_UNICORE
|
||||
// Wait for FreeRTOS initialization to finish on other core, before replacing its startup stack
|
||||
esp_register_freertos_idle_hook_for_cpu(other_cpu_startup_idle_hook_cb, !xPortGetCoreID());
|
||||
while (!s_other_cpu_startup_done)
|
||||
{
|
||||
;
|
||||
}
|
||||
esp_deregister_freertos_idle_hook_for_cpu(other_cpu_startup_idle_hook_cb, !xPortGetCoreID());
|
||||
#endif
|
||||
|
||||
// [refactor-todo] check if there is a way to move the following block to esp_system startup
|
||||
heap_caps_enable_nonos_stack_heaps();
|
||||
|
||||
// Now we have startup stack RAM available for heap, enable any DMA pool memory
|
||||
#if CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL
|
||||
if (esp_psram_is_initialized())
|
||||
{
|
||||
esp_err_t r = esp_psram_extram_reserve_dma_pool(CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL);
|
||||
if (r != ESP_OK)
|
||||
{
|
||||
ESP_EARLY_LOGE(TAG, "Could not reserve internal/DMA pool (error 0x%x)", r);
|
||||
abort();
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
//Initialize TWDT if configured to do so
|
||||
#if CONFIG_ESP_TASK_WDT
|
||||
esp_task_wdt_config_t twdt_config = {
|
||||
.timeout_ms = CONFIG_ESP_TASK_WDT_TIMEOUT_S * 1000,
|
||||
.idle_core_mask = 0,
|
||||
#if CONFIG_ESP_TASK_WDT_PANIC
|
||||
.trigger_panic = true,
|
||||
#endif
|
||||
};
|
||||
#if CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0
|
||||
twdt_config.idle_core_mask |= (1 << 0);
|
||||
#endif
|
||||
#if CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1
|
||||
twdt_config.idle_core_mask |= (1 << 1);
|
||||
#endif
|
||||
ESP_ERROR_CHECK(esp_task_wdt_init(&twdt_config));
|
||||
#endif // CONFIG_ESP_TASK_WDT
|
||||
|
||||
app_main();
|
||||
vTaskDelete(NULL);
|
||||
}
|
||||
#endif
|
||||
@@ -0,0 +1,78 @@
|
||||
#include <math.h>
|
||||
#include "rtconfig.h"
|
||||
|
||||
static int _real_out_of_range(double x)
|
||||
{
|
||||
return x != x || x >= 9223372036854775808.0 || x <= -9223372036854775808.0;
|
||||
}
|
||||
|
||||
double ceil(double x)
|
||||
{
|
||||
long long n;
|
||||
|
||||
if (_real_out_of_range(x))
|
||||
{
|
||||
return x;
|
||||
}
|
||||
n = (long long)x;
|
||||
if (x > 0 && (double)n != x)
|
||||
{
|
||||
n++;
|
||||
}
|
||||
return (double)n;
|
||||
}
|
||||
|
||||
double floor(double x)
|
||||
{
|
||||
long long n;
|
||||
|
||||
if (_real_out_of_range(x))
|
||||
{
|
||||
return x;
|
||||
}
|
||||
n = (long long)x;
|
||||
if (x < 0 && (double)n != x)
|
||||
{
|
||||
n--;
|
||||
}
|
||||
return (double)n;
|
||||
}
|
||||
|
||||
|
||||
void _end(void)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
void _edata(void)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
#ifndef BSP_USING_BLE // 由于BLE组件使用了VFS组件，而VFS组件提供了这些函数导致了冲突
|
||||
void opendir(void)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
void readdir(void)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
void closedir(void)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
void select(void)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
#endif /* BSP_USING_BLE */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,11 @@
|
||||
import os
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = Glob('*.c')
|
||||
|
||||
CPPPATH = []
|
||||
|
||||
group = DefineGroup('Main', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
|
||||
@@ -0,0 +1,7 @@
|
||||
#include <rtthread.h>
|
||||
|
||||
int main(void)
|
||||
{
|
||||
rt_kprintf("Hello RT-Thread!\r\n");
|
||||
return 0;
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,71 @@
|
||||
import os
|
||||
import sys
|
||||
|
||||
BSP_ROOT = os.path.dirname(os.path.abspath(__file__))
|
||||
RTT_ROOT = os.getenv('RTT_ROOT') or os.path.normpath(os.path.join(BSP_ROOT, '..', '..', '..'))
|
||||
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||
from env_package import find_package_path
|
||||
|
||||
# toolchains options
|
||||
ARCH ='risc-v'
|
||||
CPU =''
|
||||
CROSS_TOOL ='gcc'
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = r'~/.espressif/tools/riscv32-esp-elf/esp-2022r1-11.2.0/riscv32-esp-elf/bin'
|
||||
else:
|
||||
print('Please make sure your toolchains is GNU GCC!')
|
||||
exit(0)
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
EXEC_PATH = os.path.expanduser(EXEC_PATH)
|
||||
|
||||
BUILD = 'debug'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
PREFIX = 'riscv32-esp-elf-'
|
||||
CC = PREFIX + 'gcc'
|
||||
CXX = PREFIX + 'g++'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
LINK = PREFIX + 'g++'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
STRIP = PREFIX + 'strip'
|
||||
|
||||
DEVICE = ' -nostartfiles -march=rv32imac --specs=nosys.specs -fasynchronous-unwind-tables '
|
||||
CFLAGS = DEVICE + '-include ../../components/libc/compilers/common/include/sys/ioctl.h -gdwarf-4 -ggdb -Og '
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
|
||||
idf_path = find_package_path(BSP_ROOT, 'ESP-IDF-latest', relative_to=BSP_ROOT, pathsep='/')
|
||||
rom = idf_path + '/components/esp_rom/esp32c6/ld/'
|
||||
soc_ld = idf_path + '/components/soc/esp32c6/ld/'
|
||||
rom_scripts = [
|
||||
'esp32c6.rom.ld',
|
||||
'esp32c6.rom.api.ld',
|
||||
'esp32c6.rom.libgcc.ld',
|
||||
'esp32c6.rom.newlib.ld',
|
||||
'esp32c6.rom.version.ld',
|
||||
'esp32c6.rom.heap.ld',
|
||||
'esp32c6.rom.spiflash.ld',
|
||||
'esp32c6.rom.wdt.ld',
|
||||
]
|
||||
link_scripts = [' -T idf_port/ld/memory.ld -T idf_port/ld/sections.ld']
|
||||
link_scripts += [' -T ' + rom + name for name in rom_scripts]
|
||||
link_scripts.append(' -T ' + soc_ld + 'esp32c6.peripherals.ld')
|
||||
LFLAGS = DEVICE + ' -Wl,--cref -Wl,--defsym=IDF_TARGET_ESP32C6=0 -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start ' + ''.join(link_scripts) + ' -Wl,--wrap=_Unwind_SetEnableExceptionFdeSorting -Wl,--wrap=__register_frame_info_bases -Wl,--wrap=__register_frame_info -Wl,--wrap=__register_frame -Wl,--wrap=__register_frame_info_table_bases -Wl,--wrap=__register_frame_info_table -Wl,--wrap=__register_frame_table -Wl,--wrap=__deregister_frame_info_bases -Wl,--wrap=__deregister_frame_info -Wl,--wrap=_Unwind_Find_FDE -Wl,--wrap=_Unwind_GetGR -Wl,--wrap=_Unwind_GetCFA -Wl,--wrap=_Unwind_GetIP -Wl,--wrap=_Unwind_GetIPInfo -Wl,--wrap=_Unwind_GetRegionStart -Wl,--wrap=_Unwind_GetDataRelBase -Wl,--wrap=_Unwind_GetTextRelBase -Wl,--wrap=_Unwind_SetIP -Wl,--wrap=_Unwind_SetGR -Wl,--wrap=_Unwind_GetLanguageSpecificData -Wl,--wrap=_Unwind_FindEnclosingFunction -Wl,--wrap=_Unwind_Resume -Wl,--wrap=_Unwind_RaiseException -Wl,--wrap=_Unwind_DeleteException -Wl,--wrap=_Unwind_ForcedUnwind -Wl,--wrap=_Unwind_Resume_or_Rethrow -Wl,--wrap=_Unwind_Backtrace -Wl,--wrap=__cxa_call_unexpected -Wl,--eh-frame-hdr -Wl,--wrap=__gxx_personality_v0 -Wl,--cref -Wl,--defsym=IDF_TARGET_ESP32C6=0'
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
POST_ACTION = OBJCPY + ' -Oihex $TARGET rtthread.hex\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
def dist_handle(BSP_ROOT, dist_dir):
|
||||
import sys
|
||||
sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
|
||||
from sdk_dist import dist_do_building
|
||||
dist_do_building(BSP_ROOT, dist_dir)
|
||||
@@ -2,27 +2,47 @@
|
||||
config SOC_ESPRESSIF
|
||||
bool
|
||||
|
||||
choice
|
||||
prompt "Espressif SoC"
|
||||
default SOC_ESP32_C3
|
||||
|
||||
config SOC_ESP32_C3
|
||||
bool
|
||||
bool "ESP32-C3"
|
||||
select SOC_ESPRESSIF
|
||||
select RT_USING_COMPONENTS_INIT
|
||||
select RT_USING_USER_MAIN
|
||||
select PKG_USING_ESP_IDF
|
||||
select PKG_USING_FREERTOS_WRAPPER
|
||||
select PKG_FREERTOS_USING_CONFIG_H
|
||||
default y
|
||||
|
||||
config SOC_ESP32_C6
|
||||
bool "ESP32-C6"
|
||||
select SOC_ESPRESSIF
|
||||
select RT_USING_COMPONENTS_INIT
|
||||
select RT_USING_USER_MAIN
|
||||
select PKG_USING_ESP_IDF
|
||||
select PKG_USING_FREERTOS_WRAPPER
|
||||
select PKG_FREERTOS_USING_CONFIG_H
|
||||
endchoice
|
||||
|
||||
menu "Hardware Drivers Config"
|
||||
|
||||
choice BSP_BOARD_SEL
|
||||
prompt "Select BSP board "
|
||||
default BSP_BOARD_ESP32C6_DEVKITC1 if SOC_ESP32_C6
|
||||
default BSP_BOARD_LUATOS_ESP32C3
|
||||
|
||||
config BSP_BOARD_LUATOS_ESP32C3
|
||||
bool "LUATOS ESP32C3 board"
|
||||
depends on SOC_ESP32_C3
|
||||
|
||||
config BSP_BOARD_HX_EXP32C3
|
||||
bool "HONGXU ESP32C3 board"
|
||||
bool "HONGXU ESP32C3 board"
|
||||
depends on SOC_ESP32_C3
|
||||
|
||||
config BSP_BOARD_ESP32C6_DEVKITC1
|
||||
bool "ESP32-C6-DevKitC-1"
|
||||
depends on SOC_ESP32_C6
|
||||
endchoice
|
||||
|
||||
menu "Onboard Peripheral Drivers"
|
||||
@@ -30,7 +50,7 @@ menu "Onboard Peripheral Drivers"
|
||||
int "LED GPIO PIN SET"
|
||||
default 12 if BSP_BOARD_LUATOS_ESP32C3
|
||||
default 8 if BSP_BOARD_HX_EXP32C3
|
||||
depends on BSP_USING_GPIO
|
||||
depends on BSP_USING_GPIO && !BSP_BOARD_ESP32C6_DEVKITC1
|
||||
|
||||
config RT_BSP_UART_PORT
|
||||
int "UART PORT SET"
|
||||
@@ -40,11 +60,13 @@ menu "Onboard Peripheral Drivers"
|
||||
config RT_BSP_UART_TX_PIN
|
||||
int "UART TX PIN SET"
|
||||
default 21 if BSP_BOARD_LUATOS_ESP32C3
|
||||
default 16 if BSP_BOARD_ESP32C6_DEVKITC1
|
||||
depends on BSP_USING_UART
|
||||
|
||||
config RT_BSP_UART_RX_PIN
|
||||
int "UART RX PIN SET"
|
||||
default 20 if BSP_BOARD_LUATOS_ESP32C3
|
||||
default 17 if BSP_BOARD_ESP32C6_DEVKITC1
|
||||
depends on BSP_USING_UART
|
||||
|
||||
config RT_BSP_SPI_CS_PIN
|
||||
@@ -69,6 +91,7 @@ menu "On-chip Peripheral Drivers"
|
||||
|
||||
menuconfig BSP_USING_I2C
|
||||
bool "Enable I2C"
|
||||
depends on SOC_ESP32_C3
|
||||
default n
|
||||
select RT_USING_I2C
|
||||
if BSP_USING_I2C
|
||||
@@ -100,6 +123,7 @@ menu "On-chip Peripheral Drivers"
|
||||
|
||||
menuconfig BSP_USING_SPI
|
||||
bool "Enable SPI"
|
||||
depends on SOC_ESP32_C3
|
||||
default n
|
||||
select RT_USING_SPI
|
||||
if BSP_USING_SPI
|
||||
@@ -110,15 +134,18 @@ menu "On-chip Peripheral Drivers"
|
||||
|
||||
config BSP_USING_WIFI
|
||||
bool "Enable WIFI"
|
||||
depends on SOC_ESP32_C3
|
||||
select RT_USING_WIFI
|
||||
default n
|
||||
|
||||
config BSP_USING_BLE
|
||||
bool "Enable BLE"
|
||||
depends on SOC_ESP32_C3
|
||||
default n
|
||||
|
||||
menuconfig BSP_USING_CLOCK_TIMER
|
||||
bool "Enable CLOCK_TIMER"
|
||||
depends on SOC_ESP32_C3
|
||||
select RT_USING_CLOCK_TIME
|
||||
default n
|
||||
if BSP_USING_CLOCK_TIMER
|
||||
@@ -129,16 +156,20 @@ menu "On-chip Peripheral Drivers"
|
||||
|
||||
menuconfig BSP_USING_ADC
|
||||
bool "Enable ADC"
|
||||
depends on SOC_ESP32_C3 || SOC_ESP32_C6
|
||||
default y if SOC_ESP32_C6
|
||||
default n
|
||||
select RT_USING_ADC
|
||||
if BSP_USING_ADC
|
||||
config BSP_USING_ADC1
|
||||
bool "Enable ADC1"
|
||||
default y if SOC_ESP32_C6
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_PWM
|
||||
bool "Enable PWM"
|
||||
depends on SOC_ESP32_C3
|
||||
default n
|
||||
select RT_USING_PWM
|
||||
if BSP_USING_PWM
|
||||
@@ -171,6 +202,7 @@ endmenu
|
||||
|
||||
config BSP_ENABLE_GDBSTUB
|
||||
bool "Enable ESP_GDBSTUB compontent"
|
||||
depends on SOC_ESPRESSIF
|
||||
default n
|
||||
|
||||
config RT_SOFT_I2C0_HAS_PIN_DEFAULT
|
||||
|
||||
@@ -36,8 +36,8 @@ void rt_hw_systick_init(void)
|
||||
periph_module_enable(PERIPH_SYSTIMER_MODULE);
|
||||
systimer_hal_init(&systimer_hal);
|
||||
systimer_hal_tick_rate_ops_t ops = {
|
||||
.ticks_to_us = systimer_ticks_to_us,
|
||||
.us_to_ticks = systimer_us_to_ticks,
|
||||
.ticks_to_us = systimer_ticks_to_us,
|
||||
.us_to_ticks = systimer_us_to_ticks,
|
||||
};
|
||||
systimer_hal_set_tick_rate_ops(&systimer_hal, &ops);
|
||||
systimer_ll_set_counter_value(systimer_hal.dev, SYSTIMER_LL_COUNTER_OS_TICK, 0);
|
||||
@@ -50,8 +50,26 @@ void rt_hw_systick_init(void)
|
||||
systimer_hal_enable_counter(&systimer_hal, SYSTIMER_LL_COUNTER_OS_TICK);
|
||||
}
|
||||
|
||||
#ifdef SOC_ESP32_C6
|
||||
#include "riscv/csr.h"
|
||||
|
||||
static void c6_reserve_broken_intr(void)
|
||||
{
|
||||
/* CPU lines 3 and 4 do not latch an enable on this chip. Reserve them
|
||||
* before esp_intr_alloc so the chosen line, its non-IRAM mask and the
|
||||
* matrix route are written together. Copying the handler afterwards
|
||||
* leaves non_iram_int_mask on the old line. */
|
||||
ESP_ERROR_CHECK(esp_intr_reserve(3, 0));
|
||||
ESP_ERROR_CHECK(esp_intr_reserve(4, 0));
|
||||
}
|
||||
#endif
|
||||
|
||||
void rt_hw_board_init(void)
|
||||
{
|
||||
#ifdef SOC_ESP32_C6
|
||||
RV_WRITE_CSR(mideleg, 0);
|
||||
c6_reserve_broken_intr();
|
||||
#endif
|
||||
rt_hw_systick_init();
|
||||
/* Board underlying hardware initialization */
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
@@ -62,6 +80,14 @@ void rt_hw_board_init(void)
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef SOC_ESP32_C6
|
||||
#include "esp_rom_sys.h"
|
||||
|
||||
void rt_hw_us_delay(rt_uint32_t us)
|
||||
{
|
||||
esp_rom_delay_us(us);
|
||||
}
|
||||
#else
|
||||
static gptimer_handle_t gptimer_hw_us = NULL;
|
||||
|
||||
static int delay_us_init(void)
|
||||
@@ -83,9 +109,10 @@ void rt_hw_us_delay(rt_uint32_t us)
|
||||
ESP_ERROR_CHECK(gptimer_start(gptimer_hw_us));
|
||||
ESP_ERROR_CHECK(gptimer_set_raw_count(gptimer_hw_us, 0));
|
||||
/* Retrieve the timestamp at anytime*/
|
||||
while(count < (uint64_t)us)
|
||||
while (count < (uint64_t)us)
|
||||
{
|
||||
ESP_ERROR_CHECK(gptimer_get_raw_count(gptimer_hw_us, &count));
|
||||
}
|
||||
ESP_ERROR_CHECK(gptimer_stop(gptimer_hw_us));
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -37,14 +37,19 @@ static void mcu_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
|
||||
io_conf.pull_down_en = 0;
|
||||
io_conf.pull_up_en = 0;
|
||||
gpio_config(&io_conf);
|
||||
switch (mode)
|
||||
switch (mode)
|
||||
{
|
||||
case PIN_MODE_INPUT:
|
||||
gpio_set_direction(pin, GPIO_MODE_INPUT);
|
||||
case PIN_MODE_OUTPUT:
|
||||
gpio_set_direction(pin, GPIO_MODE_OUTPUT);
|
||||
case PIN_MODE_OUTPUT_OD:
|
||||
gpio_set_direction(pin, GPIO_MODE_INPUT_OUTPUT_OD);
|
||||
case PIN_MODE_INPUT:
|
||||
gpio_set_direction(pin, GPIO_MODE_INPUT);
|
||||
break;
|
||||
case PIN_MODE_OUTPUT:
|
||||
gpio_set_direction(pin, GPIO_MODE_OUTPUT);
|
||||
break;
|
||||
case PIN_MODE_OUTPUT_OD:
|
||||
gpio_set_direction(pin, GPIO_MODE_INPUT_OUTPUT_OD);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
/*TODO:set gpio out put mode */
|
||||
}
|
||||
@@ -53,7 +58,6 @@ static void mcu_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
|
||||
static rt_err_t mcu_pin_attach_irq(struct rt_device *device, rt_base_t pin,
|
||||
rt_uint8_t irq_mode, void (*hdr)(void *args), void *args)
|
||||
{
|
||||
|
||||
/*TODO: start irq handle */
|
||||
return -RT_ENOSYS;
|
||||
}
|
||||
@@ -71,8 +75,7 @@ static rt_err_t mcu_pin_irq_enable(struct rt_device *device, rt_base_t pin,
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
const static struct rt_pin_ops _mcu_pin_ops =
|
||||
{
|
||||
const static struct rt_pin_ops _mcu_pin_ops = {
|
||||
mcu_pin_mode,
|
||||
mcu_pin_write,
|
||||
mcu_pin_read,
|
||||
@@ -89,4 +92,4 @@ int rt_hw_pin_init(void)
|
||||
}
|
||||
INIT_BOARD_EXPORT(rt_hw_pin_init);
|
||||
|
||||
#endif /* RT_USING_PIN */
|
||||
#endif /* RT_USING_PIN */
|
||||
|
||||
@@ -14,11 +14,10 @@
|
||||
#include "driver/uart.h"
|
||||
#include "hal/uart_hal.h"
|
||||
#include "sdkconfig.h"
|
||||
|
||||
#ifdef RT_USING_SERIAL_V1
|
||||
|
||||
#ifdef CONFIG_UART_ISR_IN_IRAM
|
||||
#define UART_ISR_ATTR IRAM_ATTR
|
||||
#define UART_ISR_ATTR IRAM_ATTR
|
||||
#else
|
||||
#define UART_ISR_ATTR
|
||||
#endif
|
||||
@@ -93,8 +92,7 @@ static int mcu_uart_getc(struct rt_serial_device *serial)
|
||||
}
|
||||
}
|
||||
|
||||
static const struct rt_uart_ops _uart_ops =
|
||||
{
|
||||
static const struct rt_uart_ops _uart_ops = {
|
||||
mcu_uart_configure,
|
||||
mcu_uart_control,
|
||||
mcu_uart_putc,
|
||||
@@ -112,10 +110,14 @@ int rt_hw_uart_init(void)
|
||||
uart_config_t uart_config = {
|
||||
.baud_rate = BAUD_RATE_115200,
|
||||
.data_bits = UART_DATA_8_BITS,
|
||||
.parity = UART_PARITY_DISABLE,
|
||||
.parity = UART_PARITY_DISABLE,
|
||||
.stop_bits = UART_STOP_BITS_1,
|
||||
.flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
|
||||
#ifdef SOC_ESP32_C6
|
||||
.source_clk = UART_SCLK_DEFAULT,
|
||||
#else
|
||||
.source_clk = UART_SCLK_APB,
|
||||
#endif
|
||||
};
|
||||
int intr_alloc_flags = 0;
|
||||
|
||||
|
||||
@@ -4,6 +4,9 @@
|
||||
*/
|
||||
#include "rtconfig.h"
|
||||
#pragma once
|
||||
#ifdef SOC_ESP32_C6
|
||||
#include "sdkconfig_c6.h"
|
||||
#else
|
||||
#define CONFIG_SOC_ADC_SUPPORTED 1
|
||||
#define CONFIG_SOC_DEDICATED_GPIO_SUPPORTED 1
|
||||
#define CONFIG_SOC_GDMA_SUPPORTED 1
|
||||
@@ -798,3 +801,4 @@
|
||||
#if defined(BSP_USING_WIFI) || defined(BSP_USING_BLE)
|
||||
#define CONFIG_UDP_RECVMBOX_SIZE CONFIG_LWIP_UDP_RECVMBOX_SIZE
|
||||
#endif
|
||||
#endif
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -838,6 +838,7 @@ This document is based on the RT-Thread mainline repository and categorizes the
|
||||
| BSP Name | GPIO | UART | ADC | I2C | SPI | Soft I2C | HWTimer | PWM | WiFi |
|
||||
|----------|------|------|-----|-----|-----|----------|---------|-----|------|
|
||||
| [ESP32_C3](ESP32_C3) | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ | ✅ |
|
||||
| [ESP32_C6](ESP/ESP32_C6) | ✅ | ✅ | ✅ | - | - | - | - | - | - |
|
||||
|
||||
#### 🟡 Bluetrum
|
||||
|
||||
|
||||
@@ -53,27 +53,31 @@ def _allow_ch32v20x_d6_in_sdk_package():
|
||||
D8W tree or an already patched file is left untouched.
|
||||
"""
|
||||
import re
|
||||
sc = os.path.join(SDK_ROOT, 'packages', 'CH32V20x-SDK-for-RTT', 'SConscript')
|
||||
if not os.path.isfile(sc):
|
||||
return
|
||||
with open(sc, 'r', encoding='utf-8') as f:
|
||||
text = f.read()
|
||||
if 'Exit()' not in text or 'SOC_RISCV_SERIES_CH32V20x_D6' not in text:
|
||||
return
|
||||
if not re.search(r'^import os\b', text, re.M):
|
||||
text = 'import os\n' + text
|
||||
patched, n = re.subn(
|
||||
r"if GetDepend\(\['SOC_RISCV_SERIES_CH32V20x_D6'\]\):.*?\n Exit\(\)\n",
|
||||
"if GetDepend(['SOC_RISCV_SERIES_CH32V20x_D6']):\n"
|
||||
" CPPDEFINES.append(\"CH32V20x_D6\")\n",
|
||||
text,
|
||||
count=1,
|
||||
flags=re.S,
|
||||
)
|
||||
if n == 0 or patched == text:
|
||||
return
|
||||
with open(sc, 'w', encoding='utf-8', newline='\n') as f:
|
||||
f.write(patched)
|
||||
candidates = [
|
||||
os.path.join(SDK_ROOT, 'packages', 'CH32V20x-SDK-for-RTT', 'SConscript'),
|
||||
os.path.join(libraries_path_prefix, 'ch32v20x_sdk-latest', 'SConscript'),
|
||||
]
|
||||
for sc in candidates:
|
||||
if not os.path.isfile(sc):
|
||||
continue
|
||||
with open(sc, 'r', encoding='utf-8') as f:
|
||||
text = f.read()
|
||||
if 'Exit()' not in text or 'SOC_RISCV_SERIES_CH32V20x_D6' not in text:
|
||||
continue
|
||||
if not re.search(r'^import os\b', text, re.M):
|
||||
text = 'import os\n' + text
|
||||
patched, n = re.subn(
|
||||
r"if GetDepend\(\['SOC_RISCV_SERIES_CH32V20x_D6'\]\):.*?\n Exit\(\)\n",
|
||||
"if GetDepend(['SOC_RISCV_SERIES_CH32V20x_D6']):\n"
|
||||
" CPPDEFINES.append(\"CH32V20x_D6\")\n",
|
||||
text,
|
||||
count=1,
|
||||
flags=re.S,
|
||||
)
|
||||
if n == 0 or patched == text:
|
||||
continue
|
||||
with open(sc, 'w', encoding='utf-8', newline='\n') as f:
|
||||
f.write(patched)
|
||||
|
||||
_allow_ch32v20x_d6_in_sdk_package()
|
||||
|
||||
|
||||
@@ -21,6 +21,12 @@ ESP32_C3:
|
||||
gcc: riscv32-esp-elf-gcc
|
||||
menuconfig: true
|
||||
rtconfig.h: true
|
||||
ESP32_C6:
|
||||
.config: true
|
||||
README.md: true
|
||||
gcc: riscv32-esp-elf-gcc
|
||||
menuconfig: true
|
||||
rtconfig.h: true
|
||||
Infineon/psoc6-cy8ckit-062-BLE:
|
||||
.config: true
|
||||
README.md: true
|
||||
|
||||
@@ -387,7 +387,8 @@ riscv-nuclei-elf-gcc:
|
||||
riscv32-esp-elf-gcc:
|
||||
bsp:
|
||||
- ESP32_C3
|
||||
count: 1
|
||||
- ESP32_C6
|
||||
count: 2
|
||||
download_url: https://github.com/espressif/crosstool-NG/releases/download/esp-2022r1-RC1/riscv32-esp-elf-gcc11_2_0-esp-2022r1-RC1-linux-amd64.tar.xz
|
||||
riscv32-unknown-elf-gcc:
|
||||
bsp:
|
||||
|
||||
Reference in New Issue
Block a user