mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2026-10-02 14:23:19 +08:00
[BSP] Support YD-CH32V307VCT6 (#8473)
This commit is contained in:
GSunwinder
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mainmenu "RT-Thread Configuration"
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config BSP_DIR
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string
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option env="BSP_ROOT"
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default "."
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config RTT_DIR
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string
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option env="RTT_ROOT"
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default "../../../.."
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config PKGS_DIR
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string
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option env="PKGS_ROOT"
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default "packages"
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source "$RTT_DIR/Kconfig"
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source "$PKGS_DIR/Kconfig"
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source "../Libraries/Kconfig"
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source "board/Kconfig"
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# YD-CH32V307VCT6 BSP Introduction
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## 1 Introduction
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YD-CH32V307VCT6 is a RISC-V core-based development board with a maximum main frequency of 144Mhz. It delivers the best value for developers to try and get started with RISC-V architecture.
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This document records the execution instruction of the BSP (board support package) provided by the RT-Thread community for the CH32V307V-R1 development board.
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The document is covered in three parts:
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- Board Resources Introduction
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- Compiling
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- Quickly Get Started
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By reading the Quickly Get Started section developers can quickly get their hands on this BSP and run RT-Thread on the board.
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**Features**
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- MCU: CH32V307VCT6, main frequency 144MHz，FLASH and RAM are available for configuration.
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- LED: 2, user LEDs (blue and red).
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- Button: 3, Reset, Boot, User.
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- SPI Flash: 32M-bit serial flash memory (W25Q32).
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- I2C EEPROM: 64k-bit serial EEPROM (24C64).
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- USB: 2, Type-C.
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- Network Port: 1, 10M PHY inside.
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- SDIO: microSD connector.
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- Debug interface: SWD.
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- 8 MHz external quartz oscillator (HSE).
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- 32,768 Hz external RTC quartz oscillator (LSE).
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For more details about this board, please refer to:
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- [Board YD-CH32V307VCT6 VCC-GND Studio](http://152.32.187.208:8080/yd-data/YD-CH32V307VCT6/YD-CH32V307VCT6/)
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- [CH32V307](https://www.wch.cn/products/CH32V307.html)
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- [CH32V307 official document](https://github.com/openwch/ch32v307)
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## 2 Compiling
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The BSP supports the RISC-V GCC development environment, here's the specific version information:
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| IDE/Compiler | Version Tested |
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| ------------ | -------------------- |
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| GCC | WCH RISC-V GCC 8.2.0 |
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## 3 Quickly Get Started
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### 3.1 Using Linux to compile BSP
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This section is about to introduce how to compile the BSP in Linux.
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#### 3.1.1 Compile BSP
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1. [Download WCH Compile Toolchain](https://github.com/NanjingQinheng/sdk-toolchain-RISC-V-GCC-WCH/releases)
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2. [Download the RT-Thread latest code](https://github.com/RT-Thread/rt-thread/archive/refs/heads/master.zip)
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3. Install SCons construction tool (similar GNU Make): sudo apt install scons
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4. Edit the variable **EXEC_PATH** in file **rtconfig.py** to point to the directory with executable WCH Compile Toolchain (file riscv-none-embed-gcc).
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5. Configure RT-Thread and hardware board: scons --menuconfig
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6. Start compilation: scons
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7. After compilation, the **rtthread.bin** file will be generated
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#### 3.1.2 Download
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1. Clone source file: git clone https://github.com/jmaselbas/wch-isp.git
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2. Compile and install :
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- cd wch-isp
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- make && sudo make install && sudo make load
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3. Use a USB cable Type-C to connect board to the PC. Hold button **BOOT0**, press briefly button **RST** and release button **BOOT0**.
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4. Check board connection:
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```sh
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wch-isp list
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0: BTVER v2.9 UID 10-46-89-26-3b-38-d4-a4 [0x1770] CH32V307VCT6
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MCU current flash size: 256 Kbyte
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```
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> Note that Chip Mem here is set to 256K ROM + 64K RAM (see Table 2-1 of datasheet CH32V307, and chapter 32.6 "User Option Bytes" of Reference Manual CH32V2x_V3x).
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5. Download firmware to board:
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```
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wch-isp -p flash ./rtthread.bin && wch-isp reset
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```
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#### 3.1.3 Running Result
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1. Connect USB-UART converter to board:
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- board pin A9 (UART1_TX) -> converter RX
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- board pin A10 (UART1_RX) -> converter TX (optional, for enter commands)
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2. In the terminal tool, open the converter serial port (default 115200-8-1-N), and after resetting the device, you can see the output information of RT-Thread on the serial port:
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```
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\ | /
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- RT - Thread Operating System
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/ | \ 5.1.0 build Jan 6 2024 17:12:03
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2006 - 2022 Copyright by RT-Thread team
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SystemClk: 144000000 Hz
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msh >
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```
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On board LEDs (red and blue) blinking.
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@@ -0,0 +1,15 @@
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# for module compiling
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import os
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Import('RTT_ROOT')
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from building import *
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cwd = GetCurrentDir()
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objs = []
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list = os.listdir(cwd)
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for d in list:
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path = os.path.join(cwd, d)
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if os.path.isfile(os.path.join(path, 'SConscript')):
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objs = objs + SConscript(os.path.join(d, 'SConscript'))
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Return('objs')
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@@ -0,0 +1,65 @@
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import os
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import sys
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import rtconfig
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from SCons.Script import *
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if os.getenv('RTT_ROOT'):
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RTT_ROOT = os.getenv('RTT_ROOT')
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else:
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RTT_ROOT = os.path.normpath(os.getcwd() + '/../../../..')
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sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
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try:
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from building import *
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except:
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print('Cannot found RT-Thread root directory, please check RTT_ROOT')
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print(RTT_ROOT)
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exit(-1)
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TARGET = 'rtthread.' + rtconfig.TARGET_EXT
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DefaultEnvironment(tools=[])
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env = Environment(tools = ['mingw'],
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AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
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CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
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AR = rtconfig.AR, ARFLAGS = '-rc',
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CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
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LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
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env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
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if rtconfig.PLATFORM in ['iccarm']:
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env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
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env.Replace(ARFLAGS = [''])
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env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map')
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Export('RTT_ROOT')
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Export('rtconfig')
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SDK_ROOT = os.path.abspath('./')
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if os.path.exists(SDK_ROOT + '/Libraries'):
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libraries_path_prefix = SDK_ROOT + '/Libraries'
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else:
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libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/Libraries'
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SDK_LIB = libraries_path_prefix
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Export('SDK_LIB')
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# prepare building environment
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objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
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ch32_library = 'ch32v30x_libraries'
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rtconfig.BSP_LIBRARY_TYPE = ch32_library
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bsp_vdir = 'build'
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library_vdir = 'build/libraries'
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# include libraries
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objs.extend(SConscript(os.path.join(libraries_path_prefix, ch32_library, 'SConscript'), variant_dir=library_vdir + '/ch32_library', duplicate=0))
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# common include drivers
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objs.extend(SConscript(os.path.join(libraries_path_prefix, 'ch32_drivers', 'SConscript'), variant_dir=library_vdir + '/ch32_drivers', duplicate=0))
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# make a building
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DoBuilding(TARGET, objs)
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from building import *
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import os
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cwd = GetCurrentDir()
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CPPPATH = [cwd]
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src = ['main.c']
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group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
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list = os.listdir(cwd)
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for item in list:
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if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
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group = group + SConscript(os.path.join(item, 'SConscript'))
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Return('group')
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@@ -0,0 +1,42 @@
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/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2024-01-06 GSunwinder first version
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*
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "ch32v30x.h"
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#include "board.h"
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/*********************************************************************
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* @fn main
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*
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* @brief Main program.
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*
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* @return none
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*/
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int main(void)
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{
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printf("SystemClk: %d Hz\r\n", SystemCoreClock);
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rt_pin_mode(LED_BLUE, PIN_MODE_OUTPUT);
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rt_pin_mode(LED_RED, PIN_MODE_OUTPUT);
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while (1)
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{
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rt_pin_write(LED_RED, PIN_LOW);
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rt_pin_write(LED_BLUE, PIN_HIGH);
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rt_thread_mdelay(1000);
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rt_pin_write(LED_RED, PIN_HIGH);
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rt_pin_write(LED_BLUE, PIN_LOW);
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rt_thread_mdelay(1000);
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}
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}
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import os
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import rtconfig
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from building import *
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Import('SDK_LIB')
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cwd = GetCurrentDir()
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# add general drivers
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src = Split('''
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board.c
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software_irq.c
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''')
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path = [cwd]
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group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path)
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Return('group')
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@@ -0,0 +1,74 @@
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/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-08-23 liYony first version
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*/
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#include "board.h"
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#include <stdint.h>
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#include "drv_usart.h"
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#include <rthw.h>
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#include <rtthread.h>
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extern uint32_t SystemCoreClock;
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static uint32_t _SysTick_Config(rt_uint32_t ticks)
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{
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NVIC_SetPriority(SysTicK_IRQn, 0xf0);
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NVIC_SetPriority(Software_IRQn, 0xf0);
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NVIC_EnableIRQ(SysTicK_IRQn);
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NVIC_EnableIRQ(Software_IRQn);
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SysTick->CTLR = 0;
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SysTick->SR = 0;
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SysTick->CNT = 0;
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SysTick->CMP = ticks - 1;
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SysTick->CTLR = 0xF;
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return 0;
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}
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/**
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* This function will initial your board.
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*/
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void rt_hw_board_init()
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{
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/* System Tick Configuration */
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_SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
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#if defined(RT_USING_USER_MAIN) && defined(RT_USING_HEAP)
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rt_system_heap_init((void *) HEAP_BEGIN, (void *) HEAP_END);
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#endif
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/* USART driver initialization is open by default */
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#ifdef RT_USING_SERIAL
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rt_hw_usart_init();
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#endif
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#ifdef RT_USING_CONSOLE
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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#endif
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#ifdef RT_USING_PIN
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/* pin must initialized before i2c */
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rt_hw_pin_init();
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#endif
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/* Call components board initial (use INIT_BOARD_EXPORT()) */
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#ifdef RT_USING_COMPONENTS_INIT
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rt_components_board_init();
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#endif
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}
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void SysTick_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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void SysTick_Handler(void)
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{
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GET_INT_SP();
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/* enter interrupt */
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rt_interrupt_enter();
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SysTick->SR = 0;
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rt_tick_increase();
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/* leave interrupt */
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rt_interrupt_leave();
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FREE_INT_SP();
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|
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}
|
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@@ -0,0 +1,36 @@
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/*
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||||
* Copyright (c) 2006-2024, RT-Thread Development Team
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||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2022-08-23 liYony first version
|
||||
* 2024-01-06 GSunwinder add define LED pins
|
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*/
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||||
|
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/* <<< Use Configuration Wizard in Context Menu >>> */
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#ifndef __BOARD_H__
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#define __BOARD_H__
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|
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#include <rtthread.h>
|
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#include "ch32v30x.h"
|
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#include "drv_gpio.h"
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#include "drv_pwm.h"
|
||||
|
||||
/* board configuration */
|
||||
#define SRAM_SIZE 64
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#define SRAM_END (0x20000000 + SRAM_SIZE * 1024)
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|
||||
extern int _ebss, _susrstack;
|
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#define HEAP_BEGIN ((void *)&_ebss)
|
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#define HEAP_END ((void *)&_susrstack)
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||||
|
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/* defined the LED pin */
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#define LED_BLUE rt_pin_get("PB.4")
|
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#define LED_RED rt_pin_get("PA.15")
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||||
|
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void rt_hw_board_init(void);
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||||
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||||
#endif /* __BOARD_H__ */
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||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,41 @@
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||||
/*
|
||||
* Copyright (c) 2006-2024, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-09-09 WCH the first version
|
||||
* 2023-01-04 WangShun Remove redundant files
|
||||
*/
|
||||
#include "rtconfig.h"
|
||||
#if defined (SOC_RISCV_SERIES_CH32V1)
|
||||
#include "ch32v10x.h"
|
||||
#elif defined (SOC_RISCV_SERIES_CH32V2)
|
||||
#include "ch32v20x.h"
|
||||
#elif defined (SOC_RISCV_SERIES_CH32V3)
|
||||
#include "ch32v30x.h"
|
||||
#else
|
||||
#error "CH32 architecture doesn't support!"
|
||||
#endif
|
||||
void rt_trigger_software_interrupt(void)
|
||||
{
|
||||
/*CH32V103 does not support systick software interrupt*/
|
||||
#if defined(SOC_RISCV_SERIES_CH32V1)
|
||||
NVIC_SetPendingIRQ(Software_IRQn);
|
||||
#else
|
||||
SysTick->CTLR |= (1 << 31);
|
||||
#endif
|
||||
}
|
||||
|
||||
void rt_hw_do_after_save_above(void)
|
||||
{
|
||||
__asm volatile ("li t0,0x20" );
|
||||
__asm volatile ("csrs 0x804, t0");
|
||||
/*CH32V103 does not support systick software interrupt*/
|
||||
#if defined(SOC_RISCV_SERIES_CH32V1)
|
||||
NVIC_ClearPendingIRQ(Software_IRQn);
|
||||
#else
|
||||
SysTick->CTLR &= ~(1 << 31);
|
||||
#endif
|
||||
}
|
||||
BIN
Binary file not shown.
|
After Width: | Height: | Size: 174 KiB |
Binary file not shown.
|
After Width: | Height: | Size: 193 KiB |
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,70 @@
|
||||
import os
|
||||
ARCH = 'risc-v'
|
||||
CPU = 'ch32'
|
||||
# toolchains options
|
||||
CROSS_TOOL = 'gcc'
|
||||
|
||||
#------- toolchains path -------------------------------------------------------
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = r'/opt/MRS_Toolchain_Linux_x64_V1.90/RISC-V_Embedded_GCC/bin/'
|
||||
else:
|
||||
print('Please make sure your toolchains is GNU GCC!')
|
||||
exit(0)
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'debug'
|
||||
#BUILD = 'release'
|
||||
|
||||
CORE = 'risc-v'
|
||||
MAP_FILE = 'rtthread.map'
|
||||
LINK_FILE = './board/linker_scripts/link.lds'
|
||||
TARGET_NAME = 'rtthread.bin'
|
||||
|
||||
#------- GCC settings ----------------------------------------------------------
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'riscv-none-embed-'
|
||||
CC = PREFIX + 'gcc'
|
||||
CXX= PREFIX + 'g++'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -march=rv32imac -mabi=ilp32 -DUSE_PLIC -DUSE_M_TIME -DNO_INIT -mcmodel=medany -msmall-data-limit=8 -L. -nostartfiles -lc '
|
||||
CFLAGS = DEVICE
|
||||
CFLAGS += ' -save-temps=obj'
|
||||
AFLAGS = '-c'+ DEVICE + ' -x assembler-with-cpp'
|
||||
LFLAGS = DEVICE
|
||||
LFLAGS += ' -Wl,--gc-sections,-cref,-Map=' + MAP_FILE
|
||||
LFLAGS += ' -T ' + LINK_FILE
|
||||
AFLAGS += ' -I.'
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O0 -g3'
|
||||
AFLAGS += ' -g3'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET ' + TARGET_NAME + '\n'
|
||||
POST_ACTION += SIZE + ' $TARGET\n'
|
||||
|
||||
def dist_handle(BSP_ROOT, dist_dir):
|
||||
import sys
|
||||
cwd_path = os.getcwd()
|
||||
sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
|
||||
from sdk_dist import dist_do_building
|
||||
dist_do_building(BSP_ROOT, dist_dir)
|
||||
Reference in New Issue
Block a user