Revert "Add zynq7000 bsp" (#8463)

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Bernard Xiong authored and GitHub committed 2024-01-05 16:31:01 +08:00
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mainmenu "RT-Thread Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config RTT_DIR
string
option env="RTT_ROOT"
default "../../.."
config PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
source "$RTT_DIR/Kconfig"
source "drivers/Kconfig"
config SOC_ZYNQ_7000
bool
select ARCH_ARM_CORTEX_A9
select RT_USING_COMPONENTS_INIT
select RT_USING_USER_MAIN
select RT_USING_GIC_V2
default y
config RT_USING_CACHE
bool
default y
config RT_USING_FPU
bool
default y
source "$PKGS_DIR/Kconfig"
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# 正点原子启明星开发板 BSP 说明
## 简介
本文档是为 正点原子启明星开发板提供的 BSP (板级支持包) 说明。
主要内容如下:
- 开发板资源介绍
- 开发流程说明
## 开发板介绍
正点原子开发的基于 zynq7000 生成的开发板, 注: 理论上也可以适用于其它 zynq7000的开发板.
![board](figures/board.jpg)
开发板更多详细信息请参考[官方文档](http://www.openedv.com/docs/boards/fpga/zdyz_qimxing(V2).html)。
## 外设支持
本 BSP 目前对外设的支持情况如下:
| **核心** | **支持情况** | **备注** |
| :----------------- | :----------: | :------------------------------------- |
| cortex-a9 | 支持 | 运行系统的为cortex-a9核的CPU0 |
| **板载外设** | **支持情况** | **备注** |
| 无 | | |
| **片上外设** | **支持情况** | **备注** |
| GPIO | 支持 | |
| UART | 支持 | UART0, UART1 |
| SPI FLASH | 支持 | |
| EMMC / SDIO | 支持 | |
| CAN | 即将支持 | |
## 使用说明
本 bsp 驱动基于之前的 zynq7000 bsp 的基础上,除了定时器仍然沿用之前的寄存器写法外,其余驱动均基于 vivado sdk 2017.4 生成的驱动库开发。具体开发使用流程如下:
### 1. 创建 vivado 工程 & pl 部分开发
使用 vivado 创建工程, 完成 pl 部分开发, 此部分与 rtt 软件开发无关,
故省略具体说明. 注意 zynq ps 部分必须启用 `MIO`, `UART0` 和 `Quad SPI FLASH`.
### 2. 启动 sdk 生成 bsp 和 fsbl
完成第一步后, 导出硬件到 sdk, 然后启动 sdk, 创建 fsbl 工程
![step2](figures/step_2.png)
![step3](figures/step_3.png)
由于后续即将添加的复杂驱动依赖于usleep.c 的接口函数, 故需要对 sdk
中的 `bsp\ps7_cortexa9_0\libsrc\standalone_v6_5\src\usleep.c` 做如下修改:
```DIFF
@@ -63,6 +63,15 @@
/* Global Timer is always clocked at half of the CPU frequency */
#define COUNTS_PER_USECOND (XPAR_CPU_CORTEXA9_CORE_CLOCK_FREQ_HZ / (2U*1000000U))
+typedef void (*usleep_hook_t) (unsigned long useconds);
+
+static usleep_hook_t usleep_hook;
+
+void zynq_set_usleep_hook(usleep_hook_t hook)
+{
+ usleep_hook = hook;
+}
+
/*****************************************************************************/
/**
*
@@ -78,6 +87,12 @@
****************************************************************************/
int usleep(unsigned long useconds)
{
+ if (usleep_hook)
+ {
+ usleep_hook(useconds);
+ return 0;
+ }
+
XTime tEnd, tCur;
XTime_GetTime(&tCur);
```
修改完成后保存文件,等待sdk 自动完成编译.
### 3. 拷贝 sdk 下的 bsp, 完成 app 编译
拷贝 sdk bsp 文件夹下的 `include` 和 `lib` 文件夹到 [bsp](bsp) 文件夹下
![step4](figures/step_4.png)
然后 scons 编译app, 得到 `rtthread-zynq7000.elf`
### 4. 调试运行
#### 方式1: sdk 调试运行
1. 点击 SDK `Run` -> `Debug Configurations...`
![step5](figures/step_5.png)
2. 右键 new 创建新的 debug
![stp6](figures/step_6.png)
3. 配置 debug, 选择 app 所在路径
![step7](figures/step_7.png)
![step8](figures/step_8.png)
4. 随后点击 debug 就可以运行了.效果如下图所示:
![step9](figures/step_9.png)
![step9_1](figures/step_9_1.png)
#### 方式2: 生成 BOOT.BIN 拷贝到 sd 卡运行
参见 vivado bootgen 使用方法,将 app 换成
scons 编译生成的 `rtthread-zynq7000.elf` 即可
## 联系人信息
维护人:
- [a1012112796](https://github.com/a1012112796)
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# for module compiling
import os
Import('RTT_ROOT')
from building import *
cwd = GetCurrentDir()
objs = []
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')
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import os
import sys
import rtconfig
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
try:
from building import *
except:
print('Cannot found RT-Thread root directory, please check RTT_TOOLS')
print(RTT_ROOT)
exit(-1)
TARGET = 'rtthread-zynq7000.' + rtconfig.TARGET_EXT
DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
Export('RTT_ROOT')
Export('rtconfig')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT)
# if the linker script changed, relink the target
Depends(TARGET, rtconfig.LINK_SCRIPT)
# make a building
DoBuilding(TARGET, objs)
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*startfile:
crti%O%s crtbegin%O%s
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Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = GetCurrentDir()
CPPPATH = [cwd + '/..']
src = Split('''
app.c
''')
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
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#include "rtthread.h"
#include "rtdevice.h"
#define LED_PIN 0
int main(void)
{
rt_pin_mode(LED_PIN, PIN_MODE_OUTPUT);
rt_uint8_t out = 0;
while(1)
{
rt_thread_mdelay(500);
rt_pin_write(LED_PIN, out);
out = (out + 1) % 2;
}
return 0;
}
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*.bit
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.\bootgen.exe -image output.bif -o BOOT.BIN -w on
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//arch = zynq; split = false; format = BIN
the_ROM_image:
{
[bootloader]fsbl.elf
..\rtthread-zynq7000.elf
}
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/lib
/include
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from building import *
cwd = GetCurrentDir()
CPPPATH = [cwd + '/include',]
LIBS = ['libxil',]
LIBPATH = [cwd + '/lib']
group = DefineGroup('zynq_hal', [],
depend = [],
CPPPATH = CPPPATH,
LIBS = LIBS,
LIBPATH = LIBPATH)
Return('group')
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menu "Hardware Drivers Config"
menu "On-chip Peripheral Drivers"
config BSP_USING_GPIO
bool "Enable zynq MIO"
select RT_USING_PIN
default y
menuconfig BSP_USING_UART
bool "Enable UART"
default y
select RT_USING_SERIAL
if BSP_USING_UART
config BSP_USING_UART0
bool "Enable UART0"
default y
config BSP_USING_UART1
bool "Enable UART1"
default n
endif
config BSP_USING_SPIFLASH
bool "Enable spi flash"
select RT_USING_FAL
default n
menuconfig BSP_USING_SDIO
bool "Enable sdio (emmc)"
default n
if BSP_USING_SDIO
config BSP_USING_SDIO0
bool "Enable sdio0"
default n
config BSP_USING_SDIO1
bool "Enable sdio1"
default n
endif
endmenu
endmenu
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from building import *
cwd = GetCurrentDir()
src = Glob('*.c')
if GetDepend('BSP_USING_UART') == False:
src_need_remove = ['drv_uart.c'] # need remove file list.
SrcRemove(src, src_need_remove)
if GetDepend('BSP_USING_SPIFLASH') == False:
src_need_remove = ['drv_spiflash.c'] # need remove file list.
SrcRemove(src, src_need_remove)
if GetDepend('BSP_USING_SDIO') == False:
src_need_remove = ['drv_emmc.c'] # need remove file list.
SrcRemove(src, src_need_remove)
CPPPATH = [cwd]
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
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#include <rthw.h>
#include <rtthread.h>
#include "xil_assert.h"
#include "rtdevice.h"
#include "drv_gpio.h"
#include <mmu.h>
extern rt_uint32_t __text_start;
struct mem_desc platform_mem_desc[] = {
/* no access to the memory below .text */
/* 521Mb cached DDR memory */
{(rt_uint32_t)&__text_start, 0x3F600000-1, (rt_uint32_t)&__text_start, NORMAL_MEM},
/* PL region */
{0x40000000, 0xBFFFFFFF, 0x40000000, DEVICE_MEM},
/* IOP registers */
{0xE0000000, 0xE02FFFFF, 0xE0000000, DEVICE_MEM},
/* SLCR, PS and CPU private registers, note we map more memory space as the
* entry is 1MB in size. */
{0xF8000000, 0xFFFFFFFF, 0xF8000000, DEVICE_MEM},
};
const rt_uint32_t platform_mem_desc_size = sizeof(platform_mem_desc)/sizeof(platform_mem_desc[0]);
void idle_wfi(void)
{
asm volatile ("wfi");
}
static void rt_xil_assert_callback(const char8 *File, s32 Line)
{
rt_kprintf("Xil_AssertCallback: %s, %d\n", File, Line);
RT_ASSERT(0);
}
typedef void (*usleep_hook_t) (unsigned long useconds);
// note: should edit usleep.c in bsp to fix it
//
// static usleep_hook_t usleep_hook;
//
// void zynq_set_usleep_hook(usleep_hook_t hook)
// {
// usleep_hook = hook;
// }
//
// int usleep(unsigned long useconds)
// {
// if (usleep_hook)
// {
// usleep_hook(useconds);
// return 0;
// }
// XTime tEnd, tCur;
// XTime_GetTime(&tCur);
// tEnd = tCur + (((XTime) useconds) * COUNTS_PER_USECOND);
// do
// {
// XTime_GetTime(&tCur);
// } while (tCur < tEnd);
// return 0;
// }
//
extern void zynq_set_usleep_hook(usleep_hook_t hook);
static void hw_usleep_hook(unsigned long useconds)
{
useconds /= 1000;
if (useconds == 0)
useconds = 1;
rt_thread_mdelay(useconds);
}
static int setup_zynq_usleep_hook(void)
{
zynq_set_usleep_hook(hw_usleep_hook);
return 0;
}
INIT_BOARD_EXPORT(setup_zynq_usleep_hook);
static void _assert_hook (const char *ex, const char *func, rt_size_t line)
{
RT_ASSERT(0);
}
/**
* This function will initialize beaglebone board
*/
void rt_hw_board_init(void)
{
Xil_AssertSetCallback(rt_xil_assert_callback);
/* initialize hardware interrupt */
rt_hw_interrupt_init();
/* initialize system heap */
rt_system_heap_init(HEAP_BEGIN, HEAP_END);
rt_hw_pin_init();
rt_components_board_init();
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
rt_thread_idle_sethook(idle_wfi);
#ifdef RT_USING_SMP
/* install IPI handle */
rt_hw_ipi_handler_install(RT_SCHEDULE_IPI, rt_scheduler_ipi_handler);
#endif
rt_assert_set_hook(_assert_hook);
}
#include "xil_io.h"
#define PSS_RST_CTRL_REG 0xF8000200
#define SLCR_UNLOCK_ADDR 0xF8000008
#define UNLOCK_KEY 0xDF0D
#define PSS_RST_MASK 0x01
static void zynq_hw_software_reset(void)
{
Xil_Out32(SLCR_UNLOCK_ADDR, UNLOCK_KEY);
Xil_Out32(PSS_RST_CTRL_REG, PSS_RST_MASK);
}
MSH_CMD_EXPORT_ALIAS(zynq_hw_software_reset, reboot, soft reboot);
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#ifndef __BOARD_H__
#define __BOARD_H__
#if defined(__CC_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void*)&Image$$RW_IRAM1$$ZI$$Limit)
#elif defined(__GNUC__)
extern int __bss_end;
#define HEAP_BEGIN ((void*)&__bss_end)
#endif
#define HEAP_END (void*)(0x20100000-1)
#define GIC_IRQ_START 0
#define MAX_HANDLERS 94
#define GIC_ACK_INTID_MASK 0x000003ff
#define ARM_GIC_MAX_NR 1
#define ARM_GIC_NR_IRQS MAX_HANDLERS
#include "rtthread.h"
#include "xparameters.h"
#define Zynq7000_GIC_CPU_BASE XPAR_PS7_SCUGIC_0_BASEADDR
#define Zynq7000_GIC_DIST_BASE XPAR_PS7_SCUGIC_0_DIST_BASEADDR
rt_inline rt_uint32_t platform_get_gic_dist_base(void)
{
return Zynq7000_GIC_DIST_BASE;
}
rt_inline rt_uint32_t platform_get_gic_cpu_base(void)
{
return Zynq7000_GIC_CPU_BASE;
}
#define __REG32(x) (*((volatile unsigned int *)(x)))
#define __REG16(x) (*((volatile unsigned short *)(x)))
void rt_hw_board_init();
int rt_hw_uart_init(void);
#endif
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#ifndef __DRV_GPIO_H__
#define __DRV_GPIO_H__
#include <board.h>
#ifdef __cplusplus
extern "C" {
#endif
int rt_hw_pin_init(void);
#ifdef __cplusplus
}
#endif
#endif /* __DRV_GPIO_H__ */
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#include "rtthread.h"
#include "xparameters.h"
#include "xscutimer.h"
#define APU_FREQ XPAR_PS7_CORTEXA9_0_CPU_CLK_FREQ_HZ
#define TIMER_DEVICE_ID XPAR_XSCUTIMER_0_DEVICE_ID
#define TIMER_IRPT_INTR XPAR_SCUTIMER_INTR
static XScuTimer timer;
static void rt_hw_timer_isr(int vector, void *param)
{
rt_tick_increase();
XScuTimer_ClearInterruptStatus(&timer);
}
int rt_hw_timer_init(void)
{
XScuTimer_Config *cfg;
s32 err;
cfg = XScuTimer_LookupConfig(TIMER_DEVICE_ID);
RT_ASSERT(cfg);
err = XScuTimer_CfgInitialize(&timer, cfg, cfg->BaseAddr);
RT_ASSERT(err == XST_SUCCESS);
err = XScuTimer_SelfTest(&timer);
RT_ASSERT(err == XST_SUCCESS);
rt_hw_interrupt_install(TIMER_IRPT_INTR, rt_hw_timer_isr, RT_NULL, "tick");
rt_hw_interrupt_umask(TIMER_IRPT_INTR);
XScuTimer_EnableInterrupt(&timer);
XScuTimer_LoadTimer(&timer, APU_FREQ/2/RT_TICK_PER_SECOND);
XScuTimer_EnableAutoReload(&timer);
XScuTimer_Start(&timer);
return 0;
}
INIT_BOARD_EXPORT(rt_hw_timer_init);
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/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-05-17 armink the first version
*/
#ifndef _FAL_CFG_H_
#define _FAL_CFG_H_
#include <rtconfig.h>
/* ===================== Flash device Configuration ========================= */
extern const struct fal_flash_dev spi_flash;
/* flash device table */
#define FAL_FLASH_DEV_TABLE \
{ \
&spi_flash, \
}
/* ====================== Partition Configuration ========================== */
#ifdef FAL_PART_HAS_TABLE_CFG
/* partition table */
#define FAL_PART_TABLE \
{ \
{FAL_PART_MAGIC_WORD, "golden", "spi_flash", 0, 8*1024*1024, 0}, \
{FAL_PART_MAGIC_WORD, "app", "spi_flash", 8*1024*1024, 8*1024*1024, 0}, \
{FAL_PART_MAGIC_WORD, "data", "spi_flash", 16*1024*1024, 8*1024*1024, 0}, \
}
#endif /* FAL_PART_HAS_TABLE_CFG */
#endif /* _FAL_CFG_H_ */
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import os
# toolchains options
ARCH='arm'
CPU='cortex-a'
CROSS_TOOL='gcc'
if os.getenv('RTT_CC'):
CROSS_TOOL = os.getenv('RTT_CC')
# only support GNU GCC compiler
PLATFORM = 'gcc'
EXEC_PATH = '/opt/arm-none-eabi-gcc'
if os.getenv('RTT_EXEC_PATH'):
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
# BUILD = 'relsase'
BUILD = 'debug'
if os.getenv('RTT_BUILD_TYPE'):
BUILD = os.getenv('RTT_BUILD_TYPE')
if PLATFORM == 'gcc':
# toolchains
PREFIX = 'arm-none-eabi-'
CC = PREFIX + 'gcc'
CXX = PREFIX + 'g++'
AS = PREFIX + 'gcc'
AR = PREFIX + 'ar'
LINK = PREFIX + 'gcc'
TARGET_EXT = 'elf'
SIZE = PREFIX + 'size'
OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy'
STRIP = PREFIX + 'strip'
DEVICE = ' -Wall -Werror -mcpu=cortex-a9 -mfloat-abi=hard -mfpu=vfpv3 -ffunction-sections -fdata-sections -funwind-tables '
CFLAGS = DEVICE
AFLAGS = ' -c -fmessage-length=0' + DEVICE + ' -x assembler-with-cpp -D__ASSEMBLY__ -I. '
LINK_SCRIPT = 'lscript.ld'
LFLAGS = DEVICE + ' -Wl,-Map=zynq7000.map,--gc-sections,-build-id=none -specs=Xilinx.spec -Wl,-T -Wl,%s' % LINK_SCRIPT
CXXFLAGS = DEVICE + ' -std=gnu++11 -Woverloaded-virtual -fno-exceptions -fno-rtti'
CPATH = ''
LPATH = ''
M_CFLAGS = CFLAGS + ' -mlong-calls -fPIC '
M_CXXFLAGS = CXXFLAGS + ' -mlong-calls -fPIC'
M_LFLAGS = DEVICE + CXXFLAGS + ' -Wl,--gc-sections,-z,max-page-size=0x4' +\
' -shared -fPIC -nostartfiles -nostdlib -static-libgcc'
M_POST_ACTION = STRIP + ' -R .hash $TARGET\n' + SIZE + ' $TARGET \n'
if BUILD == 'debug':
CFLAGS += ' -O0 -gdwarf-2'
AFLAGS += ' -gdwarf-2'
else:
CFLAGS += ' -O3'
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' +\
SIZE + ' $TARGET \n'